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Fixed I2C slave bugs on Renesas RZ/A series:
Added the register operation when received the slave address.
1 parent 5931050 commit e3fea11

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2 files changed

+33
-1
lines changed

2 files changed

+33
-1
lines changed

targets/TARGET_RENESAS/TARGET_RZ_A1XX/i2c_api.c

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
/* mbed Microcontroller Library
2-
* Copyright (c) 2006-2013 ARM Limited
2+
* Copyright (c) 2006-2020 ARM Limited
33
* SPDX-License-Identifier: Apache-2.0
44
*
55
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -50,10 +50,19 @@ volatile struct st_riic *RIIC[] = RIIC_ADDRESS_LIST;
5050

5151
/* RIICnSER */
5252
#define SER_SAR0E (1 << 0)
53+
#define SER_SAR1E (1 << 1)
54+
#define SER_SAR2E (1 << 2)
55+
#define SER_GCE (1 << 3)
56+
#define SER_DIDE (1 << 5)
57+
#define SER_HOAE (1 << 7)
5358

5459
/* RIICnSR1 */
5560
#define SR1_AAS0 (1 << 0)
61+
#define SR1_AAS1 (1 << 1)
62+
#define SR1_AAS2 (1 << 2)
5663
#define SR1_GCA (1 << 3)
64+
#define SR1_DID (1 << 5)
65+
#define SR1_HOA (1 << 7)
5766

5867
/* RIICnSR2 */
5968
#define SR2_START (1 << 2)
@@ -689,6 +698,12 @@ int i2c_slave_receive(i2c_t *obj)
689698
retval = 0;
690699
}
691700

701+
/* to detect restart-condition */
702+
if (0 != retval) {
703+
/* SR2.START = 0 */
704+
REG(SR2.UINT32) &= ~SR2_START;
705+
}
706+
692707
return retval;
693708
}
694709

@@ -704,6 +719,7 @@ int i2c_slave_read(i2c_t *obj, char *data, int length)
704719
for (count = 0; ((count < (length + 1)) && (break_flg == 0)); count++) {
705720
/* There is no timeout, but the upper limit value is set to avoid an infinite loop. */
706721
while (((i2c_status(obj) & (SR2_STOP | SR2_START)) != 0) || ((i2c_status(obj) & SR2_RDRF) == 0)) {
722+
/* received stop-condition or restart-condition */
707723
if ((i2c_status(obj) & (SR2_STOP | SR2_START)) != 0) {
708724
break_flg = 1;
709725
break;

targets/TARGET_RENESAS/TARGET_RZ_A2XX/i2c_api.c

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -48,10 +48,19 @@ static const volatile struct st_riic *RIIC[] = {
4848

4949
/* RIICnSER */
5050
#define SER_SAR0E (1 << 0)
51+
#define SER_SAR1E (1 << 1)
52+
#define SER_SAR2E (1 << 2)
53+
#define SER_GCE (1 << 3)
54+
#define SER_DIDE (1 << 5)
55+
#define SER_HOAE (1 << 7)
5156

5257
/* RIICnSR1 */
5358
#define SR1_AAS0 (1 << 0)
59+
#define SR1_AAS1 (1 << 1)
60+
#define SR1_AAS2 (1 << 2)
5461
#define SR1_GCA (1 << 3)
62+
#define SR1_DID (1 << 5)
63+
#define SR1_HOA (1 << 7)
5564

5665
/* RIICnSR2 */
5766
#define SR2_START (1 << 2)
@@ -689,6 +698,12 @@ int i2c_slave_receive(i2c_t *obj)
689698
retval = 0;
690699
}
691700

701+
/* to detect restart-condition */
702+
if (0 != retval) {
703+
/* SR2.START = 0 */
704+
obj->i2c.i2c->ICSR2.LONG &= ~SR2_START;
705+
}
706+
692707
return retval;
693708
}
694709

@@ -704,6 +719,7 @@ int i2c_slave_read(i2c_t *obj, char *data, int length)
704719
for (count = 0; ((count < (length + 1)) && (break_flg == 0)); count++) {
705720
/* There is no timeout, but the upper limit value is set to avoid an infinite loop. */
706721
while (((i2c_status(obj) & (SR2_STOP | SR2_START)) != 0) || ((i2c_status(obj) & SR2_RDRF) == 0)) {
722+
/* received stop-condition or restart-condition */
707723
if ((i2c_status(obj) & (SR2_STOP | SR2_START)) != 0) {
708724
break_flg = 1;
709725
break;

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