@@ -2607,12 +2607,13 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
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xfermode = hi2c -> XferOptions ;
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}
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+ // MBED commit 23926a2418
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/* If transfer direction not change, do not generate Restart Condition */
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/* Mean Previous state is same as current state */
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- if (hi2c -> PreviousState == I2C_STATE_MASTER_BUSY_TX )
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- {
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- xferrequest = I2C_NO_STARTSTOP ;
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- }
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+ // if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
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+ // {
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+ // xferrequest = I2C_NO_STARTSTOP;
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+ // }
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/* Send Slave Address and set NBYTES to write */
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I2C_TransferConfig (hi2c , DevAddress , hi2c -> XferSize , xfermode , xferrequest );
@@ -2680,12 +2681,13 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
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xfermode = hi2c -> XferOptions ;
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}
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+ // MBED commit 23926a2418
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/* If transfer direction not change, do not generate Restart Condition */
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/* Mean Previous state is same as current state */
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- if (hi2c -> PreviousState == I2C_STATE_MASTER_BUSY_RX )
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- {
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- xferrequest = I2C_NO_STARTSTOP ;
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- }
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+ // if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
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+ // {
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+ // xferrequest = I2C_NO_STARTSTOP;
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+ // }
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/* Send Slave Address and set NBYTES to read */
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I2C_TransferConfig (hi2c , DevAddress , hi2c -> XferSize , xfermode , xferrequest );
@@ -3444,7 +3446,7 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint
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{
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/* Call I2C Slave Sequential complete process */
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I2C_ITSlaveSequentialCplt (hi2c );
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- }
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+ }
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}
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else if (((ITFlags & I2C_FLAG_ADDR ) != RESET ) && ((ITSources & I2C_IT_ADDRI ) != RESET ))
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{
@@ -3510,7 +3512,7 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui
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/* Set corresponding Error Code */
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hi2c -> ErrorCode |= HAL_I2C_ERROR_AF ;
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-
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+
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/* No need to generate STOP, it is automatically done */
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/* But enable STOP interrupt, to treat it */
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/* Error callback will be send during stop flag treatment */
@@ -3528,7 +3530,7 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui
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{
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/* Recover Slave address */
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devaddress = (hi2c -> Instance -> CR2 & I2C_CR2_SADD );
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-
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+
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/* Prepare the new XferSize to transfer */
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if (hi2c -> XferCount > MAX_NBYTE_SIZE )
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{
@@ -3564,7 +3566,7 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui
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I2C_ITError (hi2c , HAL_I2C_ERROR_SIZE );
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}
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}
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- else if (((ITFlags & I2C_FLAG_STOPF ) != RESET ) && ((ITSources & I2C_IT_STOPI ) != RESET ))
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+ else if (((ITFlags & I2C_FLAG_STOPF ) != RESET ) && ((ITSources & I2C_IT_STOPI ) != RESET ))
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{
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/* Call I2C Master complete process */
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I2C_ITMasterCplt (hi2c , ITFlags );
@@ -3605,7 +3607,7 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin
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/* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
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/* Clear NACK Flag */
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__HAL_I2C_CLEAR_FLAG (hi2c , I2C_FLAG_AF );
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-
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+
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/* Set ErrorCode corresponding to a Non-Acknowledge */
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hi2c -> ErrorCode |= HAL_I2C_ERROR_AF ;
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}
@@ -4208,7 +4210,7 @@ static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode)
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{
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/* Disable all interrupts */
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I2C_Disable_IRQ (hi2c , I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT );
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-
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+
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/* If state is an abort treatment on goind, don't change state */
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/* This change will be do later */
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if (hi2c -> State != HAL_I2C_STATE_ABORT )
@@ -4261,7 +4263,7 @@ static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode)
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else if (hi2c -> State == HAL_I2C_STATE_ABORT )
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{
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hi2c -> State = HAL_I2C_STATE_READY ;
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-
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+
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/* Process Unlocked */
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__HAL_UNLOCK (hi2c );
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