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STM32L0: back to updated files
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8 files changed

+735
-291
lines changed

8 files changed

+735
-291
lines changed

targets/TARGET_STM/TARGET_STM32L0/STM32Cube_FW/STM32L0xx_HAL_Driver/stm32l0xx_hal_adc.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -280,9 +280,8 @@
280280
#define ADC_STAB_DELAY_US ((uint32_t) 1U)
281281

282282
/* Delay for temperature sensor stabilization time. */
283-
/* Maximum delay is 10us (refer to device datasheet, parameter tSTART). */
284283
/* Unit: us */
285-
#define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 10U)
284+
#define ADC_TEMPSENSOR_DELAY_US ((uint32_t) 20000U)
286285
/**
287286
* @}
288287
*/

targets/TARGET_STM/TARGET_STM32L0/STM32Cube_FW/STM32L0xx_HAL_Driver/stm32l0xx_hal_crc.c

Lines changed: 12 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -422,7 +422,14 @@ uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t
422422
return temp;
423423
}
424424

425+
#if __GNUC__
426+
# define MAY_ALIAS __attribute__ ((__may_alias__))
427+
#else
428+
# define MAY_ALIAS
429+
#endif
425430

431+
typedef __IO uint8_t MAY_ALIAS uint8_io_t;
432+
typedef __IO uint16_t MAY_ALIAS uint16_io_t;
426433

427434
/**
428435
* @}
@@ -487,16 +494,16 @@ static uint32_t CRC_Handle_8(CRC_HandleTypeDef *hcrc, uint8_t pBuffer[], uint32_
487494
{
488495
if (BufferLength%4U == 1U)
489496
{
490-
*(uint8_t volatile*) (&hcrc->Instance->DR) = pBuffer[4U*i];
497+
*(uint8_io_t*) (&hcrc->Instance->DR) = pBuffer[4U*i];
491498
}
492499
if (BufferLength%4U == 2U)
493500
{
494-
*(uint16_t volatile*) (&hcrc->Instance->DR) = ((uint32_t)pBuffer[4U*i]<<8U) | (uint32_t)pBuffer[4U*i+1U];
501+
*(uint16_io_t*) (&hcrc->Instance->DR) = ((uint32_t)pBuffer[4U*i]<<8U) | (uint32_t)pBuffer[4U*i+1U];
495502
}
496503
if (BufferLength%4U == 3U)
497504
{
498-
*(uint16_t volatile*) (&hcrc->Instance->DR) = ((uint32_t)pBuffer[4U*i]<<8U) | (uint32_t)pBuffer[4U*i+1U];
499-
*(uint8_t volatile*) (&hcrc->Instance->DR) = pBuffer[4U*i+2U];
505+
*(uint16_io_t*) (&hcrc->Instance->DR) = ((uint32_t)pBuffer[4U*i]<<8U) | (uint32_t)pBuffer[4U*i+1U];
506+
*(uint8_io_t*) (&hcrc->Instance->DR) = pBuffer[4U*i+2U];
500507
}
501508
}
502509

@@ -525,7 +532,7 @@ static uint32_t CRC_Handle_16(CRC_HandleTypeDef *hcrc, uint16_t pBuffer[], uint3
525532
}
526533
if ((BufferLength%2U) != 0U)
527534
{
528-
*(uint16_t volatile*) (&hcrc->Instance->DR) = pBuffer[2U*i];
535+
*(uint16_io_t*) (&hcrc->Instance->DR) = pBuffer[2U*i];
529536
}
530537

531538
/* Return the CRC computed value */

targets/TARGET_STM/TARGET_STM32L0/STM32Cube_FW/STM32L0xx_HAL_Driver/stm32l0xx_hal_i2c.c

Lines changed: 17 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -2607,12 +2607,13 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
26072607
xfermode = hi2c->XferOptions;
26082608
}
26092609

2610+
// MBED commit 23926a2418
26102611
/* If transfer direction not change, do not generate Restart Condition */
26112612
/* Mean Previous state is same as current state */
2612-
if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
2613-
{
2614-
xferrequest = I2C_NO_STARTSTOP;
2615-
}
2613+
//if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
2614+
//{
2615+
// xferrequest = I2C_NO_STARTSTOP;
2616+
//}
26162617

26172618
/* Send Slave Address and set NBYTES to write */
26182619
I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest);
@@ -2680,12 +2681,13 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
26802681
xfermode = hi2c->XferOptions;
26812682
}
26822683

2684+
// MBED commit 23926a2418
26832685
/* If transfer direction not change, do not generate Restart Condition */
26842686
/* Mean Previous state is same as current state */
2685-
if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
2686-
{
2687-
xferrequest = I2C_NO_STARTSTOP;
2688-
}
2687+
//if (hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
2688+
//{
2689+
// xferrequest = I2C_NO_STARTSTOP;
2690+
//}
26892691

26902692
/* Send Slave Address and set NBYTES to read */
26912693
I2C_TransferConfig(hi2c, DevAddress, hi2c->XferSize, xfermode, xferrequest);
@@ -3444,7 +3446,7 @@ static HAL_StatusTypeDef I2C_Slave_ISR_IT(struct __I2C_HandleTypeDef *hi2c, uint
34443446
{
34453447
/* Call I2C Slave Sequential complete process */
34463448
I2C_ITSlaveSequentialCplt(hi2c);
3447-
}
3449+
}
34483450
}
34493451
else if (((ITFlags & I2C_FLAG_ADDR) != RESET) && ((ITSources & I2C_IT_ADDRI) != RESET))
34503452
{
@@ -3510,7 +3512,7 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui
35103512

35113513
/* Set corresponding Error Code */
35123514
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
3513-
3515+
35143516
/* No need to generate STOP, it is automatically done */
35153517
/* But enable STOP interrupt, to treat it */
35163518
/* Error callback will be send during stop flag treatment */
@@ -3528,7 +3530,7 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui
35283530
{
35293531
/* Recover Slave address */
35303532
devaddress = (hi2c->Instance->CR2 & I2C_CR2_SADD);
3531-
3533+
35323534
/* Prepare the new XferSize to transfer */
35333535
if (hi2c->XferCount > MAX_NBYTE_SIZE)
35343536
{
@@ -3564,7 +3566,7 @@ static HAL_StatusTypeDef I2C_Master_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, ui
35643566
I2C_ITError(hi2c, HAL_I2C_ERROR_SIZE);
35653567
}
35663568
}
3567-
else if (((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
3569+
else if(((ITFlags & I2C_FLAG_STOPF) != RESET) && ((ITSources & I2C_IT_STOPI) != RESET))
35683570
{
35693571
/* Call I2C Master complete process */
35703572
I2C_ITMasterCplt(hi2c, ITFlags);
@@ -3605,7 +3607,7 @@ static HAL_StatusTypeDef I2C_Slave_ISR_DMA(struct __I2C_HandleTypeDef *hi2c, uin
36053607
/* if no, error use case, a Non-Acknowledge of last Data is generated by the MASTER*/
36063608
/* Clear NACK Flag */
36073609
__HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF);
3608-
3610+
36093611
/* Set ErrorCode corresponding to a Non-Acknowledge */
36103612
hi2c->ErrorCode |= HAL_I2C_ERROR_AF;
36113613
}
@@ -4208,7 +4210,7 @@ static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode)
42084210
{
42094211
/* Disable all interrupts */
42104212
I2C_Disable_IRQ(hi2c, I2C_XFER_LISTEN_IT | I2C_XFER_RX_IT | I2C_XFER_TX_IT);
4211-
4213+
42124214
/* If state is an abort treatment on goind, don't change state */
42134215
/* This change will be do later */
42144216
if (hi2c->State != HAL_I2C_STATE_ABORT)
@@ -4261,7 +4263,7 @@ static void I2C_ITError(I2C_HandleTypeDef *hi2c, uint32_t ErrorCode)
42614263
else if (hi2c->State == HAL_I2C_STATE_ABORT)
42624264
{
42634265
hi2c->State = HAL_I2C_STATE_READY;
4264-
4266+
42654267
/* Process Unlocked */
42664268
__HAL_UNLOCK(hi2c);
42674269

targets/TARGET_STM/TARGET_STM32L0/STM32Cube_FW/STM32L0xx_HAL_Driver/stm32l0xx_hal_rcc.c

Lines changed: 13 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -787,7 +787,19 @@ HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
787787
}
788788
else
789789
{
790-
return HAL_ERROR;
790+
/* MBED patch - ST internal ticket 42806 */
791+
if (READ_BIT(RCC->CFGR, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) {
792+
return HAL_ERROR;
793+
}
794+
795+
if (READ_BIT(RCC->CFGR, RCC_CFGR_PLLDIV) != RCC_OscInitStruct->PLL.PLLDIV) {
796+
return HAL_ERROR;
797+
}
798+
799+
if (READ_BIT(RCC->CFGR, RCC_CFGR_PLLMUL) != RCC_OscInitStruct->PLL.PLLMUL) {
800+
return HAL_ERROR;
801+
}
802+
/* MBED patch - ST internal ticket 42806 */
791803
}
792804
}
793805

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