From 7f43d4ac08c9e05ffd91deba227245040b2ebad8 Mon Sep 17 00:00:00 2001 From: Diptorup Deb Date: Thu, 3 Dec 2020 14:22:24 -0600 Subject: [PATCH 1/4] Refactoring the backend functions to prep for changes to add L0 support. --- .../include/dpctl_sycl_program_interface.h | 9 +- .../source/dpctl_sycl_program_interface.cpp | 113 ++++++++++++------ 2 files changed, 83 insertions(+), 39 deletions(-) diff --git a/dpctl-capi/include/dpctl_sycl_program_interface.h b/dpctl-capi/include/dpctl_sycl_program_interface.h index febffdbc1e..c931b4b166 100644 --- a/dpctl-capi/include/dpctl_sycl_program_interface.h +++ b/dpctl-capi/include/dpctl_sycl_program_interface.h @@ -41,11 +41,10 @@ DPCTL_C_EXTERN_C_BEGIN * @brief Create a Sycl program from an OpenCL SPIR-V binary file. * * Sycl 1.2 does not expose any method to create a sycl::program from a SPIR-V - * IL file. To get around this limitation, we need to use the Sycl feature to - * create an interoperability kernel from an OpenCL kernel. This function first - * creates an OpenCL program and kernel from the SPIR-V binary and then using - * the Sycl-OpenCL interoperability feature creates a Sycl kernel from the - * OpenCL kernel. + * IL file. To get around this limitation, we first creare a SYCL + * interoperability program and then create a SYCL program from the + * interoperability program. Currently, interoperability programs can be created + * for OpenCL and Level-0 backends. * * The feature to create a Sycl kernel from a SPIR-V IL binary will be available * in Sycl 2.0 at which point this function may become deprecated. diff --git a/dpctl-capi/source/dpctl_sycl_program_interface.cpp b/dpctl-capi/source/dpctl_sycl_program_interface.cpp index d7dae83e0f..700628d8e3 100644 --- a/dpctl-capi/source/dpctl_sycl_program_interface.cpp +++ b/dpctl-capi/source/dpctl_sycl_program_interface.cpp @@ -38,22 +38,13 @@ DEFINE_SIMPLE_CONVERSION_FUNCTIONS(context, DPCTLSyclContextRef) DEFINE_SIMPLE_CONVERSION_FUNCTIONS(program, DPCTLSyclProgramRef) DEFINE_SIMPLE_CONVERSION_FUNCTIONS(kernel, DPCTLSyclKernelRef) -} /* end of anonymous namespace */ - -__dpctl_give DPCTLSyclProgramRef -DPCTLProgram_CreateFromOCLSpirv (__dpctl_keep const DPCTLSyclContextRef CtxRef, - __dpctl_keep const void *IL, - size_t length) +__dppl_give DPCTLSyclProgramRef +createOpenCLInterOpProgram (const context &SyclCtx, + __dppl_keep const void *IL, + size_t length) { cl_int err; - context *SyclCtx; - if(!CtxRef) { - // \todo handle error - return nullptr; - } - - SyclCtx = unwrap(CtxRef); - auto CLCtx = SyclCtx->get(); + auto CLCtx = SyclCtx.get(); auto CLProgram = clCreateProgramWithIL(CLCtx, IL, length, &err); if (err) { // \todo: record the error string and any other information. @@ -61,7 +52,7 @@ DPCTLProgram_CreateFromOCLSpirv (__dpctl_keep const DPCTLSyclContextRef CtxRef, "binary. OpenCL Error " << err << ".\n"; return nullptr; } - auto SyclDevices = SyclCtx->get_devices(); + auto SyclDevices = SyclCtx.get_devices(); // Get a list of CL Devices from the Sycl devices auto CLDevices = new cl_device_id[SyclDevices.size()]; @@ -83,18 +74,50 @@ DPCTLProgram_CreateFromOCLSpirv (__dpctl_keep const DPCTLSyclContextRef CtxRef, // Create the Sycl program from OpenCL program try { - auto SyclProgram = new program(*SyclCtx, CLProgram); + auto SyclProgram = new program(SyclCtx, CLProgram); return wrap(SyclProgram); - } catch (invalid_object_error) { + } catch (invalid_object_error &e) { // \todo record error + std::cerr << e.what() << '\n'; return nullptr; } } -__dpctl_give DPCTLSyclProgramRef -DPCTLProgram_CreateFromOCLSource (__dpctl_keep const DPCTLSyclContextRef Ctx, - __dpctl_keep const char *Source, - __dpctl_keep const char *CompileOpts) +} /* end of anonymous namespace */ + +__dppl_give DPCTLSyclProgramRef +DPCTLProgram_CreateFromOCLSpirv (__dppl_keep const DPPLSyclContextRef CtxRef, + __dppl_keep const void *IL, + size_t length) +{ + DPPLSyclProgramRef Pref = nullptr; + context *SyclCtx = nullptr; + if(!CtxRef) { + // \todo handle error + return Pref; + } + + SyclCtx = unwrap(CtxRef); + // get the backend type + auto BE = SyclCtx->get_platform().get_backend(); + switch (BE) + { + case backend::opencl: + Pref = createOpenCLInterOpProgram(*SyclCtx, IL, length); + break; + case backend::level_zero: + break; + default: + break; + } + + return Pref; +} + +__dppl_give DPCTLSyclProgramRef +DPCTLProgram_CreateFromOCLSource (__dppl_keep const DPPLSyclContextRef Ctx, + __dppl_keep const char *Source, + __dppl_keep const char *CompileOpts) { std::string compileOpts; context *SyclCtx = nullptr; @@ -118,23 +141,43 @@ DPCTLProgram_CreateFromOCLSource (__dpctl_keep const DPCTLSyclContextRef Ctx, compileOpts = CompileOpts; } - try{ - SyclProgram->build_with_source(source, compileOpts); - return wrap(SyclProgram); - } catch (compile_program_error) { - delete SyclProgram; - // \todo record error + // get the backend type + auto BE = SyclCtx->get_platform().get_backend(); + switch (BE) + { + case backend::opencl: + try { + SyclProgram->build_with_source(source, compileOpts); + return wrap(SyclProgram); + } catch (compile_program_error &e) { + std::cerr << e.what() << '\n'; + delete SyclProgram; + // \todo record error + return nullptr; + } catch (feature_not_supported &e) { + std::cerr << e.what() << '\n'; + delete SyclProgram; + // \todo record error + return nullptr; + } catch (runtime_error &e) { + std::cerr << e.what() << '\n'; + delete SyclProgram; + // \todo record error + return nullptr; + } + break; + case backend::level_zero: + std::cerr << "CreateFromSource is not supported in Level Zero.\n"; return nullptr; - } catch (feature_not_supported) { - delete SyclProgram; - // \todo record error + default: + std::cerr << "CreateFromSource is not supported in unknown backend.\n"; return nullptr; } } __dpctl_give DPCTLSyclKernelRef DPCTLProgram_GetKernel (__dpctl_keep DPCTLSyclProgramRef PRef, - __dpctl_keep const char *KernelName) + __dpctl_keep const char *KernelName) { if(!PRef) { // \todo record error @@ -149,15 +192,16 @@ DPCTLProgram_GetKernel (__dpctl_keep DPCTLSyclProgramRef PRef, try { auto SyclKernel = new kernel(SyclProgram->get_kernel(name)); return wrap(SyclKernel); - } catch (invalid_object_error) { + } catch (invalid_object_error &e) { // \todo record error + std::cerr << e.what() << '\n'; return nullptr; } } bool DPCTLProgram_HasKernel (__dpctl_keep DPCTLSyclProgramRef PRef, - __dpctl_keep const char *KernelName) + __dpctl_keep const char *KernelName) { if(!PRef) { // \todo handle error @@ -167,7 +211,8 @@ DPCTLProgram_HasKernel (__dpctl_keep DPCTLSyclProgramRef PRef, auto SyclProgram = unwrap(PRef); try { return SyclProgram->has_kernel(KernelName); - } catch (invalid_object_error) { + } catch (invalid_object_error &e) { + std::cerr << e.what() << '\n'; return false; } } From fe7b59a0d32a3efd1579fef9b52ab42ad60dd7d7 Mon Sep 17 00:00:00 2001 From: Diptorup Deb Date: Thu, 3 Dec 2020 14:43:23 -0600 Subject: [PATCH 2/4] Minor formatting edits. --- dpctl/__init__.pxd | 51 ++++++++++++++++++------------------ dpctl/__init__.py | 48 +++++++++++++++++----------------- dpctl/_backend.pxd | 50 ++++++++++++++++++------------------ dpctl/memory/__init__.pxd | 50 ++++++++++++++++++------------------ dpctl/memory/__init__.py | 50 ++++++++++++++++++------------------ dpctl/memory/_memory.pxd | 38 +++++++++++++-------------- dpctl/memory/_memory.pyx | 54 +++++++++++++++++++-------------------- 7 files changed, 170 insertions(+), 171 deletions(-) diff --git a/dpctl/__init__.pxd b/dpctl/__init__.pxd index 87a5878b3f..f4467c606e 100644 --- a/dpctl/__init__.pxd +++ b/dpctl/__init__.pxd @@ -1,32 +1,31 @@ -##===-------------- __init__.pxd - dpctl module --------*- Cython -*-------===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## This file declares the extension types and functions for the Cython API -## implemented in sycl_core.pyx. -## -##===----------------------------------------------------------------------===## +#===------------- __init__.pxd - dpctl module --------*- Cython -*----------===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#===------------------------------------------------------------------------===# +# +# \file +# This file declares the extension types and functions for the Cython API +# implemented in sycl_core.pyx. +# +#===------------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 from dpctl._sycl_core cimport * from dpctl._memory import * - diff --git a/dpctl/__init__.py b/dpctl/__init__.py index a06c121057..db52c956c0 100644 --- a/dpctl/__init__.py +++ b/dpctl/__init__.py @@ -1,27 +1,27 @@ -##===----------------- __init__.py - dpctl module -------*- Cython -*------===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## This top-level dpctl module. -## -##===----------------------------------------------------------------------===## +#===----------------- __init__.py - dpctl module -------*- Cython -*--------===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#===------------------------------------------------------------------------===# +# +# \file +# The top-level dpctl module. +# +#===------------------------------------------------------------------------===# """ **Data Parallel Control (dpCtl)** diff --git a/dpctl/_backend.pxd b/dpctl/_backend.pxd index 4922086eca..21efe767f2 100644 --- a/dpctl/_backend.pxd +++ b/dpctl/_backend.pxd @@ -1,28 +1,28 @@ -##===------------- backend.pyx - dpctl module -------*- Cython -*----------===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## This file defines the Cython extern types for the functions and opaque data -## types defined by dpctl's C API. -## -##===----------------------------------------------------------------------===## +#===------------- backend.pyx - dpctl module -------*- Cython -*------------===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#===------------------------------------------------------------------------===# +# +# \file +# This file defines the Cython extern types for the functions and opaque data +# types defined by dpctl's C API. +# +#===------------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 diff --git a/dpctl/memory/__init__.pxd b/dpctl/memory/__init__.pxd index 62b84d5eba..23768f3b3e 100644 --- a/dpctl/memory/__init__.pxd +++ b/dpctl/memory/__init__.pxd @@ -1,28 +1,28 @@ -##===----------- __init__.pxd - dpctl.memory module ----*- Cython -*-------===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## This file declares the extension types and functions for the Cython API -## implemented in dpctl.memory_memory.pyx. -## -##===----------------------------------------------------------------------===## +#===----------- __init__.pxd - dpctl.memory module ----*- Cython -*---------===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#===------------------------------------------------------------------------===# +# +# \file +# This file declares the extension types and functions for the Cython API +# implemented in dpctl.memory._memory.pyx. +# +#===------------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 diff --git a/dpctl/memory/__init__.py b/dpctl/memory/__init__.py index fc8c25f217..6541c406e9 100644 --- a/dpctl/memory/__init__.py +++ b/dpctl/memory/__init__.py @@ -1,28 +1,28 @@ -##===---------- __init__.py - dpctl.memory module -------*- Python -*------===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## This is the dpctl.memory module containing the USM memory manager features -## of dpctl. -## -##===----------------------------------------------------------------------===## +#===---------- __init__.py - dpctl.memory module -------*- Python -*--------===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#===------------------------------------------------------------------------===# +# +# \file +# This is the dpctl.memory module containing the USM memory manager features +# of dpctl. +# +#===------------------------------------------------------------------------===# """ **Data Parallel Control Memory** diff --git a/dpctl/memory/_memory.pxd b/dpctl/memory/_memory.pxd index 7b5a8e1051..6140a25f87 100644 --- a/dpctl/memory/_memory.pxd +++ b/dpctl/memory/_memory.pxd @@ -1,22 +1,22 @@ -##===--------------- _memory.pxd - dpctl module --------*- Cython -*-------===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## +#===--------------- _memory.pxd - dpctl module --------*- Cython -*---------===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#===-----------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 diff --git a/dpctl/memory/_memory.pyx b/dpctl/memory/_memory.pyx index 23c061f9e8..fb121e3c3d 100644 --- a/dpctl/memory/_memory.pyx +++ b/dpctl/memory/_memory.pyx @@ -1,29 +1,29 @@ -##===--------------- _memory.pyx - dpctl module --------*- Cython -*-------===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## This file implements Python buffer protocol using Sycl USM shared and host -## allocators. The USM device allocator is also exposed through this module for -## use in other Python modules. -## -##===----------------------------------------------------------------------===## +#===--------------- _memory.pyx - dpctl module --------*- Cython -*---------===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#===------------------------------------------------------------------------===# +# +# \file +# This file implements Python buffer protocol using Sycl USM shared and host +# allocators. The USM device allocator is also exposed through this module for +# use in other Python modules. +# +#===------------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 @@ -440,7 +440,7 @@ cdef class _Memory: cdef const char * usm_type = DPCTLUSM_GetPointerType(p, ctx.get_context_ref()) return usm_type - + cdef class MemoryUSMShared(_Memory): """ From 8ddfa5c49dd32ef65daadbacc637855d551b7d52 Mon Sep 17 00:00:00 2001 From: Diptorup Deb Date: Thu, 3 Dec 2020 15:54:03 -0600 Subject: [PATCH 3/4] Move SyclKernel, SyclProgram, program creation functions into a separate sub-module. --- .../source/dpctl_sycl_program_interface.cpp | 20 +- dpctl/_sycl_core.pxd | 79 +++---- dpctl/_sycl_core.pyx | 214 ++---------------- dpctl/program/__init__.pxd | 30 +++ dpctl/program/__init__.py | 36 +++ dpctl/program/_program.pxd | 63 ++++++ dpctl/program/_program.pyx | 186 +++++++++++++++ dpctl/tests/test_sycl_kernel_submit.py | 3 +- dpctl/tests/test_sycl_program.py | 20 +- setup.py | 53 +++-- 10 files changed, 414 insertions(+), 290 deletions(-) create mode 100644 dpctl/program/__init__.pxd create mode 100644 dpctl/program/__init__.py create mode 100644 dpctl/program/_program.pxd create mode 100644 dpctl/program/_program.pyx diff --git a/dpctl-capi/source/dpctl_sycl_program_interface.cpp b/dpctl-capi/source/dpctl_sycl_program_interface.cpp index 700628d8e3..7f8b75cf63 100644 --- a/dpctl-capi/source/dpctl_sycl_program_interface.cpp +++ b/dpctl-capi/source/dpctl_sycl_program_interface.cpp @@ -38,9 +38,9 @@ DEFINE_SIMPLE_CONVERSION_FUNCTIONS(context, DPCTLSyclContextRef) DEFINE_SIMPLE_CONVERSION_FUNCTIONS(program, DPCTLSyclProgramRef) DEFINE_SIMPLE_CONVERSION_FUNCTIONS(kernel, DPCTLSyclKernelRef) -__dppl_give DPCTLSyclProgramRef +__dpctl_give DPCTLSyclProgramRef createOpenCLInterOpProgram (const context &SyclCtx, - __dppl_keep const void *IL, + __dpctl_keep const void *IL, size_t length) { cl_int err; @@ -85,12 +85,12 @@ createOpenCLInterOpProgram (const context &SyclCtx, } /* end of anonymous namespace */ -__dppl_give DPCTLSyclProgramRef -DPCTLProgram_CreateFromOCLSpirv (__dppl_keep const DPPLSyclContextRef CtxRef, - __dppl_keep const void *IL, +__dpctl_give DPCTLSyclProgramRef +DPCTLProgram_CreateFromOCLSpirv (__dpctl_keep const DPCTLSyclContextRef CtxRef, + __dpctl_keep const void *IL, size_t length) { - DPPLSyclProgramRef Pref = nullptr; + DPCTLSyclProgramRef Pref = nullptr; context *SyclCtx = nullptr; if(!CtxRef) { // \todo handle error @@ -114,10 +114,10 @@ DPCTLProgram_CreateFromOCLSpirv (__dppl_keep const DPPLSyclContextRef CtxRef, return Pref; } -__dppl_give DPCTLSyclProgramRef -DPCTLProgram_CreateFromOCLSource (__dppl_keep const DPPLSyclContextRef Ctx, - __dppl_keep const char *Source, - __dppl_keep const char *CompileOpts) +__dpctl_give DPCTLSyclProgramRef +DPCTLProgram_CreateFromOCLSource (__dpctl_keep const DPCTLSyclContextRef Ctx, + __dpctl_keep const char *Source, + __dpctl_keep const char *CompileOpts) { std::string compileOpts; context *SyclCtx = nullptr; diff --git a/dpctl/_sycl_core.pxd b/dpctl/_sycl_core.pxd index 66767d9620..cbc82fa8dc 100644 --- a/dpctl/_sycl_core.pxd +++ b/dpctl/_sycl_core.pxd @@ -1,33 +1,34 @@ -##===------------- sycl_core.pxd - dpctl module --------*- Cython -*-------===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## This file declares the extension types and functions for the Cython API -## implemented in sycl_core.pyx. -## -##===----------------------------------------------------------------------===## +# ===------------- sycl_core.pxd - dpctl module --------*- Cython -*--------===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# This file declares the extension types and functions for the Cython API +# implemented in sycl_core.pyx. +# +# ===-----------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 from ._backend cimport * +from .program._program cimport SyclKernel from libc.stdint cimport uint32_t @@ -85,34 +86,6 @@ cdef class SyclEvent: cpdef void wait (self) -cdef class SyclKernel: - ''' Wraps a sycl::kernel object created from an OpenCL interoperability - kernel. - ''' - cdef DPCTLSyclKernelRef _kernel_ref - cdef const char *_function_name - cdef DPCTLSyclKernelRef get_kernel_ref (self) - - @staticmethod - cdef SyclKernel _create (DPCTLSyclKernelRef kref) - - -cdef class SyclProgram: - ''' Wraps a sycl::program object created from an OpenCL interoperability - program. - - SyclProgram exposes the C API from dpctl_sycl_program_interface.h. A - SyclProgram can be created from either a source string or a SPIR-V - binary file. - ''' - cdef DPCTLSyclProgramRef _program_ref - - @staticmethod - cdef SyclProgram _create (DPCTLSyclProgramRef pref) - cdef DPCTLSyclProgramRef get_program_ref (self) - cpdef SyclKernel get_sycl_kernel(self, str kernel_name) - - cdef class SyclQueue: ''' Wrapper class for a Sycl queue. ''' diff --git a/dpctl/_sycl_core.pyx b/dpctl/_sycl_core.pyx index de19924ed1..997ec0edef 100644 --- a/dpctl/_sycl_core.pyx +++ b/dpctl/_sycl_core.pyx @@ -1,27 +1,27 @@ -##===------------- sycl_core.pyx - dpctl module -------*- Cython -*--------===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## This file implements a sub-set of Sycl's interface using dpctl's CAPI. -## -##===----------------------------------------------------------------------===## +# ===------------ sycl_core.pyx - dpctl module -------*- Cython -*----------===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# This file implements a sub-set of Sycl's interface using dpctl's CAPI. +# +# ===-----------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 @@ -46,16 +46,12 @@ __all__ = [ "has_sycl_platforms", "set_default_queue", "is_in_device_context", - "create_program_from_source", - "create_program_from_spirv", "device_type", "backend_type", "device_context", "SyclContext", "SyclDevice", "SyclEvent", - "SyclKernel", - "SyclProgram", "SyclQueue" ] @@ -92,12 +88,6 @@ cdef class UnsupportedDeviceError (Exception): """ pass -cdef class SyclProgramCompilationError (Exception): - """This exception is raised when a sycl program could not be built from - either a spirv binary file or a string source. - """ - pass - cdef class SyclKernelSubmitError (Exception): """This exception is raised when a sycl program could not be built from either a spirv binary file or a string source. @@ -306,88 +296,6 @@ cdef class SyclEvent: """ return int(self._event_ref) - -cdef class SyclKernel: - """ Wraps a sycl::kernel object created from an OpenCL interoperability - kernel. - """ - - @staticmethod - cdef SyclKernel _create (DPCTLSyclKernelRef kref): - cdef SyclKernel ret = SyclKernel.__new__(SyclKernel) - ret._kernel_ref = kref - ret._function_name = DPCTLKernel_GetFunctionName(kref) - return ret - - def __dealloc__ (self): - DPCTLKernel_Delete(self._kernel_ref) - DPCTLCString_Delete(self._function_name) - - def get_function_name (self): - """ Returns the name of the Kernel function. - """ - return self._function_name.decode() - - def get_num_args (self): - """ Returns the number of arguments for this kernel function. - """ - return DPCTLKernel_GetNumArgs(self._kernel_ref) - - cdef DPCTLSyclKernelRef get_kernel_ref (self): - """ Returns the DPCTLSyclKernelRef pointer for this SyclKernel. - """ - return self._kernel_ref - - def addressof_ref (self): - """ Returns the address of the C API DPCTLSyclKernelRef pointer - as a long. - - Returns: - The address of the DPCTLSyclKernelRef object used to create this - SyclKernel cast to a long. - """ - return int(self._kernel_ref) - -cdef class SyclProgram: - """ Wraps a sycl::program object created from an OpenCL interoperability - program. - - SyclProgram exposes the C API from dpctl_sycl_program_interface.h. A - SyclProgram can be created from either a source string or a SPIR-V - binary file. - """ - - @staticmethod - cdef SyclProgram _create (DPCTLSyclProgramRef pref): - cdef SyclProgram ret = SyclProgram.__new__(SyclProgram) - ret._program_ref = pref - return ret - - def __dealloc__ (self): - DPCTLProgram_Delete(self._program_ref) - - cdef DPCTLSyclProgramRef get_program_ref (self): - return self._program_ref - - cpdef SyclKernel get_sycl_kernel(self, str kernel_name): - name = kernel_name.encode('utf8') - return SyclKernel._create(DPCTLProgram_GetKernel(self._program_ref, - name)) - - def has_sycl_kernel(self, str kernel_name): - name = kernel_name.encode('utf8') - return DPCTLProgram_HasKernel(self._program_ref, name) - - def addressof_ref (self): - """Returns the address of the C API DPCTLSyclProgramRef pointer - as a long. - - Returns: - The address of the DPCTLSyclProgramRef object used to create this - SyclProgram cast to a long. - """ - return int(self._program_ref) - import ctypes cdef class SyclQueue: @@ -894,80 +802,6 @@ cpdef get_current_backend(): """ return _mgr.get_current_backend() -def create_program_from_source (SyclQueue q, unicode source, unicode copts=""): - """ - Creates a Sycl interoperability program from an OpenCL source string. - - We use the DPCTLProgram_CreateFromOCLSource() C API function to create - a Sycl progrma from an OpenCL source program that can contain multiple - kernels. - - Parameters: - q (SyclQueue) : The :class:`SyclQueue` for which the - :class:`SyclProgram` is going to be built. - source (unicode): Source string for an OpenCL program. - copts (unicode) : Optional compilation flags that will be used - when compiling the program. - - Returns: - program (SyclProgram): A :class:`SyclProgram` object wrapping the sycl::program returned by the C API. - """ - - BE = q.get_sycl_backend() - if BE != backend_type.opencl: - raise ValueError( - "Cannot create program for a ", BE, "type backend. Currently only " - "OpenCL devices are supported for program creations." - ) - - cdef DPCTLSyclProgramRef Pref - cdef bytes bSrc = source.encode('utf8') - cdef bytes bCOpts = copts.encode('utf8') - cdef const char *Src = bSrc - cdef const char *COpts = bCOpts - cdef DPCTLSyclContextRef CRef = q.get_sycl_context().get_context_ref() - Pref = DPCTLProgram_CreateFromOCLSource(CRef, Src, COpts) - - if Pref is NULL: - raise SyclProgramCompilationError() - - return SyclProgram._create(Pref) - -cimport cython.array - -def create_program_from_spirv (SyclQueue q, const unsigned char[:] IL): - """ - Creates a Sycl interoperability program from an SPIR-V binary. - - We use the DPCTLProgram_CreateFromOCLSpirv() C API function to create - a Sycl progrma from an compiled SPIR-V binary file. - - Parameters: - q (SyclQueue): The :class:`SyclQueue` for which the - :class:`SyclProgram` is going to be built. - IL (const char[:]) : SPIR-V binary IL file for an OpenCL program. - - Returns: - program (SyclProgram): A :class:`SyclProgram` object wrapping the sycl::program returned by the C API. - """ - BE = q.get_sycl_backend() - if BE != backend_type.opencl: - raise ValueError( - "Cannot create program for a ", BE, "type backend. Currently only " - "OpenCL devices are supported for program creations." - ) - - cdef DPCTLSyclProgramRef Pref - cdef const unsigned char *dIL = &IL[0] - cdef DPCTLSyclContextRef CRef = q.get_sycl_context().get_context_ref() - cdef size_t length = IL.shape[0] - Pref = DPCTLProgram_CreateFromOCLSpirv(CRef, dIL, length) - if Pref is NULL: - raise SyclProgramCompilationError() - - return SyclProgram._create(Pref) - - from contextlib import contextmanager @contextmanager diff --git a/dpctl/program/__init__.pxd b/dpctl/program/__init__.pxd new file mode 100644 index 0000000000..3771ce2849 --- /dev/null +++ b/dpctl/program/__init__.pxd @@ -0,0 +1,30 @@ +#===----------- __init__.pxd - dpctl.program module -*- Cython -*-----------===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#===------------------------------------------------------------------------===## +# +# \file +# This file declares the extension types and functions for the Cython API +# implemented in dpctl.program._program.pyx. +# +#===------------------------------------------------------------------------===# + +# distutils: language = c++ +# cython: language_level=3 + +from dpctl.program._program cimport * diff --git a/dpctl/program/__init__.py b/dpctl/program/__init__.py new file mode 100644 index 0000000000..904760cd92 --- /dev/null +++ b/dpctl/program/__init__.py @@ -0,0 +1,36 @@ +#===---------- __init__.py - dpctl.program module ----*---- Python ----*----===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#===------------------------------------------------------------------------===# +# +# \file +# This dpctl.program module wraps Sycl program creation functions defined in +# dppl_sycl_program_interface.h. +# +#===------------------------------------------------------------------------===# +""" + **Data Parallel Control Program** + + `dpctl.program` module provides a way to create a SYCL kernel from either a + source string or SPIR-V binary file. + +""" +from ._program import * +from ._program import __all__ as _program__all__ + +__all__ = _program__all__ diff --git a/dpctl/program/_program.pxd b/dpctl/program/_program.pxd new file mode 100644 index 0000000000..1001d2c5af --- /dev/null +++ b/dpctl/program/_program.pxd @@ -0,0 +1,63 @@ +#===-------------- _program.pxd - dpctl.program module -*-- Cython ----*----===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#===------------------------------------------------------------------------===# +# +# \file +# This file has the Cython function declarations for the functions defined +# in dpctl.program._program.pyx +# +#===------------------------------------------------------------------------===# + +# distutils: language = c++ +# cython: language_level=3 + +from .._backend cimport DPCTLSyclKernelRef, DPCTLSyclProgramRef +from .._sycl_core cimport SyclQueue, SyclDevice, SyclContext + + +cdef class SyclKernel: + ''' Wraps a sycl::kernel object created from an OpenCL interoperability + kernel. + ''' + cdef DPCTLSyclKernelRef _kernel_ref + cdef const char *_function_name + cdef DPCTLSyclKernelRef get_kernel_ref (self) + + @staticmethod + cdef SyclKernel _create (DPCTLSyclKernelRef kref) + + +cdef class SyclProgram: + ''' Wraps a sycl::program object created from an OpenCL interoperability + program. + + SyclProgram exposes the C API from dpctl_sycl_program_interface.h. A + SyclProgram can be created from either a source string or a SPIR-V + binary file. + ''' + cdef DPCTLSyclProgramRef _program_ref + + @staticmethod + cdef SyclProgram _create (DPCTLSyclProgramRef pref) + cdef DPCTLSyclProgramRef get_program_ref (self) + cpdef SyclKernel get_sycl_kernel(self, str kernel_name) + + +cpdef create_program_from_source (SyclQueue q, unicode source, unicode copts=*) +cpdef create_program_from_spirv (SyclQueue q, const unsigned char[:] IL) diff --git a/dpctl/program/_program.pyx b/dpctl/program/_program.pyx new file mode 100644 index 0000000000..9c08dc0afb --- /dev/null +++ b/dpctl/program/_program.pyx @@ -0,0 +1,186 @@ +#===------- _program.pyx - dpctl.program module ---*--- Cython ------*------===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +#===------------------------------------------------------------------------===# +# +# \file +# This file implements a a Python interface for SYCL's program and kernel +# runtime classes. Convenience functions to create a SYCL program for either +# a OpenCL source file or a SPIR-V binary file are also included in the +# module. +# +#===------------------------------------------------------------------------===# + +# distutils: language = c++ +# cython: language_level=3 + +from __future__ import print_function +from dpctl._backend cimport * + +__all__ = [ + "create_program_from_source", + "create_program_from_spirv", + "SyclKernel", + "SyclProgram", + "SyclProgramCompilationError", +] + +cdef class SyclProgramCompilationError (Exception): + """This exception is raised when a sycl program could not be built from + either a spirv binary file or a string source. + """ + pass + +cdef class SyclKernel: + """ + """ + @staticmethod + cdef SyclKernel _create (DPCTLSyclKernelRef kref): + cdef SyclKernel ret = SyclKernel.__new__(SyclKernel) + ret._kernel_ref = kref + ret._function_name = DPCTLKernel_GetFunctionName(kref) + return ret + + def __dealloc__ (self): + DPCTLKernel_Delete(self._kernel_ref) + DPCTLCString_Delete(self._function_name) + + def get_function_name (self): + """ Returns the name of the Kernel function. + """ + return self._function_name.decode() + + def get_num_args (self): + """ Returns the number of arguments for this kernel function. + """ + return DPCTLKernel_GetNumArgs(self._kernel_ref) + + cdef DPCTLSyclKernelRef get_kernel_ref (self): + """ Returns the DPCTLSyclKernelRef pointer for this SyclKernel. + """ + return self._kernel_ref + + def addressof_ref (self): + """ Returns the address of the C API DPCTLSyclKernelRef pointer + as a long. + + Returns: + The address of the DPCTLSyclKernelRef object used to create this + SyclKernel cast to a long. + """ + return int(self._kernel_ref) + +cdef class SyclProgram: + """ Wraps a sycl::program object created from an OpenCL interoperability + program. + + SyclProgram exposes the C API from dpctl_sycl_program_interface.h. A + SyclProgram can be created from either a source string or a SPIR-V + binary file. + """ + + @staticmethod + cdef SyclProgram _create (DPCTLSyclProgramRef pref): + cdef SyclProgram ret = SyclProgram.__new__(SyclProgram) + ret._program_ref = pref + return ret + + def __dealloc__ (self): + DPCTLProgram_Delete(self._program_ref) + + cdef DPCTLSyclProgramRef get_program_ref (self): + return self._program_ref + + cpdef SyclKernel get_sycl_kernel(self, str kernel_name): + name = kernel_name.encode('utf8') + return SyclKernel._create(DPCTLProgram_GetKernel(self._program_ref, + name)) + + def has_sycl_kernel(self, str kernel_name): + name = kernel_name.encode('utf8') + return DPCTLProgram_HasKernel(self._program_ref, name) + + def addressof_ref (self): + """Returns the address of the C API DPCTLSyclProgramRef pointer + as a long. + + Returns: + The address of the DPCTLSyclProgramRef object used to create this + SyclProgram cast to a long. + """ + return int(self._program_ref) + +cpdef create_program_from_source (SyclQueue q, unicode src, unicode copts=""): + """ + Creates a Sycl interoperability program from an OpenCL source string. + + We use the DPCTLProgram_CreateFromOCLSource() C API function to create + a Sycl progrma from an OpenCL source program that can contain multiple + kernels. + + Parameters: + q (SyclQueue) : The :class:`SyclQueue` for which the + :class:`SyclProgram` is going to be built. + src (unicode): Source string for an OpenCL program. + copts (unicode) : Optional compilation flags that will be used + when compiling the program. + + Returns: + program (SyclProgram): A :class:`SyclProgram` object wrapping the sycl::program returned by the C API. + """ + + cdef DPCTLSyclProgramRef Pref + cdef bytes bSrc = src.encode('utf8') + cdef bytes bCOpts = copts.encode('utf8') + cdef const char *Src = bSrc + cdef const char *COpts = bCOpts + cdef DPCTLSyclContextRef CRef = q.get_sycl_context().get_context_ref() + Pref = DPCTLProgram_CreateFromOCLSource(CRef, Src, COpts) + + if Pref is NULL: + raise SyclProgramCompilationError() + + return SyclProgram._create(Pref) + +cimport cython.array + +cpdef create_program_from_spirv (SyclQueue q, const unsigned char[:] IL): + """ + Creates a Sycl interoperability program from an SPIR-V binary. + + We use the DPCTLProgram_CreateFromOCLSpirv() C API function to create + a Sycl progrma from an compiled SPIR-V binary file. + + Parameters: + q (SyclQueue): The :class:`SyclQueue` for which the + :class:`SyclProgram` is going to be built. + IL (const char[:]) : SPIR-V binary IL file for an OpenCL program. + + Returns: + program (SyclProgram): A :class:`SyclProgram` object wrapping the sycl::program returned by the C API. + """ + + cdef DPCTLSyclProgramRef Pref + cdef const unsigned char *dIL = &IL[0] + cdef DPCTLSyclContextRef CRef = q.get_sycl_context().get_context_ref() + cdef size_t length = IL.shape[0] + Pref = DPCTLProgram_CreateFromOCLSpirv(CRef, dIL, length) + if Pref is NULL: + raise SyclProgramCompilationError() + + return SyclProgram._create(Pref) diff --git a/dpctl/tests/test_sycl_kernel_submit.py b/dpctl/tests/test_sycl_kernel_submit.py index e1ffa96e19..b124f30041 100644 --- a/dpctl/tests/test_sycl_kernel_submit.py +++ b/dpctl/tests/test_sycl_kernel_submit.py @@ -26,6 +26,7 @@ import dpctl import unittest import dpctl.memory as dpctl_mem +import dpctl.program as dpctl_prog import numpy as np @@ -39,7 +40,7 @@ def test_create_program_from_source(self): }" with dpctl.device_context("opencl:gpu:0"): q = dpctl.get_current_queue() - prog = dpctl.create_program_from_source(q, oclSrc) + prog = dpctl_prog.create_program_from_source(q, oclSrc) axpyKernel = prog.get_sycl_kernel("axpy") abuf = dpctl_mem.MemoryUSMShared(1024 * np.dtype("i").itemsize) diff --git a/dpctl/tests/test_sycl_program.py b/dpctl/tests/test_sycl_program.py index 0e695bf6bb..f4ebeaaf7a 100644 --- a/dpctl/tests/test_sycl_program.py +++ b/dpctl/tests/test_sycl_program.py @@ -24,6 +24,7 @@ ##===----------------------------------------------------------------------===## import dpctl +import dpctl.program as dpctl_prog import unittest import os @@ -42,7 +43,7 @@ def test_create_program_from_source(self): }" with dpctl.device_context("opencl:gpu:0"): q = dpctl.get_current_queue() - prog = dpctl.create_program_from_source(q, oclSrc) + prog = dpctl_prog.create_program_from_source(q, oclSrc) self.assertIsNotNone(prog) self.assertTrue(prog.has_sycl_kernel("add")) @@ -67,7 +68,7 @@ def test_create_program_from_spirv(self): spirv = fin.read() with dpctl.device_context("opencl:gpu:0"): q = dpctl.get_current_queue() - prog = dpctl.create_program_from_spirv(q, spirv) + prog = dpctl_prog.create_program_from_spirv(q, spirv) self.assertIsNotNone(prog) self.assertTrue(prog.has_sycl_kernel("add")) self.assertTrue(prog.has_sycl_kernel("axpy")) @@ -86,6 +87,7 @@ def test_create_program_from_spirv(self): "No Level0 GPU queues available", ) class TestProgramForLevel0GPU(unittest.TestCase): + @unittest.expectedFailure def test_create_program_from_spirv(self): CURR_DIR = os.path.dirname(os.path.abspath(__file__)) @@ -94,12 +96,9 @@ def test_create_program_from_spirv(self): spirv = fin.read() with dpctl.device_context("level0:gpu:0"): q = dpctl.get_current_queue() - try: - prog = dpctl.create_program_from_spirv(q, spirv) - self.fail("Tried to create program for an unsupported Level0 GPU.") - except ValueError: - pass + prog = dpctl_prog.create_program_from_spirv(q, spirv) + @unittest.expectedFailure def test_create_program_from_source(self): oclSrc = " \ kernel void add(global int* a, global int* b, global int* c) { \ @@ -112,12 +111,7 @@ def test_create_program_from_source(self): }" with dpctl.device_context("level0:gpu:0"): q = dpctl.get_current_queue() - try: - prog = dpctl.create_program_from_source(q, oclSrc) - self.fail("Tried to create program for an unsupported Level0 GPU.") - except ValueError: - pass - + prog = dpctl_prog.create_program_from_source(q, oclSrc) if __name__ == "__main__": unittest.main() diff --git a/setup.py b/setup.py index 087d78f4dd..14d3153e26 100644 --- a/setup.py +++ b/setup.py @@ -1,26 +1,26 @@ -##===------------- setup.py - dpctl.ocldrv interface -----*- Python -*-----===## -## -## Data Parallel Control Library (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -### -### \file -### This file builds the dpctl and dpctl.ocldrv extension modules. -##===----------------------------------------------------------------------===## +# ===-------------------- setup.py - dpctl -----*----- Python -------*------===# +# +# Data Parallel Control Library (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# This file builds all the extension modules for dpctl. +# ===-----------------------------------------------------------------------===# import os import os.path import sys @@ -177,6 +177,13 @@ def extensions(): ], **extension_args ), + Extension( + "dpctl.program._program", + [ + os.path.join("dpctl", "program", "_program.pyx"), + ], + **extension_args + ), ] exts = cythonize(extensions) From fdfdcafeecaa1aa30531bdc9288cbb333a3aa5d7 Mon Sep 17 00:00:00 2001 From: Diptorup Deb Date: Thu, 3 Dec 2020 18:57:11 -0600 Subject: [PATCH 4/4] Standardize license headers while keeping black happy. --- dpctl/__init__.pxd | 6 ++-- dpctl/__init__.py | 6 ++-- dpctl/_backend.pxd | 6 ++-- dpctl/_sycl_core.pxd | 2 +- dpctl/memory/__init__.pxd | 6 ++-- dpctl/memory/__init__.py | 6 ++-- dpctl/memory/_memory.pxd | 10 ++++-- dpctl/memory/_memory.pyx | 6 ++-- dpctl/program/__init__.pxd | 6 ++-- dpctl/program/__init__.py | 6 ++-- dpctl/program/_program.pxd | 6 ++-- dpctl/program/_program.pyx | 6 ++-- dpctl/tests/__init__.py | 46 ++++++++++++------------ dpctl/tests/test_dump_functions.py | 46 ++++++++++++------------ dpctl/tests/test_sycl_device.py | 46 ++++++++++++------------ dpctl/tests/test_sycl_kernel_submit.py | 47 ++++++++++++------------ dpctl/tests/test_sycl_program.py | 49 +++++++++++++------------- dpctl/tests/test_sycl_queue.py | 46 ++++++++++++------------ dpctl/tests/test_sycl_queue_manager.py | 46 ++++++++++++------------ dpctl/tests/test_sycl_queue_memcpy.py | 46 ++++++++++++------------ dpctl/tests/test_sycl_usm.py | 46 ++++++++++++------------ 21 files changed, 248 insertions(+), 242 deletions(-) diff --git a/dpctl/__init__.pxd b/dpctl/__init__.pxd index f4467c606e..f56e84c7f8 100644 --- a/dpctl/__init__.pxd +++ b/dpctl/__init__.pxd @@ -1,4 +1,4 @@ -#===------------- __init__.pxd - dpctl module --------*- Cython -*----------===# +# ===------------ __init__.pxd - dpctl module --------*- Cython -*----------===# # # Data Parallel Control (dpCtl) # @@ -16,13 +16,13 @@ # See the License for the specific language governing permissions and # limitations under the License. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # # \file # This file declares the extension types and functions for the Cython API # implemented in sycl_core.pyx. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 diff --git a/dpctl/__init__.py b/dpctl/__init__.py index db52c956c0..d453eeeb45 100644 --- a/dpctl/__init__.py +++ b/dpctl/__init__.py @@ -1,4 +1,4 @@ -#===----------------- __init__.py - dpctl module -------*- Cython -*--------===# +# ===---------------- __init__.py - dpctl module -------*- Cython -*--------===# # # Data Parallel Control (dpCtl) # @@ -16,12 +16,12 @@ # See the License for the specific language governing permissions and # limitations under the License. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # # \file # The top-level dpctl module. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# """ **Data Parallel Control (dpCtl)** diff --git a/dpctl/_backend.pxd b/dpctl/_backend.pxd index 21efe767f2..ff6d0c536f 100644 --- a/dpctl/_backend.pxd +++ b/dpctl/_backend.pxd @@ -1,4 +1,4 @@ -#===------------- backend.pyx - dpctl module -------*- Cython -*------------===# +# ===------------ backend.pyx - dpctl module -------*- Cython -*------------===# # # Data Parallel Control (dpCtl) # @@ -16,13 +16,13 @@ # See the License for the specific language governing permissions and # limitations under the License. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # # \file # This file defines the Cython extern types for the functions and opaque data # types defined by dpctl's C API. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 diff --git a/dpctl/_sycl_core.pxd b/dpctl/_sycl_core.pxd index cbc82fa8dc..ae2d650c60 100644 --- a/dpctl/_sycl_core.pxd +++ b/dpctl/_sycl_core.pxd @@ -1,4 +1,4 @@ -# ===------------- sycl_core.pxd - dpctl module --------*- Cython -*--------===# +# ===------------ sycl_core.pxd - dpctl module --------*- Cython -*---------===# # # Data Parallel Control (dpCtl) # diff --git a/dpctl/memory/__init__.pxd b/dpctl/memory/__init__.pxd index 23768f3b3e..042238c8e3 100644 --- a/dpctl/memory/__init__.pxd +++ b/dpctl/memory/__init__.pxd @@ -1,4 +1,4 @@ -#===----------- __init__.pxd - dpctl.memory module ----*- Cython -*---------===# +# ===---------- __init__.pxd - dpctl.memory module ----*- Cython -*---------===# # # Data Parallel Control (dpCtl) # @@ -16,13 +16,13 @@ # See the License for the specific language governing permissions and # limitations under the License. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # # \file # This file declares the extension types and functions for the Cython API # implemented in dpctl.memory._memory.pyx. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 diff --git a/dpctl/memory/__init__.py b/dpctl/memory/__init__.py index 6541c406e9..0f39591e02 100644 --- a/dpctl/memory/__init__.py +++ b/dpctl/memory/__init__.py @@ -1,4 +1,4 @@ -#===---------- __init__.py - dpctl.memory module -------*- Python -*--------===# +# ===--------- __init__.py - dpctl.memory module -------*- Python -*--------===# # # Data Parallel Control (dpCtl) # @@ -16,13 +16,13 @@ # See the License for the specific language governing permissions and # limitations under the License. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # # \file # This is the dpctl.memory module containing the USM memory manager features # of dpctl. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# """ **Data Parallel Control Memory** diff --git a/dpctl/memory/_memory.pxd b/dpctl/memory/_memory.pxd index 6140a25f87..789546e81a 100644 --- a/dpctl/memory/_memory.pxd +++ b/dpctl/memory/_memory.pxd @@ -1,4 +1,4 @@ -#===--------------- _memory.pxd - dpctl module --------*- Cython -*---------===# +# ===-------------- _memory.pxd - dpctl module --------*- Cython -*---------===# # # Data Parallel Control (dpCtl) # @@ -16,7 +16,13 @@ # See the License for the specific language governing permissions and # limitations under the License. # -#===-----------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# +# +# \file +# This file has the Cython function declarations for the functions defined +# in dpctl.memory._memory.pyx +# +# ===-----------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 diff --git a/dpctl/memory/_memory.pyx b/dpctl/memory/_memory.pyx index fb121e3c3d..d01d147980 100644 --- a/dpctl/memory/_memory.pyx +++ b/dpctl/memory/_memory.pyx @@ -1,4 +1,4 @@ -#===--------------- _memory.pyx - dpctl module --------*- Cython -*---------===# +# ===-------------- _memory.pyx - dpctl module --------*- Cython -*---------===# # # Data Parallel Control (dpCtl) # @@ -16,14 +16,14 @@ # See the License for the specific language governing permissions and # limitations under the License. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # # \file # This file implements Python buffer protocol using Sycl USM shared and host # allocators. The USM device allocator is also exposed through this module for # use in other Python modules. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 diff --git a/dpctl/program/__init__.pxd b/dpctl/program/__init__.pxd index 3771ce2849..5e7f23a705 100644 --- a/dpctl/program/__init__.pxd +++ b/dpctl/program/__init__.pxd @@ -1,4 +1,4 @@ -#===----------- __init__.pxd - dpctl.program module -*- Cython -*-----------===# +# ===---------- __init__.pxd - dpctl.program module -*- Cython -*-----------===# # # Data Parallel Control (dpCtl) # @@ -16,13 +16,13 @@ # See the License for the specific language governing permissions and # limitations under the License. # -#===------------------------------------------------------------------------===## +# ===----------------------------------------------------------------------===## # # \file # This file declares the extension types and functions for the Cython API # implemented in dpctl.program._program.pyx. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 diff --git a/dpctl/program/__init__.py b/dpctl/program/__init__.py index 904760cd92..2f6edf569f 100644 --- a/dpctl/program/__init__.py +++ b/dpctl/program/__init__.py @@ -1,4 +1,4 @@ -#===---------- __init__.py - dpctl.program module ----*---- Python ----*----===# +# ==---------- __init__.py - dpctl.program module ----*---- Python ----*----===# # # Data Parallel Control (dpCtl) # @@ -16,13 +16,13 @@ # See the License for the specific language governing permissions and # limitations under the License. # -#===------------------------------------------------------------------------===# +# ==------------------------------------------------------------------------===# # # \file # This dpctl.program module wraps Sycl program creation functions defined in # dppl_sycl_program_interface.h. # -#===------------------------------------------------------------------------===# +# ==------------------------------------------------------------------------===# """ **Data Parallel Control Program** diff --git a/dpctl/program/_program.pxd b/dpctl/program/_program.pxd index 1001d2c5af..27f0716791 100644 --- a/dpctl/program/_program.pxd +++ b/dpctl/program/_program.pxd @@ -1,4 +1,4 @@ -#===-------------- _program.pxd - dpctl.program module -*-- Cython ----*----===# +# ===------------- _program.pxd - dpctl.program module -*-- Cython ----*----===# # # Data Parallel Control (dpCtl) # @@ -16,13 +16,13 @@ # See the License for the specific language governing permissions and # limitations under the License. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # # \file # This file has the Cython function declarations for the functions defined # in dpctl.program._program.pyx # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 diff --git a/dpctl/program/_program.pyx b/dpctl/program/_program.pyx index 9c08dc0afb..ee7a89cd1f 100644 --- a/dpctl/program/_program.pyx +++ b/dpctl/program/_program.pyx @@ -1,4 +1,4 @@ -#===------- _program.pyx - dpctl.program module ---*--- Cython ------*------===# +# ===------- _program.pyx - dpctl.program module ---*--- Cython ------*-----===# # # Data Parallel Control (dpCtl) # @@ -16,7 +16,7 @@ # See the License for the specific language governing permissions and # limitations under the License. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # # \file # This file implements a a Python interface for SYCL's program and kernel @@ -24,7 +24,7 @@ # a OpenCL source file or a SPIR-V binary file are also included in the # module. # -#===------------------------------------------------------------------------===# +# ===-----------------------------------------------------------------------===# # distutils: language = c++ # cython: language_level=3 diff --git a/dpctl/tests/__init__.py b/dpctl/tests/__init__.py index a53980d17a..001378d541 100644 --- a/dpctl/tests/__init__.py +++ b/dpctl/tests/__init__.py @@ -1,26 +1,26 @@ -##===-------- tests/dpctl_tests/__init__.py - dpctl ------*- Python -*----===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## Top-level module of all dpctl Python unit test cases. -##===----------------------------------------------------------------------===## +# ===-------- tests/dpctl_tests/__init__.py - dpctl ------*- Python -*-----===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# Top-level module of all dpctl Python unit test cases. +# ===-----------------------------------------------------------------------===# from .test_dump_functions import * from .test_sycl_device import * diff --git a/dpctl/tests/test_dump_functions.py b/dpctl/tests/test_dump_functions.py index 07c4b2d09b..47d103d89c 100644 --- a/dpctl/tests/test_dump_functions.py +++ b/dpctl/tests/test_dump_functions.py @@ -1,26 +1,26 @@ -##===---------- test_sycl_queue_manager.py - dpctl -------*- Python -*----===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -### -### \file -### A basic unit test to verify that dpctl and dpct.ocldrv exist. -##===----------------------------------------------------------------------===## +# ===---------- test_sycl_queue_manager.py - dpctl -------*- Python -*-----===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# A basic unit test to verify that dpctl and dpct.ocldrv exist. +# ===-----------------------------------------------------------------------===# import unittest diff --git a/dpctl/tests/test_sycl_device.py b/dpctl/tests/test_sycl_device.py index 1b1229c39a..5b0b8d5177 100644 --- a/dpctl/tests/test_sycl_device.py +++ b/dpctl/tests/test_sycl_device.py @@ -1,26 +1,26 @@ -##===------------ test_sycl_device.py - dpctl -------*- Python -*---------===## -## -## Data Parallel Control (dpctl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## Defines unit test cases for the SyclDevice classes defined in sycl_core.pyx. -##===----------------------------------------------------------------------===## +# ===------------- test_sycl_device.py - dpctl -------*- Python -*---------===# +# +# Data Parallel Control (dpctl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# Defines unit test cases for the SyclDevice classes defined in sycl_core.pyx. +# ===-----------------------------------------------------------------------===# import dpctl import unittest diff --git a/dpctl/tests/test_sycl_kernel_submit.py b/dpctl/tests/test_sycl_kernel_submit.py index b124f30041..a85702c362 100644 --- a/dpctl/tests/test_sycl_kernel_submit.py +++ b/dpctl/tests/test_sycl_kernel_submit.py @@ -1,27 +1,26 @@ -##===------------- test_sycl_kernel_submit.py - dpctl -----*- Python -*---===## -## -## Data Parallel Control (dpctl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## Defines unit test cases for kernel submission to a sycl::queue. -## -##===----------------------------------------------------------------------===## +# ===------------- test_sycl_kernel_submit.py - dpctl -----*- Python -*---===## +# +# Data Parallel Control (dpctl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# Defines unit test cases for kernel submission to a sycl::queue. +# ===-----------------------------------------------------------------------===# import ctypes import dpctl import unittest diff --git a/dpctl/tests/test_sycl_program.py b/dpctl/tests/test_sycl_program.py index f4ebeaaf7a..5eb1c2b66b 100644 --- a/dpctl/tests/test_sycl_program.py +++ b/dpctl/tests/test_sycl_program.py @@ -1,27 +1,27 @@ -##===------------- test_sycl_program.py - dpctl -------*- Python -*-------===## -## -## Data Parallel Control (dpctl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## Defines unit test cases for the SyclProgram and SyclKernel classes defined -## in sycl_core.pyx. -##===----------------------------------------------------------------------===## +# ===------------- test_sycl_program.py - dpctl -------*- Python -*--------===# +# +# Data Parallel Control (dpctl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# Defines unit test cases for the SyclProgram and SyclKernel classes defined +# in sycl_core.pyx. +# ===-----------------------------------------------------------------------===# import dpctl import dpctl.program as dpctl_prog @@ -113,5 +113,6 @@ def test_create_program_from_source(self): q = dpctl.get_current_queue() prog = dpctl_prog.create_program_from_source(q, oclSrc) + if __name__ == "__main__": unittest.main() diff --git a/dpctl/tests/test_sycl_queue.py b/dpctl/tests/test_sycl_queue.py index 317685c9f3..4d56bfb434 100644 --- a/dpctl/tests/test_sycl_queue.py +++ b/dpctl/tests/test_sycl_queue.py @@ -1,26 +1,26 @@ -##===------------- test_sycl_queue.py - dpctl -------*- Python -*---------===## -## -## Data Parallel Control (dpctl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## Defines unit test cases for the SyclQueue classes defined in sycl_core.pyx. -##===----------------------------------------------------------------------===## +# ===------------- test_sycl_queue.py - dpctl -------*- Python -*----------===# +# +# Data Parallel Control (dpctl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# Defines unit test cases for the SyclQueue classes defined in sycl_core.pyx. +# ===-----------------------------------------------------------------------===# import dpctl import unittest diff --git a/dpctl/tests/test_sycl_queue_manager.py b/dpctl/tests/test_sycl_queue_manager.py index 7cc5c8f513..d340fda03c 100644 --- a/dpctl/tests/test_sycl_queue_manager.py +++ b/dpctl/tests/test_sycl_queue_manager.py @@ -1,26 +1,26 @@ -##===---------- test_sycl_queue_manager.py - dpctl -------*- Python -*----===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -### -### \file -### Defines unit test cases for the SyclQueueManager class in sycl_core.pyx. -##===----------------------------------------------------------------------===## +# ===---------- test_sycl_queue_manager.py - dpctl -------*- Python -*-----===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# Defines unit test cases for the SyclQueueManager class in sycl_core.pyx. +# ===-----------------------------------------------------------------------===# import dpctl import unittest diff --git a/dpctl/tests/test_sycl_queue_memcpy.py b/dpctl/tests/test_sycl_queue_memcpy.py index 6e3bb7dc72..de6d860712 100644 --- a/dpctl/tests/test_sycl_queue_memcpy.py +++ b/dpctl/tests/test_sycl_queue_memcpy.py @@ -1,26 +1,26 @@ -##===---------- test_sycl_queue_manager.py - dpctl -------*- Python -*----===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -### -### \file -### Defines unit test cases for the SyclQueue.memcpy in sycl_core.pyx. -##===----------------------------------------------------------------------===## +# ===---------- test_sycl_queue_manager.py - dpctl -------*- Python -*-----===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# Defines unit test cases for the SyclQueue.memcpy in sycl_core.pyx. +# ===-----------------------------------------------------------------------===# import dpctl import dpctl.memory diff --git a/dpctl/tests/test_sycl_usm.py b/dpctl/tests/test_sycl_usm.py index a8d6bdc744..520cd8f8ff 100644 --- a/dpctl/tests/test_sycl_usm.py +++ b/dpctl/tests/test_sycl_usm.py @@ -1,26 +1,26 @@ -##===---------- test_sycl_queue_manager.py - dpctl -------*- Python -*----===## -## -## Data Parallel Control (dpCtl) -## -## Copyright 2020 Intel Corporation -## -## Licensed under the Apache License, Version 2.0 (the "License"); -## you may not use this file except in compliance with the License. -## You may obtain a copy of the License at -## -## http://www.apache.org/licenses/LICENSE-2.0 -## -## Unless required by applicable law or agreed to in writing, software -## distributed under the License is distributed on an "AS IS" BASIS, -## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -## See the License for the specific language governing permissions and -## limitations under the License. -## -##===----------------------------------------------------------------------===## -## -## \file -## Defines unit test cases for the Memory classes in _memory.pyx. -##===----------------------------------------------------------------------===## +# ===---------- test_sycl_queue_manager.py - dpctl -------*- Python -*-----===# +# +# Data Parallel Control (dpCtl) +# +# Copyright 2020 Intel Corporation +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. +# +# ===-----------------------------------------------------------------------===# +# +# \file +# Defines unit test cases for the Memory classes in _memory.pyx. +# ===-----------------------------------------------------------------------===# import unittest import dpctl