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| 1 | +; RUN: llvm-as %s -o %t.bc |
| 2 | +; RUN: llvm-spirv %t.bc -o %t.spv |
| 3 | +; RUN: llvm-spirv -r %t.spv -o %t_recover.bc |
| 4 | +; RUN: llvm-dis %t_recover.bc -o - | FileCheck %s |
| 5 | + |
| 6 | +target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024" |
| 7 | +target triple = "spir64-unknown-unknown" |
| 8 | + |
| 9 | +; CHECK: spir_func i1 @TestIsConstantInt32_False |
| 10 | +; CHECK: ret i1 false |
| 11 | + |
| 12 | +; Function Attrs: nounwind readnone |
| 13 | +define spir_func i1 @TestIsConstantInt32_False(i32 %x) local_unnamed_addr #0 { |
| 14 | +entry: |
| 15 | + %0 = tail call i1 @llvm.is.constant.i32(i32 %x) |
| 16 | + ret i1 %0 |
| 17 | +} |
| 18 | + |
| 19 | +; CHECK: spir_func i1 @TestIsConstantInt32_True |
| 20 | +; CHECK: ret i1 true |
| 21 | + |
| 22 | +; Function Attrs: nounwind readnone |
| 23 | +define spir_func i1 @TestIsConstantInt32_True() local_unnamed_addr #0 { |
| 24 | +entry: |
| 25 | + %0 = tail call i1 @llvm.is.constant.i32(i32 1) |
| 26 | + ret i1 %0 |
| 27 | +} |
| 28 | + |
| 29 | +; CHECK: spir_func i1 @TestIsConstantInt64_False |
| 30 | +; CHECK: ret i1 false |
| 31 | + |
| 32 | +; Function Attrs: nounwind readnone |
| 33 | +define spir_func i1 @TestIsConstantInt64_False(i64 %x) local_unnamed_addr #0 { |
| 34 | +entry: |
| 35 | + %0 = tail call i1 @llvm.is.constant.i64(i64 %x) |
| 36 | + ret i1 %0 |
| 37 | +} |
| 38 | + |
| 39 | + |
| 40 | +; CHECK: spir_func i1 @TestIsConstantInt64_True |
| 41 | +; CHECK: ret i1 true |
| 42 | + |
| 43 | +; Function Attrs: nounwind readnone |
| 44 | +define spir_func i1 @TestIsConstantInt64_True() local_unnamed_addr #0 { |
| 45 | +entry: |
| 46 | + %0 = tail call i1 @llvm.is.constant.i64(i64 1) |
| 47 | + ret i1 %0 |
| 48 | +} |
| 49 | + |
| 50 | +; CHECK: spir_func i1 @TestIsConstantF32_False |
| 51 | +; CHECK: ret i1 false |
| 52 | + |
| 53 | +; Function Attrs: nounwind readnone |
| 54 | +define spir_func i1 @TestIsConstantF32_False(float %x) local_unnamed_addr #0 { |
| 55 | +entry: |
| 56 | + %0 = tail call i1 @llvm.is.constant.f32(float %x) |
| 57 | + ret i1 %0 |
| 58 | +} |
| 59 | + |
| 60 | + |
| 61 | +; CHECK: spir_func i1 @TestIsConstantF32_True |
| 62 | +; CHECK: ret i1 true |
| 63 | + |
| 64 | +; Function Attrs: nounwind readnone |
| 65 | +define spir_func i1 @TestIsConstantF32_True() local_unnamed_addr #0 { |
| 66 | +entry: |
| 67 | + %0 = tail call i1 @llvm.is.constant.f32(float 0.5) |
| 68 | + ret i1 %0 |
| 69 | +} |
| 70 | + |
| 71 | +; CHECK: spir_func i1 @TestIsConstantF64_False |
| 72 | +; CHECK: ret i1 false |
| 73 | + |
| 74 | +; Function Attrs: nounwind readnone |
| 75 | +define spir_func i1 @TestIsConstantF64_False(double %x) local_unnamed_addr #0 { |
| 76 | +entry: |
| 77 | + %0 = tail call i1 @llvm.is.constant.f64(double %x) |
| 78 | + ret i1 %0 |
| 79 | +} |
| 80 | + |
| 81 | +; CHECK: spir_func i1 @TestIsConstantF64_True |
| 82 | +; CHECK: ret i1 true |
| 83 | + |
| 84 | +; Function Attrs: nounwind readnone |
| 85 | +define spir_func i1 @TestIsConstantF64_True() local_unnamed_addr #0 { |
| 86 | +entry: |
| 87 | + %0 = tail call i1 @llvm.is.constant.f64(double 0.5) |
| 88 | + ret i1 %0 |
| 89 | +} |
| 90 | + |
| 91 | +; CHECK: spir_func i1 @TestIsConstantVec_False |
| 92 | +; CHECK: ret i1 false |
| 93 | + |
| 94 | +; Function Attrs: nounwind readnone |
| 95 | +define spir_func i1 @TestIsConstantVec_False(<4 x float> %x) local_unnamed_addr #0 { |
| 96 | +entry: |
| 97 | + %0 = tail call i1 @llvm.is.constant.v4f32(<4 x float> %x) |
| 98 | + ret i1 %0 |
| 99 | +} |
| 100 | + |
| 101 | +; CHECK: spir_func i1 @TestIsConstantVec_True |
| 102 | +; CHECK: ret i1 true |
| 103 | + |
| 104 | +; Function Attrs: nounwind readnone |
| 105 | +define spir_func i1 @TestIsConstantVec_True() local_unnamed_addr #0 { |
| 106 | +entry: |
| 107 | + %0 = tail call i1 @llvm.is.constant.v4f32(<4 x float> <float 0.5, float 0.5, float 0.5, float 0.5>) |
| 108 | + ret i1 %0 |
| 109 | +} |
| 110 | + |
| 111 | +; Function Attrs: nounwind readnone |
| 112 | +declare i1 @llvm.is.constant.i32(i32) #1 |
| 113 | + |
| 114 | +; Function Attrs: nounwind readnone |
| 115 | +declare i1 @llvm.is.constant.i64(i64) #1 |
| 116 | + |
| 117 | +; Function Attrs: nounwind readnone |
| 118 | +declare i1 @llvm.is.constant.f32(float) #1 |
| 119 | + |
| 120 | +; Function Attrs: nounwind readnone |
| 121 | +declare i1 @llvm.is.constant.f64(double) #1 |
| 122 | + |
| 123 | +; Function Attrs: nounwind readnone |
| 124 | +declare i1 @llvm.is.constant.v4f32(<4 x float>) #1 |
| 125 | + |
| 126 | +attributes #0 = { nounwind readnone "correctly-rounded-divide-sqrt-fp-math"="false" "denorms-are-zero"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } |
| 127 | +attributes #1 = { nounwind readnone speculatable willreturn } |
| 128 | + |
| 129 | +!llvm.module.flags = !{!0} |
| 130 | +!opencl.ocl.version = !{!1} |
| 131 | +!opencl.spir.version = !{!2} |
| 132 | + |
| 133 | +!0 = !{i32 1, !"wchar_size", i32 4} |
| 134 | +!1 = !{i32 1, i32 0} |
| 135 | +!2 = !{i32 1, i32 2} |
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