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[SYCL] Add tests from intel/llvm (intel#50)
The end to end tests with OpenCL/CUDA/Level_Zero dependencies are moved out in-source LIT tests.
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SYCL/AOT/Inputs/aot.cpp

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//==--- aot.cpp - Simple vector addition (AOT compilation example) --------==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===---------------------------------------------------------------------===//
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#include <CL/sycl.hpp>
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#include <array>
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#include <iostream>
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constexpr cl::sycl::access::mode sycl_read = cl::sycl::access::mode::read;
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constexpr cl::sycl::access::mode sycl_write = cl::sycl::access::mode::write;
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template <typename T> class SimpleVadd;
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template <typename T, size_t N>
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void simple_vadd(const std::array<T, N> &VA, const std::array<T, N> &VB,
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std::array<T, N> &VC) {
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cl::sycl::queue deviceQueue([](cl::sycl::exception_list ExceptionList) {
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for (cl::sycl::exception_ptr_class ExceptionPtr : ExceptionList) {
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try {
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std::rethrow_exception(ExceptionPtr);
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} catch (cl::sycl::exception &E) {
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std::cerr << E.what();
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} catch (...) {
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std::cerr << "Unknown async exception was caught." << std::endl;
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}
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}
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});
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cl::sycl::range<1> numOfItems{N};
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cl::sycl::buffer<T, 1> bufferA(VA.data(), numOfItems);
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cl::sycl::buffer<T, 1> bufferB(VB.data(), numOfItems);
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cl::sycl::buffer<T, 1> bufferC(VC.data(), numOfItems);
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deviceQueue.submit([&](cl::sycl::handler &cgh) {
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auto accessorA = bufferA.template get_access<sycl_read>(cgh);
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auto accessorB = bufferB.template get_access<sycl_read>(cgh);
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auto accessorC = bufferC.template get_access<sycl_write>(cgh);
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cgh.parallel_for<class SimpleVadd<T>>(numOfItems,
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[=](cl::sycl::id<1> wiID) {
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accessorC[wiID] = accessorA[wiID] + accessorB[wiID];
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});
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});
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deviceQueue.wait_and_throw();
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}
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int main() {
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const size_t array_size = 4;
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std::array<cl::sycl::cl_int, array_size> A = {{1, 2, 3, 4}},
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B = {{1, 2, 3, 4}}, C;
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std::array<cl::sycl::cl_float, array_size> D = {{1.f, 2.f, 3.f, 4.f}},
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E = {{1.f, 2.f, 3.f, 4.f}}, F;
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simple_vadd(A, B, C);
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simple_vadd(D, E, F);
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for (unsigned int i = 0; i < array_size; i++) {
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if (C[i] != A[i] + B[i]) {
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std::cout << "The results are incorrect (element " << i << " is " << C[i]
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<< "!\n";
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return 1;
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}
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if (F[i] != D[i] + E[i]) {
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std::cout << "The results are incorrect (element " << i << " is " << F[i]
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<< "!\n";
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return 1;
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}
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}
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std::cout << "The results are correct!\n";
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return 0;
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}

SYCL/AOT/multiple-devices.cpp

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//==-- multiple-devices.cpp - Appropriate AOT-compiled image selection -----==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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// REQUIRES: opencl-aot, ocloc, aoc, cpu, gpu, accelerator
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// UNSUPPORTED: cuda
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// CUDA is not compatible with SPIR.
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// 1-command compilation case
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// Targeting CPU, GPU, FPGA
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// RUN: %clangxx -fsycl -fsycl-targets=spir64_x86_64-unknown-unknown-sycldevice,spir64_gen-unknown-unknown-sycldevice,spir64_fpga-unknown-unknown-sycldevice -Xsycl-target-backend=spir64_gen-unknown-unknown-sycldevice "-device *" %S/Inputs/aot.cpp -o %t_all.out
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// RUN: %HOST_RUN_PLACEHOLDER %t_all.out
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// RUN: %CPU_RUN_PLACEHOLDER %t_all.out
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// RUN: %GPU_RUN_PLACEHOLDER %t_all.out
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// RUN: %ACC_RUN_PLACEHOLDER %t_all.out
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// Produce object file, spirv, device images to combine these differently
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// at link-time, thus testing various AOT-compiled images configurations
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// RUN: %clangxx -fsycl %S/Inputs/aot.cpp -c -o %t.o
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// RUN: %clangxx -fsycl -fsycl-link-targets=spir64-unknown-unknown-sycldevice %t.o -o %t.spv
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// AOT-compile device binary images
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// RUN: opencl-aot %t.spv -o=%t_cpu.ir --device=cpu
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// RUN: ocloc -file %t.spv -spirv_input -output %t_gen.out -output_no_suffix -device cfl
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// RUN: aoc %t.spv -o %t_fpga.aocx -sycl -dep-files=%t.d
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// CPU, GPU
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// RUN: %clangxx -fsycl -fsycl-add-targets=spir64_x86_64:%t_cpu.ir,spir64_gen:%t_gen.out %t.o -o %t_cpu_gpu.out
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// RUN: %HOST_RUN_PLACEHOLDER %t_cpu_gpu.out
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// RUN: %CPU_RUN_PLACEHOLDER %t_cpu_gpu.out
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// RUN: %GPU_RUN_PLACEHOLDER %t_cpu_gpu.out
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// CPU, FPGA
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// RUN: %clangxx -fsycl -fsycl-add-targets=spir64_x86_64:%t_cpu.ir,spir64_fpga:%t_fpga.aocx %t.o -o %t_cpu_fpga.out
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// RUN: %HOST_RUN_PLACEHOLDER %t_cpu_fpga.out
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// RUN: %CPU_RUN_PLACEHOLDER %t_cpu_fpga.out
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// RUN: %ACC_RUN_PLACEHOLDER %t_cpu_fpga.out
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// GPU, FPGA
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// RUN: %clangxx -fsycl -fsycl-add-targets=spir64_gen:%t_gen.out,spir64_fpga:%t_fpga.aocx %t.o -o %t_gpu_fpga.out
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// RUN: %HOST_RUN_PLACEHOLDER %t_gpu_fpga.out
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// RUN: %GPU_RUN_PLACEHOLDER %t_gpu_fpga.out
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// RUN: %ACC_RUN_PLACEHOLDER %t_gpu_fpga.out
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// No AOT-compiled image for CPU
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// RUN: %clangxx -fsycl -fsycl-add-targets=spir64:%t.spv,spir64_gen:%t_gen.out,spir64_fpga:%t_fpga.aocx %t.o -o %t_spv_gpu_fpga.out
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// RUN: %CPU_RUN_PLACEHOLDER %t_spv_gpu_fpga.out
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// Check that execution on AOT-compatible devices is unaffected
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// RUN: %GPU_RUN_PLACEHOLDER %t_spv_gpu_fpga.out
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// RUN: %ACC_RUN_PLACEHOLDER %t_spv_gpu_fpga.out
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// No AOT-compiled image for GPU
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// RUN: %clangxx -fsycl -fsycl-add-targets=spir64:%t.spv,spir64_x86_64:%t_cpu.ir,spir64_fpga:%t_fpga.aocx %t.o -o %t_spv_cpu_fpga.out
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// RUN: %GPU_RUN_PLACEHOLDER %t_spv_cpu_fpga.out
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// Check that execution on AOT-compatible devices is unaffected
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// RUN: %CPU_RUN_PLACEHOLDER %t_spv_cpu_fpga.out
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// RUN: %ACC_RUN_PLACEHOLDER %t_spv_cpu_fpga.out
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// No AOT-compiled image for FPGA
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// RUN: %clangxx -fsycl -fsycl-add-targets=spir64:%t.spv,spir64_x86_64:%t_cpu.ir,spir64_gen:%t_gen.out %t.o -o %t_spv_cpu_gpu.out
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// RUN: %ACC_RUN_PLACEHOLDER %t_spv_cpu_gpu.out
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// Check that execution on AOT-compatible devices is unaffected
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// RUN: %CPU_RUN_PLACEHOLDER %t_spv_cpu_gpu.out
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// RUN: %GPU_RUN_PLACEHOLDER %t_spv_cpu_gpu.out

SYCL/AOT/with-llvm-bc.cpp

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//==----- with-llvm-bc.cpp - SYCL kernel with LLVM IR bitcode as binary ----==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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// REQUIRES: cpu, dump_ir
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// RUN: %clangxx -fsycl -fsycl-targets=spir64-unknown-unknown-sycldevice -c %S/Inputs/aot.cpp -o %t.o
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// RUN: %clangxx -fsycl -fsycl-link-targets=spir64-unknown-unknown-sycldevice %t.o -o %t.spv
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// RUN: llvm-spirv -r %t.spv -o %t.bc
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// RUN: %clangxx -fsycl -fsycl-add-targets=spir64:%t.bc %t.o -o %t.out
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//
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// Only CPU supports LLVM IR bitcode as a binary
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// RUN: %CPU_RUN_PLACEHOLDER %t.out

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