Skip to content

Commit 87175ae

Browse files
authored
[SYCL] add cases for double vectors in SubGroup tests (intel/llvm-test-suite#1618)
1 parent ad6a248 commit 87175ae

File tree

1 file changed

+4
-0
lines changed

1 file changed

+4
-0
lines changed

SYCL/SubGroup/shuffle_fp64.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,10 @@ int main() {
1818
queue Queue;
1919
if (Queue.get_device().has(sycl::aspect::fp64)) {
2020
check<double>(Queue);
21+
check<double, 2>(Queue);
22+
check<double, 4>(Queue);
23+
check<double, 8>(Queue);
24+
check<double, 16>(Queue);
2125
std::cout << "Test passed." << std::endl;
2226
} else {
2327
std::cout << "Test skipped because device doesn't support aspect::fp64"

0 commit comments

Comments
 (0)