Skip to content

Commit ff46a3c

Browse files
jnthbdnjnthbdn
committed
Fixing Wire
1 parent f9200b7 commit ff46a3c

File tree

6 files changed

+640
-118
lines changed

6 files changed

+640
-118
lines changed

‎cores/arduino/SERCOM.cpp

Lines changed: 33 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,5 @@
11
#include "SERCOM.h"
2-
3-
// Constants for Clock multiplexers
4-
#define GENERIC_CLOCK_SERCOM0 (0x14ul)
5-
#define GENERIC_CLOCK_SERCOM1 (0x15ul)
6-
#define GENERIC_CLOCK_SERCOM2 (0x16ul)
7-
#define GENERIC_CLOCK_SERCOM3 (0x17ul)
8-
#define GENERIC_CLOCK_SERCOM4 (0x18ul)
9-
#define GENERIC_CLOCK_SERCOM5 (0x19ul)
2+
#include "variant.h"
103

114
SERCOM::SERCOM(Sercom* s)
125
{
@@ -319,7 +312,7 @@ void SERCOM::resetWIRE()
319312
//I2CM OR I2CS, no matter SWRST is the same bit.
320313

321314
//Setting the Software bit to 1
322-
sercom->I2CM.CTRLA.bit.SWRST = 0x1ul;
315+
sercom->I2CM.CTRLA.bit.SWRST = 1;
323316

324317
//Wait both bits Software Reset from CTRLA and SYNCBUSY are equal to 0
325318
while(sercom->I2CM.CTRLA.bit.SWRST || sercom->I2CM.SYNCBUSY.bit.SWRST);
@@ -330,22 +323,30 @@ void SERCOM::enableWIRE()
330323
// I2C Master and Slave modes share the ENABLE bit function.
331324

332325
// Enable the I²C master mode
333-
sercom->I2CM.CTRLA.bit.ENABLE = 0x1ul ;
326+
sercom->I2CM.CTRLA.bit.ENABLE = 1 ;
334327

335-
while ( sercom->I2CM.SYNCBUSY.bit.ENABLE != 0x0ul )
328+
while ( sercom->I2CM.SYNCBUSY.bit.ENABLE != 0 )
336329
{
337330
// Waiting the enable bit from SYNCBUSY is equal to 0;
338331
}
332+
333+
// Setting bus idle mode
334+
sercom->I2CM.STATUS.bit.BUSSTATE = 1 ;
335+
336+
while ( sercom->I2CM.SYNCBUSY.bit.SYSOP != 0 )
337+
{
338+
// Wait the SYSOP bit from SYNCBUSY coming back to 0
339+
}
339340
}
340341

341342
void SERCOM::disableWIRE()
342343
{
343344
// I2C Master and Slave modes share the ENABLE bit function.
344345

345346
// Enable the I²C master mode
346-
sercom->I2CM.CTRLA.bit.ENABLE = 0x0ul ;
347+
sercom->I2CM.CTRLA.bit.ENABLE = 0 ;
347348

348-
while ( sercom->I2CM.SYNCBUSY.bit.ENABLE != 0x0ul )
349+
while ( sercom->I2CM.SYNCBUSY.bit.ENABLE != 0 )
349350
{
350351
// Waiting the enable bit from SYNCBUSY is equal to 0;
351352
}
@@ -384,43 +385,35 @@ void SERCOM::initMasterWIRE( uint32_t baudrate )
384385
resetWIRE() ;
385386

386387
// Set master mode and enable SCL Clock Stretch mode (stretch after ACK bit)
387-
sercom->I2CM.CTRLA.reg = SERCOM_I2CM_CTRLA_MODE( I2C_MASTER_OPERATION ) |
388-
SERCOM_I2CM_CTRLA_SCLSM |
389-
SERCOM_I2CM_CTRLA_INACTOUT( 3 ) ; // 205µs of Inactive TimeOut
388+
sercom->I2CM.CTRLA.reg = SERCOM_I2CM_CTRLA_MODE( I2C_MASTER_OPERATION )/* |
389+
SERCOM_I2CM_CTRLA_SCLSM*/ ;
390390

391391
// Enable Smart mode and Quick Command
392-
sercom->I2CM.CTRLB.reg = SERCOM_I2CM_CTRLB_SMEN | SERCOM_I2CM_CTRLB_QCEN ;
392+
//sercom->I2CM.CTRLB.reg = SERCOM_I2CM_CTRLB_SMEN /*| SERCOM_I2CM_CTRLB_QCEN*/ ;
393393

394-
// Setting bus idle mode
395-
sercom->I2CM.STATUS.bit.BUSSTATE = WIRE_IDLE_STATE ;
396-
397-
while ( sercom->I2CM.SYNCBUSY.bit.SYSOP != 0 )
398-
{
399-
// Wait the SYSOP bit from SYNCBUSY coming back to 0
400-
}
401394

402395
// Enable all interrupts
403-
// sercom->I2CM.INTENSET.reg = SERCOM_I2CM_INTENSET_MB | SERCOM_I2CM_INTENSET_SB | SERCOM_I2CM_INTENSET_ERROR ;
396+
// sercom->I2CM.INTENSET.reg = SERCOM_I2CM_INTENSET_MB | SERCOM_I2CM_INTENSET_SB | SERCOM_I2CM_INTENSET_ERROR ;
404397

405398
// Synchronous arithmetic baudrate
406399
sercom->I2CM.BAUD.bit.BAUD = SystemCoreClock / ( 2 * baudrate) - 1 ;
407400
}
408401

409-
void SERCOM::sendNackBitWIRE( void )
402+
void SERCOM::prepareNackBitWIRE( void )
410403
{
411404
// Send a NACK
412-
sercom->I2CM.CTRLB.bit.ACKACT = 0x1ul;
405+
sercom->I2CM.CTRLB.bit.ACKACT = 1;
413406
}
414407

415-
void SERCOM::sendAckBitWIRE( void )
408+
void SERCOM::prepareAckBitWIRE( void )
416409
{
417410
// Send an ACK
418-
sercom->I2CM.CTRLB.bit.ACKACT = 0x0ul;
411+
sercom->I2CM.CTRLB.bit.ACKACT = 0;
419412
}
420413

421-
void SERCOM::sendStopBitWIRE( void )
414+
void SERCOM::prepareCommandBitsWire(SercomMasterCommandWire cmd)
422415
{
423-
sercom->I2CM.CTRLB.bit.CMD = WIRE_MASTER_ACT_STOP;
416+
sercom->I2CM.CTRLB.bit.CMD = cmd;
424417

425418
while(sercom->I2CM.SYNCBUSY.bit.SYSOP)
426419
{
@@ -557,15 +550,12 @@ uint8_t SERCOM::readDataWIRE( void )
557550
{
558551
if(isMasterWIRE())
559552
{
560-
while( sercom->I2CM.INTFLAG.bit.SB == 0x0ul || sercom->I2CM.SYNCBUSY.bit.SYSOP == 0x1ul)
553+
while( sercom->I2CM.INTFLAG.bit.SB == 0 || sercom->I2CM.STATUS.bit.CLKHOLD == 0 )
561554
{
562-
// Waiting complete receive & synchronization finished
555+
// Waiting complete receive, Clock holding & synchronization finished
563556
}
564557

565-
// Clear the Slave on Bus flag
566-
sercom->I2CM.INTFLAG.bit.SB = 0x1;
567-
568-
return sercom->I2CM.DATA.reg ;
558+
return sercom->I2CM.DATA.bit.DATA ;
569559
}
570560
else
571561
{
@@ -581,32 +571,32 @@ void SERCOM::initClockNVIC( void )
581571

582572
if(sercom == SERCOM0)
583573
{
584-
clockId = GENERIC_CLOCK_SERCOM0;
574+
clockId = GCM_SERCOM0_CORE;
585575
IdNvic = SERCOM0_IRQn;
586576
}
587577
else if(sercom == SERCOM1)
588578
{
589-
clockId = GENERIC_CLOCK_SERCOM1;
579+
clockId = GCM_SERCOM1_CORE;
590580
IdNvic = SERCOM1_IRQn;
591581
}
592582
else if(sercom == SERCOM2)
593583
{
594-
clockId = GENERIC_CLOCK_SERCOM2;
584+
clockId = GCM_SERCOM2_CORE;
595585
IdNvic = SERCOM2_IRQn;
596586
}
597587
else if(sercom == SERCOM3)
598588
{
599-
clockId = GENERIC_CLOCK_SERCOM3;
589+
clockId = GCM_SERCOM3_CORE;
600590
IdNvic = SERCOM3_IRQn;
601591
}
602592
else if(sercom == SERCOM4)
603593
{
604-
clockId = GENERIC_CLOCK_SERCOM4;
594+
clockId = GCM_SERCOM4_CORE;
605595
IdNvic = SERCOM4_IRQn;
606596
}
607597
else if(sercom == SERCOM5)
608598
{
609-
clockId = GENERIC_CLOCK_SERCOM5;
599+
clockId = GCM_SERCOM5_CORE;
610600
IdNvic = SERCOM5_IRQn;
611601
}
612602

‎cores/arduino/SERCOM.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -170,9 +170,9 @@ class SERCOM
170170
void resetWIRE( void ) ;
171171
void enableWIRE( void ) ;
172172
void disableWIRE( void );
173-
void sendNackBitWIRE( void ) ;
174-
void sendAckBitWIRE( void ) ;
175-
void sendStopBitWIRE( void ) ;
173+
void prepareNackBitWIRE( void ) ;
174+
void prepareAckBitWIRE( void ) ;
175+
void prepareCommandBitsWire(SercomMasterCommandWire cmd);
176176
bool startTransmissionWIRE(uint8_t address, SercomWireReadWriteFlag flag) ;
177177
bool sendDataMasterWIRE(uint8_t data) ;
178178
bool sendDataSlaveWIRE(uint8_t data) ;

‎cores/validation/validation_chuck/build_as6/test.atsln

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+

2+
Microsoft Visual Studio Solution File, Format Version 11.00
3+
# Atmel Studio Solution File, Format Version 11.00
4+
Project("{E66E83B9-2572-4076-B26E-6BE79FF3018A}") = "test", "test.cppproj", "{B3F859AD-E162-4C2F-9684-EAC6932FEC80}"
5+
EndProject
6+
Global
7+
GlobalSection(SolutionConfigurationPlatforms) = preSolution
8+
Debug|ARM = Debug|ARM
9+
Release|ARM = Release|ARM
10+
EndGlobalSection
11+
GlobalSection(ProjectConfigurationPlatforms) = postSolution
12+
{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.ActiveCfg = Debug|ARM
13+
{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Debug|ARM.Build.0 = Debug|ARM
14+
{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.ActiveCfg = Release|ARM
15+
{B3F859AD-E162-4C2F-9684-EAC6932FEC80}.Release|ARM.Build.0 = Release|ARM
16+
EndGlobalSection
17+
GlobalSection(SolutionProperties) = preSolution
18+
HideSolutionNode = FALSE
19+
EndGlobalSection
20+
EndGlobal

0 commit comments

Comments
 (0)