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Merge branch 'bugfix/warn_rc32k_use_in_kconfig_v5.3' into 'release/v5.3'
fix(clk): add an inevitable kconfig option to be selected to use rc32k (v5.3) See merge request espressif/esp-idf!35965
2 parents 90de6ac + a2178b0 commit 4c422b1

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13 files changed

+15
-43
lines changed

13 files changed

+15
-43
lines changed

components/esp_hw_support/CMakeLists.txt

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@@ -16,10 +16,6 @@ if(${target} STREQUAL "esp32c6")
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list(APPEND priv_requires hal)
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endif()
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if(CONFIG_RTC_CLK_SRC_INT_RC32K)
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message(WARNING "Internal RC32K clock is unstable at extreme temperatures and is not recommended for use.")
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endif()
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set(srcs "cpu.c" "port/${IDF_TARGET}/esp_cpu_intr.c" "esp_memory_utils.c" "port/${IDF_TARGET}/cpu_region_protect.c")
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if(NOT BOOTLOADER_BUILD)
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list(APPEND srcs "esp_clk.c"

components/esp_hw_support/port/esp32c6/Kconfig.rtc

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,12 +13,18 @@ choice RTC_CLK_SRC
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bool "External 32kHz oscillator at 32K_XP pin"
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select ESP_SYSTEM_RTC_EXT_OSC
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config RTC_CLK_SRC_INT_RC32K
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bool "Internal 32kHz RC oscillator"
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bool "Internal 32kHz RC oscillator (NOT RECOMMENDED TO USE, READ DOCS FIRST)"
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depends on RTC_CLK_SRC_USE_DANGEROUS_RC32K_ALLOWED
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help
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Internal RC32K clock is unstable at extreme temperatures and is not recommended for use.
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To be able to select this option, please select `RTC_CLK_SRC_USE_DANGEROUS_RC32K_ALLOWED` first.
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This option will be removed in IDF v6.0.
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endchoice
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config RTC_CLK_SRC_USE_DANGEROUS_RC32K_ALLOWED
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bool "Confirm to use the unrecommended 32 kHz RC oscillator (READ DOCS FIRST)"
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help
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Internal RC32K clock is unstable at extreme temperatures and is not recommended for use.
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config RTC_CLK_CAL_CYCLES
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int "Number of cycles for RTC_SLOW_CLK calibration"
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default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_RC32K

components/esp_hw_support/port/esp32h2/Kconfig.rtc

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -12,18 +12,13 @@ choice RTC_CLK_SRC
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config RTC_CLK_SRC_EXT_OSC
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bool "External 32kHz oscillator at 32K_XP pin"
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select ESP_SYSTEM_RTC_EXT_OSC
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config RTC_CLK_SRC_INT_RC32K
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bool "Internal 32kHz RC oscillator"
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help
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Internal RC32K clock is unstable at extreme temperatures and is not recommended for use.
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This option will be removed in IDF v6.0.
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endchoice
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config RTC_CLK_CAL_CYCLES
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int "Number of cycles for RTC_SLOW_CLK calibration"
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default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_RC32K
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default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC
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default 1024 if RTC_CLK_SRC_INT_RC
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range 0 8190 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_RC32K
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range 0 8190 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC
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range 0 32766 if RTC_CLK_SRC_INT_RC
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help
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When the startup code initializes RTC_SLOW_CLK, it can perform

components/esp_hw_support/port/esp32p4/Kconfig.rtc

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -9,18 +9,13 @@ choice RTC_CLK_SRC
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config RTC_CLK_SRC_EXT_CRYS
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bool "External 32kHz crystal"
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select ESP_SYSTEM_RTC_EXT_XTAL
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config RTC_CLK_SRC_INT_RC32K
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bool "Internal 32kHz RC oscillator"
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help
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Internal RC32K clock is unstable at extreme temperatures and is not recommended for use.
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This option will be removed in IDF v6.0.
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endchoice
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config RTC_CLK_CAL_CYCLES
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int "Number of cycles for RTC_SLOW_CLK calibration"
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default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_INT_RC32K
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default 3000 if RTC_CLK_SRC_EXT_CRYS
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default 1024 if RTC_CLK_SRC_INT_RC
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range 0 8190 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_INT_RC32K
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range 0 8190 if RTC_CLK_SRC_EXT_CRYS
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range 0 32766 if RTC_CLK_SRC_INT_RC
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help
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When the startup code initializes RTC_SLOW_CLK, it can perform

components/esp_system/port/soc/esp32h2/clk.c

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@@ -107,8 +107,6 @@ __attribute__((weak)) void esp_clk_init(void)
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select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
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#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
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select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_OSC_SLOW);
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#elif defined(CONFIG_RTC_CLK_SRC_INT_RC32K)
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select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_RC32K);
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#else
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select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_RC_SLOW);
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#endif

components/esp_system/port/soc/esp32p4/clk.c

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@@ -72,8 +72,6 @@ __attribute__((weak)) void esp_clk_init(void)
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#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
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select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
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#elif defined(CONFIG_RTC_CLK_SRC_INT_RC32K)
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select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_RC32K);
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#else
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select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_RC_SLOW);
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#endif

components/soc/esp32c6/include/soc/clk_tree_defs.h

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@@ -24,7 +24,7 @@ extern "C" {
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* This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock
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* can be computed in runtime through calibration.
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*
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* 4) Internal 32kHz RC Oscillator: RC32K
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* 4) Internal 32kHz RC Oscillator: RC32K [NOT RECOMMENDED TO USE]
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*
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* The exact frequency of this clock can be computed in runtime through calibration.
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*

components/soc/esp32h2/include/soc/clk_tree_defs.h

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@@ -24,7 +24,7 @@ extern "C" {
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* This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock
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* can be computed in runtime through calibration.
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*
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* 4) Internal 32kHz RC Oscillator: RC32K
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* 4) Internal 32kHz RC Oscillator: RC32K [NOT RECOMMENDED TO USE]
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*
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* The exact frequency of this clock can be computed in runtime through calibration.
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*

components/soc/esp32p4/include/soc/clk_tree_defs.h

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@@ -26,7 +26,7 @@ extern "C" {
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* This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock
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* can be computed in runtime through calibration.
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*
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* 4) Internal 32kHz RC Oscillator: RC32K
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* 4) Internal 32kHz RC Oscillator: RC32K [NOT RECOMMENDED TO USE]
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*
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* The exact frequency of this clock can be computed in runtime through calibration.
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*

docs/en/api-reference/peripherals/clk_tree.rst

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@@ -79,12 +79,6 @@ Root clocks generate reliable clock signals. These clock signals then pass throu
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A clock signal generated by an external circuit can be connected to {IDF_TARGET_OSC_SLOW_PIN} to be the clock source for the ``RTC_SLOW_CLK``. This clock can also be calibrated to get its exact frequency.
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82-
.. only:: SOC_CLK_RC32K_SUPPORTED
83-
84-
- Internal 32 kHz RC Oscillator (RC32K)
85-
86-
The exact frequency of this clock can be computed in runtime through calibration.
87-
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Typically, the frequency of the signal generated from an RC oscillator circuit is less accurate and more sensitive to the environment compared to the signal generated from a crystal. {IDF_TARGET_NAME} provides several clock source options for the ``RTC_SLOW_CLK``, and it is possible to make the choice based on the requirements for system time accuracy and power consumption. For more details, please refer to :ref:`rtc-clock-source-choice`.
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Module Clocks

docs/en/api-reference/system/system_time.rst

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@@ -46,8 +46,6 @@ The RTC timer has the following clock sources:
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:not esp32c6 and not esp32h2 and not esp32p4: - ``Internal {IDF_TARGET_INT_OSC_FRE} oscillator, divided by 256 ({IDF_TARGET_INT_OSC_FRE_DIVIDED})``: Provides better frequency stability than the ``Internal {IDF_TARGET_RTC_CLK_FRE} RC oscillator`` at the expense of a higher (by 5 μA) Deep-sleep current consumption. It also does not require external components.
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49-
:esp32c6 or esp32h2 or esp32p4: - ``Internal 32 kHz RC oscillator``
50-
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The choice depends on your requirements for system time accuracy and power consumption in sleep modes. To modify the RTC clock source, set :ref:`CONFIG_RTC_CLK_SRC` in project configuration.
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More details about the wiring requirements for the external crystal or external oscillator, please refer to the `Hardware Design Guidelines <https://docs.espressif.com/projects/esp-hardware-design-guidelines/en/latest/{IDF_TARGET_PATH_NAME}>`_.

docs/zh_CN/api-reference/peripherals/clk_tree.rst

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@@ -79,12 +79,6 @@
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将外部电路生成的时钟信号连接到 {IDF_TARGET_OSC_SLOW_PIN},可作为 ``RTC_SLOW_CLK`` 的时钟源。通过校准,可以计算该时钟信号的实际频率。
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82-
.. only:: SOC_CLK_RC32K_SUPPORTED
83-
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- 内部 32 kHz RC 振荡器 (RC32K)
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在运行时,通过校准,可以计算该时钟信号的实际频率。
87-
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与晶振产生的信号相比,从 RC 振荡器电路产生的信号通常精度较低,且容易受环境影响。因此,{IDF_TARGET_NAME} 为 ``RTC_SLOW_CLK`` 提供了几种时钟源选项,可以根据对系统时间精度和对功耗的要求选择。更多详情,请参阅 :ref:`rtc-clock-source-choice`。
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模块时钟

docs/zh_CN/api-reference/system/system_time.rst

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@@ -46,8 +46,6 @@ RTC 定时器有以下时钟源:
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:not esp32c6 and not esp32h2 and not esp32p4: - ``内置 {IDF_TARGET_INT_OSC_FRE} 振荡器的 256 分频时钟 ({IDF_TARGET_INT_OSC_FRE_DIVIDED})``:频率稳定性优于 ``内置 {IDF_TARGET_RTC_CLK_FRE} RC 振荡器``,同样无需外部元件,但 Deep-sleep 模式下电流消耗更高(比默认模式高 5 μA)。
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49-
:esp32c6 or esp32h2 or esp32p4: - ``内置 32 kHz RC 振荡器``
50-
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时钟源的选择取决于系统时间精度要求和睡眠模式下的功耗要求。要修改 RTC 时钟源,请在项目配置中设置 :ref:`CONFIG_RTC_CLK_SRC`。
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想要了解外置晶振或外置振荡器的更多布线要求,请参考 `硬件设计指南 <https://docs.espressif.com/projects/esp-hardware-design-guidelines/zh_CN/latest/{IDF_TARGET_PATH_NAME}>`_。

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