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Merge branch 'bugfix/warn_rc32k_use_in_kconfig' into 'master'
fix(clk): add an inevitable kconfig option to be selected to use rc32k See merge request espressif/esp-idf!34417
2 parents 8eeb3e2 + aa35807 commit 8771607

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13 files changed

+15
-43
lines changed

13 files changed

+15
-43
lines changed

components/esp_hw_support/CMakeLists.txt

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -18,10 +18,6 @@ if(${target} STREQUAL "esp32c6")
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list(APPEND priv_requires hal)
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endif()
2020

21-
if(CONFIG_RTC_CLK_SRC_INT_RC32K)
22-
message(WARNING "Internal RC32K clock is unstable at extreme temperatures and is not recommended for use.")
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endif()
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set(srcs "cpu.c" "port/${IDF_TARGET}/esp_cpu_intr.c" "esp_memory_utils.c" "port/${IDF_TARGET}/cpu_region_protect.c")
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if(NOT non_os_build)
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list(APPEND srcs "esp_clk.c"

components/esp_hw_support/port/esp32c6/Kconfig.rtc

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13,12 +13,18 @@ choice RTC_CLK_SRC
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bool "External 32 kHz oscillator at 32K_XP pin"
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select ESP_SYSTEM_RTC_EXT_OSC
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config RTC_CLK_SRC_INT_RC32K
16-
bool "Internal 32 kHz RC oscillator"
16+
bool "Internal 32 kHz RC oscillator (NOT RECOMMENDED TO USE, READ DOCS FIRST)"
17+
depends on RTC_CLK_SRC_USE_DANGEROUS_RC32K_ALLOWED
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help
18-
Internal RC32K clock is unstable at extreme temperatures and is not recommended for use.
19+
To be able to select this option, please select `RTC_CLK_SRC_USE_DANGEROUS_RC32K_ALLOWED` first.
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This option will be removed in IDF v6.0.
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endchoice
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23+
config RTC_CLK_SRC_USE_DANGEROUS_RC32K_ALLOWED
24+
bool "Confirm to use the unrecommended 32 kHz RC oscillator (READ DOCS FIRST)"
25+
help
26+
Internal RC32K clock is unstable at extreme temperatures and is not recommended for use.
27+
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config RTC_CLK_CAL_CYCLES
2329
int "Number of cycles for RTC_SLOW_CLK calibration"
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default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_RC32K

components/esp_hw_support/port/esp32h2/Kconfig.rtc

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -12,18 +12,13 @@ choice RTC_CLK_SRC
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config RTC_CLK_SRC_EXT_OSC
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bool "External 32 kHz oscillator at 32K_XP pin"
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select ESP_SYSTEM_RTC_EXT_OSC
15-
config RTC_CLK_SRC_INT_RC32K
16-
bool "Internal 32 kHz RC oscillator"
17-
help
18-
Internal RC32K clock is unstable at extreme temperatures and is not recommended for use.
19-
This option will be removed in IDF v6.0.
2015
endchoice
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config RTC_CLK_CAL_CYCLES
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int "Number of cycles for RTC_SLOW_CLK calibration"
24-
default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_RC32K
19+
default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC
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default 1024 if RTC_CLK_SRC_INT_RC
26-
range 0 8190 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC || RTC_CLK_SRC_INT_RC32K
21+
range 0 8190 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_EXT_OSC
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range 0 32766 if RTC_CLK_SRC_INT_RC
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help
2924
When the startup code initializes RTC_SLOW_CLK, it can perform

components/esp_hw_support/port/esp32p4/Kconfig.rtc

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -9,18 +9,13 @@ choice RTC_CLK_SRC
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config RTC_CLK_SRC_EXT_CRYS
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bool "External 32 kHz crystal"
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select ESP_SYSTEM_RTC_EXT_XTAL
12-
config RTC_CLK_SRC_INT_RC32K
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bool "Internal 32 kHz RC oscillator"
14-
help
15-
Internal RC32K clock is unstable at extreme temperatures and is not recommended for use.
16-
This option will be removed in IDF v6.0.
1712
endchoice
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config RTC_CLK_CAL_CYCLES
2015
int "Number of cycles for RTC_SLOW_CLK calibration"
21-
default 3000 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_INT_RC32K
16+
default 3000 if RTC_CLK_SRC_EXT_CRYS
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default 1024 if RTC_CLK_SRC_INT_RC
23-
range 0 8190 if RTC_CLK_SRC_EXT_CRYS || RTC_CLK_SRC_INT_RC32K
18+
range 0 8190 if RTC_CLK_SRC_EXT_CRYS
2419
range 0 32766 if RTC_CLK_SRC_INT_RC
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help
2621
When the startup code initializes RTC_SLOW_CLK, it can perform

components/esp_system/port/soc/esp32h2/clk.c

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -107,8 +107,6 @@ __attribute__((weak)) void esp_clk_init(void)
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select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
108108
#elif defined(CONFIG_RTC_CLK_SRC_EXT_OSC)
109109
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_OSC_SLOW);
110-
#elif defined(CONFIG_RTC_CLK_SRC_INT_RC32K)
111-
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_RC32K);
112110
#else
113111
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_RC_SLOW);
114112
#endif

components/esp_system/port/soc/esp32p4/clk.c

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@@ -114,8 +114,6 @@ __attribute__((weak)) void esp_clk_init(void)
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115115
#if defined(CONFIG_RTC_CLK_SRC_EXT_CRYS)
116116
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_XTAL32K);
117-
#elif defined(CONFIG_RTC_CLK_SRC_INT_RC32K)
118-
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_RC32K);
119117
#else
120118
select_rtc_slow_clk(SOC_RTC_SLOW_CLK_SRC_RC_SLOW);
121119
#endif

components/soc/esp32c6/include/soc/clk_tree_defs.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ extern "C" {
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* This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock
2525
* can be computed in runtime through calibration.
2626
*
27-
* 4) Internal 32kHz RC Oscillator: RC32K
27+
* 4) Internal 32kHz RC Oscillator: RC32K [NOT RECOMMENDED TO USE]
2828
*
2929
* The exact frequency of this clock can be computed in runtime through calibration.
3030
*

components/soc/esp32h2/include/soc/clk_tree_defs.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -24,7 +24,7 @@ extern "C" {
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* This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock
2525
* can be computed in runtime through calibration.
2626
*
27-
* 4) Internal 32kHz RC Oscillator: RC32K
27+
* 4) Internal 32kHz RC Oscillator: RC32K [NOT RECOMMENDED TO USE]
2828
*
2929
* The exact frequency of this clock can be computed in runtime through calibration.
3030
*

components/soc/esp32p4/include/soc/clk_tree_defs.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,7 @@ extern "C" {
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* This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock
2727
* can be computed in runtime through calibration.
2828
*
29-
* 4) Internal 32kHz RC Oscillator: RC32K
29+
* 4) Internal 32kHz RC Oscillator: RC32K [NOT RECOMMENDED TO USE]
3030
*
3131
* The exact frequency of this clock can be computed in runtime through calibration.
3232
*

docs/en/api-reference/peripherals/clk_tree.rst

Lines changed: 0 additions & 6 deletions
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@@ -79,12 +79,6 @@ Root clocks generate reliable clock signals. These clock signals then pass throu
7979

8080
A clock signal generated by an external circuit can be connected to {IDF_TARGET_OSC_SLOW_PIN} to be the clock source for the ``RTC_SLOW_CLK``. This clock can also be calibrated to get its exact frequency.
8181

82-
.. only:: SOC_CLK_RC32K_SUPPORTED
83-
84-
- Internal 32 kHz RC Oscillator (RC32K)
85-
86-
The exact frequency of this clock can be computed in runtime through calibration.
87-
8882
Typically, the frequency of the signal generated from an RC oscillator circuit is less accurate and more sensitive to the environment compared to the signal generated from a crystal. {IDF_TARGET_NAME} provides several clock source options for the ``RTC_SLOW_CLK``, and it is possible to make the choice based on the requirements for system time accuracy and power consumption. For more details, please refer to :ref:`rtc-clock-source-choice`.
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Module Clocks

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