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[SYCL][CUDA] Adds tests for atomic memory ordering #363
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Signed-off-by: Steffen Larsen <[email protected]>
Signed-off-by: Steffen Larsen <[email protected]>
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intel/llvm#4105 has been merged so these tests should pass now. |
vladimirlaz
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Aug 10, 2021
aelovikov-intel
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Mar 27, 2023
…uite#363) * [SYCL][CUDA] Adds tests for atomic memory ordering Signed-off-by: Steffen Larsen <[email protected]> * Fix formatting Signed-off-by: Steffen Larsen <[email protected]> Co-authored-by: Steffen Larsen <[email protected]>
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This commit adds tests for memory orderings supported by a given device. This relies on the changes in intel/llvm#4105. It also loosely relates to intel/llvm#4106.
NOTE: This is disabled for L0, OpenCL, and ROCm as they do not currently implement the backend functionality required for querying
info::device::atomic_memory_order_capabilitiesandaspect::atomic64.