@@ -3896,7 +3896,7 @@ class OffloadingActionBuilder final {
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SmallVector<CudaArch, 8 > GpuArchList;
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// / Build the last steps for CUDA after all BC files have been linked.
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- Action *finalizeNVPTXDependences (Action *Input, const llvm::Triple &TT) {
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+ JobAction *finalizeNVPTXDependences (Action *Input, const llvm::Triple &TT) {
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auto *BA = C.getDriver ().ConstructPhaseAction (
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C, Args, phases::Backend, Input, AssociatedOffloadKind);
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if (TT.getOS () != llvm::Triple::NVCL) {
@@ -3906,10 +3906,11 @@ class OffloadingActionBuilder final {
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return C.MakeAction <LinkJobAction>(DeviceActions,
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types::TY_CUDA_FATBIN);
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}
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- return BA ;
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+ return cast<JobAction>(BA) ;
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}
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- Action *finalizeAMDGCNDependences (Action *Input, const llvm::Triple &TT) {
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+ JobAction *finalizeAMDGCNDependences (Action *Input,
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+ const llvm::Triple &TT) {
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auto *BA = C.getDriver ().ConstructPhaseAction (
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C, Args, phases::Backend, Input, AssociatedOffloadKind);
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@@ -3919,7 +3920,7 @@ class OffloadingActionBuilder final {
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ActionList AL = {AA};
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Action *LinkAction = C.MakeAction <LinkJobAction>(AL, types::TY_Image);
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ActionList HIPActions = {LinkAction};
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- Action *HIPFatBinary =
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+ JobAction *HIPFatBinary =
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C.MakeAction <LinkJobAction>(HIPActions, types::TY_HIP_FATBIN);
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return HIPFatBinary;
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}
@@ -4052,7 +4053,7 @@ class OffloadingActionBuilder final {
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else
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FullDeviceLinkAction = DeviceLinkAction;
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auto *PostLinkAction = C.MakeAction <SYCLPostLinkJobAction>(
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- FullDeviceLinkAction, types::TY_LLVM_BC);
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+ FullDeviceLinkAction, types::TY_LLVM_BC, types::TY_LLVM_BC );
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auto *TranslateAction = C.MakeAction <SPIRVTranslatorJobAction>(
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PostLinkAction, types::TY_Image);
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SYCLLinkBinary = C.MakeAction <OffloadWrapperJobAction>(
@@ -4322,6 +4323,7 @@ class OffloadingActionBuilder final {
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auto TT = SYCLTripleList[I];
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auto isNVPTX = (*TC)->getTriple ().isNVPTX ();
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auto isAMDGCN = (*TC)->getTriple ().isAMDGCN ();
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+ auto isSPIR = (*TC)->getTriple ().isSPIR ();
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bool isSpirvAOT = TT.getSubArch () == llvm::Triple::SPIRSubArch_fpga ||
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TT.getSubArch () == llvm::Triple::SPIRSubArch_gen ||
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TT.getSubArch () == llvm::Triple::SPIRSubArch_x86_64;
@@ -4333,8 +4335,6 @@ class OffloadingActionBuilder final {
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// directly to the backend compilation step (aocr) or wrapper (aocx)
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else if (types::isFPGA (Input->getType ())) {
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Action *FPGAAOTAction;
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- constexpr char COL_CODE[] = " Code" ;
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- constexpr char COL_ZERO[] = " 0" ;
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if (Input->getType () == types::TY_FPGA_AOCR ||
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Input->getType () == types::TY_FPGA_AOCR_EMU)
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// Generate AOCX/AOCR
@@ -4346,8 +4346,10 @@ class OffloadingActionBuilder final {
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else
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llvm_unreachable (" Unexpected FPGA input type." );
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auto *RenameAction = C.MakeAction <FileTableTformJobAction>(
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- FPGAAOTAction, types::TY_Tempfilelist);
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- RenameAction->addRenameColumnTform (COL_ZERO, COL_CODE);
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+ FPGAAOTAction, types::TY_Tempfilelist, types::TY_Tempfilelist);
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+ RenameAction->addRenameColumnTform (
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+ FileTableTformJobAction::COL_ZERO,
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+ FileTableTformJobAction::COL_CODE);
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auto *DeviceWrappingAction = C.MakeAction <OffloadWrapperJobAction>(
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RenameAction, types::TY_Object);
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DA.add (*DeviceWrappingAction, **TC, /* BoundArch=*/ nullptr ,
@@ -4361,7 +4363,7 @@ class OffloadingActionBuilder final {
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// The linkage actions subgraph leading to the offload wrapper.
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// [cond] Means incoming/outgoing dependence is created only when cond
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// is true. A function of:
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- // n - target is NVPTX
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+ // n - target is NVPTX/AMDGCN
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// a - SPIRV AOT compilation is requested
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// s - device code split requested
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// * - "all other cases"
@@ -4378,17 +4380,18 @@ class OffloadingActionBuilder final {
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// .--------------------------------------.
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// | PostLink |
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// .--------------------------------------.
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- // [+n] [+*] [+]
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- // | | |
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- // .----------------. .-----------------. |
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- // | FileTableTform | | FileTableTform | |
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- // | (copy "Code") | | (extract "Code")| |
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- // .----------------. .-----------------. |
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- // [.] [-] |
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- // | | |
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+ // [+*] [+]
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+ // | |
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+ // .-----------------. |
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+ // | FileTableTform | |
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+ // | (extract "Code")| |
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+ // .-----------------. |
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+ // [-] |
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+ // -------------------- | |
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// [.] [-*] |
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// .---------------. .-------------------. |
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- // | finalizeNVPTX | | SPIRVTranslator | |
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+ // | finalizeNVPTX | | SPIRVTranslator | |
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+ // | finalizeAMDGCN | | | |
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// .---------------. .-------------------. |
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// [.] [-as] [-!a] |
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// | | | |
@@ -4398,13 +4401,13 @@ class OffloadingActionBuilder final {
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// | .----------------. | |
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// | [-s] | |
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// | | | |
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- // [.] [-a] [-!a] [+]
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- // .---------------- --------------------.
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- // | FileTableTform |
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- // | (replace "Code") |
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- // .---------------- --------------------.
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- // |
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- // [+ ]
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+ // | [-a] [-!a] [+]
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+ // | . --------------------.
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+ // -----------[-n] | FileTableTform |
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+ // | (replace "Code") |
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+ // . --------------------.
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+ // |
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+ // [+* ]
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// .--------------------------------------.
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// | OffloadWrapper |
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// .--------------------------------------.
@@ -4419,7 +4422,7 @@ class OffloadingActionBuilder final {
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// When spv online link is supported by all backends, the fallback
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// device libraries are only needed when current toolchain is using
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// AOT compilation.
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- if (!isNVPTX && !isAMDGCN ) {
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+ if (isSPIR ) {
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SYCLDeviceLibLinked = addSYCLDeviceLibs (
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*TC, FullLinkObjects, true ,
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C.getDefaultToolChain ().getTriple ().isWindowsMSVCEnvironment ());
@@ -4431,18 +4434,7 @@ class OffloadingActionBuilder final {
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C.MakeAction <LinkJobAction>(FullLinkObjects, types::TY_LLVM_BC);
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else
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FullDeviceLinkAction = DeviceLinkAction;
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- // setup some flags upfront
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-
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- if ((isNVPTX || isAMDGCN) && DeviceCodeSplit) {
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- // TODO Temporary limitation, need to support code splitting for PTX
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- const Driver &D = C.getDriver ();
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- const std::string &OptName =
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- D.getOpts ()
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- .getOption (options::OPT_fsycl_device_code_split)
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- .getPrefixedName ();
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- D.Diag (diag::err_drv_unsupported_opt_for_target)
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- << OptName << (*TC)->getTriple ().str ();
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- }
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+
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// reflects whether current target is ahead-of-time and can't support
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// runtime setting of specialization constants
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bool isAOT = isNVPTX || isAMDGCN || isSpirvAOT;
@@ -4451,50 +4443,48 @@ class OffloadingActionBuilder final {
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ActionList WrapperInputs;
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// post link is not optional - even if not splitting, always need to
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// process specialization constants
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+
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+ types::ID PostLinkOutType =
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+ isSPIR ? types::TY_Tempfiletable : FullDeviceLinkAction->getType ();
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+ // For SPIR-V targets, force TY_Tempfiletable.
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auto *PostLinkAction = C.MakeAction <SYCLPostLinkJobAction>(
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- FullDeviceLinkAction, types::TY_Tempfiletable);
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+ FullDeviceLinkAction, PostLinkOutType, types::TY_Tempfiletable);
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PostLinkAction->setRTSetsSpecConstants (!isAOT);
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- constexpr char COL_CODE[] = " Code" ;
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+ auto *ExtractIRFilesAction = C.MakeAction <FileTableTformJobAction>(
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+ PostLinkAction,
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+ isSPIR ? types::TY_Tempfilelist : PostLinkAction->getType (),
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+ types::TY_Tempfilelist);
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+ // single column w/o title fits TY_Tempfilelist format
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+ ExtractIRFilesAction->addExtractColumnTform (
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+ FileTableTformJobAction::COL_CODE, false /* drop titles*/ );
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if (isNVPTX || isAMDGCN) {
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- // Make extraction copy the only remaining code file instead of
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- // creating a new table with a single entry.
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- // TODO: Process all PTX code files in file table to enable code
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- // splitting for PTX target.
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- auto *ExtractIRFilesAction = C.MakeAction <FileTableTformJobAction>(
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- PostLinkAction, types::TY_LLVM_BC);
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- ExtractIRFilesAction->addCopySingleFileTform (COL_CODE, 0 );
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-
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- Action *FinAction;
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- if (isNVPTX) {
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- FinAction = finalizeNVPTXDependences (ExtractIRFilesAction,
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- (*TC)->getTriple ());
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- } else /* isAMDGCN */ {
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- FinAction = finalizeAMDGCNDependences (ExtractIRFilesAction,
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+ JobAction *FinAction =
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+ isNVPTX ? finalizeNVPTXDependences (ExtractIRFilesAction,
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+ (*TC)->getTriple ())
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+ : finalizeAMDGCNDependences (ExtractIRFilesAction,
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(*TC)->getTriple ());
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- }
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- ActionList TformInputs{PostLinkAction , FinAction} ;
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+ auto *ForEachWrapping = C. MakeAction <ForEachWrappingAction>(
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+ ExtractIRFilesAction , FinAction) ;
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- // Replace the only code entry in the table, as confirmed by the
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- // previous transformation.
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+ ActionList TformInputs{PostLinkAction, ForEachWrapping};
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auto *ReplaceFilesAction = C.MakeAction <FileTableTformJobAction>(
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- TformInputs, types::TY_Tempfiletable);
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- ReplaceFilesAction->addReplaceCellTform (COL_CODE, 0 );
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+ TformInputs, types::TY_Tempfiletable, types::TY_Tempfiletable);
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+ ReplaceFilesAction->addReplaceColumnTform (
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+ FileTableTformJobAction::COL_CODE,
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+ FileTableTformJobAction::COL_CODE);
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+
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WrapperInputs.push_back (ReplaceFilesAction);
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} else {
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// For SPIRV-based targets - translate to SPIRV then optionally
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// compile ahead-of-time to native architecture
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- auto *ExtractIRFilesAction = C.MakeAction <FileTableTformJobAction>(
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- PostLinkAction, types::TY_Tempfilelist);
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- // single column w/o title fits TY_Tempfilelist format
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- ExtractIRFilesAction->addExtractColumnTform (COL_CODE,
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- false /* drop titles*/ );
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- Action *BuildCodeAction = C.MakeAction <SPIRVTranslatorJobAction>(
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- ExtractIRFilesAction, types::TY_Tempfilelist);
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+ Action *BuildCodeAction =
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+ (Action *)C.MakeAction <SPIRVTranslatorJobAction>(
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+ ExtractIRFilesAction, types::TY_Tempfilelist);
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// After the Link, wrap the files before the final host link
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- if (isSpirvAOT ) {
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+ if (isAOT ) {
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types::ID OutType = types::TY_Tempfilelist;
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if (!DeviceCodeSplit) {
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OutType = (TT.getSubArch () == llvm::Triple::SPIRSubArch_fpga)
@@ -4525,8 +4515,10 @@ class OffloadingActionBuilder final {
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}
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ActionList TformInputs{PostLinkAction, BuildCodeAction};
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auto *ReplaceFilesAction = C.MakeAction <FileTableTformJobAction>(
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- TformInputs, types::TY_Tempfiletable);
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- ReplaceFilesAction->addReplaceColumnTform (COL_CODE, COL_CODE);
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+ TformInputs, types::TY_Tempfiletable, types::TY_Tempfiletable);
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+ ReplaceFilesAction->addReplaceColumnTform (
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+ FileTableTformJobAction::COL_CODE,
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+ FileTableTformJobAction::COL_CODE);
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WrapperInputs.push_back (ReplaceFilesAction);
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}
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