Merge branch 'sycl' into disable-assert-dflt

Author: sergei

.github/CODEOWNERS

@@ -1,7 +1,7 @@
 * @bader
 
 # Front-end compiler
-clang/ @premanandrao @elizabethandrews
+clang/ @premanandrao @elizabethandrews @smanna12
 
 # Driver
 clang/**/Driver @mdtoguchi @AGindinson @hchilama
@@ -25,6 +25,7 @@ sycl/ @intel/llvm-reviewers-runtime
 sycl/ReleaseNotes.md @pvchupin @tfzhu
 sycl/doc/ @pvchupin @bader
 sycl/doc/extensions/ @intel/dpcpp-specification-reviewers
+sycl/doc/extensions/SPIRV/ @AlexeySotkin @bashbaug @mbelicki
 
 # Sub-groups
 sycl/include/CL/sycl/detail/spirv.hpp @Pennycook @AlexeySachkov
@@ -33,15 +34,15 @@ sycl/include/sycl/ext/intel/sub_group.hpp @Pennycook @AlexeySachkov
 sycl/include/sycl/ext/intel/sub_group_host.hpp @Pennycook @AlexeySachkov
 
 # PI API
-sycl/include/CL/sycl/detail/pi.def @smaslov-intel
-sycl/include/CL/sycl/detail/pi.h   @smaslov-intel
-sycl/include/CL/sycl/detail/pi.hpp @smaslov-intel
-sycl/include/CL/sycl/detail/pi* @smaslov-intel
-sycl/plugins/ @smaslov-intel
-sycl/source/detail/pi.cpp @smaslov-intel
-sycl/source/detail/plugin.hpp @smaslov-intel
-sycl/source/detail/posix_pi.cpp @smaslov-intel
-sycl/source/detail/windows_pi.cpp @smaslov-intel
+sycl/include/CL/sycl/detail/pi.def @smaslov-intel @againull
+sycl/include/CL/sycl/detail/pi.h   @smaslov-intel @againull
+sycl/include/CL/sycl/detail/pi.hpp @smaslov-intel @againull
+sycl/include/CL/sycl/detail/pi* @smaslov-intel @againull
+sycl/plugins/ @smaslov-intel @againull
+sycl/source/detail/pi.cpp @smaslov-intel @againull
+sycl/source/detail/plugin.hpp @smaslov-intel @againull
+sycl/source/detail/posix_pi.cpp @smaslov-intel @againull
+sycl/source/detail/windows_pi.cpp @smaslov-intel @againull
 
 # ESIMD CPU emulator plug-in
 sycl/plugins/esimd_cpu/ @kbobrovs @smaslov-intel
@@ -98,10 +99,10 @@ clang/tools/clang-offload-deps/ @sndmitriev @mlychkov @AlexeySachkov
 clang/tools/clang-offload-extract/ @sndmitriev @mlychkov @AlexeySachkov
 
 # Explicit SIMD
-SYCLLowerIR/ @kbobrovs @DenisBakhvalov @kychendev
-esimd/ @kbobrovs @DenisBakhvalov @kychendev
-sycl/include/sycl/ext/intel/experimental/esimd.hpp @kbobrovs @DenisBakhvalov @kychendev
-sycl/doc/extensions/ExplicitSIMD/ @kbobrovs @DenisBakhvalov @kychendev
+SYCLLowerIR/ @kbobrovs @sndmitriev @kychendev @v-klochkov 
+esimd/ @kbobrovs @v-klochkov @kychendev
+sycl/include/sycl/ext/intel/experimental/esimd.hpp @kbobrovs @v-klochkov @kychendev
+sycl/doc/extensions/ExplicitSIMD/ @kbobrovs @v-klochkov @kychendev
 
 # ITT annotations
 llvm/lib/Transforms/Instrumentation/SPIRITTAnnotations.cpp @MrSidims @vzakhari

.github/workflows/sycl_containers.yaml

@@ -0,0 +1,32 @@
+name: CI Containers
+on:
+  workflow_dispatch:
+  schedule:
+    # Every 1st and 15th day of month
+    - cron: '0 0 1,15 * *'
+
+jobs:
+  base_image_ubuntu2004:
+    if: github.repository == 'intel/llvm'
+    name: Base Ubuntu 20.04 Docker image
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout
+        uses: actions/checkout@v2
+        with:
+          fetch-depth: 1
+      - name: Login to GitHub Container Registry
+        uses: docker/login-action@v1
+        with:
+          registry: ghcr.io
+          username: ${{ github.repository_owner }}
+          password: ${{ secrets.GITHUB_TOKEN }}
+      - name: Build and Push Container
+        uses: docker/build-push-action@v2
+        with:
+          push: true
+          tags: |
+            ghcr.io/${{ github.repository }}/ubuntu2004_base:${{ github.sha }}
+            ghcr.io/${{ github.repository }}/ubuntu2004_base:latest
+          context: ${{ github.workspace }}/devops
+          file: ${{ github.workspace }}/devops/containers/ubuntu2004_base.Dockerfile

.mailmap

@@ -24,7 +24,9 @@
 
 <[email protected]> <[email protected]>
 <[email protected]> <[email protected]>
+<[email protected]> <[email protected]>
 <[email protected]> <[email protected]>
+<[email protected]> <[email protected]>
 <[email protected]> <[email protected]>
 <[email protected]> <[email protected]>
 <[email protected]> <[email protected]>

buildbot/configure.py

@@ -29,7 +29,7 @@ def do_configure(args):
     libclc_targets_to_build = ''
     libclc_gen_remangled_variants = 'OFF'
     sycl_build_pi_cuda = 'OFF'
-    sycl_build_pi_esimd_cpu = 'OFF'
+    sycl_build_pi_esimd_emulator = 'OFF'
     sycl_build_pi_hip = 'OFF'
     sycl_build_pi_hip_platform = 'AMD'
     sycl_clang_extra_flags = ''
@@ -53,7 +53,7 @@ def do_configure(args):
         llvm_targets_to_build = 'ARM;AArch64'
 
     if args.enable_esimd_cpu_emulation:
-        sycl_build_pi_esimd_cpu = 'ON'
+        sycl_build_pi_esimd_emulator = 'ON'
 
     if args.cuda or args.hip:
         llvm_enable_projects += ';libclc'
@@ -128,7 +128,7 @@ def do_configure(args):
         "-DBUILD_SHARED_LIBS={}".format(llvm_build_shared_libs),
         "-DSYCL_ENABLE_XPTI_TRACING={}".format(sycl_enable_xpti_tracing),
         "-DLLVM_ENABLE_LLD={}".format(llvm_enable_lld),
-        "-DSYCL_BUILD_PI_ESIMD_CPU={}".format(sycl_build_pi_esimd_cpu),
+        "-DSYCL_BUILD_PI_ESIMD_EMULATOR={}".format(sycl_build_pi_esimd_emulator),
         "-DXPTI_ENABLE_WERROR={}".format(xpti_enable_werror),
         "-DSYCL_CLANG_EXTRA_FLAGS={}".format(sycl_clang_extra_flags)
     ]

clang-tools-extra/clang-doc/BitcodeReader.cpp

@@ -17,13 +17,14 @@ namespace doc {
 
 using Record = llvm::SmallVector<uint64_t, 1024>;
 
-llvm::Error decodeRecord(Record R, llvm::SmallVectorImpl<char> &Field,
+llvm::Error decodeRecord(const Record &R, llvm::SmallVectorImpl<char> &Field,
                          llvm::StringRef Blob) {
   Field.assign(Blob.begin(), Blob.end());
   return llvm::Error::success();
 }
 
-llvm::Error decodeRecord(Record R, SymbolID &Field, llvm::StringRef Blob) {
+llvm::Error decodeRecord(const Record &R, SymbolID &Field,
+                         llvm::StringRef Blob) {
   if (R[0] != BitCodeConstants::USRHashSize)
     return llvm::createStringError(llvm::inconvertibleErrorCode(),
                                    "incorrect USR size");
@@ -35,20 +36,20 @@ llvm::Error decodeRecord(Record R, SymbolID &Field, llvm::StringRef Blob) {
   return llvm::Error::success();
 }
 
-llvm::Error decodeRecord(Record R, bool &Field, llvm::StringRef Blob) {
+llvm::Error decodeRecord(const Record &R, bool &Field, llvm::StringRef Blob) {
   Field = R[0] != 0;
   return llvm::Error::success();
 }
 
-llvm::Error decodeRecord(Record R, int &Field, llvm::StringRef Blob) {
+llvm::Error decodeRecord(const Record &R, int &Field, llvm::StringRef Blob) {
   if (R[0] > INT_MAX)
     return llvm::createStringError(llvm::inconvertibleErrorCode(),
                                    "integer too large to parse");
   Field = (int)R[0];
   return llvm::Error::success();
 }
 
-llvm::Error decodeRecord(Record R, AccessSpecifier &Field,
+llvm::Error decodeRecord(const Record &R, AccessSpecifier &Field,
                          llvm::StringRef Blob) {
   switch (R[0]) {
   case AS_public:
@@ -63,7 +64,8 @@ llvm::Error decodeRecord(Record R, AccessSpecifier &Field,
   }
 }
 
-llvm::Error decodeRecord(Record R, TagTypeKind &Field, llvm::StringRef Blob) {
+llvm::Error decodeRecord(const Record &R, TagTypeKind &Field,
+                         llvm::StringRef Blob) {
   switch (R[0]) {
   case TTK_Struct:
   case TTK_Interface:
@@ -78,7 +80,7 @@ llvm::Error decodeRecord(Record R, TagTypeKind &Field, llvm::StringRef Blob) {
   }
 }
 
-llvm::Error decodeRecord(Record R, llvm::Optional<Location> &Field,
+llvm::Error decodeRecord(const Record &R, llvm::Optional<Location> &Field,
                          llvm::StringRef Blob) {
   if (R[0] > INT_MAX)
     return llvm::createStringError(llvm::inconvertibleErrorCode(),
@@ -87,7 +89,8 @@ llvm::Error decodeRecord(Record R, llvm::Optional<Location> &Field,
   return llvm::Error::success();
 }
 
-llvm::Error decodeRecord(Record R, InfoType &Field, llvm::StringRef Blob) {
+llvm::Error decodeRecord(const Record &R, InfoType &Field,
+                         llvm::StringRef Blob) {
   switch (auto IT = static_cast<InfoType>(R[0])) {
   case InfoType::IT_namespace:
   case InfoType::IT_record:
@@ -101,7 +104,8 @@ llvm::Error decodeRecord(Record R, InfoType &Field, llvm::StringRef Blob) {
                                  "invalid value for InfoType");
 }
 
-llvm::Error decodeRecord(Record R, FieldId &Field, llvm::StringRef Blob) {
+llvm::Error decodeRecord(const Record &R, FieldId &Field,
+                         llvm::StringRef Blob) {
   switch (auto F = static_cast<FieldId>(R[0])) {
   case FieldId::F_namespace:
   case FieldId::F_parent:
@@ -117,14 +121,15 @@ llvm::Error decodeRecord(Record R, FieldId &Field, llvm::StringRef Blob) {
                                  "invalid value for FieldId");
 }
 
-llvm::Error decodeRecord(Record R,
+llvm::Error decodeRecord(const Record &R,
                          llvm::SmallVectorImpl<llvm::SmallString<16>> &Field,
                          llvm::StringRef Blob) {
   Field.push_back(Blob);
   return llvm::Error::success();
 }
 
-llvm::Error decodeRecord(Record R, llvm::SmallVectorImpl<Location> &Field,
+llvm::Error decodeRecord(const Record &R,
+                         llvm::SmallVectorImpl<Location> &Field,
                          llvm::StringRef Blob) {
   if (R[0] > INT_MAX)
     return llvm::createStringError(llvm::inconvertibleErrorCode(),
@@ -133,15 +138,15 @@ llvm::Error decodeRecord(Record R, llvm::SmallVectorImpl<Location> &Field,
   return llvm::Error::success();
 }
 
-llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
+llvm::Error parseRecord(const Record &R, unsigned ID, llvm::StringRef Blob,
                         const unsigned VersionNo) {
   if (ID == VERSION && R[0] == VersionNo)
     return llvm::Error::success();
   return llvm::createStringError(llvm::inconvertibleErrorCode(),
                                  "mismatched bitcode version number");
 }
 
-llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
+llvm::Error parseRecord(const Record &R, unsigned ID, llvm::StringRef Blob,
                         NamespaceInfo *I) {
   switch (ID) {
   case NAMESPACE_USR:
@@ -156,7 +161,7 @@ llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
   }
 }
 
-llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
+llvm::Error parseRecord(const Record &R, unsigned ID, llvm::StringRef Blob,
                         RecordInfo *I) {
   switch (ID) {
   case RECORD_USR:
@@ -179,7 +184,7 @@ llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
   }
 }
 
-llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
+llvm::Error parseRecord(const Record &R, unsigned ID, llvm::StringRef Blob,
                         BaseRecordInfo *I) {
   switch (ID) {
   case BASE_RECORD_USR:
@@ -202,7 +207,7 @@ llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
   }
 }
 
-llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
+llvm::Error parseRecord(const Record &R, unsigned ID, llvm::StringRef Blob,
                         EnumInfo *I) {
   switch (ID) {
   case ENUM_USR:
@@ -223,7 +228,7 @@ llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
   }
 }
 
-llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
+llvm::Error parseRecord(const Record &R, unsigned ID, llvm::StringRef Blob,
                         FunctionInfo *I) {
   switch (ID) {
   case FUNCTION_USR:
@@ -244,12 +249,12 @@ llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
   }
 }
 
-llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
+llvm::Error parseRecord(const Record &R, unsigned ID, llvm::StringRef Blob,
                         TypeInfo *I) {
   return llvm::Error::success();
 }
 
-llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
+llvm::Error parseRecord(const Record &R, unsigned ID, llvm::StringRef Blob,
                         FieldTypeInfo *I) {
   switch (ID) {
   case FIELD_TYPE_NAME:
@@ -260,7 +265,7 @@ llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
   }
 }
 
-llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
+llvm::Error parseRecord(const Record &R, unsigned ID, llvm::StringRef Blob,
                         MemberTypeInfo *I) {
   switch (ID) {
   case MEMBER_TYPE_NAME:
@@ -273,7 +278,7 @@ llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
   }
 }
 
-llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
+llvm::Error parseRecord(const Record &R, unsigned ID, llvm::StringRef Blob,
                         CommentInfo *I) {
   switch (ID) {
   case COMMENT_KIND:
@@ -304,7 +309,7 @@ llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
   }
 }
 
-llvm::Error parseRecord(Record R, unsigned ID, llvm::StringRef Blob,
+llvm::Error parseRecord(const Record &R, unsigned ID, llvm::StringRef Blob,
                         Reference *I, FieldId &F) {
   switch (ID) {
   case REFERENCE_USR: