From ee818551452f81a1a98f50d385ccd4b5c773e22a Mon Sep 17 00:00:00 2001 From: Michael D Toguchi Date: Tue, 18 Aug 2020 16:02:27 -0700 Subject: [PATCH 01/10] [Driver][SYCL] Enable Dead Parameter Elimination Optimization This is enabled by default for -fsycl, and can be disabled via the -fno-sycl-early-optimizations switch. Signed-off-by: Michael D Toguchi --- clang/lib/Driver/ToolChains/Clang.cpp | 8 ++++++++ clang/test/Driver/sycl-device-optimizations.cpp | 8 ++++++++ 2 files changed, 16 insertions(+) diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index cfd2e992061c3..9e5d88773dbf0 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -4123,6 +4123,10 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, CmdArgs.push_back("-mllvm"); CmdArgs.push_back("-sycl-opt"); } + // Turn on Dead Parameter Elimination Optimization with early optimizations + if (Args.hasFlag(options::OPT_fsycl_early_optimizations, + options::OPT_fno_sycl_early_optimizations, true)) + CmdArgs.push_back("-fenable-sycl-dae"); // Pass the triple of host when doing SYCL auto AuxT = llvm::Triple(llvm::sys::getProcessTriple()); @@ -7807,6 +7811,10 @@ void SYCLPostLink::ConstructJob(Compilation &C, const JobAction &JA, // OPT_fsycl_device_code_split is not checked as it is an alias to // -fsycl-device-code-split=per_source + // Turn on Dead Parameter Elimination Optimization with early optimizations + if (TCArgs.hasFlag(options::OPT_fsycl_early_optimizations, + options::OPT_fno_sycl_early_optimizations, true)) + addArgs(CmdArgs, TCArgs, {"-emit-param-info"}); if (JA.getType() == types::TY_LLVM_BC) { // single file output requested - this means only perform necessary IR // transformations (like specialization constant intrinsic lowering) and diff --git a/clang/test/Driver/sycl-device-optimizations.cpp b/clang/test/Driver/sycl-device-optimizations.cpp index 7080bcedbd065..476bed77a99f1 100644 --- a/clang/test/Driver/sycl-device-optimizations.cpp +++ b/clang/test/Driver/sycl-device-optimizations.cpp @@ -28,3 +28,11 @@ // RUN: %clang_cl -### -fsycl -fintelfpga %s 2>&1 \ // RUN: | FileCheck -check-prefix=CHECK-NO-SYCL-EARLY-OPTS %s // CHECK-NO-SYCL-EARLY-OPTS: "-fno-sycl-early-optimizations" + +/// Check that Dead Parameter Elimination Optimization is enabled +// RUN: %clang -### -fsycl %s 2>&1 \ +// RUN: | FileCheck -check-prefix=CHECK-DAE %s +// RUN: %clang -### -fsycl -fsycl-early-optimizations %s 2>&1 \ +// RUN: | FileCheck -check-prefix=CHECK-DAE %s +// CHECK-DAE: clang{{.*}} "-fenable-sycl-dae" +// CHECK-DAE: sycl-post-link{{.*}} "-emit-param-info" From 9581922ea5f74035c90806fe8f712ddef89cf6dc Mon Sep 17 00:00:00 2001 From: Mariya Podchishchaeva Date: Wed, 19 Aug 2020 12:59:54 +0300 Subject: [PATCH 02/10] Fix sycl-post-link options --- clang/lib/Driver/Driver.cpp | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index ff2d3e5065d16..690b79c6dd597 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -3514,6 +3514,9 @@ class OffloadingActionBuilder final { /// Flag to signal if the user requested device code split. bool DeviceCodeSplit = false; + /// Flag to signal if DAE optimization is turned on. + bool EnableDAE = false; + /// The SYCL actions for the current input. ActionList SYCLDeviceActions; @@ -3951,7 +3954,7 @@ class OffloadingActionBuilder final { ActionList WrapperInputs; // post link is not optional - even if not splitting, always need to // process specialization constants - bool MultiFileActionDeps = !isSpirvAOT || DeviceCodeSplit; + bool MultiFileActionDeps = !isSpirvAOT || DeviceCodeSplit || EnableDAE; types::ID PostLinkOutType = isNVPTX || !MultiFileActionDeps ? types::TY_LLVM_BC : types::TY_Tempfiletable; @@ -4108,6 +4111,9 @@ class OffloadingActionBuilder final { WrapDeviceOnlyBinary = Args.hasArg(options::OPT_fsycl_link_EQ); auto *DeviceCodeSplitArg = Args.getLastArg(options::OPT_fsycl_device_code_split_EQ); + EnableDAE = + Args.hasFlag(options::OPT_fsycl_early_optimizations, + options::OPT_fno_sycl_early_optimizations, true); // -fsycl-device-code-split is an alias to // -fsycl-device-code-split=per_source DeviceCodeSplit = DeviceCodeSplitArg && From 53efd954ab5239070ff890c30207ace1e99bd259 Mon Sep 17 00:00:00 2001 From: Alexey Bader Date: Wed, 19 Aug 2020 16:47:24 +0300 Subject: [PATCH 03/10] Fix formatting. --- clang/lib/Driver/Driver.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index 690b79c6dd597..1ac85d6e0e9fd 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -4111,9 +4111,8 @@ class OffloadingActionBuilder final { WrapDeviceOnlyBinary = Args.hasArg(options::OPT_fsycl_link_EQ); auto *DeviceCodeSplitArg = Args.getLastArg(options::OPT_fsycl_device_code_split_EQ); - EnableDAE = - Args.hasFlag(options::OPT_fsycl_early_optimizations, - options::OPT_fno_sycl_early_optimizations, true); + EnableDAE = Args.hasFlag(options::OPT_fsycl_early_optimizations, + options::OPT_fno_sycl_early_optimizations, true); // -fsycl-device-code-split is an alias to // -fsycl-device-code-split=per_source DeviceCodeSplit = DeviceCodeSplitArg && From a0932839c2a0a2e834213e90fd0b59571e5c54a6 Mon Sep 17 00:00:00 2001 From: Sergey Semenov Date: Wed, 19 Aug 2020 14:05:25 +0300 Subject: [PATCH 04/10] Disable early optimizations in separate-compile and kernel_from_file Signed-off-by: Sergey Semenov --- sycl/test/kernel_from_file/hw.cpp | 4 +++- sycl/test/separate-compile/test.cpp | 4 ++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/sycl/test/kernel_from_file/hw.cpp b/sycl/test/kernel_from_file/hw.cpp index b7c4e573be65c..d073be5ff40c4 100644 --- a/sycl/test/kernel_from_file/hw.cpp +++ b/sycl/test/kernel_from_file/hw.cpp @@ -2,7 +2,9 @@ // CUDA does not support SPIR-V. //-fsycl-targets=%sycl_triple -// RUN: %clangxx -fsycl-device-only -fno-sycl-use-bitcode -Xclang -fsycl-int-header=%t.h -c %s -o %t.spv -I %sycl_include -Xclang -verify-ignore-unexpected=note,warning -Wno-sycl-strict +// Runtime assumes that the image passed with SYCL_USE_KERNEL_SPV has no +// eliminated arguments, compile without early optimizations. +// RUN: %clangxx -fsycl-device-only -fno-sycl-early-optimizations -fno-sycl-use-bitcode -Xclang -fsycl-int-header=%t.h -c %s -o %t.spv -I %sycl_include -Xclang -verify-ignore-unexpected=note,warning -Wno-sycl-strict // RUN: %clangxx -include %t.h -g %s -o %t.out -lsycl -I %sycl_include -Xclang -verify-ignore-unexpected=note,warning // RUN: env SYCL_BE=%sycl_be SYCL_USE_KERNEL_SPV=%t.spv %t.out | FileCheck %s // CHECK: Passed diff --git a/sycl/test/separate-compile/test.cpp b/sycl/test/separate-compile/test.cpp index 076de5fc0e9da..60644ae3610df 100644 --- a/sycl/test/separate-compile/test.cpp +++ b/sycl/test/separate-compile/test.cpp @@ -3,13 +3,13 @@ // // >> ---- compile src1 // >> device compilation... -// RUN: %clangxx -fsycl-device-only -Xclang -fsycl-int-header=sycl_ihdr_a.h %s -c -o a_kernel.bc -I %sycl_include -Wno-sycl-strict +// RUN: %clangxx -fsycl-device-only -fno-sycl-early-optimizations -Xclang -fsycl-int-header=sycl_ihdr_a.h %s -c -o a_kernel.bc -I %sycl_include -Wno-sycl-strict // >> host compilation... // RUN: %clangxx -include sycl_ihdr_a.h -g -c %s -o a.o -I %sycl_include -Wno-sycl-strict // // >> ---- compile src2 // >> device compilation... -// RUN: %clangxx -DB_CPP=1 -fsycl-device-only -Xclang -fsycl-int-header=sycl_ihdr_b.h %s -c -o b_kernel.bc -I %sycl_include -Wno-sycl-strict +// RUN: %clangxx -DB_CPP=1 -fsycl-device-only -fno-sycl-early-optimizations -Xclang -fsycl-int-header=sycl_ihdr_b.h %s -c -o b_kernel.bc -I %sycl_include -Wno-sycl-strict // >> host compilation... // RUN: %clangxx -DB_CPP=1 -include sycl_ihdr_b.h -g -c %s -o b.o -I %sycl_include -Wno-sycl-strict // From ba7baaa95419a63006e3fbf80597cab9a5f02f10 Mon Sep 17 00:00:00 2001 From: Mariya Podchishchaeva Date: Wed, 19 Aug 2020 15:45:24 +0300 Subject: [PATCH 05/10] Fix driver tests --- clang/test/Driver/sycl-offload-intelfpga.cpp | 80 +++++++++++--------- clang/test/Driver/sycl-offload.c | 64 +++++++++------- 2 files changed, 82 insertions(+), 62 deletions(-) diff --git a/clang/test/Driver/sycl-offload-intelfpga.cpp b/clang/test/Driver/sycl-offload-intelfpga.cpp index de589affbc5e7..de1ea75915c52 100644 --- a/clang/test/Driver/sycl-offload-intelfpga.cpp +++ b/clang/test/Driver/sycl-offload-intelfpga.cpp @@ -31,8 +31,9 @@ // CHK-FPGA-LINK: clang-offload-bundler{{.*}} "-type=o" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUT:.+\.o]]" "-outputs=[[OUTPUT1:.+\.o]]" "-unbundle" // CHK-FPGA-LINK-NOT: clang-offload-bundler{{.*}} // CHK-FPGA-LINK: llvm-link{{.*}} "[[OUTPUT1]]" "-o" "[[OUTPUT2_1:.+\.bc]]" -// CHK-FPGA-LINK: sycl-post-link{{.*}} "-ir-output-only" "-spec-const=default" "-o" "[[OUTPUT2:.+\.bc]]" "[[OUTPUT2_1]]" -// CHK-FPGA-LINK: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2]]" +// CHK-FPGA-LINK: sycl-post-link{{.*}} "-emit-param-info" "-symbols" "-spec-const=default" "-o" "[[OUTPUT2:.+\.table]]" "[[OUTPUT2_1]]" +// CHK-FPGA-LINK: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[OUTPUT2_2:.+\.txt]]" "[[OUTPUT2]]" +// CHK-FPGA-LINK: llvm-foreach{{.*}} "--in-file-list=[[OUTPUT2_2]]" {{.*}}llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_2]]" // CHK-FPGA-EARLY: aoc{{.*}} "-o" "[[OUTPUT4:.+\.aocr]]" "[[OUTPUT3]]" "-sycl" "-rtl" // CHK-FPGA-IMAGE: aoc{{.*}} "-o" "[[OUTPUT5:.+\.aocx]]" "[[OUTPUT3]]" "-sycl" // CHK-FPGA-LINK: llvm-ar{{.*}} "cr" "libfoo.a" "[[INPUT]]" @@ -57,8 +58,9 @@ // CHK-FPGA-LINK-WIN: clang-offload-bundler{{.*}} "-type=o" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice{{.*}}" "-inputs=[[INPUT:.+\.obj]]" "-outputs=[[OUTPUT1:.+\.obj]]" "-unbundle" // CHK-FPGA-LINK-WIN-NOT: clang-offload-bundler{{.*}} // CHK-FPGA-LINK-WIN: llvm-link{{.*}} "[[OUTPUT1]]" "-o" "[[OUTPUT2_1:.+\.bc]]" -// CHK-FPGA-LINK-WIN: sycl-post-link{{.*}} "-ir-output-only" "-spec-const=default" "-o" "[[OUTPUT2:.+\.bc]]" "[[OUTPUT2_1]]" -// CHK-FPGA-LINK-WIN: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2]]" +// CHK-FPGA-LINK-WIN: sycl-post-link{{.*}} "-emit-param-info" "-symbols" "-spec-const=default" "-o" "[[OUTPUT2:.+\.table]]" "[[OUTPUT2_1]]" +// CHK-FPGA-LINK-WIN: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[OUTPUT2_2:.+\.txt]]" "[[OUTPUT2]]" +// CHK-FPGA-LINK-WIN: llvm-foreach{{.*}} "--in-file-list=[[OUTPUT2_2]]" {{.*}}llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_2]]" // CHK-FPGA-LINK-WIN: aoc{{.*}} "-o" "[[OUTPUT5:.+\.aocr]]" "[[OUTPUT3]]" "-sycl" "-rtl" // CHK-FPGA-LINK-WIN: lib.exe{{.*}} "[[INPUT]]" {{.*}} "-OUT:libfoo.lib" @@ -202,12 +204,14 @@ // CHK-FPGA-LINK-SRC: 9: linker, {8}, archive, (host-sycl) // CHK-FPGA-LINK-SRC: 10: compiler, {3}, ir, (device-sycl) // CHK-FPGA-LINK-SRC: 11: linker, {10}, ir, (device-sycl) -// CHK-FPGA-LINK-SRC: 12: sycl-post-link, {11}, ir, (device-sycl) -// CHK-FPGA-LINK-SRC: 13: llvm-spirv, {12}, spirv, (device-sycl) -// CHK-FPGA-LINK-SRC: 14: backend-compiler, {13}, fpga_aocr, (device-sycl) -// CHK-FPGA-LINK-SRC: 15: clang-offload-wrapper, {14}, object, (device-sycl) -// CHK-FPGA-LINK-SRC-DEFAULT: 16: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {15}, archive -// CHK-FPGA-LINK-SRC-CL: 16: offload, "host-sycl (x86_64-pc-windows-msvc)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {15}, archive +// CHK-FPGA-LINK-SRC: 12: sycl-post-link, {11}, tempfiletable, (device-sycl) +// CHK-FPGA-LINK-SRC: 13: file-table-tform, {12}, tempfilelist, (device-sycl) +// CHK-FPGA-LINK-SRC: 14: llvm-spirv, {13}, tempfilelist, (device-sycl) +// CHK-FPGA-LINK-SRC: 15: backend-compiler, {14}, fpga_aocr, (device-sycl) +// CHK-FPGA-LINK-SRC: 16: file-table-tform, {12, 15}, tempfiletable, (device-sycl) +// CHK-FPGA-LINK-SRC: 17: clang-offload-wrapper, {16}, object, (device-sycl) +// CHK-FPGA-LINK-SRC-DEFAULT: 18: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {17}, archive +// CHK-FPGA-LINK-SRC-CL: 18: offload, "host-sycl (x86_64-pc-windows-msvc)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {17}, archive /// -fintelfpga with -reuse-exe= // RUN: touch %t.cpp @@ -283,12 +287,14 @@ // CHK-FPGA-DEP-FILES-OBJ-PHASES: 1: clang-offload-unbundler, {0}, object, (host-sycl) // CHK-FPGA-DEP-FILES-OBJ-PHASES: 2: linker, {1}, image, (host-sycl) // CHK-FPGA-DEP-FILES-OBJ-PHASES: 3: linker, {1}, ir, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 4: sycl-post-link, {3}, ir, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 5: llvm-spirv, {4}, spirv, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 6: clang-offload-unbundler, {0}, fpga_dependencies -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 7: backend-compiler, {5, 6}, fpga_aocx, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 8: clang-offload-wrapper, {7}, object, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 9: offload, "host-sycl (x86_64-{{unknown-linux-gnu|pc-windows-msvc}})" {2}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {8}, image +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 4: sycl-post-link, {3}, tempfiletable, (device-sycl) +// CHK-FPGA-DEP-FILES-OBJ-PHASES 5: file-table-tform, {4}, tempfilelist, (device-sycl) +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 6: llvm-spirv, {5}, tempfilelist, (device-sycl) +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 7: clang-offload-unbundler, {0}, fpga_dependencies +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 8: backend-compiler, {6, 7}, fpga_aocx, (device-sycl) +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 9: file-table-tform, {4, 8}, tempfiletable, (device-sycl) +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 10: clang-offload-wrapper, {9}, object, (device-sycl) +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 11: offload, "host-sycl (x86_64-{{unknown-linux-gnu|pc-windows-msvc}})" {2}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {10}, image /// -fintelfpga output report file test // RUN: mkdir -p %t_dir @@ -366,13 +372,15 @@ // CHK-FPGA-AOCO-PHASES: 13: partial-link, {9, 12}, object // CHK-FPGA-AOCO-PHASES: 14: clang-offload-unbundler, {13}, object // CHK-FPGA-AOCO-PHASES: 15: linker, {11, 14}, ir, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 16: sycl-post-link, {15}, ir, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 17: llvm-spirv, {16}, spirv, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 18: input, "[[INPUTA]]", fpga_aoco -// CHK-FPGA-AOCO-PHASES: 19: clang-offload-unbundler, {18}, fpga_aoco -// CHK-FPGA-AOCO-PHASES: 20: backend-compiler, {17, 19}, fpga_aocx, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 21: clang-offload-wrapper, {20}, object, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 22: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {21}, image +// CHK-FPGA-AOCO-PHASES: 16: sycl-post-link, {15}, tempfiletable, (device-sycl) +// CHK-FPGA-AOCO-PHASES: 17: file-table-tform, {16}, tempfilelist, (device-sycl) +// CHK-FPGA-AOCO-PHASES: 18: llvm-spirv, {17}, tempfilelist, (device-sycl) +// CHK-FPGA-AOCO-PHASES: 19: input, "[[INPUTA]]", fpga_aoco +// CHK-FPGA-AOCO-PHASES: 20: clang-offload-unbundler, {19}, fpga_aoco +// CHK-FPGA-AOCO-PHASES: 21: backend-compiler, {18, 20}, fpga_aocx, (device-sycl) +// CHK-FPGA-AOCO-PHASES: 22: file-table-tform, {16, 21}, tempfiletable, (device-sycl) +// CHK-FPGA-AOCO-PHASES: 23: clang-offload-wrapper, {22}, object, (device-sycl) +// CHK-FPGA-AOCO-PHASES: 24: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {23}, image /// FPGA AOCO Windows phases check // RUN: %clang_cl -fsycl -fintelfpga -foffload-static-lib=%t_aoco_cl.a %s -### -ccc-print-phases 2>&1 \ @@ -392,13 +400,15 @@ // CHK-FPGA-AOCO-PHASES-WIN: 12: input, "[[INPUTA:.+\.a]]", archive // CHK-FPGA-AOCO-PHASES-WIN: 13: clang-offload-unbundler, {12}, archive // CHK-FPGA-AOCO-PHASES-WIN: 14: linker, {11, 13}, ir, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 15: sycl-post-link, {14}, ir, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 16: llvm-spirv, {15}, spirv, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 17: input, "[[INPUTA]]", fpga_aoco -// CHK-FPGA-AOCO-PHASES-WIN: 18: clang-offload-unbundler, {17}, fpga_aoco -// CHK-FPGA-AOCO-PHASES-WIN: 19: backend-compiler, {16, 18}, fpga_aocx, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 20: clang-offload-wrapper, {19}, object, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 21: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {20}, image +// CHK-FPGA-AOCO-PHASES-WIN: 15: sycl-post-link, {14}, tempfiletable, (device-sycl) +// CHK-FPGA-AOCO-PHASES-WIN: 16: file-table-tform, {15}, tempfilelist, (device-sycl) +// CHK-FPGA-AOCO-PHASES-WIN: 17: llvm-spirv, {16}, tempfilelist, (device-sycl) +// CHK-FPGA-AOCO-PHASES-WIN: 18: input, "[[INPUTA]]", fpga_aoco +// CHK-FPGA-AOCO-PHASES-WIN: 19: clang-offload-unbundler, {18}, fpga_aoco +// CHK-FPGA-AOCO-PHASES-WIN: 20: backend-compiler, {17, 19}, fpga_aocx, (device-sycl) +// CHK-FPGA-AOCO-PHASES-WIN: 21: file-table-tform, {15, 20}, tempfiletable, (device-sycl) +// CHK-FPGA-AOCO-PHASES-WIN: 22: clang-offload-wrapper, {21}, object, (device-sycl) +// CHK-FPGA-AOCO-PHASES-WIN: 23: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {22}, image /// aoco test, checking tools // RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -foffload-static-lib=%t_aoco.a -### %s 2>&1 \ @@ -415,11 +425,13 @@ // CHK-FPGA-AOCO-LIN: clang-offload-bundler{{.*}} "-type=oo" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[PARTLINKOBJ]]" "-outputs={{.*}}" "-unbundle" // CHK-FPGA-AOCO-WIN: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-outputs={{.*}}" "-unbundle" // CHK-FPGA-AOCO: llvm-link{{.*}} "@{{.*}}" "-o" "[[LINKEDBC:.+\.bc]]" -// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-ir-output-only" "-spec-const=default" "-o" "[[PLINKEDBC:.+\.bc]]" "[[LINKEDBC]]" -// CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.spv]]" {{.*}} "[[PLINKEDBC]]" +// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-emit-param-info" "-symbols" "-spec-const=default" "-o" "[[PLINKEDBC:.+\.table]]" "[[LINKEDBC]]" +// CHK-FPGA-AOCO: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[OUTPUT_TFORM:.+\.txt]]" "[[PLINKEDBC]]" +// CHK-FPGA-AOCO: llvm-foreach{{.*}} "--in-file-list=[[OUTPUT_TFORM]]" {{.*}}llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.txt]]" {{.*}} "[[OUTPUT_TFORM]]" // CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown-sycldevice" "-inputs=[[INPUTLIB]]" "-outputs=[[AOCOLIST:.+\.txt]]" "-unbundle" -// CHK-FPGA-AOCO: aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl" -// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[AOCXOUT]]" +// CHK-FPGA-AOCO: llvm-foreach{{.*}} "--in-file-list=[[TARGSPV]]"{{.*}}"--out-file-list=[[AOC_OUT:.+\.aocx]]" {{.*}}aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl" +// CHK-FPGA-AOCO: file-table-tform{{.*}} "-replace=Code,Code" "-o" "[[LAST_TABLE:.+\.table]]" "[[PLINKEDBC]]" "[[AOCXOUT]]" +// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "-batch" "[[LAST_TABLE]]" // CHK-FPGA-AOCO-LIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJL:.+\.o]]" "[[FINALBC]]" // CHK-FPGA-AOCO-WIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJW:.+\.obj]]" "[[FINALBC]]" // CHK-FPGA-AOCO-LIN: ld{{.*}} "[[INPUTLIB]]" {{.*}} "[[FINALOBJL]]" diff --git a/clang/test/Driver/sycl-offload.c b/clang/test/Driver/sycl-offload.c index 1b29a0d7277a6..2c7a0ae3c7063 100644 --- a/clang/test/Driver/sycl-offload.c +++ b/clang/test/Driver/sycl-offload.c @@ -629,15 +629,17 @@ // CHK-PHASES-AOT: 9: linker, {8}, image, (host-sycl) // CHK-PHASES-AOT: 10: compiler, {3}, ir, (device-sycl) // CHK-PHASES-AOT: 11: linker, {10}, ir, (device-sycl) -// CHK-PHASES-AOT: 12: sycl-post-link, {11}, ir, (device-sycl) -// CHK-PHASES-AOT: 13: llvm-spirv, {12}, spirv, (device-sycl) -// CHK-PHASES-CPU: 14: backend-compiler, {13}, image, (device-sycl) -// CHK-PHASES-GEN: 14: backend-compiler, {13}, image, (device-sycl) -// CHK-PHASES-FPGA: 14: backend-compiler, {13}, fpga_aocx, (device-sycl) -// CHK-PHASES-AOT: 15: clang-offload-wrapper, {14}, object, (device-sycl) -// CHK-PHASES-FPGA: 16: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {15}, image -// CHK-PHASES-GEN: 16: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_gen-unknown-unknown-sycldevice)" {15}, image -// CHK-PHASES-CPU: 16: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_x86_64-unknown-unknown-sycldevice)" {15}, image +// CHK-PHASES-AOT: 12: sycl-post-link, {11}, tempfiletable, (device-sycl) +// CHK-PHASES-AOT: 13: file-table-tform, {12}, tempfilelist, (device-sycl) +// CHK-PHASES-AOT: 14: llvm-spirv, {13}, tempfilelist, (device-sycl) +// CHK-PHASES-CPU: 15: backend-compiler, {14}, image, (device-sycl) +// CHK-PHASES-GEN: 15: backend-compiler, {14}, image, (device-sycl) +// CHK-PHASES-FPGA: 15: backend-compiler, {14}, fpga_aocx, (device-sycl) +// CHK-PHASES-AOT: 16: file-table-tform, {12, 15}, tempfiletable, (device-sycl) +// CHK-PHASES-AOT: 17: clang-offload-wrapper, {16}, object, (device-sycl) +// CHK-PHASES-FPGA: 18: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {17}, image +// CHK-PHASES-GEN: 18: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_gen-unknown-unknown-sycldevice)" {17}, image +// CHK-PHASES-CPU: 18: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_x86_64-unknown-unknown-sycldevice)" {17}, image /// ########################################################################### @@ -660,17 +662,19 @@ // RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-CPU // CHK-TOOLS-AOT: clang{{.*}} "-fsycl-is-device" {{.*}} "-o" "[[OUTPUT1:.+\.bc]]" // CHK-TOOLS-AOT: llvm-link{{.*}} "[[OUTPUT1]]" "-o" "[[OUTPUT2:.+\.bc]]" -// CHK-TOOLS-AOT: sycl-post-link{{.*}} "-o" "[[OUTPUT2_1:.+\.bc]]" "[[OUTPUT2]]" -// CHK-TOOLS-CPU: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_1]]" -// CHK-TOOLS-GEN: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_1]]" -// CHK-TOOLS-FPGA-USM-DISABLE: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_1]]" -// CHK-TOOLS-FPGA-USM-ENABLE: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all" "[[OUTPUT2_1]]" +// CHK-TOOLS-AOT: sycl-post-link{{.*}} "-o" "[[OUTPUT2_1:.+]]" "[[OUTPUT2]]" +// CHK-TOOLS-AOT: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[TFORM_OUT1:.+\.txt]]" "[[OUTPUT2_1]]" +// CHK-TOOLS-CPU: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[TFORM_OUT1]]" +// CHK-TOOLS-GEN: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[TFORM_OUT1]]" +// CHK-TOOLS-FPGA-USM-DISABLE: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[TFORM_OUT1]]" +// CHK-TOOLS-FPGA-USM-ENABLE: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all" "[[TFORM_OUT1]]" // CHK-TOOLS-FPGA: aoc{{.*}} "-o" "[[OUTPUT4:.+\.aocx]]" "[[OUTPUT3]]" // CHK-TOOLS-GEN: ocloc{{.*}} "-output" "[[OUTPUT4:.+\.out]]" {{.*}} "[[OUTPUT3]]" // CHK-TOOLS-CPU: opencl-aot{{.*}} "-o=[[OUTPUT4:.+\.out]]" {{.*}} "[[OUTPUT3]]" -// CHK-TOOLS-FPGA: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_fpga{{.*}}" "-kind=sycl" "[[OUTPUT4]]" -// CHK-TOOLS-GEN: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_gen{{.*}}" "-kind=sycl" "[[OUTPUT4]]" -// CHK-TOOLS-CPU: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_x86_64{{.*}}" "-kind=sycl" "[[OUTPUT4]]" +// CHK-TOOLS-AOT: file-table-tform{{.*}} "-replace=Code,Code" "-o" "[[TFORM_OUT2:.+]]" "[[OUTPUT2_1]]" "[[OUTPUT4]]" +// CHK-TOOLS-FPGA: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_fpga{{.*}}" "-kind=sycl" "-batch" "[[TFORM_OUT2]]" +// CHK-TOOLS-GEN: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_gen{{.*}}" "-kind=sycl" "-batch" "[[TFORM_OUT2]]" +// CHK-TOOLS-CPU: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_x86_64{{.*}}" "-kind=sycl" "-batch" "[[TFORM_OUT2]]" // CHK-TOOLS-AOT: llc{{.*}} "-filetype=obj" "-o" "[[OUTPUT6:.+\.o]]" "[[OUTPUT5]]" // CHK-TOOLS-FPGA-USM-DISABLE: clang{{.*}} "-triple" "spir64_fpga-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-faddrsig" // CHK-TOOLS-FPGA-USM-ENABLE: clang{{.*}} "-triple" "spir64_fpga-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-D__ENABLE_USM_ADDR_SPACE__" "-faddrsig" @@ -792,17 +796,21 @@ // CHK-PHASE-MULTI-TARG: 20: preprocessor, {19}, cpp-output, (device-sycl) // CHK-PHASE-MULTI-TARG: 21: compiler, {20}, ir, (device-sycl) // CHK-PHASE-MULTI-TARG: 22: linker, {21}, ir, (device-sycl) -// CHK-PHASE-MULTI-TARG: 23: sycl-post-link, {22}, ir, (device-sycl) -// CHK-PHASE-MULTI-TARG: 24: llvm-spirv, {23}, spirv, (device-sycl) -// CHK-PHASE-MULTI-TARG: 25: backend-compiler, {24}, fpga_aocx, (device-sycl) -// CHK-PHASE-MULTI-TARG: 26: clang-offload-wrapper, {25}, object, (device-sycl) -// CHK-PHASE-MULTI-TARG: 27: compiler, {3}, ir, (device-sycl) -// CHK-PHASE-MULTI-TARG: 28: linker, {27}, ir, (device-sycl) -// CHK-PHASE-MULTI-TARG: 29: sycl-post-link, {28}, ir, (device-sycl) -// CHK-PHASE-MULTI-TARG: 30: llvm-spirv, {29}, spirv, (device-sycl) -// CHK-PHASE-MULTI-TARG: 31: backend-compiler, {30}, image, (device-sycl) -// CHK-PHASE-MULTI-TARG: 32: clang-offload-wrapper, {31}, object, (device-sycl) -// CHK-PHASE-MULTI-TARG: 33: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64-unknown-unknown-sycldevice)" {18}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {26}, "device-sycl (spir64_gen-unknown-unknown-sycldevice)" {32}, image +// CHK-PHASE-MULTI-TARG: 23: sycl-post-link, {22}, tempfiletable, (device-sycl) +// CHK-PHASE-MULTI-TARG: 24: file-table-tform, {23}, tempfilelist, (device-sycl) +// CHK-PHASE-MULTI-TARG: 25: llvm-spirv, {24}, tempfilelist, (device-sycl) +// CHK-PHASE-MULTI-TARG: 26: backend-compiler, {25}, fpga_aocx, (device-sycl) +// CHK-PHASE-MULTI-TARG: 27: file-table-tform, {23, 26}, tempfiletable, (device-sycl) +// CHK-PHASE-MULTI-TARG: 28: clang-offload-wrapper, {27}, object, (device-sycl) +// CHK-PHASE-MULTI-TARG: 29: compiler, {3}, ir, (device-sycl) +// CHK-PHASE-MULTI-TARG: 30: linker, {29}, ir, (device-sycl) +// CHK-PHASE-MULTI-TARG: 31: sycl-post-link, {30}, tempfiletable, (device-sycl) +// CHK-PHASE-MULTI-TARG: 32: file-table-tform, {31}, tempfilelist, (device-sycl) +// CHK-PHASE-MULTI-TARG: 33: llvm-spirv, {32}, tempfilelist, (device-sycl) +// CHK-PHASE-MULTI-TARG: 34: backend-compiler, {33}, image, (device-sycl) +// CHK-PHASE-MULTI-TARG: 35: file-table-tform, {31, 34}, tempfiletable, (device-sycl) +// CHK-PHASE-MULTI-TARG: 36: clang-offload-wrapper, {35}, object, (device-sycl) +// CHK-PHASE-MULTI-TARG: 37: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64-unknown-unknown-sycldevice)" {18}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {28}, "device-sycl (spir64_gen-unknown-unknown-sycldevice)" {36}, image /// ########################################################################### /// Verify that -save-temps does not crash From c0ae55b44d35f2f46e96aa029a279904550c9de3 Mon Sep 17 00:00:00 2001 From: Michael D Toguchi Date: Wed, 19 Aug 2020 15:38:06 -0700 Subject: [PATCH 06/10] Disable DAE for CUDA --- clang/lib/Driver/ToolChains/Clang.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index 9e5d88773dbf0..e5d26d95389d6 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -4125,7 +4125,8 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, } // Turn on Dead Parameter Elimination Optimization with early optimizations if (Args.hasFlag(options::OPT_fsycl_early_optimizations, - options::OPT_fno_sycl_early_optimizations, true)) + options::OPT_fno_sycl_early_optimizations, + !RawTriple.isNVPTX())) CmdArgs.push_back("-fenable-sycl-dae"); // Pass the triple of host when doing SYCL @@ -7813,7 +7814,8 @@ void SYCLPostLink::ConstructJob(Compilation &C, const JobAction &JA, // Turn on Dead Parameter Elimination Optimization with early optimizations if (TCArgs.hasFlag(options::OPT_fsycl_early_optimizations, - options::OPT_fno_sycl_early_optimizations, true)) + options::OPT_fno_sycl_early_optimizations, + !getToolChain().getTriple().isNVPTX())) addArgs(CmdArgs, TCArgs, {"-emit-param-info"}); if (JA.getType() == types::TY_LLVM_BC) { // single file output requested - this means only perform necessary IR From f9b664b005888c7b3a3e7fd9c06b8601270ad9ac Mon Sep 17 00:00:00 2001 From: Michael D Toguchi Date: Thu, 20 Aug 2020 10:52:53 -0700 Subject: [PATCH 07/10] [Driver][SYCL] Update behaviors to use new -fsycl-dead-args-optimization Behavior is now off by default. Added support for -fsycl-dead-args-optimization to control enabling. Also updated tests to use option to exercise the optimization. --- clang/include/clang/Driver/Options.td | 7 +- clang/lib/Driver/Driver.cpp | 5 +- clang/lib/Driver/ToolChains/Clang.cpp | 10 +-- .../test/Driver/sycl-device-optimizations.cpp | 4 +- clang/test/Driver/sycl-offload-intelfpga.cpp | 80 ++++++++----------- clang/test/Driver/sycl-offload.c | 64 +++++++-------- sycl/test/basic_tests/sampler/sampler.cpp | 2 +- sycl/test/multi_ptr/multi_ptr.cpp | 4 +- sycl/test/scheduler/HandleException.cpp | 2 +- sycl/test/scheduler/HostAccDestruction.cpp | 2 +- sycl/test/scheduler/ReleaseResourcesTest.cpp | 2 +- sycl/test/usm/pfor_flatten.cpp | 2 +- 12 files changed, 84 insertions(+), 100 deletions(-) diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td index e1199329506ce..391d067ee289b 100644 --- a/clang/include/clang/Driver/Options.td +++ b/clang/include/clang/Driver/Options.td @@ -3551,7 +3551,12 @@ def fsycl_esimd : Flag<["-"], "fsycl-explicit-simd">, Group, Flags<[ def fno_sycl_esimd : Flag<["-"], "fno-sycl-explicit-simd">, Group, HelpText<"Disable SYCL explicit SIMD extension">, Flags<[NoArgumentUnused, CoreOption]>; defm sycl_early_optimizations : OptOutFFlag<"sycl-early-optimizations", "Enable", "Disable", " standard optimization pipeline for SYCL device compiler", [CoreOption]>; - +def fsycl_dead_args_optimization : Flag<["-"], "fsycl-dead-args-optimization">, + Group, Flags<[NoArgumentUnused, CoreOption]>, HelpText<"Enables " + "elimination of DPC++ dead kernel arguments">; +def fno_sycl_dead_args_optimization : Flag<["-"], "fno-sycl-dead-args-optimization">, + Group, Flags<[NoArgumentUnused, CoreOption]>, HelpText<"Disables " + "elimination of DPC++ dead kernel arguments">; //===----------------------------------------------------------------------===// // CC1 Options //===----------------------------------------------------------------------===// diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index 1ac85d6e0e9fd..72a47229641fe 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -4111,8 +4111,9 @@ class OffloadingActionBuilder final { WrapDeviceOnlyBinary = Args.hasArg(options::OPT_fsycl_link_EQ); auto *DeviceCodeSplitArg = Args.getLastArg(options::OPT_fsycl_device_code_split_EQ); - EnableDAE = Args.hasFlag(options::OPT_fsycl_early_optimizations, - options::OPT_fno_sycl_early_optimizations, true); + EnableDAE = Args.hasFlag(options::OPT_fsycl_dead_args_optimization, + options::OPT_fno_sycl_dead_args_optimization, + false); // -fsycl-device-code-split is an alias to // -fsycl-device-code-split=per_source DeviceCodeSplit = DeviceCodeSplitArg && diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index e5d26d95389d6..5791e81def9ee 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -4124,9 +4124,8 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, CmdArgs.push_back("-sycl-opt"); } // Turn on Dead Parameter Elimination Optimization with early optimizations - if (Args.hasFlag(options::OPT_fsycl_early_optimizations, - options::OPT_fno_sycl_early_optimizations, - !RawTriple.isNVPTX())) + if (Args.hasFlag(options::OPT_fsycl_dead_args_optimization, + options::OPT_fno_sycl_dead_args_optimization, false)) CmdArgs.push_back("-fenable-sycl-dae"); // Pass the triple of host when doing SYCL @@ -7813,9 +7812,8 @@ void SYCLPostLink::ConstructJob(Compilation &C, const JobAction &JA, // -fsycl-device-code-split=per_source // Turn on Dead Parameter Elimination Optimization with early optimizations - if (TCArgs.hasFlag(options::OPT_fsycl_early_optimizations, - options::OPT_fno_sycl_early_optimizations, - !getToolChain().getTriple().isNVPTX())) + if (TCArgs.hasFlag(options::OPT_fsycl_dead_args_optimization, + options::OPT_fno_sycl_dead_args_optimization, false)) addArgs(CmdArgs, TCArgs, {"-emit-param-info"}); if (JA.getType() == types::TY_LLVM_BC) { // single file output requested - this means only perform necessary IR diff --git a/clang/test/Driver/sycl-device-optimizations.cpp b/clang/test/Driver/sycl-device-optimizations.cpp index 476bed77a99f1..71e1f345df652 100644 --- a/clang/test/Driver/sycl-device-optimizations.cpp +++ b/clang/test/Driver/sycl-device-optimizations.cpp @@ -30,9 +30,9 @@ // CHECK-NO-SYCL-EARLY-OPTS: "-fno-sycl-early-optimizations" /// Check that Dead Parameter Elimination Optimization is enabled -// RUN: %clang -### -fsycl %s 2>&1 \ +// RUN: %clang -### -fsycl -fsycl-dead-args-optimization %s 2>&1 \ // RUN: | FileCheck -check-prefix=CHECK-DAE %s -// RUN: %clang -### -fsycl -fsycl-early-optimizations %s 2>&1 \ +// RUN: %clang_cl -### -fsycl -fsycl-dead-args-optimization %s 2>&1 \ // RUN: | FileCheck -check-prefix=CHECK-DAE %s // CHECK-DAE: clang{{.*}} "-fenable-sycl-dae" // CHECK-DAE: sycl-post-link{{.*}} "-emit-param-info" diff --git a/clang/test/Driver/sycl-offload-intelfpga.cpp b/clang/test/Driver/sycl-offload-intelfpga.cpp index de1ea75915c52..de589affbc5e7 100644 --- a/clang/test/Driver/sycl-offload-intelfpga.cpp +++ b/clang/test/Driver/sycl-offload-intelfpga.cpp @@ -31,9 +31,8 @@ // CHK-FPGA-LINK: clang-offload-bundler{{.*}} "-type=o" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUT:.+\.o]]" "-outputs=[[OUTPUT1:.+\.o]]" "-unbundle" // CHK-FPGA-LINK-NOT: clang-offload-bundler{{.*}} // CHK-FPGA-LINK: llvm-link{{.*}} "[[OUTPUT1]]" "-o" "[[OUTPUT2_1:.+\.bc]]" -// CHK-FPGA-LINK: sycl-post-link{{.*}} "-emit-param-info" "-symbols" "-spec-const=default" "-o" "[[OUTPUT2:.+\.table]]" "[[OUTPUT2_1]]" -// CHK-FPGA-LINK: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[OUTPUT2_2:.+\.txt]]" "[[OUTPUT2]]" -// CHK-FPGA-LINK: llvm-foreach{{.*}} "--in-file-list=[[OUTPUT2_2]]" {{.*}}llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_2]]" +// CHK-FPGA-LINK: sycl-post-link{{.*}} "-ir-output-only" "-spec-const=default" "-o" "[[OUTPUT2:.+\.bc]]" "[[OUTPUT2_1]]" +// CHK-FPGA-LINK: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2]]" // CHK-FPGA-EARLY: aoc{{.*}} "-o" "[[OUTPUT4:.+\.aocr]]" "[[OUTPUT3]]" "-sycl" "-rtl" // CHK-FPGA-IMAGE: aoc{{.*}} "-o" "[[OUTPUT5:.+\.aocx]]" "[[OUTPUT3]]" "-sycl" // CHK-FPGA-LINK: llvm-ar{{.*}} "cr" "libfoo.a" "[[INPUT]]" @@ -58,9 +57,8 @@ // CHK-FPGA-LINK-WIN: clang-offload-bundler{{.*}} "-type=o" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice{{.*}}" "-inputs=[[INPUT:.+\.obj]]" "-outputs=[[OUTPUT1:.+\.obj]]" "-unbundle" // CHK-FPGA-LINK-WIN-NOT: clang-offload-bundler{{.*}} // CHK-FPGA-LINK-WIN: llvm-link{{.*}} "[[OUTPUT1]]" "-o" "[[OUTPUT2_1:.+\.bc]]" -// CHK-FPGA-LINK-WIN: sycl-post-link{{.*}} "-emit-param-info" "-symbols" "-spec-const=default" "-o" "[[OUTPUT2:.+\.table]]" "[[OUTPUT2_1]]" -// CHK-FPGA-LINK-WIN: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[OUTPUT2_2:.+\.txt]]" "[[OUTPUT2]]" -// CHK-FPGA-LINK-WIN: llvm-foreach{{.*}} "--in-file-list=[[OUTPUT2_2]]" {{.*}}llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_2]]" +// CHK-FPGA-LINK-WIN: sycl-post-link{{.*}} "-ir-output-only" "-spec-const=default" "-o" "[[OUTPUT2:.+\.bc]]" "[[OUTPUT2_1]]" +// CHK-FPGA-LINK-WIN: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2]]" // CHK-FPGA-LINK-WIN: aoc{{.*}} "-o" "[[OUTPUT5:.+\.aocr]]" "[[OUTPUT3]]" "-sycl" "-rtl" // CHK-FPGA-LINK-WIN: lib.exe{{.*}} "[[INPUT]]" {{.*}} "-OUT:libfoo.lib" @@ -204,14 +202,12 @@ // CHK-FPGA-LINK-SRC: 9: linker, {8}, archive, (host-sycl) // CHK-FPGA-LINK-SRC: 10: compiler, {3}, ir, (device-sycl) // CHK-FPGA-LINK-SRC: 11: linker, {10}, ir, (device-sycl) -// CHK-FPGA-LINK-SRC: 12: sycl-post-link, {11}, tempfiletable, (device-sycl) -// CHK-FPGA-LINK-SRC: 13: file-table-tform, {12}, tempfilelist, (device-sycl) -// CHK-FPGA-LINK-SRC: 14: llvm-spirv, {13}, tempfilelist, (device-sycl) -// CHK-FPGA-LINK-SRC: 15: backend-compiler, {14}, fpga_aocr, (device-sycl) -// CHK-FPGA-LINK-SRC: 16: file-table-tform, {12, 15}, tempfiletable, (device-sycl) -// CHK-FPGA-LINK-SRC: 17: clang-offload-wrapper, {16}, object, (device-sycl) -// CHK-FPGA-LINK-SRC-DEFAULT: 18: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {17}, archive -// CHK-FPGA-LINK-SRC-CL: 18: offload, "host-sycl (x86_64-pc-windows-msvc)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {17}, archive +// CHK-FPGA-LINK-SRC: 12: sycl-post-link, {11}, ir, (device-sycl) +// CHK-FPGA-LINK-SRC: 13: llvm-spirv, {12}, spirv, (device-sycl) +// CHK-FPGA-LINK-SRC: 14: backend-compiler, {13}, fpga_aocr, (device-sycl) +// CHK-FPGA-LINK-SRC: 15: clang-offload-wrapper, {14}, object, (device-sycl) +// CHK-FPGA-LINK-SRC-DEFAULT: 16: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {15}, archive +// CHK-FPGA-LINK-SRC-CL: 16: offload, "host-sycl (x86_64-pc-windows-msvc)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {15}, archive /// -fintelfpga with -reuse-exe= // RUN: touch %t.cpp @@ -287,14 +283,12 @@ // CHK-FPGA-DEP-FILES-OBJ-PHASES: 1: clang-offload-unbundler, {0}, object, (host-sycl) // CHK-FPGA-DEP-FILES-OBJ-PHASES: 2: linker, {1}, image, (host-sycl) // CHK-FPGA-DEP-FILES-OBJ-PHASES: 3: linker, {1}, ir, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 4: sycl-post-link, {3}, tempfiletable, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES 5: file-table-tform, {4}, tempfilelist, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 6: llvm-spirv, {5}, tempfilelist, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 7: clang-offload-unbundler, {0}, fpga_dependencies -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 8: backend-compiler, {6, 7}, fpga_aocx, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 9: file-table-tform, {4, 8}, tempfiletable, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 10: clang-offload-wrapper, {9}, object, (device-sycl) -// CHK-FPGA-DEP-FILES-OBJ-PHASES: 11: offload, "host-sycl (x86_64-{{unknown-linux-gnu|pc-windows-msvc}})" {2}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {10}, image +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 4: sycl-post-link, {3}, ir, (device-sycl) +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 5: llvm-spirv, {4}, spirv, (device-sycl) +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 6: clang-offload-unbundler, {0}, fpga_dependencies +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 7: backend-compiler, {5, 6}, fpga_aocx, (device-sycl) +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 8: clang-offload-wrapper, {7}, object, (device-sycl) +// CHK-FPGA-DEP-FILES-OBJ-PHASES: 9: offload, "host-sycl (x86_64-{{unknown-linux-gnu|pc-windows-msvc}})" {2}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {8}, image /// -fintelfpga output report file test // RUN: mkdir -p %t_dir @@ -372,15 +366,13 @@ // CHK-FPGA-AOCO-PHASES: 13: partial-link, {9, 12}, object // CHK-FPGA-AOCO-PHASES: 14: clang-offload-unbundler, {13}, object // CHK-FPGA-AOCO-PHASES: 15: linker, {11, 14}, ir, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 16: sycl-post-link, {15}, tempfiletable, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 17: file-table-tform, {16}, tempfilelist, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 18: llvm-spirv, {17}, tempfilelist, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 19: input, "[[INPUTA]]", fpga_aoco -// CHK-FPGA-AOCO-PHASES: 20: clang-offload-unbundler, {19}, fpga_aoco -// CHK-FPGA-AOCO-PHASES: 21: backend-compiler, {18, 20}, fpga_aocx, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 22: file-table-tform, {16, 21}, tempfiletable, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 23: clang-offload-wrapper, {22}, object, (device-sycl) -// CHK-FPGA-AOCO-PHASES: 24: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {23}, image +// CHK-FPGA-AOCO-PHASES: 16: sycl-post-link, {15}, ir, (device-sycl) +// CHK-FPGA-AOCO-PHASES: 17: llvm-spirv, {16}, spirv, (device-sycl) +// CHK-FPGA-AOCO-PHASES: 18: input, "[[INPUTA]]", fpga_aoco +// CHK-FPGA-AOCO-PHASES: 19: clang-offload-unbundler, {18}, fpga_aoco +// CHK-FPGA-AOCO-PHASES: 20: backend-compiler, {17, 19}, fpga_aocx, (device-sycl) +// CHK-FPGA-AOCO-PHASES: 21: clang-offload-wrapper, {20}, object, (device-sycl) +// CHK-FPGA-AOCO-PHASES: 22: offload, "host-sycl (x86_64-unknown-linux-gnu)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {21}, image /// FPGA AOCO Windows phases check // RUN: %clang_cl -fsycl -fintelfpga -foffload-static-lib=%t_aoco_cl.a %s -### -ccc-print-phases 2>&1 \ @@ -400,15 +392,13 @@ // CHK-FPGA-AOCO-PHASES-WIN: 12: input, "[[INPUTA:.+\.a]]", archive // CHK-FPGA-AOCO-PHASES-WIN: 13: clang-offload-unbundler, {12}, archive // CHK-FPGA-AOCO-PHASES-WIN: 14: linker, {11, 13}, ir, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 15: sycl-post-link, {14}, tempfiletable, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 16: file-table-tform, {15}, tempfilelist, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 17: llvm-spirv, {16}, tempfilelist, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 18: input, "[[INPUTA]]", fpga_aoco -// CHK-FPGA-AOCO-PHASES-WIN: 19: clang-offload-unbundler, {18}, fpga_aoco -// CHK-FPGA-AOCO-PHASES-WIN: 20: backend-compiler, {17, 19}, fpga_aocx, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 21: file-table-tform, {15, 20}, tempfiletable, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 22: clang-offload-wrapper, {21}, object, (device-sycl) -// CHK-FPGA-AOCO-PHASES-WIN: 23: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {22}, image +// CHK-FPGA-AOCO-PHASES-WIN: 15: sycl-post-link, {14}, ir, (device-sycl) +// CHK-FPGA-AOCO-PHASES-WIN: 16: llvm-spirv, {15}, spirv, (device-sycl) +// CHK-FPGA-AOCO-PHASES-WIN: 17: input, "[[INPUTA]]", fpga_aoco +// CHK-FPGA-AOCO-PHASES-WIN: 18: clang-offload-unbundler, {17}, fpga_aoco +// CHK-FPGA-AOCO-PHASES-WIN: 19: backend-compiler, {16, 18}, fpga_aocx, (device-sycl) +// CHK-FPGA-AOCO-PHASES-WIN: 20: clang-offload-wrapper, {19}, object, (device-sycl) +// CHK-FPGA-AOCO-PHASES-WIN: 21: offload, "host-sycl (x86_64-pc-windows-msvc)" {10}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {20}, image /// aoco test, checking tools // RUN: %clangxx -target x86_64-unknown-linux-gnu -fsycl -fintelfpga -foffload-static-lib=%t_aoco.a -### %s 2>&1 \ @@ -425,13 +415,11 @@ // CHK-FPGA-AOCO-LIN: clang-offload-bundler{{.*}} "-type=oo" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[PARTLINKOBJ]]" "-outputs={{.*}}" "-unbundle" // CHK-FPGA-AOCO-WIN: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-spir64_fpga-unknown-unknown-sycldevice" "-inputs=[[INPUTLIB:.+\.a]]" "-outputs={{.*}}" "-unbundle" // CHK-FPGA-AOCO: llvm-link{{.*}} "@{{.*}}" "-o" "[[LINKEDBC:.+\.bc]]" -// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-emit-param-info" "-symbols" "-spec-const=default" "-o" "[[PLINKEDBC:.+\.table]]" "[[LINKEDBC]]" -// CHK-FPGA-AOCO: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[OUTPUT_TFORM:.+\.txt]]" "[[PLINKEDBC]]" -// CHK-FPGA-AOCO: llvm-foreach{{.*}} "--in-file-list=[[OUTPUT_TFORM]]" {{.*}}llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.txt]]" {{.*}} "[[OUTPUT_TFORM]]" +// CHK-FPGA-AOCO: sycl-post-link{{.*}} "-ir-output-only" "-spec-const=default" "-o" "[[PLINKEDBC:.+\.bc]]" "[[LINKEDBC]]" +// CHK-FPGA-AOCO: llvm-spirv{{.*}} "-o" "[[TARGSPV:.+\.spv]]" {{.*}} "[[PLINKEDBC]]" // CHK-FPGA-AOCO: clang-offload-bundler{{.*}} "-type=aoo" "-targets=sycl-fpga_aoco-intel-unknown-sycldevice" "-inputs=[[INPUTLIB]]" "-outputs=[[AOCOLIST:.+\.txt]]" "-unbundle" -// CHK-FPGA-AOCO: llvm-foreach{{.*}} "--in-file-list=[[TARGSPV]]"{{.*}}"--out-file-list=[[AOC_OUT:.+\.aocx]]" {{.*}}aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl" -// CHK-FPGA-AOCO: file-table-tform{{.*}} "-replace=Code,Code" "-o" "[[LAST_TABLE:.+\.table]]" "[[PLINKEDBC]]" "[[AOCXOUT]]" -// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "-batch" "[[LAST_TABLE]]" +// CHK-FPGA-AOCO: aoc{{.*}} "-o" "[[AOCXOUT:.+\.aocx]]" "[[TARGSPV]]" "-library-list=[[AOCOLIST]]" "-sycl" +// CHK-FPGA-AOCO: clang-offload-wrapper{{.*}} "-o=[[FINALBC:.+\.bc]]" {{.*}} "-target=spir64_fpga" "-kind=sycl" "[[AOCXOUT]]" // CHK-FPGA-AOCO-LIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJL:.+\.o]]" "[[FINALBC]]" // CHK-FPGA-AOCO-WIN: llc{{.*}} "-filetype=obj" "-o" "[[FINALOBJW:.+\.obj]]" "[[FINALBC]]" // CHK-FPGA-AOCO-LIN: ld{{.*}} "[[INPUTLIB]]" {{.*}} "[[FINALOBJL]]" diff --git a/clang/test/Driver/sycl-offload.c b/clang/test/Driver/sycl-offload.c index 2c7a0ae3c7063..1b29a0d7277a6 100644 --- a/clang/test/Driver/sycl-offload.c +++ b/clang/test/Driver/sycl-offload.c @@ -629,17 +629,15 @@ // CHK-PHASES-AOT: 9: linker, {8}, image, (host-sycl) // CHK-PHASES-AOT: 10: compiler, {3}, ir, (device-sycl) // CHK-PHASES-AOT: 11: linker, {10}, ir, (device-sycl) -// CHK-PHASES-AOT: 12: sycl-post-link, {11}, tempfiletable, (device-sycl) -// CHK-PHASES-AOT: 13: file-table-tform, {12}, tempfilelist, (device-sycl) -// CHK-PHASES-AOT: 14: llvm-spirv, {13}, tempfilelist, (device-sycl) -// CHK-PHASES-CPU: 15: backend-compiler, {14}, image, (device-sycl) -// CHK-PHASES-GEN: 15: backend-compiler, {14}, image, (device-sycl) -// CHK-PHASES-FPGA: 15: backend-compiler, {14}, fpga_aocx, (device-sycl) -// CHK-PHASES-AOT: 16: file-table-tform, {12, 15}, tempfiletable, (device-sycl) -// CHK-PHASES-AOT: 17: clang-offload-wrapper, {16}, object, (device-sycl) -// CHK-PHASES-FPGA: 18: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {17}, image -// CHK-PHASES-GEN: 18: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_gen-unknown-unknown-sycldevice)" {17}, image -// CHK-PHASES-CPU: 18: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_x86_64-unknown-unknown-sycldevice)" {17}, image +// CHK-PHASES-AOT: 12: sycl-post-link, {11}, ir, (device-sycl) +// CHK-PHASES-AOT: 13: llvm-spirv, {12}, spirv, (device-sycl) +// CHK-PHASES-CPU: 14: backend-compiler, {13}, image, (device-sycl) +// CHK-PHASES-GEN: 14: backend-compiler, {13}, image, (device-sycl) +// CHK-PHASES-FPGA: 14: backend-compiler, {13}, fpga_aocx, (device-sycl) +// CHK-PHASES-AOT: 15: clang-offload-wrapper, {14}, object, (device-sycl) +// CHK-PHASES-FPGA: 16: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {15}, image +// CHK-PHASES-GEN: 16: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_gen-unknown-unknown-sycldevice)" {15}, image +// CHK-PHASES-CPU: 16: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64_x86_64-unknown-unknown-sycldevice)" {15}, image /// ########################################################################### @@ -662,19 +660,17 @@ // RUN: | FileCheck %s -check-prefixes=CHK-TOOLS-AOT,CHK-TOOLS-CPU // CHK-TOOLS-AOT: clang{{.*}} "-fsycl-is-device" {{.*}} "-o" "[[OUTPUT1:.+\.bc]]" // CHK-TOOLS-AOT: llvm-link{{.*}} "[[OUTPUT1]]" "-o" "[[OUTPUT2:.+\.bc]]" -// CHK-TOOLS-AOT: sycl-post-link{{.*}} "-o" "[[OUTPUT2_1:.+]]" "[[OUTPUT2]]" -// CHK-TOOLS-AOT: file-table-tform{{.*}} "-extract=Code" "-drop_titles" "-o" "[[TFORM_OUT1:.+\.txt]]" "[[OUTPUT2_1]]" -// CHK-TOOLS-CPU: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[TFORM_OUT1]]" -// CHK-TOOLS-GEN: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[TFORM_OUT1]]" -// CHK-TOOLS-FPGA-USM-DISABLE: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[TFORM_OUT1]]" -// CHK-TOOLS-FPGA-USM-ENABLE: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+]]" "-spirv-max-version=1.1" "-spirv-ext=+all" "[[TFORM_OUT1]]" +// CHK-TOOLS-AOT: sycl-post-link{{.*}} "-o" "[[OUTPUT2_1:.+\.bc]]" "[[OUTPUT2]]" +// CHK-TOOLS-CPU: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_1]]" +// CHK-TOOLS-GEN: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_1]]" +// CHK-TOOLS-FPGA-USM-DISABLE: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all,-SPV_INTEL_usm_storage_classes" "[[OUTPUT2_1]]" +// CHK-TOOLS-FPGA-USM-ENABLE: llvm-spirv{{.*}} "-o" "[[OUTPUT3:.+\.spv]]" "-spirv-max-version=1.1" "-spirv-ext=+all" "[[OUTPUT2_1]]" // CHK-TOOLS-FPGA: aoc{{.*}} "-o" "[[OUTPUT4:.+\.aocx]]" "[[OUTPUT3]]" // CHK-TOOLS-GEN: ocloc{{.*}} "-output" "[[OUTPUT4:.+\.out]]" {{.*}} "[[OUTPUT3]]" // CHK-TOOLS-CPU: opencl-aot{{.*}} "-o=[[OUTPUT4:.+\.out]]" {{.*}} "[[OUTPUT3]]" -// CHK-TOOLS-AOT: file-table-tform{{.*}} "-replace=Code,Code" "-o" "[[TFORM_OUT2:.+]]" "[[OUTPUT2_1]]" "[[OUTPUT4]]" -// CHK-TOOLS-FPGA: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_fpga{{.*}}" "-kind=sycl" "-batch" "[[TFORM_OUT2]]" -// CHK-TOOLS-GEN: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_gen{{.*}}" "-kind=sycl" "-batch" "[[TFORM_OUT2]]" -// CHK-TOOLS-CPU: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_x86_64{{.*}}" "-kind=sycl" "-batch" "[[TFORM_OUT2]]" +// CHK-TOOLS-FPGA: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_fpga{{.*}}" "-kind=sycl" "[[OUTPUT4]]" +// CHK-TOOLS-GEN: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_gen{{.*}}" "-kind=sycl" "[[OUTPUT4]]" +// CHK-TOOLS-CPU: clang-offload-wrapper{{.*}} "-o=[[OUTPUT5:.+\.bc]]" "-host=x86_64-unknown-linux-gnu" "-target=spir64_x86_64{{.*}}" "-kind=sycl" "[[OUTPUT4]]" // CHK-TOOLS-AOT: llc{{.*}} "-filetype=obj" "-o" "[[OUTPUT6:.+\.o]]" "[[OUTPUT5]]" // CHK-TOOLS-FPGA-USM-DISABLE: clang{{.*}} "-triple" "spir64_fpga-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-faddrsig" // CHK-TOOLS-FPGA-USM-ENABLE: clang{{.*}} "-triple" "spir64_fpga-unknown-unknown-sycldevice" {{.*}} "-fsycl-int-header=[[INPUT1:.+\.h]]" "-D__ENABLE_USM_ADDR_SPACE__" "-faddrsig" @@ -796,21 +792,17 @@ // CHK-PHASE-MULTI-TARG: 20: preprocessor, {19}, cpp-output, (device-sycl) // CHK-PHASE-MULTI-TARG: 21: compiler, {20}, ir, (device-sycl) // CHK-PHASE-MULTI-TARG: 22: linker, {21}, ir, (device-sycl) -// CHK-PHASE-MULTI-TARG: 23: sycl-post-link, {22}, tempfiletable, (device-sycl) -// CHK-PHASE-MULTI-TARG: 24: file-table-tform, {23}, tempfilelist, (device-sycl) -// CHK-PHASE-MULTI-TARG: 25: llvm-spirv, {24}, tempfilelist, (device-sycl) -// CHK-PHASE-MULTI-TARG: 26: backend-compiler, {25}, fpga_aocx, (device-sycl) -// CHK-PHASE-MULTI-TARG: 27: file-table-tform, {23, 26}, tempfiletable, (device-sycl) -// CHK-PHASE-MULTI-TARG: 28: clang-offload-wrapper, {27}, object, (device-sycl) -// CHK-PHASE-MULTI-TARG: 29: compiler, {3}, ir, (device-sycl) -// CHK-PHASE-MULTI-TARG: 30: linker, {29}, ir, (device-sycl) -// CHK-PHASE-MULTI-TARG: 31: sycl-post-link, {30}, tempfiletable, (device-sycl) -// CHK-PHASE-MULTI-TARG: 32: file-table-tform, {31}, tempfilelist, (device-sycl) -// CHK-PHASE-MULTI-TARG: 33: llvm-spirv, {32}, tempfilelist, (device-sycl) -// CHK-PHASE-MULTI-TARG: 34: backend-compiler, {33}, image, (device-sycl) -// CHK-PHASE-MULTI-TARG: 35: file-table-tform, {31, 34}, tempfiletable, (device-sycl) -// CHK-PHASE-MULTI-TARG: 36: clang-offload-wrapper, {35}, object, (device-sycl) -// CHK-PHASE-MULTI-TARG: 37: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64-unknown-unknown-sycldevice)" {18}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {28}, "device-sycl (spir64_gen-unknown-unknown-sycldevice)" {36}, image +// CHK-PHASE-MULTI-TARG: 23: sycl-post-link, {22}, ir, (device-sycl) +// CHK-PHASE-MULTI-TARG: 24: llvm-spirv, {23}, spirv, (device-sycl) +// CHK-PHASE-MULTI-TARG: 25: backend-compiler, {24}, fpga_aocx, (device-sycl) +// CHK-PHASE-MULTI-TARG: 26: clang-offload-wrapper, {25}, object, (device-sycl) +// CHK-PHASE-MULTI-TARG: 27: compiler, {3}, ir, (device-sycl) +// CHK-PHASE-MULTI-TARG: 28: linker, {27}, ir, (device-sycl) +// CHK-PHASE-MULTI-TARG: 29: sycl-post-link, {28}, ir, (device-sycl) +// CHK-PHASE-MULTI-TARG: 30: llvm-spirv, {29}, spirv, (device-sycl) +// CHK-PHASE-MULTI-TARG: 31: backend-compiler, {30}, image, (device-sycl) +// CHK-PHASE-MULTI-TARG: 32: clang-offload-wrapper, {31}, object, (device-sycl) +// CHK-PHASE-MULTI-TARG: 33: offload, "host-sycl (x86_64-unknown-linux-gnu)" {9}, "device-sycl (spir64-unknown-unknown-sycldevice)" {18}, "device-sycl (spir64_fpga-unknown-unknown-sycldevice)" {26}, "device-sycl (spir64_gen-unknown-unknown-sycldevice)" {32}, image /// ########################################################################### /// Verify that -save-temps does not crash diff --git a/sycl/test/basic_tests/sampler/sampler.cpp b/sycl/test/basic_tests/sampler/sampler.cpp index cf87d58475b4f..fc8158dae9cef 100644 --- a/sycl/test/basic_tests/sampler/sampler.cpp +++ b/sycl/test/basic_tests/sampler/sampler.cpp @@ -1,4 +1,4 @@ -// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out -L %opencl_libs_dir -lOpenCL +// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple -fsycl-dead-args-optimization %s -o %t.out -L %opencl_libs_dir -lOpenCL // RUN: env SYCL_DEVICE_TYPE=HOST %t.out // RUN: %CPU_RUN_PLACEHOLDER %t.out // RUN: %GPU_RUN_PLACEHOLDER %t.out diff --git a/sycl/test/multi_ptr/multi_ptr.cpp b/sycl/test/multi_ptr/multi_ptr.cpp index 57f2f1c0d9a2d..3d80ded385303 100644 --- a/sycl/test/multi_ptr/multi_ptr.cpp +++ b/sycl/test/multi_ptr/multi_ptr.cpp @@ -1,9 +1,9 @@ -// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple %s -o %t.out +// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple -fsycl-dead-args-optimization %s -o %t.out // RUN: env SYCL_DEVICE_TYPE=HOST %t.out // RUN: %CPU_RUN_PLACEHOLDER %t.out // RUN: %GPU_RUN_PLACEHOLDER %t.out // RUN: %ACC_RUN_PLACEHOLDER %t.out -// RUN: %clangxx -DRESTRICT_WRITE_ACCESS_TO_CONSTANT_PTR -fsycl -fsycl-targets=%sycl_triple %s -o %t1.out +// RUN: %clangxx -DRESTRICT_WRITE_ACCESS_TO_CONSTANT_PTR -fsycl -fsycl-targets=%sycl_triple -fsycl-dead-args-optimization %s -o %t1.out // RUN: env SYCL_DEVICE_TYPE=HOST %t1.out // RUN: %CPU_RUN_PLACEHOLDER %t1.out // RUN: %GPU_RUN_PLACEHOLDER %t1.out diff --git a/sycl/test/scheduler/HandleException.cpp b/sycl/test/scheduler/HandleException.cpp index a9fbd3cc9d8d9..365a84ee9411e 100644 --- a/sycl/test/scheduler/HandleException.cpp +++ b/sycl/test/scheduler/HandleException.cpp @@ -1,4 +1,4 @@ -// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple -I %sycl_source_dir %s -o %t.out +// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple -fsycl-dead-args-optimization -I %sycl_source_dir %s -o %t.out // RUN: %CPU_RUN_PLACEHOLDER %t.out #include #include diff --git a/sycl/test/scheduler/HostAccDestruction.cpp b/sycl/test/scheduler/HostAccDestruction.cpp index fda1c29298c0c..253d1f371cdd9 100644 --- a/sycl/test/scheduler/HostAccDestruction.cpp +++ b/sycl/test/scheduler/HostAccDestruction.cpp @@ -1,4 +1,4 @@ -// RUN: %clangxx -fsycl -I %sycl_source_dir %s -o %t.out +// RUN: %clangxx -fsycl -fsycl-dead-args-optimzation -I %sycl_source_dir %s -o %t.out // RUN: env SYCL_PI_TRACE=2 %CPU_RUN_PLACEHOLDER %t.out 2>&1 %CPU_CHECK_PLACEHOLDER //==---------------------- HostAccDestruction.cpp --------------------------==// // diff --git a/sycl/test/scheduler/ReleaseResourcesTest.cpp b/sycl/test/scheduler/ReleaseResourcesTest.cpp index c62353ee91b89..0b8c6b12abfea 100644 --- a/sycl/test/scheduler/ReleaseResourcesTest.cpp +++ b/sycl/test/scheduler/ReleaseResourcesTest.cpp @@ -1,4 +1,4 @@ -// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple -I %sycl_source_dir %s -o %t.out +// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple -fsycl-dead-args-optimization -I %sycl_source_dir %s -o %t.out // RUN: env SYCL_DEVICE_TYPE=HOST %t.out // RUN: env SYCL_PI_TRACE=2 %CPU_RUN_PLACEHOLDER %t.out 2>&1 %CPU_CHECK_PLACEHOLDER // RUN: env SYCL_PI_TRACE=2 %GPU_RUN_PLACEHOLDER %t.out 2>&1 %GPU_CHECK_PLACEHOLDER diff --git a/sycl/test/usm/pfor_flatten.cpp b/sycl/test/usm/pfor_flatten.cpp index 4445e267e32e8..e64119c489c26 100644 --- a/sycl/test/usm/pfor_flatten.cpp +++ b/sycl/test/usm/pfor_flatten.cpp @@ -1,7 +1,7 @@ // UNSUPPORTED: cuda // CUDA does not support the unnamed lambda extension. // -// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple -fsycl-unnamed-lambda %s -o %t1.out +// RUN: %clangxx -fsycl -fsycl-targets=%sycl_triple -fsycl-unnamed-lambda -fsycl-dead-args-optimization %s -o %t1.out // RUN: env SYCL_DEVICE_TYPE=HOST %t1.out // RUN: %CPU_RUN_PLACEHOLDER %t1.out // RUN: %GPU_RUN_PLACEHOLDER %t1.out From 2fa3104af9333f6011fd12f03730d1d63e29accf Mon Sep 17 00:00:00 2001 From: Michael D Toguchi Date: Thu, 20 Aug 2020 11:20:41 -0700 Subject: [PATCH 08/10] Fix clang format issues --- clang/lib/Driver/Driver.cpp | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/clang/lib/Driver/Driver.cpp b/clang/lib/Driver/Driver.cpp index 72a47229641fe..43372ea755cbd 100644 --- a/clang/lib/Driver/Driver.cpp +++ b/clang/lib/Driver/Driver.cpp @@ -4111,9 +4111,9 @@ class OffloadingActionBuilder final { WrapDeviceOnlyBinary = Args.hasArg(options::OPT_fsycl_link_EQ); auto *DeviceCodeSplitArg = Args.getLastArg(options::OPT_fsycl_device_code_split_EQ); - EnableDAE = Args.hasFlag(options::OPT_fsycl_dead_args_optimization, - options::OPT_fno_sycl_dead_args_optimization, - false); + EnableDAE = + Args.hasFlag(options::OPT_fsycl_dead_args_optimization, + options::OPT_fno_sycl_dead_args_optimization, false); // -fsycl-device-code-split is an alias to // -fsycl-device-code-split=per_source DeviceCodeSplit = DeviceCodeSplitArg && From ed267300acf9f6c859e94fafdda8c898bd92bc9c Mon Sep 17 00:00:00 2001 From: Michael D Toguchi Date: Thu, 20 Aug 2020 12:32:46 -0700 Subject: [PATCH 09/10] Fix typo in test --- sycl/test/scheduler/HostAccDestruction.cpp | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/sycl/test/scheduler/HostAccDestruction.cpp b/sycl/test/scheduler/HostAccDestruction.cpp index 253d1f371cdd9..6b3fa8f107fed 100644 --- a/sycl/test/scheduler/HostAccDestruction.cpp +++ b/sycl/test/scheduler/HostAccDestruction.cpp @@ -1,4 +1,4 @@ -// RUN: %clangxx -fsycl -fsycl-dead-args-optimzation -I %sycl_source_dir %s -o %t.out +// RUN: %clangxx -fsycl -fsycl-dead-args-optimization -I %sycl_source_dir %s -o %t.out // RUN: env SYCL_PI_TRACE=2 %CPU_RUN_PLACEHOLDER %t.out 2>&1 %CPU_CHECK_PLACEHOLDER //==---------------------- HostAccDestruction.cpp --------------------------==// // From 85f13f54d9e302877fb299286f9e373408cd73e1 Mon Sep 17 00:00:00 2001 From: Michael D Toguchi Date: Thu, 20 Aug 2020 15:13:49 -0700 Subject: [PATCH 10/10] Again, disable DAE for CUDA --- clang/lib/Driver/ToolChains/Clang.cpp | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index 5791e81def9ee..8d1d5f1d62641 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -4124,7 +4124,8 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, CmdArgs.push_back("-sycl-opt"); } // Turn on Dead Parameter Elimination Optimization with early optimizations - if (Args.hasFlag(options::OPT_fsycl_dead_args_optimization, + if (!RawTriple.isNVPTX() && + Args.hasFlag(options::OPT_fsycl_dead_args_optimization, options::OPT_fno_sycl_dead_args_optimization, false)) CmdArgs.push_back("-fenable-sycl-dae"); @@ -7812,7 +7813,8 @@ void SYCLPostLink::ConstructJob(Compilation &C, const JobAction &JA, // -fsycl-device-code-split=per_source // Turn on Dead Parameter Elimination Optimization with early optimizations - if (TCArgs.hasFlag(options::OPT_fsycl_dead_args_optimization, + if (!getToolChain().getTriple().isNVPTX() && + TCArgs.hasFlag(options::OPT_fsycl_dead_args_optimization, options::OPT_fno_sycl_dead_args_optimization, false)) addArgs(CmdArgs, TCArgs, {"-emit-param-info"}); if (JA.getType() == types::TY_LLVM_BC) {