diff --git a/sycl/include/CL/sycl/INTEL/fpga_reg.hpp b/sycl/include/CL/sycl/INTEL/fpga_reg.hpp
index 805c29501f84f..6142d0cd1996d 100644
--- a/sycl/include/CL/sycl/INTEL/fpga_reg.hpp
+++ b/sycl/include/CL/sycl/INTEL/fpga_reg.hpp
@@ -9,12 +9,31 @@
 #pragma once
 
 #include <CL/sycl/detail/defines.hpp>
+#include <type_traits>
 
 __SYCL_INLINE_NAMESPACE(cl) {
 namespace sycl {
 namespace INTEL {
 
-template <typename _T> _T fpga_reg(const _T &t) {
+// Returns a registered copy of the input
+// This function is intended for FPGA users to instruct the compiler to insert
+// at least one register stage between the input and the return value.
+template <typename _T>
+typename std::enable_if<std::is_trivially_copyable<_T>::value, _T>::type
+fpga_reg(_T t) {
+#if __has_builtin(__builtin_intel_fpga_reg)
+  return __builtin_intel_fpga_reg(t);
+#else
+  return t;
+#endif
+}
+
+template <typename _T>
+[[deprecated("INTEL::fpga_reg will only support trivially_copyable types in a "
+             "future release. The type used here will be disallowed.")]]
+typename std::enable_if<std::is_trivially_copyable<_T>::value == false,
+                        _T>::type
+fpga_reg(_T t) {
 #if __has_builtin(__builtin_intel_fpga_reg)
   return __builtin_intel_fpga_reg(t);
 #else
@@ -29,7 +48,9 @@ template <typename _T> _T fpga_reg(const _T &t) {
 // Keep it consistent with FPGA attributes like intelfpga::memory()
 // Currently clang does not support nested namespace for attributes
 namespace intelfpga {
-template <typename _T> _T fpga_reg(const _T &t) {
+template <typename _T>
+[[deprecated("intelfpga::fpga_reg will be removed in a future release.")]] _T
+fpga_reg(const _T &t) {
   return cl::sycl::INTEL::fpga_reg(t);
 }
 } // namespace intelfpga