diff --git a/clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp b/clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp index 595a30e8d8ce3..35b5f2c37df68 100644 --- a/clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp +++ b/clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp @@ -18,6 +18,7 @@ #include "CopyConstructorInitCheck.h" #include "DanglingHandleCheck.h" #include "DynamicStaticInitializersCheck.h" +#include "EasilySwappableParametersCheck.h" #include "ExceptionEscapeCheck.h" #include "FoldInitTypeCheck.h" #include "ForwardDeclarationNamespaceCheck.h" @@ -91,6 +92,8 @@ class BugproneModule : public ClangTidyModule { "bugprone-dangling-handle"); CheckFactories.registerCheck( "bugprone-dynamic-static-initializers"); + CheckFactories.registerCheck( + "bugprone-easily-swappable-parameters"); CheckFactories.registerCheck( "bugprone-exception-escape"); CheckFactories.registerCheck( diff --git a/clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt b/clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt index 022e5c5842ee2..78a70c703dc09 100644 --- a/clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt +++ b/clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt @@ -13,6 +13,7 @@ add_clang_library(clangTidyBugproneModule CopyConstructorInitCheck.cpp DanglingHandleCheck.cpp DynamicStaticInitializersCheck.cpp + EasilySwappableParametersCheck.cpp ExceptionEscapeCheck.cpp FoldInitTypeCheck.cpp ForwardDeclarationNamespaceCheck.cpp diff --git a/clang-tools-extra/clang-tidy/bugprone/EasilySwappableParametersCheck.cpp b/clang-tools-extra/clang-tidy/bugprone/EasilySwappableParametersCheck.cpp new file mode 100644 index 0000000000000..8e972298adcec --- /dev/null +++ b/clang-tools-extra/clang-tidy/bugprone/EasilySwappableParametersCheck.cpp @@ -0,0 +1,2203 @@ +//===--- EasilySwappableParametersCheck.cpp - clang-tidy ------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "EasilySwappableParametersCheck.h" +#include "../utils/OptionsUtils.h" +#include "clang/AST/ASTContext.h" +#include "clang/AST/RecursiveASTVisitor.h" +#include "clang/ASTMatchers/ASTMatchFinder.h" +#include "clang/Lex/Lexer.h" +#include "llvm/ADT/SmallSet.h" + +#define DEBUG_TYPE "EasilySwappableParametersCheck" +#include "llvm/Support/Debug.h" + +namespace optutils = clang::tidy::utils::options; + +/// The default value for the MinimumLength check option. +static constexpr std::size_t DefaultMinimumLength = 2; + +/// The default value for ignored parameter names. +static const std::string DefaultIgnoredParameterNames = + optutils::serializeStringList({"\"\"", "iterator", "Iterator", "begin", + "Begin", "end", "End", "first", "First", + "last", "Last", "lhs", "LHS", "rhs", "RHS"}); + +/// The default value for ignored parameter type suffixes. +static const std::string DefaultIgnoredParameterTypeSuffixes = + optutils::serializeStringList({"bool", + "Bool", + "_Bool", + "it", + "It", + "iterator", + "Iterator", + "inputit", + "InputIt", + "forwardit", + "FowardIt", + "bidirit", + "BidirIt", + "constiterator", + "const_iterator", + "Const_Iterator", + "Constiterator", + "ConstIterator", + "RandomIt", + "randomit", + "random_iterator", + "ReverseIt", + "reverse_iterator", + "reverse_const_iterator", + "ConstReverseIterator", + "Const_Reverse_Iterator", + "const_reverse_iterator" + "Constreverseiterator", + "constreverseiterator"}); + +/// The default value for the QualifiersMix check option. +static constexpr bool DefaultQualifiersMix = false; + +/// The default value for the ModelImplicitConversions check option. +static constexpr bool DefaultModelImplicitConversions = true; + +/// The default value for suppressing diagnostics about parameters that are +/// used together. +static constexpr bool DefaultSuppressParametersUsedTogether = true; + +/// The default value for the NamePrefixSuffixSilenceDissimilarityTreshold +/// check option. +static constexpr std::size_t + DefaultNamePrefixSuffixSilenceDissimilarityTreshold = 1; + +using namespace clang::ast_matchers; + +namespace clang { +namespace tidy { +namespace bugprone { + +using TheCheck = EasilySwappableParametersCheck; + +namespace filter { +class SimilarlyUsedParameterPairSuppressor; + +static bool isIgnoredParameter(const TheCheck &Check, const ParmVarDecl *Node); +static inline bool +isSimilarlyUsedParameter(const SimilarlyUsedParameterPairSuppressor &Suppressor, + const ParmVarDecl *Param1, const ParmVarDecl *Param2); +static bool prefixSuffixCoverUnderThreshold(std::size_t Threshold, + StringRef Str1, StringRef Str2); +} // namespace filter + +namespace model { + +/// The language features involved in allowing the mix between two parameters. +enum class MixFlags : unsigned char { + Invalid = 0, ///< Sentinel bit pattern. DO NOT USE! + + /// Certain constructs (such as pointers to noexcept/non-noexcept functions) + /// have the same CanonicalType, which would result in false positives. + /// During the recursive modelling call, this flag is set if a later diagnosed + /// canonical type equivalence should be thrown away. + WorkaroundDisableCanonicalEquivalence = 1, + + None = 2, ///< Mix between the two parameters is not possible. + Trivial = 4, ///< The two mix trivially, and are the exact same type. + Canonical = 8, ///< The two mix because the types refer to the same + /// CanonicalType, but we do not elaborate as to how. + TypeAlias = 16, ///< The path from one type to the other involves + /// desugaring type aliases. + ReferenceBind = 32, ///< The mix involves the binding power of "const &". + Qualifiers = 64, ///< The mix involves change in the qualifiers. + ImplicitConversion = 128, ///< The mixing of the parameters is possible + /// through implicit conversions between the types. + + LLVM_MARK_AS_BITMASK_ENUM(/* LargestValue =*/ImplicitConversion) +}; +LLVM_ENABLE_BITMASK_ENUMS_IN_NAMESPACE(); + +/// Returns whether the SearchedFlag is turned on in the Data. +static inline bool hasFlag(MixFlags Data, MixFlags SearchedFlag) { + assert(SearchedFlag != MixFlags::Invalid && + "can't be used to detect lack of all bits!"); + + // "Data & SearchedFlag" would need static_cast() in conditions. + return (Data & SearchedFlag) == SearchedFlag; +} + +#ifndef NDEBUG + +// The modelling logic of this check is more complex than usual, and +// potentially hard to understand without the ability to see into the +// representation during the recursive descent. This debug code is only +// compiled in 'Debug' mode, or if LLVM_ENABLE_ASSERTIONS config is turned on. + +/// Formats the MixFlags enum into a useful, user-readable representation. +static inline std::string formatMixFlags(MixFlags F) { + if (F == MixFlags::Invalid) + return "#Inv!"; + + SmallString<8> Str{"-------"}; + + if (hasFlag(F, MixFlags::None)) + // Shows the None bit explicitly, as it can be applied in the recursion + // even if other bits are set. + Str[0] = '!'; + if (hasFlag(F, MixFlags::Trivial)) + Str[1] = 'T'; + if (hasFlag(F, MixFlags::Canonical)) + Str[2] = 'C'; + if (hasFlag(F, MixFlags::TypeAlias)) + Str[3] = 't'; + if (hasFlag(F, MixFlags::ReferenceBind)) + Str[4] = '&'; + if (hasFlag(F, MixFlags::Qualifiers)) + Str[5] = 'Q'; + if (hasFlag(F, MixFlags::ImplicitConversion)) + Str[6] = 'i'; + + if (hasFlag(F, MixFlags::WorkaroundDisableCanonicalEquivalence)) + Str.append("(~C)"); + + return Str.str().str(); +} + +#endif // NDEBUG + +/// The results of the steps of an Implicit Conversion Sequence is saved in +/// an instance of this record. +/// +/// A ConversionSequence maps the steps of the conversion with a member for +/// each type involved in the conversion. Imagine going from a hypothetical +/// Complex class to projecting it to the real part as a const double. +/// +/// I.e., given: +/// +/// struct Complex { +/// operator double() const; +/// }; +/// +/// void functionBeingAnalysed(Complex C, const double R); +/// +/// we will get the following sequence: +/// +/// (Begin=) Complex +/// +/// The first standard conversion is a qualification adjustment. +/// (AfterFirstStandard=) const Complex +/// +/// Then the user-defined conversion is executed. +/// (UDConvOp.ConversionOperatorResultType=) double +/// +/// Then this 'double' is qualifier-adjusted to 'const double'. +/// (AfterSecondStandard=) double +/// +/// The conversion's result has now been calculated, so it ends here. +/// (End=) double. +/// +/// Explicit storing of Begin and End in this record is needed, because +/// getting to what Begin and End here are needs further resolution of types, +/// e.g. in the case of typedefs: +/// +/// using Comp = Complex; +/// using CD = const double; +/// void functionBeingAnalysed2(Comp C, CD R); +/// +/// In this case, the user will be diagnosed with a potential conversion +/// between the two typedefs as written in the code, but to elaborate the +/// reasoning behind this conversion, we also need to show what the typedefs +/// mean. See FormattedConversionSequence towards the bottom of this file! +struct ConversionSequence { + enum UserDefinedConversionKind { UDCK_None, UDCK_Ctor, UDCK_Oper }; + + struct UserDefinedConvertingConstructor { + const CXXConstructorDecl *Fun; + QualType ConstructorParameterType; + QualType UserDefinedType; + }; + + struct UserDefinedConversionOperator { + const CXXConversionDecl *Fun; + QualType UserDefinedType; + QualType ConversionOperatorResultType; + }; + + /// The type the conversion stared from. + QualType Begin; + + /// The intermediate type after the first Standard Conversion Sequence. + QualType AfterFirstStandard; + + /// The details of the user-defined conversion involved, as a tagged union. + union { + char None; + UserDefinedConvertingConstructor UDConvCtor; + UserDefinedConversionOperator UDConvOp; + }; + UserDefinedConversionKind UDConvKind; + + /// The intermediate type after performing the second Standard Conversion + /// Sequence. + QualType AfterSecondStandard; + + /// The result type the conversion targeted. + QualType End; + + ConversionSequence() : None(0), UDConvKind(UDCK_None) {} + ConversionSequence(QualType From, QualType To) + : Begin(From), None(0), UDConvKind(UDCK_None), End(To) {} + + explicit operator bool() const { + return !AfterFirstStandard.isNull() || UDConvKind != UDCK_None || + !AfterSecondStandard.isNull(); + } + + /// Returns all the "steps" (non-unique and non-similar) types involved in + /// the conversion sequence. This method does **NOT** return Begin and End. + SmallVector getInvolvedTypesInSequence() const { + SmallVector Ret; + auto EmplaceIfDifferent = [&Ret](QualType QT) { + if (QT.isNull()) + return; + if (Ret.empty()) + Ret.emplace_back(QT); + else if (Ret.back() != QT) + Ret.emplace_back(QT); + }; + + EmplaceIfDifferent(AfterFirstStandard); + switch (UDConvKind) { + case UDCK_Ctor: + EmplaceIfDifferent(UDConvCtor.ConstructorParameterType); + EmplaceIfDifferent(UDConvCtor.UserDefinedType); + break; + case UDCK_Oper: + EmplaceIfDifferent(UDConvOp.UserDefinedType); + EmplaceIfDifferent(UDConvOp.ConversionOperatorResultType); + break; + case UDCK_None: + break; + } + EmplaceIfDifferent(AfterSecondStandard); + + return Ret; + } + + /// Updates the steps of the conversion sequence with the steps from the + /// other instance. + /// + /// \note This method does not check if the resulting conversion sequence is + /// sensible! + ConversionSequence &update(const ConversionSequence &RHS) { + if (!RHS.AfterFirstStandard.isNull()) + AfterFirstStandard = RHS.AfterFirstStandard; + switch (RHS.UDConvKind) { + case UDCK_Ctor: + UDConvKind = UDCK_Ctor; + UDConvCtor = RHS.UDConvCtor; + break; + case UDCK_Oper: + UDConvKind = UDCK_Oper; + UDConvOp = RHS.UDConvOp; + break; + case UDCK_None: + break; + } + if (!RHS.AfterSecondStandard.isNull()) + AfterSecondStandard = RHS.AfterSecondStandard; + + return *this; + } + + /// Sets the user-defined conversion to the given constructor. + void setConversion(const UserDefinedConvertingConstructor &UDCC) { + UDConvKind = UDCK_Ctor; + UDConvCtor = UDCC; + } + + /// Sets the user-defined conversion to the given operator. + void setConversion(const UserDefinedConversionOperator &UDCO) { + UDConvKind = UDCK_Oper; + UDConvOp = UDCO; + } + + /// Returns the type in the conversion that's formally "in our hands" once + /// the user-defined conversion is executed. + QualType getTypeAfterUserDefinedConversion() const { + switch (UDConvKind) { + case UDCK_Ctor: + return UDConvCtor.UserDefinedType; + case UDCK_Oper: + return UDConvOp.ConversionOperatorResultType; + case UDCK_None: + return {}; + } + llvm_unreachable("Invalid UDConv kind."); + } + + const CXXMethodDecl *getUserDefinedConversionFunction() const { + switch (UDConvKind) { + case UDCK_Ctor: + return UDConvCtor.Fun; + case UDCK_Oper: + return UDConvOp.Fun; + case UDCK_None: + return {}; + } + llvm_unreachable("Invalid UDConv kind."); + } + + /// Returns the SourceRange in the text that corresponds to the interesting + /// part of the user-defined conversion. This is either the parameter type + /// in a converting constructor, or the conversion result type in a conversion + /// operator. + SourceRange getUserDefinedConversionHighlight() const { + switch (UDConvKind) { + case UDCK_Ctor: + return UDConvCtor.Fun->getParamDecl(0)->getSourceRange(); + case UDCK_Oper: + // getReturnTypeSourceRange() does not work for CXXConversionDecls as the + // returned type is physically behind the declaration's name ("operator"). + if (const FunctionTypeLoc FTL = UDConvOp.Fun->getFunctionTypeLoc()) + if (const TypeLoc RetLoc = FTL.getReturnLoc()) + return RetLoc.getSourceRange(); + return {}; + case UDCK_None: + return {}; + } + llvm_unreachable("Invalid UDConv kind."); + } +}; + +/// Contains the metadata for the mixability result between two types, +/// independently of which parameters they were calculated from. +struct MixData { + /// The flag bits of the mix indicating what language features allow for it. + MixFlags Flags = MixFlags::Invalid; + + /// A potentially calculated common underlying type after desugaring, that + /// both sides of the mix can originate from. + QualType CommonType; + + /// The steps an implicit conversion performs to get from one type to the + /// other. + ConversionSequence Conversion, ConversionRTL; + + /// True if the MixData was specifically created with only a one-way + /// conversion modelled. + bool CreatedFromOneWayConversion = false; + + MixData(MixFlags Flags) : Flags(Flags) {} + MixData(MixFlags Flags, QualType CommonType) + : Flags(Flags), CommonType(CommonType) {} + MixData(MixFlags Flags, ConversionSequence Conv) + : Flags(Flags), Conversion(Conv), CreatedFromOneWayConversion(true) {} + MixData(MixFlags Flags, ConversionSequence LTR, ConversionSequence RTL) + : Flags(Flags), Conversion(LTR), ConversionRTL(RTL) {} + MixData(MixFlags Flags, QualType CommonType, ConversionSequence LTR, + ConversionSequence RTL) + : Flags(Flags), CommonType(CommonType), Conversion(LTR), + ConversionRTL(RTL) {} + + void sanitize() { + assert(Flags != MixFlags::Invalid && "sanitize() called on invalid bitvec"); + + MixFlags CanonicalAndWorkaround = + MixFlags::Canonical | MixFlags::WorkaroundDisableCanonicalEquivalence; + if ((Flags & CanonicalAndWorkaround) == CanonicalAndWorkaround) { + // A workaround for too eagerly equivalent canonical types was requested, + // and a canonical equivalence was proven. Fulfill the request and throw + // this result away. + Flags = MixFlags::None; + return; + } + + if (hasFlag(Flags, MixFlags::None)) { + // If anywhere down the recursion a potential mix "path" is deemed + // impossible, throw away all the other bits because the mix is not + // possible. + Flags = MixFlags::None; + return; + } + + if (Flags == MixFlags::Trivial) + return; + + if (static_cast(Flags ^ MixFlags::Trivial)) + // If the mix involves somewhere trivial equivalence but down the + // recursion other bit(s) were set, remove the trivial bit, as it is not + // trivial. + Flags &= ~MixFlags::Trivial; + + bool ShouldHaveImplicitConvFlag = false; + if (CreatedFromOneWayConversion && Conversion) + ShouldHaveImplicitConvFlag = true; + else if (!CreatedFromOneWayConversion && Conversion && ConversionRTL) + // Only say that we have implicit conversion mix possibility if it is + // bidirectional. Otherwise, the compiler would report an *actual* swap + // at a call site... + ShouldHaveImplicitConvFlag = true; + + if (ShouldHaveImplicitConvFlag) + Flags |= MixFlags::ImplicitConversion; + else + Flags &= ~MixFlags::ImplicitConversion; + } + + bool isValid() const { return Flags >= MixFlags::None; } + + bool indicatesMixability() const { return Flags > MixFlags::None; } + + /// Add the specified flag bits to the flags. + MixData operator|(MixFlags EnableFlags) const { + if (CreatedFromOneWayConversion) { + MixData M{Flags | EnableFlags, Conversion}; + M.CommonType = CommonType; + return M; + } + return {Flags | EnableFlags, CommonType, Conversion, ConversionRTL}; + } + + /// Add the specified flag bits to the flags. + MixData &operator|=(MixFlags EnableFlags) { + Flags |= EnableFlags; + return *this; + } + + /// Add the specified qualifiers to the common type in the Mix. + MixData qualify(Qualifiers Quals) const { + SplitQualType Split = CommonType.split(); + Split.Quals.addQualifiers(Quals); + QualType CommonType{Split.Ty, Split.Quals.getAsOpaqueValue()}; + + if (CreatedFromOneWayConversion) { + MixData M{Flags, Conversion}; + M.CommonType = CommonType; + return M; + } + return {Flags, CommonType, Conversion, ConversionRTL}; + } +}; + +/// A named tuple that contains the information for a mix between two concrete +/// parameters. +struct Mix { + const ParmVarDecl *First, *Second; + MixData Data; + + Mix(const ParmVarDecl *F, const ParmVarDecl *S, MixData Data) + : First(F), Second(S), Data(std::move(Data)) {} + + void sanitize() { Data.sanitize(); } + MixFlags flags() const { return Data.Flags; } + bool flagsValid() const { return Data.isValid(); } + bool mixable() const { return Data.indicatesMixability(); } + QualType commonUnderlyingType() const { return Data.CommonType; } + const ConversionSequence &leftToRightConversionSequence() const { + return Data.Conversion; + } + const ConversionSequence &rightToLeftConversionSequence() const { + return Data.ConversionRTL; + } +}; + +// NOLINTNEXTLINE(misc-redundant-expression): Seems to be a bogus warning. +static_assert(std::is_trivially_copyable::value && + std::is_trivially_move_constructible::value && + std::is_trivially_move_assignable::value, + "Keep frequently used data simple!"); + +struct MixableParameterRange { + /// A container for Mixes. + using MixVector = SmallVector; + + /// The number of parameters iterated to build the instance. + std::size_t NumParamsChecked = 0; + + /// The individual flags and supporting information for the mixes. + MixVector Mixes; + + /// Gets the leftmost parameter of the range. + const ParmVarDecl *getFirstParam() const { + // The first element is the LHS of the very first mix in the range. + assert(!Mixes.empty()); + return Mixes.front().First; + } + + /// Gets the rightmost parameter of the range. + const ParmVarDecl *getLastParam() const { + // The builder function breaks building an instance of this type if it + // finds something that can not be mixed with the rest, by going *forward* + // in the list of parameters. So at any moment of break, the RHS of the last + // element of the mix vector is also the last element of the mixing range. + assert(!Mixes.empty()); + return Mixes.back().Second; + } +}; + +/// Helper enum for the recursive calls in the modelling that toggle what kinds +/// of implicit conversions are to be modelled. +enum class ImplicitConversionModellingMode : unsigned char { + /// No implicit conversions are modelled. + None, + + /// The full implicit conversion sequence is modelled. + All, + + /// Only model a unidirectional implicit conversion and within it only one + /// standard conversion sequence. + OneWaySingleStandardOnly +}; + +static MixData +isLRefEquallyBindingToType(const TheCheck &Check, + const LValueReferenceType *LRef, QualType Ty, + const ASTContext &Ctx, bool IsRefRHS, + ImplicitConversionModellingMode ImplicitMode); + +static MixData +approximateImplicitConversion(const TheCheck &Check, QualType LType, + QualType RType, const ASTContext &Ctx, + ImplicitConversionModellingMode ImplicitMode); + +static inline bool isUselessSugar(const Type *T) { + return isa(T); +} + +/// Approximate the way how LType and RType might refer to "essentially the +/// same" type, in a sense that at a particular call site, an expression of +/// type LType and RType might be successfully passed to a variable (in our +/// specific case, a parameter) of type RType and LType, respectively. +/// Note the swapped order! +/// +/// The returned data structure is not guaranteed to be properly set, as this +/// function is potentially recursive. It is the caller's responsibility to +/// call sanitize() on the result once the recursion is over. +static MixData +calculateMixability(const TheCheck &Check, QualType LType, QualType RType, + const ASTContext &Ctx, + ImplicitConversionModellingMode ImplicitMode) { + LLVM_DEBUG(llvm::dbgs() << ">>> calculateMixability for LType:\n"; + LType.dump(llvm::dbgs(), Ctx); llvm::dbgs() << "\nand RType:\n"; + RType.dump(llvm::dbgs(), Ctx); llvm::dbgs() << '\n';); + + // Certain constructs match on the last catch-all getCanonicalType() equality, + // which is perhaps something not what we want. If this variable is true, + // the canonical type equality will be ignored. + bool RecursiveReturnDiscardingCanonicalType = false; + + if (LType == RType) { + LLVM_DEBUG(llvm::dbgs() << "<<< calculateMixability. Trivial equality.\n"); + return {MixFlags::Trivial, LType}; + } + + // Dissolve certain type sugars that do not affect the mixability of one type + // with the other, and also do not require any sort of elaboration for the + // user to understand. + if (isUselessSugar(LType.getTypePtr())) { + LLVM_DEBUG(llvm::dbgs() + << "--- calculateMixability. LHS is useless sugar.\n"); + return calculateMixability(Check, LType.getSingleStepDesugaredType(Ctx), + RType, Ctx, ImplicitMode); + } + if (isUselessSugar(RType.getTypePtr())) { + LLVM_DEBUG(llvm::dbgs() + << "--- calculateMixability. RHS is useless sugar.\n"); + return calculateMixability( + Check, LType, RType.getSingleStepDesugaredType(Ctx), Ctx, ImplicitMode); + } + + // At a particular call site, what could be passed to a 'T' or 'const T' might + // also be passed to a 'const T &' without the call site putting a direct + // side effect on the passed expressions. + if (const auto *LRef = LType->getAs()) { + LLVM_DEBUG(llvm::dbgs() << "--- calculateMixability. LHS is &.\n"); + return isLRefEquallyBindingToType(Check, LRef, RType, Ctx, false, + ImplicitMode) | + MixFlags::ReferenceBind; + } + if (const auto *RRef = RType->getAs()) { + LLVM_DEBUG(llvm::dbgs() << "--- calculateMixability. RHS is &.\n"); + return isLRefEquallyBindingToType(Check, RRef, LType, Ctx, true, + ImplicitMode) | + MixFlags::ReferenceBind; + } + + // Dissolve typedefs after the qualifiers outside the typedef are dealt with. + if (LType->getAs()) { + LLVM_DEBUG(llvm::dbgs() << "--- calculateMixability. LHS is typedef.\n"); + return calculateMixability(Check, LType.getSingleStepDesugaredType(Ctx), + RType, Ctx, ImplicitMode) | + MixFlags::TypeAlias; + } + if (RType->getAs()) { + LLVM_DEBUG(llvm::dbgs() << "--- calculateMixability. RHS is typedef.\n"); + return calculateMixability(Check, LType, + RType.getSingleStepDesugaredType(Ctx), Ctx, + ImplicitMode) | + MixFlags::TypeAlias; + } + + // A parameter of type 'cvr1 T' and another of potentially differently + // qualified 'cvr2 T' may bind with the same power, if the user so requested. + if (LType.getLocalCVRQualifiers() != RType.getLocalCVRQualifiers()) { + LLVM_DEBUG(if (LType.getLocalCVRQualifiers()) llvm::dbgs() + << "--- calculateMixability. LHS is CVR.\n"); + LLVM_DEBUG(if (RType.getLocalCVRQualifiers()) llvm::dbgs() + << "--- calculateMixability. RHS is CVR.\n"); + + if (!Check.QualifiersMix) { + LLVM_DEBUG(llvm::dbgs() + << "<<< calculateMixability. QualifiersMix turned off.\n"); + return {MixFlags::None}; + } + + return calculateMixability(Check, LType.getLocalUnqualifiedType(), + RType.getLocalUnqualifiedType(), Ctx, + ImplicitMode) | + MixFlags::Qualifiers; + } + if (LType.getLocalCVRQualifiers() == RType.getLocalCVRQualifiers() && + LType.getLocalCVRQualifiers() != 0) { + LLVM_DEBUG(llvm::dbgs() + << "--- calculateMixability. LHS and RHS same CVR.\n"); + // Apply the same qualifier back into the found common type if we found + // a common type between the unqualified versions. + return calculateMixability(Check, LType.getLocalUnqualifiedType(), + RType.getLocalUnqualifiedType(), Ctx, + ImplicitMode) + .qualify(LType.getLocalQualifiers()); + } + + if (LType->isPointerType() && RType->isPointerType()) { + // If both types are pointers, and pointed to the exact same type, + // LType == RType took care of that. Try to see if the pointee type has + // some other match. However, this must not consider implicit conversions. + LLVM_DEBUG(llvm::dbgs() + << "--- calculateMixability. LHS and RHS are Ptrs.\n"); + MixData MixOfPointee = calculateMixability( + Check, LType->getPointeeType(), RType->getPointeeType(), Ctx, + ImplicitConversionModellingMode::None); + if (hasFlag(MixOfPointee.Flags, + MixFlags::WorkaroundDisableCanonicalEquivalence)) + RecursiveReturnDiscardingCanonicalType = true; + + MixOfPointee.sanitize(); + if (MixOfPointee.indicatesMixability()) { + LLVM_DEBUG(llvm::dbgs() + << "<<< calculateMixability. Pointees are mixable.\n"); + return MixOfPointee; + } + } + + if (ImplicitMode > ImplicitConversionModellingMode::None) { + LLVM_DEBUG(llvm::dbgs() << "--- calculateMixability. Start implicit...\n"); + MixData MixLTR = + approximateImplicitConversion(Check, LType, RType, Ctx, ImplicitMode); + LLVM_DEBUG( + if (hasFlag(MixLTR.Flags, MixFlags::ImplicitConversion)) llvm::dbgs() + << "--- calculateMixability. Implicit Left -> Right found.\n";); + + if (ImplicitMode == + ImplicitConversionModellingMode::OneWaySingleStandardOnly && + MixLTR.Conversion && !MixLTR.Conversion.AfterFirstStandard.isNull() && + MixLTR.Conversion.UDConvKind == ConversionSequence::UDCK_None && + MixLTR.Conversion.AfterSecondStandard.isNull()) { + // The invoker of the method requested only modelling a single standard + // conversion, in only the forward direction, and they got just that. + LLVM_DEBUG(llvm::dbgs() << "<<< calculateMixability. Implicit " + "conversion, one-way, standard-only.\n"); + return {MixFlags::ImplicitConversion, MixLTR.Conversion}; + } + + // Otherwise if the invoker requested a full modelling, do the other + // direction as well. + MixData MixRTL = + approximateImplicitConversion(Check, RType, LType, Ctx, ImplicitMode); + LLVM_DEBUG( + if (hasFlag(MixRTL.Flags, MixFlags::ImplicitConversion)) llvm::dbgs() + << "--- calculateMixability. Implicit Right -> Left found.\n";); + + if (MixLTR.Conversion && MixRTL.Conversion) { + LLVM_DEBUG( + llvm::dbgs() + << "<<< calculateMixability. Implicit conversion, bidirectional.\n"); + return {MixFlags::ImplicitConversion, MixLTR.Conversion, + MixRTL.Conversion}; + } + } + + if (RecursiveReturnDiscardingCanonicalType) + LLVM_DEBUG(llvm::dbgs() << "--- calculateMixability. Before CanonicalType, " + "Discard was enabled.\n"); + + // Certain kinds unfortunately need to be side-stepped for canonical type + // matching. + if (LType->getAs() || RType->getAs()) { + // Unfortunately, the canonical type of a function pointer becomes the + // same even if exactly one is "noexcept" and the other isn't, making us + // give a false positive report irrespective of implicit conversions. + LLVM_DEBUG(llvm::dbgs() + << "--- calculateMixability. Discarding potential canonical " + "equivalence on FunctionProtoTypes.\n"); + RecursiveReturnDiscardingCanonicalType = true; + } + + MixData MixToReturn{MixFlags::None}; + + // If none of the previous logic found a match, try if Clang otherwise + // believes the types to be the same. + QualType LCanonical = LType.getCanonicalType(); + if (LCanonical == RType.getCanonicalType()) { + LLVM_DEBUG(llvm::dbgs() + << "<<< calculateMixability. Same CanonicalType.\n"); + MixToReturn = {MixFlags::Canonical, LCanonical}; + } + + if (RecursiveReturnDiscardingCanonicalType) + MixToReturn |= MixFlags::WorkaroundDisableCanonicalEquivalence; + + LLVM_DEBUG(if (MixToReturn.Flags == MixFlags::None) llvm::dbgs() + << "<<< calculateMixability. No match found.\n"); + return MixToReturn; +} + +/// Calculates if the reference binds an expression of the given type. This is +/// true iff 'LRef' is some 'const T &' type, and the 'Ty' is 'T' or 'const T'. +/// +/// \param ImplicitMode is forwarded in the possible recursive call to +/// calculateMixability. +static MixData +isLRefEquallyBindingToType(const TheCheck &Check, + const LValueReferenceType *LRef, QualType Ty, + const ASTContext &Ctx, bool IsRefRHS, + ImplicitConversionModellingMode ImplicitMode) { + LLVM_DEBUG(llvm::dbgs() << ">>> isLRefEquallyBindingToType for LRef:\n"; + LRef->dump(llvm::dbgs(), Ctx); llvm::dbgs() << "\nand Type:\n"; + Ty.dump(llvm::dbgs(), Ctx); llvm::dbgs() << '\n';); + + QualType ReferredType = LRef->getPointeeType(); + if (!ReferredType.isLocalConstQualified() && + ReferredType->getAs()) { + LLVM_DEBUG( + llvm::dbgs() + << "--- isLRefEquallyBindingToType. Non-const LRef to Typedef.\n"); + ReferredType = ReferredType.getDesugaredType(Ctx); + if (!ReferredType.isLocalConstQualified()) { + LLVM_DEBUG(llvm::dbgs() + << "<<< isLRefEquallyBindingToType. Typedef is not const.\n"); + return {MixFlags::None}; + } + + LLVM_DEBUG(llvm::dbgs() << "--- isLRefEquallyBindingToType. Typedef is " + "const, considering as const LRef.\n"); + } else if (!ReferredType.isLocalConstQualified()) { + LLVM_DEBUG(llvm::dbgs() + << "<<< isLRefEquallyBindingToType. Not const LRef.\n"); + return {MixFlags::None}; + }; + + assert(ReferredType.isLocalConstQualified() && + "Reaching this point means we are sure LRef is effectively a const&."); + + if (ReferredType == Ty) { + LLVM_DEBUG( + llvm::dbgs() + << "<<< isLRefEquallyBindingToType. Type of referred matches.\n"); + return {MixFlags::Trivial, ReferredType}; + } + + QualType NonConstReferredType = ReferredType; + NonConstReferredType.removeLocalConst(); + if (NonConstReferredType == Ty) { + LLVM_DEBUG(llvm::dbgs() << "<<< isLRefEquallyBindingToType. Type of " + "referred matches to non-const qualified.\n"); + return {MixFlags::Trivial, NonConstReferredType}; + } + + LLVM_DEBUG( + llvm::dbgs() + << "--- isLRefEquallyBindingToType. Checking mix for underlying type.\n"); + return IsRefRHS ? calculateMixability(Check, Ty, NonConstReferredType, Ctx, + ImplicitMode) + : calculateMixability(Check, NonConstReferredType, Ty, Ctx, + ImplicitMode); +} + +static inline bool isDerivedToBase(const CXXRecordDecl *Derived, + const CXXRecordDecl *Base) { + return Derived && Base && Derived->isCompleteDefinition() && + Base->isCompleteDefinition() && Derived->isDerivedFrom(Base); +} + +static Optional +approximateStandardConversionSequence(const TheCheck &Check, QualType From, + QualType To, const ASTContext &Ctx) { + LLVM_DEBUG(llvm::dbgs() << ">>> approximateStdConv for LType:\n"; + From.dump(llvm::dbgs(), Ctx); llvm::dbgs() << "\nand RType:\n"; + To.dump(llvm::dbgs(), Ctx); llvm::dbgs() << '\n';); + + // A standard conversion sequence consists of the following, in order: + // * Maybe either LValue->RValue conv., Array->Ptr conv., Function->Ptr conv. + // * Maybe Numeric promotion or conversion. + // * Maybe function pointer conversion. + // * Maybe qualifier adjustments. + QualType WorkType = From; + // Get out the qualifiers of the original type. This will always be + // re-applied to the WorkType to ensure it is the same qualification as the + // original From was. + auto QualifiersToApply = From.split().Quals.getAsOpaqueValue(); + + // LValue->RValue is irrelevant for the check, because it is a thing to be + // done at a call site, and will be performed if need be performed. + + // Array->Ptr decay. + if (const auto *ArrayT = dyn_cast(From)) { + LLVM_DEBUG(llvm::dbgs() << "--- approximateStdConv. Array->Ptr decayed.\n"); + WorkType = ArrayT->getPointeeType(); + } + + // Function->Pointer conversions are also irrelevant, because a + // "FunctionType" cannot be the type of a parameter variable, so this + // conversion is only meaningful at call sites. + + // Numeric promotions and conversions. + const auto *FromBuiltin = WorkType->getAs(); + const auto *ToBuiltin = To->getAs(); + bool FromNumeric = FromBuiltin && (FromBuiltin->isIntegerType() || + FromBuiltin->isFloatingType()); + bool ToNumeric = + ToBuiltin && (ToBuiltin->isIntegerType() || ToBuiltin->isFloatingType()); + if (FromNumeric && ToNumeric) { + // If both are integral types, the numeric conversion is performed. + // Reapply the qualifiers of the original type, however, so + // "const int -> double" in this case moves over to + // "const double -> double". + LLVM_DEBUG(llvm::dbgs() + << "--- approximateStdConv. Conversion between numerics.\n"); + WorkType = QualType{ToBuiltin, QualifiersToApply}; + } + + const auto *FromEnum = WorkType->getAs(); + const auto *ToEnum = To->getAs(); + if (FromEnum && ToNumeric && FromEnum->isUnscopedEnumerationType()) { + // Unscoped enumerations (or enumerations in C) convert to numerics. + LLVM_DEBUG(llvm::dbgs() + << "--- approximateStdConv. Unscoped enum to numeric.\n"); + WorkType = QualType{ToBuiltin, QualifiersToApply}; + } else if (FromNumeric && ToEnum && ToEnum->isUnscopedEnumerationType()) { + // Numeric types convert to enumerations only in C. + if (Ctx.getLangOpts().CPlusPlus) { + LLVM_DEBUG(llvm::dbgs() << "<<< approximateStdConv. Numeric to unscoped " + "enum, not possible in C++!\n"); + return {}; + } + + LLVM_DEBUG(llvm::dbgs() + << "--- approximateStdConv. Numeric to unscoped enum.\n"); + WorkType = QualType{ToEnum, QualifiersToApply}; + } + + // Check for pointer conversions. + const auto *FromPtr = WorkType->getAs(); + const auto *ToPtr = To->getAs(); + if (FromPtr && ToPtr) { + if (ToPtr->isVoidPointerType()) { + LLVM_DEBUG(llvm::dbgs() << "--- approximateStdConv. To void pointer.\n"); + WorkType = QualType{ToPtr, QualifiersToApply}; + } + + const auto *FromRecordPtr = FromPtr->getPointeeCXXRecordDecl(); + const auto *ToRecordPtr = ToPtr->getPointeeCXXRecordDecl(); + if (isDerivedToBase(FromRecordPtr, ToRecordPtr)) { + LLVM_DEBUG(llvm::dbgs() << "--- approximateStdConv. Derived* to Base*\n"); + WorkType = QualType{ToPtr, QualifiersToApply}; + } + } + + // Model the slicing Derived-to-Base too, as "BaseT temporary = derived;" + // can also be compiled. + const auto *FromRecord = WorkType->getAsCXXRecordDecl(); + const auto *ToRecord = To->getAsCXXRecordDecl(); + if (isDerivedToBase(FromRecord, ToRecord)) { + LLVM_DEBUG(llvm::dbgs() << "--- approximateStdConv. Derived To Base.\n"); + WorkType = QualType{ToRecord->getTypeForDecl(), QualifiersToApply}; + } + + if (Ctx.getLangOpts().CPlusPlus17 && FromPtr && ToPtr) { + // Function pointer conversion: A noexcept function pointer can be passed + // to a non-noexcept one. + const auto *FromFunctionPtr = + FromPtr->getPointeeType()->getAs(); + const auto *ToFunctionPtr = + ToPtr->getPointeeType()->getAs(); + if (FromFunctionPtr && ToFunctionPtr && + FromFunctionPtr->hasNoexceptExceptionSpec() && + !ToFunctionPtr->hasNoexceptExceptionSpec()) { + LLVM_DEBUG(llvm::dbgs() << "--- approximateStdConv. noexcept function " + "pointer to non-noexcept.\n"); + WorkType = QualType{ToPtr, QualifiersToApply}; + } + } + + // Qualifier adjustments are modelled according to the user's request in + // the QualifiersMix check config. + LLVM_DEBUG(llvm::dbgs() + << "--- approximateStdConv. Trying qualifier adjustment...\n"); + MixData QualConv = calculateMixability(Check, WorkType, To, Ctx, + ImplicitConversionModellingMode::None); + QualConv.sanitize(); + if (hasFlag(QualConv.Flags, MixFlags::Qualifiers)) { + LLVM_DEBUG(llvm::dbgs() + << "<<< approximateStdConv. Qualifiers adjusted.\n"); + WorkType = To; + } + + if (WorkType == To) { + LLVM_DEBUG(llvm::dbgs() << "<<< approximateStdConv. Reached 'To' type.\n"); + return {WorkType}; + } + + LLVM_DEBUG(llvm::dbgs() << "<<< approximateStdConv. Did not reach 'To'.\n"); + return {}; +} + +namespace { + +/// Helper class for storing possible user-defined conversion calls that +/// *could* take place in an implicit conversion, and selecting the one that +/// most likely *does*, if any. +class UserDefinedConversionSelector { +public: + /// The conversion associated with a conversion function, together with the + /// mixability flags of the conversion function's parameter or return type + /// to the rest of the sequence the selector is used in, and the sequence + /// that applied through the conversion itself. + struct PreparedConversion { + const CXXMethodDecl *ConversionFun; + MixFlags Flags; + ConversionSequence Seq; + + PreparedConversion(const CXXMethodDecl *CMD, MixFlags F, + ConversionSequence S) + : ConversionFun(CMD), Flags(F), Seq(S) {} + }; + + UserDefinedConversionSelector(const TheCheck &Check) : Check(Check) {} + + /// Adds the conversion between the two types for the given function into + /// the possible implicit conversion set. FromType and ToType is either: + /// * the result of a standard sequence and a converting ctor parameter + /// * the return type of a conversion operator and the expected target of + /// an implicit conversion. + void addConversion(const CXXMethodDecl *ConvFun, QualType FromType, + QualType ToType) { + // Try to go from the FromType to the ToType wiht only a single implicit + // conversion, to see if the conversion function is applicable. + MixData Mix = calculateMixability( + Check, FromType, ToType, ConvFun->getASTContext(), + ImplicitConversionModellingMode::OneWaySingleStandardOnly); + Mix.sanitize(); + if (!Mix.indicatesMixability()) + return; + + LLVM_DEBUG(llvm::dbgs() << "--- tryConversion. Found viable with flags: " + << formatMixFlags(Mix.Flags) << '\n'); + FlaggedConversions.emplace_back(ConvFun, Mix.Flags, Mix.Conversion); + } + + /// Selects the best conversion function that is applicable from the + /// prepared set of potential conversion functions taken. + Optional operator()() const { + if (FlaggedConversions.empty()) { + LLVM_DEBUG(llvm::dbgs() << "--- selectUserDefinedConv. Empty.\n"); + return {}; + } + if (FlaggedConversions.size() == 1) { + LLVM_DEBUG(llvm::dbgs() << "--- selectUserDefinedConv. Single.\n"); + return FlaggedConversions.front(); + } + + Optional BestConversion; + unsigned short HowManyGoodConversions = 0; + for (const auto &Prepared : FlaggedConversions) { + LLVM_DEBUG(llvm::dbgs() << "--- selectUserDefinedConv. Candidate flags: " + << formatMixFlags(Prepared.Flags) << '\n'); + if (!BestConversion) { + BestConversion = Prepared; + ++HowManyGoodConversions; + continue; + } + + bool BestConversionHasImplicit = + hasFlag(BestConversion->Flags, MixFlags::ImplicitConversion); + bool ThisConversionHasImplicit = + hasFlag(Prepared.Flags, MixFlags::ImplicitConversion); + if (!BestConversionHasImplicit && ThisConversionHasImplicit) + // This is a worse conversion, because a better one was found earlier. + continue; + + if (BestConversionHasImplicit && !ThisConversionHasImplicit) { + // If the so far best selected conversion needs a previous implicit + // conversion to match the user-defined converting function, but this + // conversion does not, this is a better conversion, and we can throw + // away the previously selected conversion(s). + BestConversion = Prepared; + HowManyGoodConversions = 1; + continue; + } + + if (BestConversionHasImplicit == ThisConversionHasImplicit) + // The current conversion is the same in term of goodness than the + // already selected one. + ++HowManyGoodConversions; + } + + if (HowManyGoodConversions == 1) { + LLVM_DEBUG(llvm::dbgs() + << "--- selectUserDefinedConv. Unique result. Flags: " + << formatMixFlags(BestConversion->Flags) << '\n'); + return BestConversion; + } + + LLVM_DEBUG(llvm::dbgs() + << "--- selectUserDefinedConv. No, or ambiguous.\n"); + return {}; + } + +private: + llvm::SmallVector FlaggedConversions; + const TheCheck &Check; +}; + +} // namespace + +static Optional +tryConversionOperators(const TheCheck &Check, const CXXRecordDecl *RD, + QualType ToType) { + if (!RD || !RD->isCompleteDefinition()) + return {}; + RD = RD->getDefinition(); + + LLVM_DEBUG(llvm::dbgs() << ">>> tryConversionOperators: " << RD->getName() + << " to:\n"; + ToType.dump(llvm::dbgs(), RD->getASTContext()); + llvm::dbgs() << '\n';); + + UserDefinedConversionSelector ConversionSet{Check}; + + for (const NamedDecl *Method : RD->getVisibleConversionFunctions()) { + const auto *Con = dyn_cast(Method); + if (!Con || Con->isExplicit()) + continue; + LLVM_DEBUG(llvm::dbgs() << "--- tryConversionOperators. Trying:\n"; + Con->dump(llvm::dbgs()); llvm::dbgs() << '\n';); + + // Try to go from the result of conversion operator to the expected type, + // without calculating another user-defined conversion. + ConversionSet.addConversion(Con, Con->getConversionType(), ToType); + } + + if (Optional + SelectedConversion = ConversionSet()) { + QualType RecordType{RD->getTypeForDecl(), 0}; + + ConversionSequence Result{RecordType, ToType}; + // The conversion from the operator call's return type to ToType was + // modelled as a "pre-conversion" in the operator call, but it is the + // "post-conversion" from the point of view of the original conversion + // we are modelling. + Result.AfterSecondStandard = SelectedConversion->Seq.AfterFirstStandard; + + ConversionSequence::UserDefinedConversionOperator ConvOp; + ConvOp.Fun = cast(SelectedConversion->ConversionFun); + ConvOp.UserDefinedType = RecordType; + ConvOp.ConversionOperatorResultType = ConvOp.Fun->getConversionType(); + Result.setConversion(ConvOp); + + LLVM_DEBUG(llvm::dbgs() << "<<< tryConversionOperators. Found result.\n"); + return Result; + } + + LLVM_DEBUG(llvm::dbgs() << "<<< tryConversionOperators. No conversion.\n"); + return {}; +} + +static Optional +tryConvertingConstructors(const TheCheck &Check, QualType FromType, + const CXXRecordDecl *RD) { + if (!RD || !RD->isCompleteDefinition()) + return {}; + RD = RD->getDefinition(); + + LLVM_DEBUG(llvm::dbgs() << ">>> tryConveringConstructors: " << RD->getName() + << " from:\n"; + FromType.dump(llvm::dbgs(), RD->getASTContext()); + llvm::dbgs() << '\n';); + + UserDefinedConversionSelector ConversionSet{Check}; + + for (const CXXConstructorDecl *Con : RD->ctors()) { + if (Con->isCopyOrMoveConstructor() || + !Con->isConvertingConstructor(/* AllowExplicit =*/false)) + continue; + LLVM_DEBUG(llvm::dbgs() << "--- tryConvertingConstructors. Trying:\n"; + Con->dump(llvm::dbgs()); llvm::dbgs() << '\n';); + + // Try to go from the original FromType to the converting constructor's + // parameter type without another user-defined conversion. + ConversionSet.addConversion(Con, FromType, Con->getParamDecl(0)->getType()); + } + + if (Optional + SelectedConversion = ConversionSet()) { + QualType RecordType{RD->getTypeForDecl(), 0}; + + ConversionSequence Result{FromType, RecordType}; + Result.AfterFirstStandard = SelectedConversion->Seq.AfterFirstStandard; + + ConversionSequence::UserDefinedConvertingConstructor Ctor; + Ctor.Fun = cast(SelectedConversion->ConversionFun); + Ctor.ConstructorParameterType = Ctor.Fun->getParamDecl(0)->getType(); + Ctor.UserDefinedType = RecordType; + Result.setConversion(Ctor); + + LLVM_DEBUG(llvm::dbgs() + << "<<< tryConvertingConstructors. Found result.\n"); + return Result; + } + + LLVM_DEBUG(llvm::dbgs() << "<<< tryConvertingConstructors. No conversion.\n"); + return {}; +} + +/// Returns whether an expression of LType can be used in an RType context, as +/// per the implicit conversion rules. +/// +/// Note: the result of this operation, unlike that of calculateMixability, is +/// **NOT** symmetric. +static MixData +approximateImplicitConversion(const TheCheck &Check, QualType LType, + QualType RType, const ASTContext &Ctx, + ImplicitConversionModellingMode ImplicitMode) { + LLVM_DEBUG(llvm::dbgs() << ">>> approximateImplicitConversion for LType:\n"; + LType.dump(llvm::dbgs(), Ctx); llvm::dbgs() << "\nand RType:\n"; + RType.dump(llvm::dbgs(), Ctx); + llvm::dbgs() << "\nimplicit mode: "; switch (ImplicitMode) { + case ImplicitConversionModellingMode::None: + llvm::dbgs() << "None"; + break; + case ImplicitConversionModellingMode::All: + llvm::dbgs() << "All"; + break; + case ImplicitConversionModellingMode::OneWaySingleStandardOnly: + llvm::dbgs() << "OneWay, Single, STD Only"; + break; + } llvm::dbgs() << '\n';); + if (LType == RType) + return {MixFlags::Trivial, LType}; + + // An implicit conversion sequence consists of the following, in order: + // * Maybe standard conversion sequence. + // * Maybe user-defined conversion. + // * Maybe standard conversion sequence. + ConversionSequence ImplicitSeq{LType, RType}; + QualType WorkType = LType; + + Optional AfterFirstStdConv = + approximateStandardConversionSequence(Check, LType, RType, Ctx); + if (AfterFirstStdConv) { + LLVM_DEBUG(llvm::dbgs() << "--- approximateImplicitConversion. Standard " + "Pre-Conversion found!\n"); + ImplicitSeq.AfterFirstStandard = AfterFirstStdConv.getValue(); + WorkType = ImplicitSeq.AfterFirstStandard; + } + + if (ImplicitMode == ImplicitConversionModellingMode::OneWaySingleStandardOnly) + // If the caller only requested modelling of a standard conversion, bail. + return {ImplicitSeq.AfterFirstStandard.isNull() + ? MixFlags::None + : MixFlags::ImplicitConversion, + ImplicitSeq}; + + if (Ctx.getLangOpts().CPlusPlus) { + bool FoundConversionOperator = false, FoundConvertingCtor = false; + + if (const auto *LRD = WorkType->getAsCXXRecordDecl()) { + Optional ConversionOperatorResult = + tryConversionOperators(Check, LRD, RType); + if (ConversionOperatorResult) { + LLVM_DEBUG(llvm::dbgs() << "--- approximateImplicitConversion. Found " + "conversion operator.\n"); + ImplicitSeq.update(ConversionOperatorResult.getValue()); + WorkType = ImplicitSeq.getTypeAfterUserDefinedConversion(); + FoundConversionOperator = true; + } + } + + if (const auto *RRD = RType->getAsCXXRecordDecl()) { + // Use the original "LType" here, and not WorkType, because the + // conversion to the converting constructors' parameters will be + // modelled in the recursive call. + Optional ConvCtorResult = + tryConvertingConstructors(Check, LType, RRD); + if (ConvCtorResult) { + LLVM_DEBUG(llvm::dbgs() << "--- approximateImplicitConversion. Found " + "converting constructor.\n"); + ImplicitSeq.update(ConvCtorResult.getValue()); + WorkType = ImplicitSeq.getTypeAfterUserDefinedConversion(); + FoundConvertingCtor = true; + } + } + + if (FoundConversionOperator && FoundConvertingCtor) { + // If both an operator and a ctor matches, the sequence is ambiguous. + LLVM_DEBUG(llvm::dbgs() + << "<<< approximateImplicitConversion. Found both " + "user-defined conversion kinds in the same sequence!\n"); + return {MixFlags::None}; + } + } + + // After the potential user-defined conversion, another standard conversion + // sequence might exist. + LLVM_DEBUG( + llvm::dbgs() + << "--- approximateImplicitConversion. Try to find post-conversion.\n"); + MixData SecondStdConv = approximateImplicitConversion( + Check, WorkType, RType, Ctx, + ImplicitConversionModellingMode::OneWaySingleStandardOnly); + if (SecondStdConv.indicatesMixability()) { + LLVM_DEBUG(llvm::dbgs() << "--- approximateImplicitConversion. Standard " + "Post-Conversion found!\n"); + + // The single-step modelling puts the modelled conversion into the "PreStd" + // variable in the recursive call, but from the PoV of this function, it is + // the post-conversion. + ImplicitSeq.AfterSecondStandard = + SecondStdConv.Conversion.AfterFirstStandard; + WorkType = ImplicitSeq.AfterSecondStandard; + } + + if (ImplicitSeq) { + LLVM_DEBUG(llvm::dbgs() + << "<<< approximateImplicitConversion. Found a conversion.\n"); + return {MixFlags::ImplicitConversion, ImplicitSeq}; + } + + LLVM_DEBUG( + llvm::dbgs() << "<<< approximateImplicitConversion. No match found.\n"); + return {MixFlags::None}; +} + +static MixableParameterRange modelMixingRange( + const TheCheck &Check, const FunctionDecl *FD, std::size_t StartIndex, + const filter::SimilarlyUsedParameterPairSuppressor &UsageBasedSuppressor) { + std::size_t NumParams = FD->getNumParams(); + assert(StartIndex < NumParams && "out of bounds for start"); + const ASTContext &Ctx = FD->getASTContext(); + + MixableParameterRange Ret; + // A parameter at index 'StartIndex' had been trivially "checked". + Ret.NumParamsChecked = 1; + + for (std::size_t I = StartIndex + 1; I < NumParams; ++I) { + const ParmVarDecl *Ith = FD->getParamDecl(I); + StringRef ParamName = Ith->getName(); + LLVM_DEBUG(llvm::dbgs() + << "Check param #" << I << " '" << ParamName << "'...\n"); + if (filter::isIgnoredParameter(Check, Ith)) { + LLVM_DEBUG(llvm::dbgs() << "Param #" << I << " is ignored. Break!\n"); + break; + } + + StringRef PrevParamName = FD->getParamDecl(I - 1)->getName(); + if (!ParamName.empty() && !PrevParamName.empty() && + filter::prefixSuffixCoverUnderThreshold( + Check.NamePrefixSuffixSilenceDissimilarityTreshold, PrevParamName, + ParamName)) { + LLVM_DEBUG(llvm::dbgs() << "Parameter '" << ParamName + << "' follows a pattern with previous parameter '" + << PrevParamName << "'. Break!\n"); + break; + } + + // Now try to go forward and build the range of [Start, ..., I, I + 1, ...] + // parameters that can be messed up at a call site. + MixableParameterRange::MixVector MixesOfIth; + for (std::size_t J = StartIndex; J < I; ++J) { + const ParmVarDecl *Jth = FD->getParamDecl(J); + LLVM_DEBUG(llvm::dbgs() + << "Check mix of #" << J << " against #" << I << "...\n"); + + if (isSimilarlyUsedParameter(UsageBasedSuppressor, Ith, Jth)) { + // Consider the two similarly used parameters to not be possible in a + // mix-up at the user's request, if they enabled this heuristic. + LLVM_DEBUG(llvm::dbgs() << "Parameters #" << I << " and #" << J + << " deemed related, ignoring...\n"); + + // If the parameter #I and #J mixes, then I is mixable with something + // in the current range, so the range has to be broken and I not + // included. + MixesOfIth.clear(); + break; + } + + Mix M{Jth, Ith, + calculateMixability(Check, Jth->getType(), Ith->getType(), Ctx, + Check.ModelImplicitConversions + ? ImplicitConversionModellingMode::All + : ImplicitConversionModellingMode::None)}; + LLVM_DEBUG(llvm::dbgs() << "Mix flags (raw) : " + << formatMixFlags(M.flags()) << '\n'); + M.sanitize(); + LLVM_DEBUG(llvm::dbgs() << "Mix flags (after sanitize): " + << formatMixFlags(M.flags()) << '\n'); + + assert(M.flagsValid() && "All flags decayed!"); + + if (M.mixable()) + MixesOfIth.emplace_back(std::move(M)); + } + + if (MixesOfIth.empty()) { + // If there weren't any new mixes stored for Ith, the range is + // [Start, ..., I]. + LLVM_DEBUG(llvm::dbgs() + << "Param #" << I + << " does not mix with any in the current range. Break!\n"); + break; + } + + Ret.Mixes.insert(Ret.Mixes.end(), MixesOfIth.begin(), MixesOfIth.end()); + ++Ret.NumParamsChecked; // Otherwise a new param was iterated. + } + + return Ret; +} + +} // namespace model + +/// Matches DeclRefExprs and their ignorable wrappers to ParmVarDecls. +AST_MATCHER_FUNCTION(ast_matchers::internal::Matcher, paramRefExpr) { + return expr(ignoringParenImpCasts(ignoringElidableConstructorCall( + declRefExpr(to(parmVarDecl().bind("param")))))); +} + +namespace filter { + +/// Returns whether the parameter's name or the parameter's type's name is +/// configured by the user to be ignored from analysis and diagnostic. +static bool isIgnoredParameter(const TheCheck &Check, const ParmVarDecl *Node) { + LLVM_DEBUG(llvm::dbgs() << "Checking if '" << Node->getName() + << "' is ignored.\n"); + + if (!Node->getIdentifier()) + return llvm::find(Check.IgnoredParameterNames, "\"\"") != + Check.IgnoredParameterNames.end(); + + StringRef NodeName = Node->getName(); + if (llvm::find(Check.IgnoredParameterNames, NodeName) != + Check.IgnoredParameterNames.end()) { + LLVM_DEBUG(llvm::dbgs() << "\tName ignored.\n"); + return true; + } + + StringRef NodeTypeName = [Node] { + const ASTContext &Ctx = Node->getASTContext(); + const SourceManager &SM = Ctx.getSourceManager(); + SourceLocation B = Node->getTypeSpecStartLoc(); + SourceLocation E = Node->getTypeSpecEndLoc(); + LangOptions LO; + + LLVM_DEBUG(llvm::dbgs() << "\tType name code is '" + << Lexer::getSourceText( + CharSourceRange::getTokenRange(B, E), SM, LO) + << "'...\n"); + if (B.isMacroID()) { + LLVM_DEBUG(llvm::dbgs() << "\t\tBeginning is macro.\n"); + B = SM.getTopMacroCallerLoc(B); + } + if (E.isMacroID()) { + LLVM_DEBUG(llvm::dbgs() << "\t\tEnding is macro.\n"); + E = Lexer::getLocForEndOfToken(SM.getTopMacroCallerLoc(E), 0, SM, LO); + } + LLVM_DEBUG(llvm::dbgs() << "\tType name code is '" + << Lexer::getSourceText( + CharSourceRange::getTokenRange(B, E), SM, LO) + << "'...\n"); + + return Lexer::getSourceText(CharSourceRange::getTokenRange(B, E), SM, LO); + }(); + + LLVM_DEBUG(llvm::dbgs() << "\tType name is '" << NodeTypeName << "'\n"); + if (!NodeTypeName.empty()) { + if (llvm::any_of(Check.IgnoredParameterTypeSuffixes, + [NodeTypeName](const std::string &E) { + return !E.empty() && NodeTypeName.endswith(E); + })) { + LLVM_DEBUG(llvm::dbgs() << "\tType suffix ignored.\n"); + return true; + } + } + + return false; +} + +/// This namespace contains the implementations for the suppression of +/// diagnostics from similaly used ("related") parameters. +namespace relatedness_heuristic { + +static constexpr std::size_t SmallDataStructureSize = 4; + +template +using ParamToSmallSetMap = + llvm::DenseMap>; + +/// Returns whether the sets mapped to the two elements in the map have at +/// least one element in common. +template +bool lazyMapOfSetsIntersectionExists(const MapTy &Map, const ElemTy &E1, + const ElemTy &E2) { + auto E1Iterator = Map.find(E1); + auto E2Iterator = Map.find(E2); + if (E1Iterator == Map.end() || E2Iterator == Map.end()) + return false; + + for (const auto &E1SetElem : E1Iterator->second) + if (llvm::find(E2Iterator->second, E1SetElem) != E2Iterator->second.end()) + return true; + + return false; +} + +/// Implements the heuristic that marks two parameters related if there is +/// a usage for both in the same strict expression subtree. A strict +/// expression subtree is a tree which only includes Expr nodes, i.e. no +/// Stmts and no Decls. +class AppearsInSameExpr : public RecursiveASTVisitor { + using Base = RecursiveASTVisitor; + + const FunctionDecl *FD; + const Expr *CurrentExprOnlyTreeRoot = nullptr; + llvm::DenseMap> + ParentExprsForParamRefs; + +public: + void setup(const FunctionDecl *FD) { + this->FD = FD; + TraverseFunctionDecl(const_cast(FD)); + } + + bool operator()(const ParmVarDecl *Param1, const ParmVarDecl *Param2) const { + return lazyMapOfSetsIntersectionExists(ParentExprsForParamRefs, Param1, + Param2); + } + + bool TraverseDecl(Decl *D) { + CurrentExprOnlyTreeRoot = nullptr; + return Base::TraverseDecl(D); + } + + bool TraverseStmt(Stmt *S, DataRecursionQueue *Queue = nullptr) { + if (auto *E = dyn_cast_or_null(S)) { + bool RootSetInCurrentStackFrame = false; + if (!CurrentExprOnlyTreeRoot) { + CurrentExprOnlyTreeRoot = E; + RootSetInCurrentStackFrame = true; + } + + bool Ret = Base::TraverseStmt(S); + + if (RootSetInCurrentStackFrame) + CurrentExprOnlyTreeRoot = nullptr; + + return Ret; + } + + // A Stmt breaks the strictly Expr subtree. + CurrentExprOnlyTreeRoot = nullptr; + return Base::TraverseStmt(S); + } + + bool VisitDeclRefExpr(DeclRefExpr *DRE) { + if (!CurrentExprOnlyTreeRoot) + return true; + + if (auto *PVD = dyn_cast(DRE->getDecl())) + if (llvm::find(FD->parameters(), PVD)) + ParentExprsForParamRefs[PVD].insert(CurrentExprOnlyTreeRoot); + + return true; + } +}; + +/// Implements the heuristic that marks two parameters related if there are +/// two separate calls to the same function (overload) and the parameters are +/// passed to the same index in both calls, i.e f(a, b) and f(a, c) passes +/// b and c to the same index (2) of f(), marking them related. +class PassedToSameFunction { + ParamToSmallSetMap> TargetParams; + +public: + void setup(const FunctionDecl *FD) { + auto ParamsAsArgsInFnCalls = + match(functionDecl(forEachDescendant( + callExpr(forEachArgumentWithParam( + paramRefExpr(), parmVarDecl().bind("passed-to"))) + .bind("call-expr"))), + *FD, FD->getASTContext()); + for (const auto &Match : ParamsAsArgsInFnCalls) { + const auto *PassedParamOfThisFn = Match.getNodeAs("param"); + const auto *CE = Match.getNodeAs("call-expr"); + const auto *PassedToParam = Match.getNodeAs("passed-to"); + assert(PassedParamOfThisFn && CE && PassedToParam); + + const FunctionDecl *CalledFn = CE->getDirectCallee(); + if (!CalledFn) + continue; + + llvm::Optional TargetIdx; + unsigned NumFnParams = CalledFn->getNumParams(); + for (unsigned Idx = 0; Idx < NumFnParams; ++Idx) + if (CalledFn->getParamDecl(Idx) == PassedToParam) + TargetIdx.emplace(Idx); + + assert(TargetIdx.hasValue() && "Matched, but didn't find index?"); + TargetParams[PassedParamOfThisFn].insert( + {CalledFn->getCanonicalDecl(), *TargetIdx}); + } + } + + bool operator()(const ParmVarDecl *Param1, const ParmVarDecl *Param2) const { + return lazyMapOfSetsIntersectionExists(TargetParams, Param1, Param2); + } +}; + +/// Implements the heuristic that marks two parameters related if the same +/// member is accessed (referred to) inside the current function's body. +class AccessedSameMemberOf { + ParamToSmallSetMap AccessedMembers; + +public: + void setup(const FunctionDecl *FD) { + auto MembersCalledOnParams = match( + functionDecl(forEachDescendant( + memberExpr(hasObjectExpression(paramRefExpr())).bind("mem-expr"))), + *FD, FD->getASTContext()); + + for (const auto &Match : MembersCalledOnParams) { + const auto *AccessedParam = Match.getNodeAs("param"); + const auto *ME = Match.getNodeAs("mem-expr"); + assert(AccessedParam && ME); + AccessedMembers[AccessedParam].insert( + ME->getMemberDecl()->getCanonicalDecl()); + } + } + + bool operator()(const ParmVarDecl *Param1, const ParmVarDecl *Param2) const { + return lazyMapOfSetsIntersectionExists(AccessedMembers, Param1, Param2); + } +}; + +/// Implements the heuristic that marks two parameters related if different +/// ReturnStmts return them from the function. +class Returned { + llvm::SmallVector ReturnedParams; + +public: + void setup(const FunctionDecl *FD) { + // TODO: Handle co_return. + auto ParamReturns = match(functionDecl(forEachDescendant( + returnStmt(hasReturnValue(paramRefExpr())))), + *FD, FD->getASTContext()); + for (const auto &Match : ParamReturns) { + const auto *ReturnedParam = Match.getNodeAs("param"); + assert(ReturnedParam); + + if (find(FD->parameters(), ReturnedParam) == FD->param_end()) + // Inside the subtree of a FunctionDecl there might be ReturnStmts of + // a parameter that isn't the parameter of the function, e.g. in the + // case of lambdas. + continue; + + ReturnedParams.emplace_back(ReturnedParam); + } + } + + bool operator()(const ParmVarDecl *Param1, const ParmVarDecl *Param2) const { + return llvm::find(ReturnedParams, Param1) != ReturnedParams.end() && + llvm::find(ReturnedParams, Param2) != ReturnedParams.end(); + } +}; + +} // namespace relatedness_heuristic + +/// Helper class that is used to detect if two parameters of the same function +/// are used in a similar fashion, to suppress the result. +class SimilarlyUsedParameterPairSuppressor { + const bool Enabled; + relatedness_heuristic::AppearsInSameExpr SameExpr; + relatedness_heuristic::PassedToSameFunction PassToFun; + relatedness_heuristic::AccessedSameMemberOf SameMember; + relatedness_heuristic::Returned Returns; + +public: + SimilarlyUsedParameterPairSuppressor(const FunctionDecl *FD, bool Enable) + : Enabled(Enable) { + if (!Enable) + return; + + SameExpr.setup(FD); + PassToFun.setup(FD); + SameMember.setup(FD); + Returns.setup(FD); + } + + /// Returns whether the specified two parameters are deemed similarly used + /// or related by the heuristics. + bool operator()(const ParmVarDecl *Param1, const ParmVarDecl *Param2) const { + if (!Enabled) + return false; + + LLVM_DEBUG(llvm::dbgs() + << "::: Matching similar usage / relatedness heuristic...\n"); + + if (SameExpr(Param1, Param2)) { + LLVM_DEBUG(llvm::dbgs() << "::: Used in the same expression.\n"); + return true; + } + + if (PassToFun(Param1, Param2)) { + LLVM_DEBUG(llvm::dbgs() + << "::: Passed to same function in different calls.\n"); + return true; + } + + if (SameMember(Param1, Param2)) { + LLVM_DEBUG(llvm::dbgs() + << "::: Same member field access or method called.\n"); + return true; + } + + if (Returns(Param1, Param2)) { + LLVM_DEBUG(llvm::dbgs() << "::: Both parameter returned.\n"); + return true; + } + + LLVM_DEBUG(llvm::dbgs() << "::: None.\n"); + return false; + } +}; + +// (This function hoists the call to operator() of the wrapper, so we do not +// need to define the previous class at the top of the file.) +static inline bool +isSimilarlyUsedParameter(const SimilarlyUsedParameterPairSuppressor &Suppressor, + const ParmVarDecl *Param1, const ParmVarDecl *Param2) { + return Suppressor(Param1, Param2); +} + +static void padStringAtEnd(SmallVectorImpl &Str, std::size_t ToLen) { + while (Str.size() < ToLen) + Str.emplace_back('\0'); +} + +static void padStringAtBegin(SmallVectorImpl &Str, std::size_t ToLen) { + while (Str.size() < ToLen) + Str.insert(Str.begin(), '\0'); +} + +static bool isCommonPrefixWithoutSomeCharacters(std::size_t N, StringRef S1, + StringRef S2) { + assert(S1.size() >= N && S2.size() >= N); + StringRef S1Prefix = S1.take_front(S1.size() - N), + S2Prefix = S2.take_front(S2.size() - N); + return S1Prefix == S2Prefix && !S1Prefix.empty(); +} + +static bool isCommonSuffixWithoutSomeCharacters(std::size_t N, StringRef S1, + StringRef S2) { + assert(S1.size() >= N && S2.size() >= N); + StringRef S1Suffix = S1.take_back(S1.size() - N), + S2Suffix = S2.take_back(S2.size() - N); + return S1Suffix == S2Suffix && !S1Suffix.empty(); +} + +/// Returns whether the two strings are prefixes or suffixes of each other with +/// at most Threshold characters differing on the non-common end. +static bool prefixSuffixCoverUnderThreshold(std::size_t Threshold, + StringRef Str1, StringRef Str2) { + if (Threshold == 0) + return false; + + // Pad the two strings to the longer length. + std::size_t BiggerLength = std::max(Str1.size(), Str2.size()); + + if (BiggerLength <= Threshold) + // If the length of the strings is still smaller than the threshold, they + // would be covered by an empty prefix/suffix with the rest differing. + // (E.g. "A" and "X" with Threshold = 1 would mean we think they are + // similar and do not warn about them, which is a too eager assumption.) + return false; + + SmallString<32> S1PadE{Str1}, S2PadE{Str2}; + padStringAtEnd(S1PadE, BiggerLength); + padStringAtEnd(S2PadE, BiggerLength); + + if (isCommonPrefixWithoutSomeCharacters( + Threshold, StringRef{S1PadE.begin(), BiggerLength}, + StringRef{S2PadE.begin(), BiggerLength})) + return true; + + SmallString<32> S1PadB{Str1}, S2PadB{Str2}; + padStringAtBegin(S1PadB, BiggerLength); + padStringAtBegin(S2PadB, BiggerLength); + + if (isCommonSuffixWithoutSomeCharacters( + Threshold, StringRef{S1PadB.begin(), BiggerLength}, + StringRef{S2PadB.begin(), BiggerLength})) + return true; + + return false; +} + +} // namespace filter + +/// Matches functions that have at least the specified amount of parameters. +AST_MATCHER_P(FunctionDecl, parameterCountGE, unsigned, N) { + return Node.getNumParams() >= N; +} + +/// Matches *any* overloaded unary and binary operators. +AST_MATCHER(FunctionDecl, isOverloadedUnaryOrBinaryOperator) { + switch (Node.getOverloadedOperator()) { + case OO_None: + case OO_New: + case OO_Delete: + case OO_Array_New: + case OO_Array_Delete: + case OO_Conditional: + case OO_Coawait: + return false; + + default: + return Node.getNumParams() <= 2; + } +} + +/// Returns the DefaultMinimumLength if the Value of requested minimum length +/// is less than 2. Minimum lengths of 0 or 1 are not accepted. +static inline unsigned clampMinimumLength(const unsigned Value) { + return Value < 2 ? DefaultMinimumLength : Value; +} + +// FIXME: Maybe unneeded, getNameForDiagnostic() is expected to change to return +// a crafted location when the node itself is unnamed. (See D84658, D85033.) +/// Returns the diagnostic-friendly name of the node, or empty string. +static SmallString<64> getName(const NamedDecl *ND) { + SmallString<64> Name; + llvm::raw_svector_ostream OS{Name}; + ND->getNameForDiagnostic(OS, ND->getASTContext().getPrintingPolicy(), false); + return Name; +} + +/// Returns the diagnostic-friendly name of the node, or a constant value. +static SmallString<64> getNameOrUnnamed(const NamedDecl *ND) { + auto Name = getName(ND); + if (Name.empty()) + Name = ""; + return Name; +} + +/// Returns whether a particular Mix between two parameters should have the +/// types involved diagnosed to the user. This is only a flag check. +static inline bool needsToPrintTypeInDiagnostic(const model::Mix &M) { + using namespace model; + return static_cast( + M.flags() & + (MixFlags::TypeAlias | MixFlags::ReferenceBind | MixFlags::Qualifiers)); +} + +/// Returns whether a particular Mix between the two parameters should have +/// implicit conversions elaborated. +static inline bool needsToElaborateImplicitConversion(const model::Mix &M) { + return hasFlag(M.flags(), model::MixFlags::ImplicitConversion); +} + +namespace { + +/// This class formats a conversion sequence into a "Ty1 -> Ty2 -> Ty3" line +/// that can be used in diagnostics. +struct FormattedConversionSequence { + std::string DiagnosticText; + + /// The formatted sequence is trivial if it is "Ty1 -> Ty2", but Ty1 and + /// Ty2 are the types that are shown in the code. A trivial diagnostic + /// does not need to be printed. + bool Trivial; + + FormattedConversionSequence(const PrintingPolicy &PP, + StringRef StartTypeAsDiagnosed, + const model::ConversionSequence &Conv, + StringRef DestinationTypeAsDiagnosed) { + Trivial = true; + llvm::raw_string_ostream OS{DiagnosticText}; + + // Print the type name as it is printed in other places in the diagnostic. + OS << '\'' << StartTypeAsDiagnosed << '\''; + std::string LastAddedType = StartTypeAsDiagnosed.str(); + std::size_t NumElementsAdded = 1; + + // However, the parameter's defined type might not be what the implicit + // conversion started with, e.g. if a typedef is found to convert. + std::string SeqBeginTypeStr = Conv.Begin.getAsString(PP); + std::string SeqEndTypeStr = Conv.End.getAsString(PP); + if (StartTypeAsDiagnosed != SeqBeginTypeStr) { + OS << " (as '" << SeqBeginTypeStr << "')"; + LastAddedType = SeqBeginTypeStr; + Trivial = false; + } + + auto AddType = [&](StringRef ToAdd) { + if (LastAddedType != ToAdd && ToAdd != SeqEndTypeStr) { + OS << " -> '" << ToAdd << "'"; + LastAddedType = ToAdd.str(); + ++NumElementsAdded; + } + }; + for (QualType InvolvedType : Conv.getInvolvedTypesInSequence()) + // Print every type that's unique in the sequence into the diagnosis. + AddType(InvolvedType.getAsString(PP)); + + if (LastAddedType != DestinationTypeAsDiagnosed) { + OS << " -> '" << DestinationTypeAsDiagnosed << "'"; + LastAddedType = DestinationTypeAsDiagnosed.str(); + ++NumElementsAdded; + } + + // Same reasoning as with the Begin, e.g. if the converted-to type is a + // typedef, it will not be the same inside the conversion sequence (where + // the model already tore off typedefs) as in the code. + if (DestinationTypeAsDiagnosed != SeqEndTypeStr) { + OS << " (as '" << SeqEndTypeStr << "')"; + LastAddedType = SeqEndTypeStr; + Trivial = false; + } + + if (Trivial && NumElementsAdded > 2) + // If the thing is still marked trivial but we have more than the + // from and to types added, it should not be trivial, and elaborated + // when printing the diagnostic. + Trivial = false; + } +}; + +/// Retains the elements called with and returns whether the call is done with +/// a new element. +template class InsertOnce { + llvm::SmallSet CalledWith; + +public: + bool operator()(E El) { return CalledWith.insert(std::move(El)).second; } + + bool calledWith(const E &El) const { return CalledWith.contains(El); } +}; + +struct SwappedEqualQualTypePair { + QualType LHSType, RHSType; + + bool operator==(const SwappedEqualQualTypePair &Other) const { + return (LHSType == Other.LHSType && RHSType == Other.RHSType) || + (LHSType == Other.RHSType && RHSType == Other.LHSType); + } + + bool operator<(const SwappedEqualQualTypePair &Other) const { + return LHSType < Other.LHSType && RHSType < Other.RHSType; + } +}; + +struct TypeAliasDiagnosticTuple { + QualType LHSType, RHSType, CommonType; + + bool operator==(const TypeAliasDiagnosticTuple &Other) const { + return CommonType == Other.CommonType && + ((LHSType == Other.LHSType && RHSType == Other.RHSType) || + (LHSType == Other.RHSType && RHSType == Other.LHSType)); + } + + bool operator<(const TypeAliasDiagnosticTuple &Other) const { + return CommonType < Other.CommonType && LHSType < Other.LHSType && + RHSType < Other.RHSType; + } +}; + +/// Helper class to only emit a diagnostic related to MixFlags::TypeAlias once. +class UniqueTypeAliasDiagnosticHelper + : public InsertOnce { + using Base = InsertOnce; + +public: + /// Returns whether the diagnostic for LHSType and RHSType which are both + /// referring to CommonType being the same has not been emitted already. + bool operator()(QualType LHSType, QualType RHSType, QualType CommonType) { + if (CommonType.isNull() || CommonType == LHSType || CommonType == RHSType) + return Base::operator()({LHSType, RHSType, {}}); + + TypeAliasDiagnosticTuple ThreeTuple{LHSType, RHSType, CommonType}; + if (!Base::operator()(ThreeTuple)) + return false; + + bool AlreadySaidLHSAndCommonIsSame = calledWith({LHSType, CommonType, {}}); + bool AlreadySaidRHSAndCommonIsSame = calledWith({RHSType, CommonType, {}}); + if (AlreadySaidLHSAndCommonIsSame && AlreadySaidRHSAndCommonIsSame) { + // "SomeInt == int" && "SomeOtherInt == int" => "Common(SomeInt, + // SomeOtherInt) == int", no need to diagnose it. Save the 3-tuple only + // for shortcut if it ever appears again. + return false; + } + + return true; + } +}; + +} // namespace + +EasilySwappableParametersCheck::EasilySwappableParametersCheck( + StringRef Name, ClangTidyContext *Context) + : ClangTidyCheck(Name, Context), + MinimumLength(clampMinimumLength( + Options.get("MinimumLength", DefaultMinimumLength))), + IgnoredParameterNames(optutils::parseStringList( + Options.get("IgnoredParameterNames", DefaultIgnoredParameterNames))), + IgnoredParameterTypeSuffixes(optutils::parseStringList( + Options.get("IgnoredParameterTypeSuffixes", + DefaultIgnoredParameterTypeSuffixes))), + QualifiersMix(Options.get("QualifiersMix", DefaultQualifiersMix)), + ModelImplicitConversions(Options.get("ModelImplicitConversions", + DefaultModelImplicitConversions)), + SuppressParametersUsedTogether( + Options.get("SuppressParametersUsedTogether", + DefaultSuppressParametersUsedTogether)), + NamePrefixSuffixSilenceDissimilarityTreshold( + Options.get("NamePrefixSuffixSilenceDissimilarityTreshold", + DefaultNamePrefixSuffixSilenceDissimilarityTreshold)) {} + +void EasilySwappableParametersCheck::storeOptions( + ClangTidyOptions::OptionMap &Opts) { + Options.store(Opts, "MinimumLength", MinimumLength); + Options.store(Opts, "IgnoredParameterNames", + optutils::serializeStringList(IgnoredParameterNames)); + Options.store(Opts, "IgnoredParameterTypeSuffixes", + optutils::serializeStringList(IgnoredParameterTypeSuffixes)); + Options.store(Opts, "QualifiersMix", QualifiersMix); + Options.store(Opts, "ModelImplicitConversions", ModelImplicitConversions); + Options.store(Opts, "SuppressParametersUsedTogether", + SuppressParametersUsedTogether); + Options.store(Opts, "NamePrefixSuffixSilenceDissimilarityTreshold", + NamePrefixSuffixSilenceDissimilarityTreshold); +} + +void EasilySwappableParametersCheck::registerMatchers(MatchFinder *Finder) { + const auto BaseConstraints = functionDecl( + // Only report for definition nodes, as fixing the issues reported + // requires the user to be able to change code. + isDefinition(), parameterCountGE(MinimumLength), + unless(isOverloadedUnaryOrBinaryOperator())); + + Finder->addMatcher( + functionDecl(BaseConstraints, + unless(ast_matchers::isTemplateInstantiation())) + .bind("func"), + this); + Finder->addMatcher( + functionDecl(BaseConstraints, isExplicitTemplateSpecialization()) + .bind("func"), + this); +} + +void EasilySwappableParametersCheck::check( + const MatchFinder::MatchResult &Result) { + using namespace model; + using namespace filter; + + const auto *FD = Result.Nodes.getNodeAs("func"); + assert(FD); + + const PrintingPolicy &PP = FD->getASTContext().getPrintingPolicy(); + std::size_t NumParams = FD->getNumParams(); + std::size_t MixableRangeStartIndex = 0; + + // Spawn one suppressor and if the user requested, gather information from + // the AST for the parameters' usages. + filter::SimilarlyUsedParameterPairSuppressor UsageBasedSuppressor{ + FD, SuppressParametersUsedTogether}; + + LLVM_DEBUG(llvm::dbgs() << "Begin analysis of " << getName(FD) << " with " + << NumParams << " parameters...\n"); + while (MixableRangeStartIndex < NumParams) { + if (isIgnoredParameter(*this, FD->getParamDecl(MixableRangeStartIndex))) { + LLVM_DEBUG(llvm::dbgs() + << "Parameter #" << MixableRangeStartIndex << " ignored.\n"); + ++MixableRangeStartIndex; + continue; + } + + MixableParameterRange R = modelMixingRange( + *this, FD, MixableRangeStartIndex, UsageBasedSuppressor); + assert(R.NumParamsChecked > 0 && "Ensure forward progress!"); + MixableRangeStartIndex += R.NumParamsChecked; + if (R.NumParamsChecked < MinimumLength) { + LLVM_DEBUG(llvm::dbgs() << "Ignoring range of " << R.NumParamsChecked + << " lower than limit.\n"); + continue; + } + + bool NeedsAnyTypeNote = llvm::any_of(R.Mixes, needsToPrintTypeInDiagnostic); + bool HasAnyImplicits = + llvm::any_of(R.Mixes, needsToElaborateImplicitConversion); + const ParmVarDecl *First = R.getFirstParam(), *Last = R.getLastParam(); + std::string FirstParamTypeAsWritten = First->getType().getAsString(PP); + { + StringRef DiagText; + + if (HasAnyImplicits) + DiagText = "%0 adjacent parameters of %1 of convertible types are " + "easily swapped by mistake"; + else if (NeedsAnyTypeNote) + DiagText = "%0 adjacent parameters of %1 of similar type are easily " + "swapped by mistake"; + else + DiagText = "%0 adjacent parameters of %1 of similar type ('%2') are " + "easily swapped by mistake"; + + auto Diag = diag(First->getOuterLocStart(), DiagText) + << static_cast(R.NumParamsChecked) << FD; + if (!NeedsAnyTypeNote) + Diag << FirstParamTypeAsWritten; + + CharSourceRange HighlightRange = CharSourceRange::getTokenRange( + First->getBeginLoc(), Last->getEndLoc()); + Diag << HighlightRange; + } + + // There is a chance that the previous highlight did not succeed, e.g. when + // the two parameters are on different lines. For clarity, show the user + // the involved variable explicitly. + diag(First->getLocation(), "the first parameter in the range is '%0'", + DiagnosticIDs::Note) + << getNameOrUnnamed(First) + << CharSourceRange::getTokenRange(First->getLocation(), + First->getLocation()); + diag(Last->getLocation(), "the last parameter in the range is '%0'", + DiagnosticIDs::Note) + << getNameOrUnnamed(Last) + << CharSourceRange::getTokenRange(Last->getLocation(), + Last->getLocation()); + + // Helper classes to silence elaborative diagnostic notes that would be + // too verbose. + UniqueTypeAliasDiagnosticHelper UniqueTypeAlias; + InsertOnce UniqueBindPower; + InsertOnce UniqueImplicitConversion; + + for (const model::Mix &M : R.Mixes) { + assert(M.mixable() && "Sentinel or false mix in result."); + if (!needsToPrintTypeInDiagnostic(M) && + !needsToElaborateImplicitConversion(M)) + continue; + + // Typedefs might result in the type of the variable needing to be + // emitted to a note diagnostic, so prepare it. + const ParmVarDecl *LVar = M.First; + const ParmVarDecl *RVar = M.Second; + QualType LType = LVar->getType(); + QualType RType = RVar->getType(); + QualType CommonType = M.commonUnderlyingType(); + std::string LTypeStr = LType.getAsString(PP); + std::string RTypeStr = RType.getAsString(PP); + std::string CommonTypeStr = CommonType.getAsString(PP); + + if (hasFlag(M.flags(), MixFlags::TypeAlias) && + UniqueTypeAlias(LType, RType, CommonType)) { + StringRef DiagText; + bool ExplicitlyPrintCommonType = false; + if (LTypeStr == CommonTypeStr || RTypeStr == CommonTypeStr) + if (hasFlag(M.flags(), MixFlags::Qualifiers)) + DiagText = "after resolving type aliases, '%0' and '%1' share a " + "common type"; + else + DiagText = + "after resolving type aliases, '%0' and '%1' are the same"; + else if (!CommonType.isNull()) { + DiagText = "after resolving type aliases, the common type of '%0' " + "and '%1' is '%2'"; + ExplicitlyPrintCommonType = true; + } + + auto Diag = + diag(LVar->getOuterLocStart(), DiagText, DiagnosticIDs::Note) + << LTypeStr << RTypeStr; + if (ExplicitlyPrintCommonType) + Diag << CommonTypeStr; + } + + if ((hasFlag(M.flags(), MixFlags::ReferenceBind) || + hasFlag(M.flags(), MixFlags::Qualifiers)) && + UniqueBindPower({LType, RType})) { + StringRef DiagText = "'%0' and '%1' parameters accept and bind the " + "same kind of values"; + diag(RVar->getOuterLocStart(), DiagText, DiagnosticIDs::Note) + << LTypeStr << RTypeStr; + } + + if (needsToElaborateImplicitConversion(M) && + UniqueImplicitConversion({LType, RType})) { + const model::ConversionSequence <R = + M.leftToRightConversionSequence(); + const model::ConversionSequence &RTL = + M.rightToLeftConversionSequence(); + FormattedConversionSequence LTRFmt{PP, LTypeStr, LTR, RTypeStr}; + FormattedConversionSequence RTLFmt{PP, RTypeStr, RTL, LTypeStr}; + + StringRef DiagText = "'%0' and '%1' may be implicitly converted"; + if (!LTRFmt.Trivial || !RTLFmt.Trivial) + DiagText = "'%0' and '%1' may be implicitly converted: %2, %3"; + + { + auto Diag = + diag(RVar->getOuterLocStart(), DiagText, DiagnosticIDs::Note) + << LTypeStr << RTypeStr; + + if (!LTRFmt.Trivial || !RTLFmt.Trivial) + Diag << LTRFmt.DiagnosticText << RTLFmt.DiagnosticText; + } + + StringRef ConversionFunctionDiagText = + "the implicit conversion involves the " + "%select{|converting constructor|conversion operator}0 " + "declared here"; + if (const FunctionDecl *LFD = LTR.getUserDefinedConversionFunction()) + diag(LFD->getLocation(), ConversionFunctionDiagText, + DiagnosticIDs::Note) + << static_cast(LTR.UDConvKind) + << LTR.getUserDefinedConversionHighlight(); + if (const FunctionDecl *RFD = RTL.getUserDefinedConversionFunction()) + diag(RFD->getLocation(), ConversionFunctionDiagText, + DiagnosticIDs::Note) + << static_cast(RTL.UDConvKind) + << RTL.getUserDefinedConversionHighlight(); + } + } + } +} + +} // namespace bugprone +} // namespace tidy +} // namespace clang diff --git a/clang-tools-extra/clang-tidy/bugprone/EasilySwappableParametersCheck.h b/clang-tools-extra/clang-tidy/bugprone/EasilySwappableParametersCheck.h new file mode 100644 index 0000000000000..a1fade5277f00 --- /dev/null +++ b/clang-tools-extra/clang-tidy/bugprone/EasilySwappableParametersCheck.h @@ -0,0 +1,66 @@ +//===--- EasilySwappableParametersCheck.h - clang-tidy ----------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_BUGPRONE_EASILYSWAPPABLEPARAMETERSCHECK_H +#define LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_BUGPRONE_EASILYSWAPPABLEPARAMETERSCHECK_H + +#include "../ClangTidyCheck.h" + +namespace clang { +namespace tidy { +namespace bugprone { + +/// Finds function definitions where parameters of convertible types follow +/// each other directly, making call sites prone to calling the function with +/// swapped (or badly ordered) arguments. +/// +/// For the user-facing documentation see: +/// http://clang.llvm.org/extra/clang-tidy/checks/bugprone-easily-swappable-parameters.html +class EasilySwappableParametersCheck : public ClangTidyCheck { +public: + EasilySwappableParametersCheck(StringRef Name, ClangTidyContext *Context); + void registerMatchers(ast_matchers::MatchFinder *Finder) override; + void check(const ast_matchers::MatchFinder::MatchResult &Result) override; + void storeOptions(ClangTidyOptions::OptionMap &Opts) override; + + /// The minimum length of an adjacent swappable parameter range required for + /// a diagnostic. + const std::size_t MinimumLength; + + /// The parameter names (as written in the source text) to be ignored. + const std::vector IgnoredParameterNames; + + /// The parameter typename suffixes (as written in the source code) to be + /// ignored. + const std::vector IgnoredParameterTypeSuffixes; + + /// Whether to consider differently qualified versions of the same type + /// mixable. + const bool QualifiersMix; + + /// Whether to model implicit conversions "in full" (conditions apply) + /// during analysis and consider types that are implicitly convertible to + /// one another mixable. + const bool ModelImplicitConversions; + + /// If enabled, diagnostics for parameters that are used together in a + /// similar way are not emitted. + const bool SuppressParametersUsedTogether; + + /// The number of characters two parameter names might be dissimilar at + /// either end for the report about the parameters to be silenced. + /// E.g. the names "LHS" and "RHS" are 1-dissimilar suffixes of each other, + /// while "Text1" and "Text2" are 1-dissimilar prefixes of each other. + const std::size_t NamePrefixSuffixSilenceDissimilarityTreshold; +}; + +} // namespace bugprone +} // namespace tidy +} // namespace clang + +#endif // LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_BUGPRONE_EASILYSWAPPABLEPARAMETERSCHECK_H diff --git a/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py b/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py index 313ecd2f95716..de810230b2852 100755 --- a/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py +++ b/clang-tools-extra/clang-tidy/tool/run-clang-tidy.py @@ -81,13 +81,16 @@ def make_absolute(f, directory): def get_tidy_invocation(f, clang_tidy_binary, checks, tmpdir, build_path, header_filter, allow_enabling_alpha_checkers, - extra_arg, extra_arg_before, quiet, config): + extra_arg, extra_arg_before, quiet, config, + line_filter): """Gets a command line for clang-tidy.""" start = [clang_tidy_binary, '--use-color'] if allow_enabling_alpha_checkers: start.append('-allow-enabling-analyzer-alpha-checkers') if header_filter is not None: start.append('-header-filter=' + header_filter) + if line_filter is not None: + start.append('-line-filter=' + line_filter) if checks: start.append('-checks=' + checks) if tmpdir is not None: @@ -165,7 +168,7 @@ def run_tidy(args, tmpdir, build_path, queue, lock, failed_files): tmpdir, build_path, args.header_filter, args.allow_enabling_alpha_checkers, args.extra_arg, args.extra_arg_before, - args.quiet, args.config) + args.quiet, args.config, args.line_filter) proc = subprocess.Popen(invocation, stdout=subprocess.PIPE, stderr=subprocess.PIPE) output, err = proc.communicate() @@ -209,6 +212,9 @@ def main(): 'headers to output diagnostics from. Diagnostics from ' 'the main file of each translation unit are always ' 'displayed.') + parser.add_argument('-line-filter', default=None, + help='List of files with line ranges to filter the' + 'warnings.') if yaml: parser.add_argument('-export-fixes', metavar='filename', dest='export_fixes', help='Create a yaml file to store suggested fixes in, ' diff --git a/clang-tools-extra/clangd/CMakeLists.txt b/clang-tools-extra/clangd/CMakeLists.txt index 671e55e8622d3..3c2b097e89fd1 100644 --- a/clang-tools-extra/clangd/CMakeLists.txt +++ b/clang-tools-extra/clangd/CMakeLists.txt @@ -1,3 +1,7 @@ +# This is a no-op for building files in this dir, but is inherited by subdirs. +include_directories(${CMAKE_CURRENT_SOURCE_DIR}) +include_directories(${CMAKE_CURRENT_BINARY_DIR}) + add_subdirectory(support) # Configure the Features.inc file. @@ -64,6 +68,7 @@ add_clang_library(clangDaemon DumpAST.cpp ExpectedTypes.cpp FeatureModule.cpp + Features.cpp FindSymbols.cpp FindTarget.cpp FileDistance.cpp diff --git a/clang-tools-extra/clangd/ClangdLSPServer.cpp b/clang-tools-extra/clangd/ClangdLSPServer.cpp index f70fd0018cfdf..9214bcbe66bca 100644 --- a/clang-tools-extra/clangd/ClangdLSPServer.cpp +++ b/clang-tools-extra/clangd/ClangdLSPServer.cpp @@ -12,6 +12,7 @@ #include "Diagnostics.h" #include "DraftStore.h" #include "DumpAST.h" +#include "Features.h" #include "GlobalCompilationDatabase.h" #include "LSPBinder.h" #include "Protocol.h" @@ -24,7 +25,6 @@ #include "support/MemoryTree.h" #include "support/Trace.h" #include "clang/AST/ASTContext.h" -#include "clang/Basic/Version.h" #include "clang/Tooling/Core/Replacement.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/Optional.h" @@ -620,7 +620,8 @@ void ClangdLSPServer::onInitialize(const InitializeParams &Params, llvm::json::Object Result{ {{"serverInfo", llvm::json::Object{{"name", "clangd"}, - {"version", getClangToolFullVersion("clangd")}}}, + {"version", llvm::formatv("{0} {1}", versionString(), + featureString())}}}, {"capabilities", std::move(ServerCaps)}}}; if (Opts.Encoding) Result["offsetEncoding"] = *Opts.Encoding; diff --git a/clang-tools-extra/clangd/ClangdLSPServer.h b/clang-tools-extra/clangd/ClangdLSPServer.h index 8c43d18502875..4c195df6f893c 100644 --- a/clang-tools-extra/clangd/ClangdLSPServer.h +++ b/clang-tools-extra/clangd/ClangdLSPServer.h @@ -11,7 +11,6 @@ #include "ClangdServer.h" #include "DraftStore.h" -#include "Features.inc" #include "FindSymbols.h" #include "GlobalCompilationDatabase.h" #include "LSPBinder.h" diff --git a/clang-tools-extra/clangd/ClangdServer.cpp b/clang-tools-extra/clangd/ClangdServer.cpp index 0f525f3b9a0a4..1e722086e2e04 100644 --- a/clang-tools-extra/clangd/ClangdServer.cpp +++ b/clang-tools-extra/clangd/ClangdServer.cpp @@ -637,8 +637,8 @@ void ClangdServer::applyTweak(PathRef File, Range Sel, StringRef TweakID, Effect = T.takeError(); } assert(Effect.hasValue() && "Expected at least one selection"); - if (*Effect) { - // Tweaks don't apply clang-format, do that centrally here. + if (*Effect && (*Effect)->FormatEdits) { + // Format tweaks that require it centrally here. for (auto &It : (*Effect)->ApplyEdits) { Edit &E = It.second; format::FormatStyle Style = diff --git a/clang-tools-extra/clangd/ConfigCompile.cpp b/clang-tools-extra/clangd/ConfigCompile.cpp index 438dd74d866c6..4eaff343b2290 100644 --- a/clang-tools-extra/clangd/ConfigCompile.cpp +++ b/clang-tools-extra/clangd/ConfigCompile.cpp @@ -28,7 +28,7 @@ #include "ConfigFragment.h" #include "ConfigProvider.h" #include "Diagnostics.h" -#include "Features.inc" +#include "Features.h" #include "TidyProvider.h" #include "support/Logger.h" #include "support/Path.h" diff --git a/clang-tools-extra/clangd/Features.cpp b/clang-tools-extra/clangd/Features.cpp new file mode 100644 index 0000000000000..17f475fc4c22b --- /dev/null +++ b/clang-tools-extra/clangd/Features.cpp @@ -0,0 +1,55 @@ +//===--- Features.cpp - Compile-time configuration ------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "Features.h" +#include "clang/Basic/Version.h" +#include "llvm/Support/Compiler.h" + +namespace clang { +namespace clangd { + +std::string versionString() { return clang::getClangToolFullVersion("clangd"); } + +std::string featureString() { + return +#if defined(_WIN32) + "windows" +#elif defined(__APPLE__) + "mac" +#elif defined(__linux__) + "linux" +#elif defined(LLVM_ON_UNIX) + "unix" +#else + "unknown" +#endif + +#ifndef NDEBUG + "+debug" +#endif +#if LLVM_ADDRESS_SANITIZER_BUILD + "+asan" +#endif +#if LLVM_THREAD_SANITIZER_BUILD + "+tsan" +#endif +#if LLVM_MEMORY_SANITIZER_BUILD + "+msan" +#endif + +#if CLANGD_ENABLE_REMOTE + "+grpc" +#endif +#if CLANGD_BUILD_XPC + "+xpc" +#endif + ; +} + +} // namespace clangd +} // namespace clang diff --git a/clang-tools-extra/clangd/Features.h b/clang-tools-extra/clangd/Features.h new file mode 100644 index 0000000000000..6fa3618578632 --- /dev/null +++ b/clang-tools-extra/clangd/Features.h @@ -0,0 +1,29 @@ +//===--- Features.h - Compile-time configuration ------------------*-C++-*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_TOOLS_EXTRA_CLANGD_FEATURES_H +#define LLVM_CLANG_TOOLS_EXTRA_CLANGD_FEATURES_H +#include + +// Export constants like CLANGD_BUILD_XPC +#include "Features.inc" + +namespace clang { +namespace clangd { + +// Returns a version string for clangd, e.g. "clangd 10.0.0" +std::string versionString(); + +// Returns a string describing the compile-time configuration. +// e.g. mac+debug+asan+grpc +std::string featureString(); + +} // namespace clangd +} // namespace clang + +#endif diff --git a/clang-tools-extra/clangd/Features.inc.in b/clang-tools-extra/clangd/Features.inc.in index 5dfde58890b7e..72464d89b830e 100644 --- a/clang-tools-extra/clangd/Features.inc.in +++ b/clang-tools-extra/clangd/Features.inc.in @@ -1,3 +1,4 @@ +// IWYU pragma: private, include "Features.h" #define CLANGD_BUILD_XPC @CLANGD_BUILD_XPC@ #define CLANGD_ENABLE_REMOTE @CLANGD_ENABLE_REMOTE@ #define ENABLE_GRPC_REFLECTION @ENABLE_GRPC_REFLECTION@ diff --git a/clang-tools-extra/clangd/Hover.cpp b/clang-tools-extra/clangd/Hover.cpp index 8b14777173a0f..c71a8c40ce94a 100644 --- a/clang-tools-extra/clangd/Hover.cpp +++ b/clang-tools-extra/clangd/Hover.cpp @@ -28,6 +28,7 @@ #include "clang/AST/ExprCXX.h" #include "clang/AST/OperationKinds.h" #include "clang/AST/PrettyPrinter.h" +#include "clang/AST/RecordLayout.h" #include "clang/AST/RecursiveASTVisitor.h" #include "clang/AST/Type.h" #include "clang/Basic/SourceLocation.h" @@ -770,10 +771,30 @@ void addLayoutInfo(const NamedDecl &ND, HoverInfo &HI) { const auto *Record = FD->getParent(); if (Record) Record = Record->getDefinition(); - if (Record && !Record->isInvalidDecl() && !Record->isDependentType()) { - HI.Offset = Ctx.getFieldOffset(FD) / 8; - if (auto Size = Ctx.getTypeSizeInCharsIfKnown(FD->getType())) - HI.Size = Size->getQuantity(); + if (Record && !Record->isInvalidDecl() && !Record->isDependentType() && + !FD->isBitField()) { + const ASTRecordLayout &Layout = Ctx.getASTRecordLayout(Record); + HI.Offset = Layout.getFieldOffset(FD->getFieldIndex()) / 8; + if (auto Size = Ctx.getTypeSizeInCharsIfKnown(FD->getType())) { + HI.Size = FD->isZeroSize(Ctx) ? 0 : Size->getQuantity(); + unsigned EndOfField = *HI.Offset + *HI.Size; + + // Calculate padding following the field. + if (!Record->isUnion() && + FD->getFieldIndex() + 1 < Layout.getFieldCount()) { + // Measure padding up to the next class field. + unsigned NextOffset = + Layout.getFieldOffset(FD->getFieldIndex() + 1) / 8; + if (NextOffset >= EndOfField) // next field could be a bitfield! + HI.Padding = NextOffset - EndOfField; + } else { + // Measure padding up to the end of the object. + HI.Padding = Layout.getSize().getQuantity() - EndOfField; + } + } + // Offset in a union is always zero, so not really useful to report. + if (Record->isUnion()) + HI.Offset.reset(); } return; } @@ -1013,9 +1034,12 @@ markup::Document HoverInfo::present() const { Output.addParagraph().appendText( llvm::formatv("Offset: {0} byte{1}", *Offset, *Offset == 1 ? "" : "s") .str()); - if (Size) - Output.addParagraph().appendText( + if (Size) { + auto &P = Output.addParagraph().appendText( llvm::formatv("Size: {0} byte{1}", *Size, *Size == 1 ? "" : "s").str()); + if (Padding && *Padding != 0) + P.appendText(llvm::formatv(" (+{0} padding)", *Padding).str()); + } if (CalleeArgInfo) { assert(CallPassType); diff --git a/clang-tools-extra/clangd/Hover.h b/clang-tools-extra/clangd/Hover.h index 2f2afbf6723bf..44ee9b7d79797 100644 --- a/clang-tools-extra/clangd/Hover.h +++ b/clang-tools-extra/clangd/Hover.h @@ -77,6 +77,8 @@ struct HoverInfo { llvm::Optional Size; /// Contains the offset of fields within the enclosing class. llvm::Optional Offset; + /// Contains the padding following a field within the enclosing class. + llvm::Optional Padding; // Set when symbol is inside function call. Contains information extracted // from the callee definition about the argument this is passed as. llvm::Optional CalleeArgInfo; diff --git a/clang-tools-extra/clangd/InlayHints.cpp b/clang-tools-extra/clangd/InlayHints.cpp index c1a8357201e9c..1283aa4dd62cc 100644 --- a/clang-tools-extra/clangd/InlayHints.cpp +++ b/clang-tools-extra/clangd/InlayHints.cpp @@ -32,6 +32,14 @@ class InlayHintVisitor : public RecursiveASTVisitor { TypeHintPolicy.SuppressScope = true; // keep type names short TypeHintPolicy.AnonymousTagLocations = false; // do not print lambda locations + // Print canonical types. Otherwise, SuppressScope would result in + // things like "metafunction::type" being shorted to just "type", + // which is useless. This is particularly important for structured + // bindings that use the tuple_element protocol, where the non-canonical + // types would be "tuple_element::type". + // Note, for "auto", we would often prefer sugared types, but the AST + // doesn't currently retain them in DeducedType anyways. + TypeHintPolicy.PrintCanonicalTypes = true; } bool VisitCXXConstructExpr(CXXConstructExpr *E) { @@ -76,9 +84,8 @@ class InlayHintVisitor : public RecursiveASTVisitor { if (auto *AT = D->getReturnType()->getContainedAutoType()) { QualType Deduced = AT->getDeducedType(); if (!Deduced.isNull()) { - addInlayHint(D->getFunctionTypeLoc().getRParenLoc(), - InlayHintKind::TypeHint, - "-> " + D->getReturnType().getAsString(TypeHintPolicy)); + addTypeHint(D->getFunctionTypeLoc().getRParenLoc(), D->getReturnType(), + "-> "); } } @@ -86,10 +93,14 @@ class InlayHintVisitor : public RecursiveASTVisitor { } bool VisitVarDecl(VarDecl *D) { - // Do not show hints for the aggregate in a structured binding. - // In the future, we may show hints for the individual bindings. - if (isa(D)) + // Do not show hints for the aggregate in a structured binding, + // but show hints for the individual bindings. + if (auto *DD = dyn_cast(D)) { + for (auto *Binding : DD->bindings()) { + addTypeHint(Binding->getLocation(), Binding->getType(), ": "); + } return true; + } if (D->getType()->getContainedAutoType()) { if (!D->getType()->isDependentType()) { @@ -98,8 +109,7 @@ class InlayHintVisitor : public RecursiveASTVisitor { // (e.g. for `const auto& x = 42`, print `const int&`). // Alternatively, we could place the hint on the `auto` // (and then just print the type deduced for the `auto`). - addInlayHint(D->getLocation(), InlayHintKind::TypeHint, - ": " + D->getType().getAsString(TypeHintPolicy)); + addTypeHint(D->getLocation(), D->getType(), ": "); } } return true; @@ -311,6 +321,15 @@ class InlayHintVisitor : public RecursiveASTVisitor { Kind, Label.str()}); } + void addTypeHint(SourceRange R, QualType T, llvm::StringRef Prefix) { + // Do not print useless "NULL TYPE" hint. + if (!T.getTypePtrOrNull()) + return; + + addInlayHint(R, InlayHintKind::TypeHint, + std::string(Prefix) + T.getAsString(TypeHintPolicy)); + } + std::vector &Results; ASTContext &AST; FileID MainFileID; diff --git a/clang-tools-extra/clangd/ParsedAST.cpp b/clang-tools-extra/clangd/ParsedAST.cpp index 0d7e4631d6601..cb8ad5a8fa9ff 100644 --- a/clang-tools-extra/clangd/ParsedAST.cpp +++ b/clang-tools-extra/clangd/ParsedAST.cpp @@ -289,8 +289,15 @@ ParsedAST::build(llvm::StringRef Filename, const ParseInputs &Inputs, std::move(CI), PreamblePCH, llvm::MemoryBuffer::getMemBufferCopy(Inputs.Contents, Filename), VFS, ASTDiags); - if (!Clang) + if (!Clang) { + // The last diagnostic contains information about the reason of this + // failure. + std::vector Diags(ASTDiags.take()); + elog("Failed to prepare a compiler instance: {0}", + !Diags.empty() ? static_cast(Diags.back()).Message + : "unknown error"); return None; + } auto Action = std::make_unique(); const FrontendInputFile &MainInput = Clang->getFrontendOpts().Inputs[0]; diff --git a/clang-tools-extra/clangd/Preamble.cpp b/clang-tools-extra/clangd/Preamble.cpp index e003af6e0dfa5..9173dcda513a6 100644 --- a/clang-tools-extra/clangd/Preamble.cpp +++ b/clang-tools-extra/clangd/Preamble.cpp @@ -390,8 +390,8 @@ buildPreamble(PathRef FileName, CompilerInvocation CI, SerializedDeclsCollector.takeMacros(), std::move(StatCache), SerializedDeclsCollector.takeCanonicalIncludes()); } else { - elog("Could not build a preamble for file {0} version {1}", FileName, - Inputs.Version); + elog("Could not build a preamble for file {0} version {1}: {2}", FileName, + Inputs.Version, BuiltPreamble.getError().message()); return nullptr; } } diff --git a/clang-tools-extra/clangd/Selection.cpp b/clang-tools-extra/clangd/Selection.cpp index 017f4b22861b5..ad41dec9f20f8 100644 --- a/clang-tools-extra/clangd/Selection.cpp +++ b/clang-tools-extra/clangd/Selection.cpp @@ -57,6 +57,27 @@ void recordMetrics(const SelectionTree &S, const LangOptions &Lang) { SelectionUsedRecovery.record(0, LanguageLabel); // unused. } +SourceRange getSourceRange(const DynTypedNode &N) { + // MemberExprs to implicitly access anonymous fields should not claim any + // tokens for themselves. Given: + // struct A { struct { int b; }; }; + // The clang AST reports the following nodes for an access to b: + // A().b; + // [----] MemberExpr, base = A()., member = b + // [----] MemberExpr: base = A(), member = + // [-] CXXConstructExpr + // For our purposes, we don't want the second MemberExpr to own any tokens, + // so we reduce its range to match the CXXConstructExpr. + // (It's not clear that changing the clang AST would be correct in general). + if (const auto *ME = N.get()) { + if (!ME->getMemberDecl()->getDeclName()) + return ME->getBase() + ? getSourceRange(DynTypedNode::create(*ME->getBase())) + : SourceRange(); + } + return N.getSourceRange(); +} + // An IntervalSet maintains a set of disjoint subranges of an array. // // Initially, it contains the entire array. @@ -608,7 +629,7 @@ class SelectionVisitor : public RecursiveASTVisitor { // An optimization for a common case: nodes outside macro expansions that // don't intersect the selection may be recursively skipped. bool canSafelySkipNode(const DynTypedNode &N) { - SourceRange S = N.getSourceRange(); + SourceRange S = getSourceRange(N); if (auto *TL = N.get()) { // FIXME: TypeLoc::getBeginLoc()/getEndLoc() are pretty fragile // heuristics. We should consider only pruning critical TypeLoc nodes, to @@ -665,7 +686,7 @@ class SelectionVisitor : public RecursiveASTVisitor { void pop() { Node &N = *Stack.top(); dlog("{1}pop: {0}", printNodeToString(N.ASTNode, PrintPolicy), indent(-1)); - claimRange(N.ASTNode.getSourceRange(), N.Selected); + claimRange(getSourceRange(N.ASTNode), N.Selected); if (N.Selected == NoTokens) N.Selected = SelectionTree::Unselected; if (N.Selected || !N.Children.empty()) { @@ -868,13 +889,13 @@ const DeclContext &SelectionTree::Node::getDeclContext() const { const SelectionTree::Node &SelectionTree::Node::ignoreImplicit() const { if (Children.size() == 1 && - Children.front()->ASTNode.getSourceRange() == ASTNode.getSourceRange()) + getSourceRange(Children.front()->ASTNode) == getSourceRange(ASTNode)) return Children.front()->ignoreImplicit(); return *this; } const SelectionTree::Node &SelectionTree::Node::outerImplicit() const { - if (Parent && Parent->ASTNode.getSourceRange() == ASTNode.getSourceRange()) + if (Parent && getSourceRange(Parent->ASTNode) == getSourceRange(ASTNode)) return Parent->outerImplicit(); return *this; } diff --git a/clang-tools-extra/clangd/SemanticHighlighting.cpp b/clang-tools-extra/clangd/SemanticHighlighting.cpp index bb192596f8c52..b49eb785f2deb 100644 --- a/clang-tools-extra/clangd/SemanticHighlighting.cpp +++ b/clang-tools-extra/clangd/SemanticHighlighting.cpp @@ -556,6 +556,42 @@ class CollectExtraHighlightings return true; } + // Objective-C allows you to use property syntax `self.prop` as sugar for + // `[self prop]` and `[self setProp:]` when there's no explicit `@property` + // for `prop` as well as for class properties. We treat this like a property + // even though semantically it's equivalent to a method expression. + void highlightObjCImplicitPropertyRef(const ObjCMethodDecl *OMD, + SourceLocation Loc) { + auto &Tok = H.addToken(Loc, HighlightingKind::Field) + .addModifier(HighlightingModifier::ClassScope); + if (OMD->isClassMethod()) + Tok.addModifier(HighlightingModifier::Static); + if (isDefaultLibrary(OMD)) + Tok.addModifier(HighlightingModifier::DefaultLibrary); + } + + bool VisitObjCPropertyRefExpr(ObjCPropertyRefExpr *OPRE) { + // We need to handle implicit properties here since they will appear to + // reference `ObjCMethodDecl` via an implicit `ObjCMessageExpr`, so normal + // highlighting will not work. + if (!OPRE->isImplicitProperty()) + return true; + // A single property expr can reference both a getter and setter, but we can + // only provide a single semantic token, so prefer the getter. In most cases + // the end result should be the same, although it's technically possible + // that the user defines a setter for a system SDK. + if (OPRE->isMessagingGetter()) { + highlightObjCImplicitPropertyRef(OPRE->getImplicitPropertyGetter(), + OPRE->getLocation()); + return true; + } + if (OPRE->isMessagingSetter()) { + highlightObjCImplicitPropertyRef(OPRE->getImplicitPropertySetter(), + OPRE->getLocation()); + } + return true; + } + bool VisitOverloadExpr(OverloadExpr *E) { if (!E->decls().empty()) return true; // handled by findExplicitReferences. diff --git a/clang-tools-extra/clangd/TUScheduler.cpp b/clang-tools-extra/clangd/TUScheduler.cpp index 09c68a3a250ba..700d8264555f9 100644 --- a/clang-tools-extra/clangd/TUScheduler.cpp +++ b/clang-tools-extra/clangd/TUScheduler.cpp @@ -1380,11 +1380,13 @@ bool ASTWorker::blockUntilIdle(Deadline Timeout) const { }; // Make sure ASTWorker has processed all requests, which might issue new // updates to PreamblePeer. - WaitUntilASTWorkerIsIdle(); + if (!WaitUntilASTWorkerIsIdle()) + return false; // Now that ASTWorker processed all requests, ensure PreamblePeer has served // all update requests. This might create new PreambleRequests for the // ASTWorker. - PreamblePeer.blockUntilIdle(Timeout); + if (!PreamblePeer.blockUntilIdle(Timeout)) + return false; assert(Requests.empty() && "No new normal tasks can be scheduled concurrently with " "blockUntilIdle(): ASTWorker isn't threadsafe"); diff --git a/clang-tools-extra/clangd/Transport.h b/clang-tools-extra/clangd/Transport.h index ae6da722d91b1..b3db4eba85f93 100644 --- a/clang-tools-extra/clangd/Transport.h +++ b/clang-tools-extra/clangd/Transport.h @@ -18,6 +18,7 @@ #ifndef LLVM_CLANG_TOOLS_EXTRA_CLANGD_TRANSPORT_H_ #define LLVM_CLANG_TOOLS_EXTRA_CLANGD_TRANSPORT_H_ +#include "Features.h" #include "llvm/ADT/StringRef.h" #include "llvm/Support/JSON.h" #include "llvm/Support/raw_ostream.h" diff --git a/clang-tools-extra/clangd/benchmarks/CMakeLists.txt b/clang-tools-extra/clangd/benchmarks/CMakeLists.txt index b62ffd7a1ad16..b1bd26f2e5599 100644 --- a/clang-tools-extra/clangd/benchmarks/CMakeLists.txt +++ b/clang-tools-extra/clangd/benchmarks/CMakeLists.txt @@ -1,5 +1,3 @@ -include_directories(${CMAKE_CURRENT_SOURCE_DIR}/../) - add_subdirectory(CompletionModel) add_benchmark(IndexBenchmark IndexBenchmark.cpp) diff --git a/clang-tools-extra/clangd/benchmarks/CompletionModel/CMakeLists.txt b/clang-tools-extra/clangd/benchmarks/CompletionModel/CMakeLists.txt index 3998aa1225338..4c7cd779eb3e7 100644 --- a/clang-tools-extra/clangd/benchmarks/CompletionModel/CMakeLists.txt +++ b/clang-tools-extra/clangd/benchmarks/CompletionModel/CMakeLists.txt @@ -1,5 +1,3 @@ -include_directories(${CMAKE_CURRENT_SOURCE_DIR}/../) - add_benchmark(DecisionForestBenchmark DecisionForestBenchmark.cpp) target_link_libraries(DecisionForestBenchmark diff --git a/clang-tools-extra/clangd/fuzzer/CMakeLists.txt b/clang-tools-extra/clangd/fuzzer/CMakeLists.txt index 18cab4b41e1a0..5600a354decb3 100644 --- a/clang-tools-extra/clangd/fuzzer/CMakeLists.txt +++ b/clang-tools-extra/clangd/fuzzer/CMakeLists.txt @@ -1,6 +1,3 @@ -include_directories(${CMAKE_CURRENT_SOURCE_DIR}/.. - ${CMAKE_CURRENT_BINARY_DIR}/..) - set(LLVM_LINK_COMPONENTS FuzzMutate Support diff --git a/clang-tools-extra/clangd/index/dex/dexp/CMakeLists.txt b/clang-tools-extra/clangd/index/dex/dexp/CMakeLists.txt index 7b4b6e53a4ad0..4fe42cb8786f1 100644 --- a/clang-tools-extra/clangd/index/dex/dexp/CMakeLists.txt +++ b/clang-tools-extra/clangd/index/dex/dexp/CMakeLists.txt @@ -1,6 +1,3 @@ -include_directories(${CMAKE_CURRENT_SOURCE_DIR}/../../../) -include_directories(${CMAKE_CURRENT_BINARY_DIR}/../../../) - set(LLVM_LINK_COMPONENTS LineEditor Support diff --git a/clang-tools-extra/clangd/index/remote/CMakeLists.txt b/clang-tools-extra/clangd/index/remote/CMakeLists.txt index beae5be405e08..5bfc241945437 100644 --- a/clang-tools-extra/clangd/index/remote/CMakeLists.txt +++ b/clang-tools-extra/clangd/index/remote/CMakeLists.txt @@ -13,7 +13,6 @@ if (CLANGD_ENABLE_REMOTE) MonitoringServiceProto ) include_directories(${CMAKE_CURRENT_BINARY_DIR}) - include_directories(${CMAKE_CURRENT_SOURCE_DIR}/../../) # FIXME(kirillbobyrev): target_compile_definitions is not working with # add_clang_library for some reason. Is there any way to make this diff --git a/clang-tools-extra/clangd/index/remote/Client.cpp b/clang-tools-extra/clangd/index/remote/Client.cpp index b92c6520f61c0..ac6b7c0c829ff 100644 --- a/clang-tools-extra/clangd/index/remote/Client.cpp +++ b/clang-tools-extra/clangd/index/remote/Client.cpp @@ -9,12 +9,12 @@ #include #include "Client.h" +#include "Features.h" #include "Service.grpc.pb.h" #include "index/Index.h" #include "marshalling/Marshalling.h" #include "support/Logger.h" #include "support/Trace.h" -#include "clang/Basic/Version.h" #include "llvm/ADT/SmallString.h" #include "llvm/ADT/StringRef.h" #include "llvm/Support/Error.h" @@ -72,7 +72,8 @@ class IndexClient : public clangd::SymbolIndex { const auto RPCRequest = ProtobufMarshaller->toProtobuf(Request); SPAN_ATTACH(Tracer, "Request", RPCRequest.DebugString()); grpc::ClientContext Context; - Context.AddMetadata("version", clang::getClangToolFullVersion("clangd")); + Context.AddMetadata("version", versionString()); + Context.AddMetadata("features", featureString()); std::chrono::system_clock::time_point StartTime = std::chrono::system_clock::now(); auto Deadline = StartTime + DeadlineWaitingTime; diff --git a/clang-tools-extra/clangd/index/remote/server/Server.cpp b/clang-tools-extra/clangd/index/remote/server/Server.cpp index 04ad0b2a1936f..d2f96ba1a1b53 100644 --- a/clang-tools-extra/clangd/index/remote/server/Server.cpp +++ b/clang-tools-extra/clangd/index/remote/server/Server.cpp @@ -6,7 +6,7 @@ // //===----------------------------------------------------------------------===// -#include "Features.inc" +#include "Features.h" #include "Index.pb.h" #include "MonitoringService.grpc.pb.h" #include "MonitoringService.pb.h" diff --git a/clang-tools-extra/clangd/indexer/CMakeLists.txt b/clang-tools-extra/clangd/indexer/CMakeLists.txt index ff110693c7066..a9438008ea039 100644 --- a/clang-tools-extra/clangd/indexer/CMakeLists.txt +++ b/clang-tools-extra/clangd/indexer/CMakeLists.txt @@ -1,5 +1,3 @@ -include_directories(${CMAKE_CURRENT_SOURCE_DIR}/../) - set(LLVM_LINK_COMPONENTS Support ) diff --git a/clang-tools-extra/clangd/refactor/Tweak.h b/clang-tools-extra/clangd/refactor/Tweak.h index 60ee34d138d6b..5b2d9cc80d9fd 100644 --- a/clang-tools-extra/clangd/refactor/Tweak.h +++ b/clang-tools-extra/clangd/refactor/Tweak.h @@ -78,6 +78,9 @@ class Tweak { /// A message to be displayed to the user. llvm::Optional ShowMessage; FileEdits ApplyEdits; + /// Whether the edits should be formatted before presenting to the client. + /// Note that it applies to all files. + bool FormatEdits = true; static Effect showMessage(StringRef S) { Effect E; diff --git a/clang-tools-extra/clangd/support/CMakeLists.txt b/clang-tools-extra/clangd/support/CMakeLists.txt index fc7d7a28117b1..681505586ca9d 100644 --- a/clang-tools-extra/clangd/support/CMakeLists.txt +++ b/clang-tools-extra/clangd/support/CMakeLists.txt @@ -15,7 +15,6 @@ if(NOT HAVE_CXX_ATOMICS_WITHOUT_LIB OR NOT HAVE_CXX_ATOMICS64_WITHOUT_LIB) list(APPEND CLANGD_ATOMIC_LIB "atomic") endif() -include_directories(..) add_clang_library(clangdSupport Cancellation.cpp Context.cpp diff --git a/clang-tools-extra/clangd/support/Threading.h b/clang-tools-extra/clangd/support/Threading.h index da9e3b8ea8b68..7f4ef6c0b1cbe 100644 --- a/clang-tools-extra/clangd/support/Threading.h +++ b/clang-tools-extra/clangd/support/Threading.h @@ -12,6 +12,7 @@ #include "support/Context.h" #include "llvm/ADT/FunctionExtras.h" #include "llvm/ADT/Twine.h" +#include #include #include #include diff --git a/clang-tools-extra/clangd/tool/CMakeLists.txt b/clang-tools-extra/clangd/tool/CMakeLists.txt index da9d2060f7009..5a1556b813b59 100644 --- a/clang-tools-extra/clangd/tool/CMakeLists.txt +++ b/clang-tools-extra/clangd/tool/CMakeLists.txt @@ -1,6 +1,3 @@ -include_directories(${CMAKE_CURRENT_SOURCE_DIR}/..) -include_directories(${CMAKE_CURRENT_BINARY_DIR}/..) - add_clang_tool(clangd ClangdMain.cpp Check.cpp diff --git a/clang-tools-extra/clangd/tool/ClangdMain.cpp b/clang-tools-extra/clangd/tool/ClangdMain.cpp index 6d70a9cf03f6e..8db52c65061c8 100644 --- a/clang-tools-extra/clangd/tool/ClangdMain.cpp +++ b/clang-tools-extra/clangd/tool/ClangdMain.cpp @@ -10,7 +10,7 @@ #include "CodeComplete.h" #include "Config.h" #include "ConfigProvider.h" -#include "Features.inc" +#include "Features.h" #include "PathMapping.h" #include "Protocol.h" #include "TidyProvider.h" @@ -26,7 +26,6 @@ #include "support/Shutdown.h" #include "support/ThreadsafeFS.h" #include "support/Trace.h" -#include "clang/Basic/Version.h" #include "clang/Format/Format.h" #include "llvm/ADT/Optional.h" #include "llvm/ADT/SmallString.h" @@ -679,7 +678,8 @@ int main(int argc, char *argv[]) { llvm::sys::PrintStackTraceOnErrorSignal(argv[0]); llvm::sys::SetInterruptFunction(&requestShutdown); llvm::cl::SetVersionPrinter([](llvm::raw_ostream &OS) { - OS << clang::getClangToolFullVersion("clangd") << "\n"; + OS << versionString() << "\n" + << "Features: " << featureString() << "\n"; }); const char *FlagsEnvVar = "CLANGD_FLAGS"; const char *Overview = @@ -784,7 +784,8 @@ clangd accepts flags on the commandline, and in the CLANGD_FLAGS environment var StreamLogger Logger(llvm::errs(), LogLevel); LoggingSession LoggingSession(Logger); // Write some initial logs before we start doing any real work. - log("{0}", clang::getClangToolFullVersion("clangd")); + log("{0}", versionString()); + log("Features: {0}", featureString()); log("PID: {0}", llvm::sys::Process::getProcessId()); { SmallString<128> CWD; diff --git a/clang-tools-extra/clangd/unittests/CMakeLists.txt b/clang-tools-extra/clangd/unittests/CMakeLists.txt index 3a439b11e6322..2f5a754f882ae 100644 --- a/clang-tools-extra/clangd/unittests/CMakeLists.txt +++ b/clang-tools-extra/clangd/unittests/CMakeLists.txt @@ -4,15 +4,6 @@ set(LLVM_LINK_COMPONENTS FrontendOpenMP ) -get_filename_component(CLANGD_SOURCE_DIR - ${CMAKE_CURRENT_SOURCE_DIR}/../../clangd REALPATH) -get_filename_component(CLANGD_BINARY_DIR - ${CMAKE_CURRENT_BINARY_DIR}/../../clangd REALPATH) -include_directories( - ${CLANGD_SOURCE_DIR} - ${CLANGD_BINARY_DIR} - ) - if(CLANG_BUILT_STANDALONE) # LLVMTestingSupport library is needed for clangd tests. if (EXISTS ${LLVM_MAIN_SRC_DIR}/lib/Testing/Support diff --git a/clang-tools-extra/clangd/unittests/ClangdTests.cpp b/clang-tools-extra/clangd/unittests/ClangdTests.cpp index 49e1f7aa93b67..07f5da1fbc52f 100644 --- a/clang-tools-extra/clangd/unittests/ClangdTests.cpp +++ b/clang-tools-extra/clangd/unittests/ClangdTests.cpp @@ -18,12 +18,14 @@ #include "TestTU.h" #include "TidyProvider.h" #include "URI.h" +#include "refactor/Tweak.h" #include "support/MemoryTree.h" #include "support/Path.h" #include "support/Threading.h" #include "clang/Config/config.h" #include "clang/Sema/CodeCompleteConsumer.h" #include "clang/Tooling/ArgumentsAdjusters.h" +#include "clang/Tooling/Core/Replacement.h" #include "llvm/ADT/None.h" #include "llvm/ADT/Optional.h" #include "llvm/ADT/SmallVector.h" @@ -31,6 +33,7 @@ #include "llvm/ADT/StringRef.h" #include "llvm/Support/Allocator.h" #include "llvm/Support/Errc.h" +#include "llvm/Support/Error.h" #include "llvm/Support/Path.h" #include "llvm/Support/Regex.h" #include "llvm/Support/VirtualFileSystem.h" @@ -1259,6 +1262,60 @@ TEST(ClangdServer, MemoryUsageTest) { ASSERT_TRUE(MT.children().count("tuscheduler")); EXPECT_TRUE(MT.child("tuscheduler").children().count(FooCpp)); } + +TEST(ClangdServer, RespectsTweakFormatting) { + static constexpr const char *TweakID = "ModuleTweak"; + static constexpr const char *NewContents = "{not;\nformatted;}"; + + // Contributes a tweak that generates a non-formatted insertion and disables + // formatting. + struct TweakContributingModule final : public FeatureModule { + struct ModuleTweak final : public Tweak { + const char *id() const override { return TweakID; } + bool prepare(const Selection &Sel) override { return true; } + Expected apply(const Selection &Sel) override { + auto &SM = Sel.AST->getSourceManager(); + llvm::StringRef FilePath = SM.getFilename(Sel.Cursor); + tooling::Replacements Reps; + llvm::cantFail( + Reps.add(tooling::Replacement(FilePath, 0, 0, NewContents))); + auto E = llvm::cantFail(Effect::mainFileEdit(SM, std::move(Reps))); + E.FormatEdits = false; + return E; + } + std::string title() const override { return id(); } + llvm::StringLiteral kind() const override { + return llvm::StringLiteral(""); + }; + }; + + void contributeTweaks(std::vector> &Out) override { + Out.emplace_back(new ModuleTweak); + } + }; + + MockFS FS; + MockCompilationDatabase CDB; + auto Opts = ClangdServer::optsForTest(); + FeatureModuleSet Set; + Set.add(std::make_unique()); + Opts.FeatureModules = &Set; + ClangdServer Server(CDB, FS, Opts); + + auto FooCpp = testPath("foo.cpp"); + Server.addDocument(FooCpp, ""); + ASSERT_TRUE(Server.blockUntilIdleForTest()); + + // Ensure that disabled formatting is respected. + Notification N; + Server.applyTweak(FooCpp, {}, TweakID, [&](llvm::Expected E) { + ASSERT_TRUE(static_cast(E)); + EXPECT_THAT(llvm::cantFail(E->ApplyEdits.lookup(FooCpp).apply()), + NewContents); + N.notify(); + }); + N.wait(); +} } // namespace } // namespace clangd } // namespace clang diff --git a/clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp b/clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp index 381180381f36f..93b85d8c0b5dc 100644 --- a/clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp +++ b/clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp @@ -9,7 +9,7 @@ #include "Config.h" #include "ConfigFragment.h" #include "ConfigTesting.h" -#include "Features.inc" +#include "Features.h" #include "TestFS.h" #include "clang/Basic/DiagnosticSema.h" #include "llvm/ADT/None.h" diff --git a/clang-tools-extra/clangd/unittests/FindTargetTests.cpp b/clang-tools-extra/clangd/unittests/FindTargetTests.cpp index 67dcb574d500a..bccf98ee07ab4 100644 --- a/clang-tools-extra/clangd/unittests/FindTargetTests.cpp +++ b/clang-tools-extra/clangd/unittests/FindTargetTests.cpp @@ -464,7 +464,7 @@ TEST_F(TargetDeclTest, Concept) { )cpp"; EXPECT_DECLS( "ConceptSpecializationExpr", - {"template concept Fooable = requires (T t) { t.foo(); };"}); + {"template concept Fooable = requires (T t) { t.foo(); }"}); // trailing requires clause Code = R"cpp( @@ -475,7 +475,7 @@ TEST_F(TargetDeclTest, Concept) { void foo() requires [[Fooable]]; )cpp"; EXPECT_DECLS("ConceptSpecializationExpr", - {"template concept Fooable = true;"}); + {"template concept Fooable = true"}); // constrained-parameter Code = R"cpp( @@ -486,7 +486,7 @@ TEST_F(TargetDeclTest, Concept) { void bar(T t); )cpp"; EXPECT_DECLS("ConceptSpecializationExpr", - {"template concept Fooable = true;"}); + {"template concept Fooable = true"}); // partial-concept-id Code = R"cpp( @@ -497,7 +497,7 @@ TEST_F(TargetDeclTest, Concept) { void bar(T t); )cpp"; EXPECT_DECLS("ConceptSpecializationExpr", - {"template concept Fooable = true;"}); + {"template concept Fooable = true"}); } TEST_F(TargetDeclTest, FunctionTemplate) { diff --git a/clang-tools-extra/clangd/unittests/HoverTests.cpp b/clang-tools-extra/clangd/unittests/HoverTests.cpp index c2645b99926c3..9089a4859c144 100644 --- a/clang-tools-extra/clangd/unittests/HoverTests.cpp +++ b/clang-tools-extra/clangd/unittests/HoverTests.cpp @@ -68,8 +68,9 @@ TEST(Hover, Structured) { // Field {R"cpp( namespace ns1 { namespace ns2 { - struct Foo { + class Foo { char [[b^ar]]; + double y[2]; }; }} )cpp", @@ -82,6 +83,41 @@ TEST(Hover, Structured) { HI.Type = "char"; HI.Offset = 0; HI.Size = 1; + HI.Padding = 7; + HI.AccessSpecifier = "private"; + }}, + // Union field + {R"cpp( + union Foo { + char [[b^ar]]; + double y[2]; + }; + )cpp", + [](HoverInfo &HI) { + HI.NamespaceScope = ""; + HI.LocalScope = "Foo::"; + HI.Name = "bar"; + HI.Kind = index::SymbolKind::Field; + HI.Definition = "char bar"; + HI.Type = "char"; + HI.Size = 1; + HI.Padding = 15; + HI.AccessSpecifier = "public"; + }}, + // Bitfield + {R"cpp( + struct Foo { + int [[^x]] : 1; + int y : 1; + }; + )cpp", + [](HoverInfo &HI) { + HI.NamespaceScope = ""; + HI.LocalScope = "Foo::"; + HI.Name = "x"; + HI.Kind = index::SymbolKind::Field; + HI.Definition = "int x : 1"; + HI.Type = "int"; HI.AccessSpecifier = "public"; }}, // Local to class method. @@ -2558,13 +2594,14 @@ template class Foo {})", HI.Definition = "def"; HI.Size = 4; HI.Offset = 12; + HI.Padding = 4; }, R"(field foo Type: type Value = value Offset: 12 bytes -Size: 4 bytes +Size: 4 bytes (+4 padding) // In test::Bar def)", diff --git a/clang-tools-extra/clangd/unittests/InlayHintTests.cpp b/clang-tools-extra/clangd/unittests/InlayHintTests.cpp index 2c5597e17e2f0..1410ed115b6bf 100644 --- a/clang-tools-extra/clangd/unittests/InlayHintTests.cpp +++ b/clang-tools-extra/clangd/unittests/InlayHintTests.cpp @@ -461,19 +461,70 @@ TEST(TypeHints, Lambda) { ExpectedHint{": int", "init"}); } -TEST(TypeHints, StructuredBindings) { - // FIXME: Not handled yet. - // To handle it, we could print: - // - the aggregate type next to the 'auto', or - // - the individual types inside the brackets - // The latter is probably more useful. +// Structured bindings tests. +// Note, we hint the individual bindings, not the aggregate. + +TEST(TypeHints, StructuredBindings_PublicStruct) { assertTypeHints(R"cpp( + // Struct with public fields. struct Point { int x; int y; }; Point foo(); - auto [x, y] = foo(); + auto [$x[[x]], $y[[y]]] = foo(); + )cpp", + ExpectedHint{": int", "x"}, ExpectedHint{": int", "y"}); +} + +TEST(TypeHints, StructuredBindings_Array) { + assertTypeHints(R"cpp( + int arr[2]; + auto [$x[[x]], $y[[y]]] = arr; + )cpp", + ExpectedHint{": int", "x"}, ExpectedHint{": int", "y"}); +} + +TEST(TypeHints, StructuredBindings_TupleLike) { + assertTypeHints(R"cpp( + // Tuple-like type. + struct IntPair { + int a; + int b; + }; + namespace std { + template + struct tuple_size {}; + template <> + struct tuple_size { + constexpr static unsigned value = 2; + }; + template + struct tuple_element {}; + template + struct tuple_element { + using type = int; + }; + } + template + int get(const IntPair& p) { + if constexpr (I == 0) { + return p.a; + } else if constexpr (I == 1) { + return p.b; + } + } + IntPair bar(); + auto [$x[[x]], $y[[y]]] = bar(); + )cpp", + ExpectedHint{": int", "x"}, ExpectedHint{": int", "y"}); +} + +TEST(TypeHints, StructuredBindings_NoInitializer) { + assertTypeHints(R"cpp( + // No initializer (ill-formed). + // Do not show useless "NULL TYPE" hint. + auto [x, y]; /*error-ok*/ )cpp"); } diff --git a/clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp b/clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp index 02ab6bef0a817..a0212856427d6 100644 --- a/clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp +++ b/clang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp @@ -696,11 +696,16 @@ sizeof...($TemplateParameter[[Elements]]); int $Field_decl[[_someProperty]]; } @property(nonatomic, assign) int $Field_decl[[someProperty]]; + @property(readonly, class) $Class[[Foo]] *$Field_decl_readonly_static[[sharedInstance]]; @end @implementation $Class_decl[[Foo]] @synthesize someProperty = _someProperty; + - (int)$Method_decl[[otherMethod]] { + return 0; + } - (int)$Method_decl[[doSomething]] { - self.$Field[[someProperty]] = self.$Field[[someProperty]] + 1; + $Class[[Foo]].$Field_static[[sharedInstance]].$Field[[someProperty]] = 1; + self.$Field[[someProperty]] = self.$Field[[someProperty]] + self.$Field[[otherMethod]] + 1; self->$Field[[_someProperty]] = $Field[[_someProperty]] + 1; } @end diff --git a/clang-tools-extra/clangd/unittests/XRefsTests.cpp b/clang-tools-extra/clangd/unittests/XRefsTests.cpp index 8c37532507d45..166e0674afea6 100644 --- a/clang-tools-extra/clangd/unittests/XRefsTests.cpp +++ b/clang-tools-extra/clangd/unittests/XRefsTests.cpp @@ -420,6 +420,18 @@ TEST(LocateSymbol, All) { // $def is the definition location (if absent, symbol has no definition) // unnamed range becomes both $decl and $def. const char *Tests[] = { + R"cpp( + struct X { + union { + int [[a]]; + float b; + }; + }; + int test(X &x) { + return x.^a; + } + )cpp", + R"cpp(// Local variable int main() { int [[bonjour]]; diff --git a/clang-tools-extra/clangd/unittests/xpc/CMakeLists.txt b/clang-tools-extra/clangd/unittests/xpc/CMakeLists.txt index 21a1667b52d37..ac04c3f4aed66 100644 --- a/clang-tools-extra/clangd/unittests/xpc/CMakeLists.txt +++ b/clang-tools-extra/clangd/unittests/xpc/CMakeLists.txt @@ -2,12 +2,6 @@ set(LLVM_LINK_COMPONENTS support ) -get_filename_component(CLANGD_SOURCE_DIR - ${CMAKE_CURRENT_SOURCE_DIR}/../../clangd REALPATH) -include_directories( - ${CLANGD_SOURCE_DIR} - ) - add_custom_target(ClangdXpcUnitTests) add_unittest(ClangdXpcUnitTests ClangdXpcTests ConversionTests.cpp diff --git a/clang-tools-extra/clangd/xpc/CMakeLists.txt b/clang-tools-extra/clangd/xpc/CMakeLists.txt index df8c361817a84..5ccdf2f5d06a5 100644 --- a/clang-tools-extra/clangd/xpc/CMakeLists.txt +++ b/clang-tools-extra/clangd/xpc/CMakeLists.txt @@ -7,10 +7,6 @@ include(CreateClangdXPCFramework) add_subdirectory(framework) add_subdirectory(test-client) -include_directories( - ${CMAKE_CURRENT_SOURCE_DIR}/../ -) - set(LLVM_LINK_COMPONENTS Support ) diff --git a/clang-tools-extra/clangd/xpc/test-client/CMakeLists.txt b/clang-tools-extra/clangd/xpc/test-client/CMakeLists.txt index 1bf01c63d7224..94477e3bc57e6 100644 --- a/clang-tools-extra/clangd/xpc/test-client/CMakeLists.txt +++ b/clang-tools-extra/clangd/xpc/test-client/CMakeLists.txt @@ -1,7 +1,3 @@ -include_directories( - ${CMAKE_CURRENT_SOURCE_DIR}/../../ -) - add_clang_tool( clangd-xpc-test-client ClangdXPCTestClient.cpp diff --git a/clang-tools-extra/docs/ReleaseNotes.rst b/clang-tools-extra/docs/ReleaseNotes.rst index 28cb3b2c55529..e9b186a81b391 100644 --- a/clang-tools-extra/docs/ReleaseNotes.rst +++ b/clang-tools-extra/docs/ReleaseNotes.rst @@ -108,6 +108,13 @@ New checks Finds inner loops that have not been unrolled, as well as fully unrolled loops with unknown loops bounds or a large number of iterations. +- New :doc:`bugprone-easily-swappable-parameters + ` check. + + Finds function definitions where parameters of convertible types follow each + other directly, making call sites prone to calling the function with + swapped (or badly ordered) arguments. + - New :doc:`cppcoreguidelines-prefer-member-initializer ` check. diff --git a/clang-tools-extra/docs/clang-tidy/checks/bugprone-easily-swappable-parameters.rst b/clang-tools-extra/docs/clang-tidy/checks/bugprone-easily-swappable-parameters.rst new file mode 100644 index 0000000000000..5ea635766e5bc --- /dev/null +++ b/clang-tools-extra/docs/clang-tidy/checks/bugprone-easily-swappable-parameters.rst @@ -0,0 +1,276 @@ +.. title:: clang-tidy - bugprone-easily-swappable-parameters + +bugprone-easily-swappable-parameters +==================================== + +Finds function definitions where parameters of convertible types follow each +other directly, making call sites prone to calling the function with +swapped (or badly ordered) arguments. + +.. code-block:: c++ + + void drawPoint(int X, int Y) { /* ... */ } + FILE *open(const char *Dir, const char *Name, Flags Mode) { /* ... */ } + +A potential call like ``drawPoint(-2, 5)`` or ``openPath("a.txt", "tmp", Read)`` +is perfectly legal from the language's perspective, but might not be what the +developer of the function intended. + +More elaborate and type-safe constructs, such as opaque typedefs or strong +types should be used instead, to prevent a mistaken order of arguments. + +.. code-block:: c++ + + struct Coord2D { int X; int Y; }; + void drawPoint(const Coord2D Pos) { /* ... */ } + + FILE *open(const Path &Dir, const Filename &Name, Flags Mode) { /* ... */ } + +Due to the potentially elaborate refactoring and API-breaking that is necessary +to strengthen the type safety of a project, no automatic fix-its are offered. + +Options +------- + +Extension/relaxation options +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Relaxation (or extension) options can be used to broaden the scope of the +analysis and fine-tune the enabling of more mixes between types. +Some mixes may depend on coding style or preference specific to a project, +however, it should be noted that enabling *all* of these relaxations model the +way of mixing at call sites the most. +These options are expected to make the check report for more functions, and +report longer mixable ranges. + +.. option:: QualifiersMix + + Whether to consider parameters of some *cvr-qualified* ``T`` and a + differently *cvr-qualified* ``T`` (i.e. ``T`` and ``const T``, ``const T`` + and ``volatile T``, etc.) mixable between one another. + If `false`, the check will consider differently qualified types unmixable. + `True` turns the warnings on. + Defaults to `false`. + + The following example produces a diagnostic only if `QualifiersMix` is + enabled: + + .. code-block:: c++ + + void *memcpy(const void *Destination, void *Source, std::size_t N) { /* ... */ } + +.. option:: ModelImplicitConversions + + Whether to consider parameters of type ``T`` and ``U`` mixable if there + exists an implicit conversion from ``T`` to ``U`` and ``U`` to ``T``. + If `false`, the check will not consider implicitly convertible types for + mixability. + `True` turns warnings for implicit conversions on. + Defaults to `true`. + + The following examples produce a diagnostic only if + `ModelImplicitConversions` is enabled: + + .. code-block:: c++ + + void fun(int Int, double Double) { /* ... */ } + void compare(const char *CharBuf, std::string String) { /* ... */ } + + .. note:: + + Changing the qualifiers of an expression's type (e.g. from ``int`` to + ``const int``) is defined as an *implicit conversion* in the C++ + Standard. + However, the check separates this decision-making on the mixability of + differently qualified types based on whether `QualifiersMix` was + enabled. + + For example, the following code snippet will only produce a diagnostic + if **both** `QualifiersMix` and `ModelImplicitConversions` are enabled: + + .. code-block:: c++ + + void fun2(int Int, const double Double) { /* ... */ } + +Filtering options +^^^^^^^^^^^^^^^^^ + +Filtering options can be used to lessen the size of the diagnostics emitted by +the checker, whether the aim is to ignore certain constructs or dampen the +noisiness. + +.. option:: MinimumLength + + The minimum length required from an adjacent parameter sequence to be + diagnosed. + Defaults to `2`. + Might be any positive integer greater or equal to `2`. + If `0` or `1` is given, the default value `2` will be used instead. + + For example, if `3` is specified, the examples above will not be matched. + +.. option:: IgnoredParameterNames + + The list of parameter **names** that should never be considered part of a + swappable adjacent parameter sequence. + The value is a `;`-separated list of names. + To ignore unnamed parameters, add `""` to the list verbatim (not the + empty string, but the two quotes, potentially escaped!). + **This options is case-sensitive!** + + By default, the following parameter names, and their Uppercase-initial + variants are ignored: + `""` (unnamed parameters), `iterator`, `begin`, `end`, `first`, `last`, + `lhs`, `rhs`. + +.. option:: IgnoredParameterTypeSuffixes + + The list of parameter **type name suffixes** that should never be + considered part of a swappable adjacent parameter sequence. + Parameters which type, as written in the source code, end with an element + of this option will be ignored. + The value is a `;`-separated list of names. + **This option is case-sensitive!** + + By default, the following, and their lowercase-initial variants are ignored: + `bool`, `It`, `Iterator`, `InputIt`, `ForwardIt`, `BidirIt`, `RandomIt`, + `random_iterator`, `ReverseIt`, `reverse_iterator`, + `reverse_const_iterator`, `RandomIt`, `random_iterator`, `ReverseIt`, + `reverse_iterator`, `reverse_const_iterator`, `Const_Iterator`, + `ConstIterator`, `const_reverse_iterator`, `ConstReverseIterator`. + In addition, `_Bool` (but not `_bool`) is also part of the default value. + +.. option:: SuppressParametersUsedTogether + + Suppresses diagnostics about parameters that are used together or in a + similar fashion inside the function's body. + Defaults to `true`. + Specifying `false` will turn off the heuristics. + + Currently, the following heuristics are implemented which will suppress the + warning about the parameter pair involved: + + * The parameters are used in the same expression, e.g. ``f(a, b)`` or + ``a < b``. + * The parameters are further passed to the same function to the same + parameter of that function, of the same overload. + E.g. ``f(a, 1)`` and ``f(b, 2)`` to some ``f(T, int)``. + + .. note:: + + The check does not perform path-sensitive analysis, and as such, + "same function" in this context means the same function declaration. + If the same member function of a type on two distinct instances are + called with the parameters, it will still be regarded as + "same function". + + * The same member field is accessed, or member method is called of the + two parameters, e.g. ``a.foo()`` and ``b.foo()``. + * Separate ``return`` statements return either of the parameters on + different code paths. + +.. option:: NamePrefixSuffixSilenceDissimilarityTreshold + + The number of characters two parameter names might be different on *either* + the head or the tail end with the rest of the name the same so that the + warning about the two parameters are silenced. + Defaults to `1`. + Might be any positive integer. + If `0`, the filtering heuristic based on the parameters' names is turned + off. + + This option can be used to silence warnings about parameters where the + naming scheme indicates that the order of those parameters do not matter. + + For example, the parameters ``LHS`` and ``RHS`` are 1-dissimilar suffixes + of each other: ``L`` and ``R`` is the different character, while ``HS`` + is the common suffix. + Similarly, parameters ``text1, text2, text3`` are 1-dissimilar prefixes + of each other, with the numbers at the end being the dissimilar part. + If the value is at least `1`, such cases will not be reported. + + +Limitations +----------- + +**This check is designed to check function signatures!** + +The check does not investigate functions that are generated by the compiler +in a context that is only determined from a call site. +These cases include variadic functions, functions in C code that do not have +an argument list, and C++ template instantiations. +Most of these cases, which are otherwise swappable from a caller's standpoint, +have no way of getting "fixed" at the definition point. +In the case of C++ templates, only primary template definitions and explicit +specialisations are matched and analysed. + +None of the following cases produce a diagnostic: + +.. code-block:: c++ + + int printf(const char *Format, ...) { /* ... */ } + int someOldCFunction() { /* ... */ } + + template + int add(T X, U Y) { return X + Y }; + + void theseAreNotWarnedAbout() { + printf("%d %d\n", 1, 2); // Two ints passed, they could be swapped. + someOldCFunction(1, 2, 3); // Similarly, multiple ints passed. + + add(1, 2); // Instantiates 'add', but that's not a user-defined function. + } + +Due to the limitation above, parameters which type are further dependent upon +template instantiations to *prove* that they mix with another parameter's is +not diagnosed. + +.. code-block:: c++ + + template + struct Vector { + typedef T element_type; + }; + + // Diagnosed: Explicit instantiation was done by the user, we can prove it + // is the same type. + void instantiated(int A, Vector::element_type B) { /* ... */ } + + // Diagnosed: The two parameter types are exactly the same. + template + void exact(typename Vector::element_type A, + typename Vector::element_type B) { /* ... */ } + + // Skipped: The two parameters are both 'T' but we can not prove this + // without actually instantiating. + template + void falseNegative(T A, typename Vector::element_type B) { /* ... */ } + +In the context of *implicit conversions* (when `ModelImplicitConversions` is +enabled), the modelling performed by the check +warns if the parameters are swappable and the swapped order matches implicit +conversions. +It does not model whether there exists an unrelated third type from which +*both* parameters can be given in a function call. +This means that in the following example, even while ``strs()`` clearly carries +the possibility to be called with swapped arguments (as long as the arguments +are string literals), will not be warned about. + +.. code-block:: c++ + + struct String { + String(const char *Buf); + }; + + struct StringView { + StringView(const char *Buf); + operator const char *() const; + }; + + // Skipped: Directly swapping expressions of the two type cannot mix. + // (Note: StringView -> const char * -> String would be **two** + // user-defined conversions, which is disallowed by the language.) + void strs(String Str, StringView SV) { /* ... */ } + + // Diagnosed: StringView implicitly converts to and from a buffer. + void cStr(StringView SV, const char *Buf() { /* ... */ } diff --git a/clang-tools-extra/docs/clang-tidy/checks/list.rst b/clang-tools-extra/docs/clang-tidy/checks/list.rst index 913c7fde26a56..83ec376c401f0 100644 --- a/clang-tools-extra/docs/clang-tidy/checks/list.rst +++ b/clang-tools-extra/docs/clang-tidy/checks/list.rst @@ -59,6 +59,7 @@ Clang-Tidy Checks `bugprone-copy-constructor-init `_, "Yes" `bugprone-dangling-handle `_, `bugprone-dynamic-static-initializers `_, + `bugprone-easily-swappable-parameters `_, `bugprone-exception-escape `_, `bugprone-fold-init-type `_, `bugprone-forward-declaration-namespace `_, diff --git a/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-ignore.cpp b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-ignore.cpp new file mode 100644 index 0000000000000..d10e367007d27 --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-ignore.cpp @@ -0,0 +1,37 @@ +// RUN: %check_clang_tidy %s bugprone-easily-swappable-parameters %t \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: bugprone-easily-swappable-parameters.MinimumLength, value: 2}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterNames, value: "\"\";Foo;Bar"}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterTypeSuffixes, value: "T"}, \ +// RUN: {key: bugprone-easily-swappable-parameters.QualifiersMix, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.ModelImplicitConversions, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.SuppressParametersUsedTogether, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.NamePrefixSuffixSilenceDissimilarityTreshold, value: 0} \ +// RUN: ]}' -- + +void ignoredUnnamed(int I, int, int) {} // NO-WARN: No >= 2 length of non-unnamed. + +void nothingIgnored(int I, int J) {} +// CHECK-MESSAGES: :[[@LINE-1]]:21: warning: 2 adjacent parameters of 'nothingIgnored' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters] +// CHECK-MESSAGES: :[[@LINE-2]]:25: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:32: note: the last parameter in the range is 'J' + +void ignoredParameter(int Foo, int I, int J) {} +// CHECK-MESSAGES: :[[@LINE-1]]:32: warning: 2 adjacent parameters of 'ignoredParameter' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-2]]:36: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:43: note: the last parameter in the range is 'J' + +void ignoredParameterBoth(int Foo, int Bar) {} // NO-WARN. + +struct S {}; +struct T {}; +struct MyT {}; + +void notIgnoredType(S S1, S S2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:21: warning: 2 adjacent parameters of 'notIgnoredType' of similar type ('S') +// CHECK-MESSAGES: :[[@LINE-2]]:23: note: the first parameter in the range is 'S1' +// CHECK-MESSAGES: :[[@LINE-3]]:29: note: the last parameter in the range is 'S2' + +void ignoredTypeExact(T T1, T T2) {} // NO-WARN. + +void ignoredTypeSuffix(MyT M1, MyT M2) {} // NO-WARN. diff --git a/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-implicit-qualifiers.cpp b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-implicit-qualifiers.cpp new file mode 100644 index 0000000000000..a3b33822268d9 --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-implicit-qualifiers.cpp @@ -0,0 +1,17 @@ +// RUN: %check_clang_tidy %s bugprone-easily-swappable-parameters %t \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: bugprone-easily-swappable-parameters.MinimumLength, value: 2}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterNames, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterTypeSuffixes, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.QualifiersMix, value: 1}, \ +// RUN: {key: bugprone-easily-swappable-parameters.ModelImplicitConversions, value: 1}, \ +// RUN: {key: bugprone-easily-swappable-parameters.SuppressParametersUsedTogether, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.NamePrefixSuffixSilenceDissimilarityTreshold, value: 0} \ +// RUN: ]}' -- + +void numericAndQualifierConversion(int I, const double CD) { numericAndQualifierConversion(CD, I); } +// CHECK-MESSAGES: :[[@LINE-1]]:36: warning: 2 adjacent parameters of 'numericAndQualifierConversion' of convertible types are easily swapped by mistake [bugprone-easily-swappable-parameters] +// CHECK-MESSAGES: :[[@LINE-2]]:40: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:56: note: the last parameter in the range is 'CD' +// CHECK-MESSAGES: :[[@LINE-4]]:43: note: 'int' and 'const double' parameters accept and bind the same kind of values +// CHECK-MESSAGES: :[[@LINE-5]]:43: note: 'int' and 'const double' may be implicitly converted: 'int' -> 'const double' (as 'double'), 'const double' (as 'double') -> 'int' diff --git a/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-implicits.c b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-implicits.c new file mode 100644 index 0000000000000..b7d92ce43f64b --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-implicits.c @@ -0,0 +1,77 @@ +// RUN: %check_clang_tidy %s bugprone-easily-swappable-parameters %t \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: bugprone-easily-swappable-parameters.MinimumLength, value: 2}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterNames, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterTypeSuffixes, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.QualifiersMix, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.ModelImplicitConversions, value: 1}, \ +// RUN: {key: bugprone-easily-swappable-parameters.SuppressParametersUsedTogether, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.NamePrefixSuffixSilenceDissimilarityTreshold, value: 0} \ +// RUN: ]}' -- + +void implicitDoesntBreakOtherStuff(int A, int B) {} +// CHECK-MESSAGES: :[[@LINE-1]]:36: warning: 2 adjacent parameters of 'implicitDoesntBreakOtherStuff' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters] +// CHECK-MESSAGES: :[[@LINE-2]]:40: note: the first parameter in the range is 'A' +// CHECK-MESSAGES: :[[@LINE-3]]:47: note: the last parameter in the range is 'B' + +void arrayAndPtr1(int *IP, int IA[]) { arrayAndPtr1(IA, IP); } +// CHECK-MESSAGES: :[[@LINE-1]]:19: warning: 2 adjacent parameters of 'arrayAndPtr1' of similar type ('int *') +// CHECK-MESSAGES: :[[@LINE-2]]:24: note: the first parameter in the range is 'IP' +// CHECK-MESSAGES: :[[@LINE-3]]:32: note: the last parameter in the range is 'IA' + +void arrayAndPtr2(int *IP, int IA[8]) { arrayAndPtr2(IA, IP); } +// CHECK-MESSAGES: :[[@LINE-1]]:19: warning: 2 adjacent parameters of 'arrayAndPtr2' of similar type ('int *') +// CHECK-MESSAGES: :[[@LINE-2]]:24: note: the first parameter in the range is 'IP' +// CHECK-MESSAGES: :[[@LINE-3]]:32: note: the last parameter in the range is 'IA' + +void arrayAndElement(int I, int IA[]) {} // NO-WARN. + +void numericConversion1(int I, double D) { numericConversion1(D, I); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'numericConversion1' of convertible types are easily swapped by mistake [bugprone-easily-swappable-parameters] +// CHECK-MESSAGES: :[[@LINE-2]]:29: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:39: note: the last parameter in the range is 'D' +// CHECK-MESSAGES: :[[@LINE-4]]:32: note: 'int' and 'double' may be implicitly converted{{$}} + +void numericConversion2(int I, short S) { numericConversion2(S, I); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'numericConversion2' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:29: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:38: note: the last parameter in the range is 'S' +// CHECK-MESSAGES: :[[@LINE-4]]:32: note: 'int' and 'short' may be implicitly converted{{$}} + +void numericConversion3(float F, unsigned long UL) { numericConversion3(UL, F); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'numericConversion3' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:31: note: the first parameter in the range is 'F' +// CHECK-MESSAGES: :[[@LINE-3]]:48: note: the last parameter in the range is 'UL' +// CHECK-MESSAGES: :[[@LINE-4]]:34: note: 'float' and 'unsigned long' may be implicitly converted{{$}} + +enum Unscoped { U_A, + U_B }; +enum UnscopedFixed : char { UF_A, + UF_B }; + +void numericConversion4(int I, enum Unscoped U) { numericConversion4(U, I); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'numericConversion4' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:29: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:46: note: the last parameter in the range is 'U' +// CHECK-MESSAGES: :[[@LINE-4]]:32: note: 'int' and 'enum Unscoped' may be implicitly converted{{$}} + +void numericConversion5(int I, enum UnscopedFixed UF) { numericConversion5(UF, I); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'numericConversion5' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:29: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:51: note: the last parameter in the range is 'UF' +// CHECK-MESSAGES: :[[@LINE-4]]:32: note: 'int' and 'enum UnscopedFixed' may be implicitly converted{{$}} + +void numericConversion7(double D, enum Unscoped U) { numericConversion7(U, D); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'numericConversion7' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:32: note: the first parameter in the range is 'D' +// CHECK-MESSAGES: :[[@LINE-3]]:49: note: the last parameter in the range is 'U' +// CHECK-MESSAGES: :[[@LINE-4]]:35: note: 'double' and 'enum Unscoped' may be implicitly converted{{$}} + +void numericConversion8(double D, enum UnscopedFixed UF) { numericConversion8(UF, D); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'numericConversion8' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:32: note: the first parameter in the range is 'D' +// CHECK-MESSAGES: :[[@LINE-3]]:54: note: the last parameter in the range is 'UF' +// CHECK-MESSAGES: :[[@LINE-4]]:35: note: 'double' and 'enum UnscopedFixed' may be implicitly converted{{$}} + +void pointeeConverison(int *IP, double *DP) { pointeeConversion(DP, IP); } +// NO-WARN: Even though this is possible in C, a swap is diagnosed by the compiler. diff --git a/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-implicits.cpp b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-implicits.cpp new file mode 100644 index 0000000000000..c1a72d687b135 --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-implicits.cpp @@ -0,0 +1,305 @@ +// RUN: %check_clang_tidy -std=c++17 %s bugprone-easily-swappable-parameters %t \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: bugprone-easily-swappable-parameters.MinimumLength, value: 2}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterNames, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterTypeSuffixes, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.QualifiersMix, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.ModelImplicitConversions, value: 1}, \ +// RUN: {key: bugprone-easily-swappable-parameters.SuppressParametersUsedTogether, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.NamePrefixSuffixSilenceDissimilarityTreshold, value: 0} \ +// RUN: ]}' -- + +void implicitDoesntBreakOtherStuff(int A, int B) {} +// CHECK-MESSAGES: :[[@LINE-1]]:36: warning: 2 adjacent parameters of 'implicitDoesntBreakOtherStuff' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters] +// CHECK-MESSAGES: :[[@LINE-2]]:40: note: the first parameter in the range is 'A' +// CHECK-MESSAGES: :[[@LINE-3]]:47: note: the last parameter in the range is 'B' + +void arrayAndPtr1(int *IP, int IA[]) { arrayAndPtr1(IA, IP); } +// CHECK-MESSAGES: :[[@LINE-1]]:19: warning: 2 adjacent parameters of 'arrayAndPtr1' of similar type ('int *') +// CHECK-MESSAGES: :[[@LINE-2]]:24: note: the first parameter in the range is 'IP' +// CHECK-MESSAGES: :[[@LINE-3]]:32: note: the last parameter in the range is 'IA' + +void arrayAndPtr2(int *IP, int IA[8]) { arrayAndPtr2(IA, IP); } +// CHECK-MESSAGES: :[[@LINE-1]]:19: warning: 2 adjacent parameters of 'arrayAndPtr2' of similar type ('int *') +// CHECK-MESSAGES: :[[@LINE-2]]:24: note: the first parameter in the range is 'IP' +// CHECK-MESSAGES: :[[@LINE-3]]:32: note: the last parameter in the range is 'IA' + +void arrayAndElement(int I, int IA[]) {} // NO-WARN. + +void numericConversion1(int I, double D) { numericConversion1(D, I); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'numericConversion1' of convertible types are easily swapped by mistake [bugprone-easily-swappable-parameters] +// CHECK-MESSAGES: :[[@LINE-2]]:29: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:39: note: the last parameter in the range is 'D' +// CHECK-MESSAGES: :[[@LINE-4]]:32: note: 'int' and 'double' may be implicitly converted{{$}} + +void numericConversion2(int I, short S) { numericConversion2(S, I); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'numericConversion2' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:29: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:38: note: the last parameter in the range is 'S' +// CHECK-MESSAGES: :[[@LINE-4]]:32: note: 'int' and 'short' may be implicitly converted{{$}} + +void numericConversion3(float F, unsigned long long ULL) { numericConversion3(ULL, F); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'numericConversion3' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:31: note: the first parameter in the range is 'F' +// CHECK-MESSAGES: :[[@LINE-3]]:53: note: the last parameter in the range is 'ULL' +// CHECK-MESSAGES: :[[@LINE-4]]:34: note: 'float' and 'unsigned long long' may be implicitly converted{{$}} + +enum Unscoped { U_A, + U_B }; +enum UnscopedFixed : char { UF_A, + UF_B }; +enum struct Scoped { A, + B }; + +void numericConversion4(int I, Unscoped U) {} // NO-WARN. + +void numericConversion5(int I, UnscopedFixed UF) {} // NO-WARN. + +void numericConversion6(int I, Scoped S) {} // NO-WARN. + +void numericConversion7(double D, Unscoped U) {} // NO-WARN. + +void numericConversion8(double D, UnscopedFixed UF) {} // NO-WARN. + +void numericConversion9(double D, Scoped S) {} // NO-WARN. + +void numericConversionMultiUnique(int I, double D1, double D2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:35: warning: 3 adjacent parameters of 'numericConversionMultiUnique' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:39: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:60: note: the last parameter in the range is 'D2' +// CHECK-MESSAGES: :[[@LINE-4]]:42: note: 'int' and 'double' may be implicitly converted{{$}} +// (Note: int<->double conversion for I<->D2 not diagnosed again.) + +typedef int MyInt; +using MyDouble = double; + +void numericConversion10(MyInt MI, MyDouble MD) { numericConversion10(MD, MI); } +// CHECK-MESSAGES: :[[@LINE-1]]:26: warning: 2 adjacent parameters of 'numericConversion10' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:32: note: the first parameter in the range is 'MI' +// CHECK-MESSAGES: :[[@LINE-3]]:45: note: the last parameter in the range is 'MD' +// CHECK-MESSAGES: :[[@LINE-4]]:36: note: 'MyInt' and 'MyDouble' may be implicitly converted: 'MyInt' (as 'int') -> 'MyDouble' (as 'double'), 'MyDouble' (as 'double') -> 'MyInt' (as 'int') + +void numericAndQualifierConversion(int I, const double CD) { numericAndQualifierConversion(CD, I); } +// NO-WARN: Qualifier mixing is handled by a different check option. + +struct FromInt { + FromInt(int); +}; + +void oneWayConversion1(int I, FromInt FI) {} // NO-WARN: One-way. + +struct AmbiguousConvCtor { + AmbiguousConvCtor(int); + AmbiguousConvCtor(double); +}; + +void ambiguous1(long L, AmbiguousConvCtor ACC) {} // NO-WARN: Ambiguous, one-way. + +struct ToInt { + operator int() const; +}; + +void oneWayConversion2(ToInt TI, int I) {} // NO-WARN: One-way. + +struct AmbiguousConvOp { + operator int() const; + operator double() const; +}; + +void ambiguous2(AmbiguousConvOp ACO, long L) {} // NO-WARN: Ambiguous, one-way. + +struct AmbiguousEverything1; +struct AmbiguousEverything2; +struct AmbiguousEverything1 { + AmbiguousEverything1(); + AmbiguousEverything1(AmbiguousEverything2); + operator AmbiguousEverything2() const; +}; +struct AmbiguousEverything2 { + AmbiguousEverything2(); + AmbiguousEverything2(AmbiguousEverything1); + operator AmbiguousEverything1() const; +}; + +void ambiguous3(AmbiguousEverything1 AE1, AmbiguousEverything2 AE2) {} // NO-WARN: Ambiguous. + +struct Integer { + Integer(int); + operator int() const; +}; + +void userDefinedConversion1(int I1, Integer I2) { userDefinedConversion1(I2, I1); } +// CHECK-MESSAGES: :[[@LINE-1]]:29: warning: 2 adjacent parameters of 'userDefinedConversion1' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:33: note: the first parameter in the range is 'I1' +// CHECK-MESSAGES: :[[@LINE-3]]:45: note: the last parameter in the range is 'I2' +// CHECK-MESSAGES: :[[@LINE-4]]:37: note: 'int' and 'Integer' may be implicitly converted{{$}} +// CHECK-MESSAGES: :[[@LINE-9]]:3: note: the implicit conversion involves the converting constructor declared here +// CHECK-MESSAGES: :[[@LINE-9]]:3: note: the implicit conversion involves the conversion operator declared here + +struct Ambiguous { + Ambiguous(int); + Ambiguous(double); + operator long() const; + operator float() const; +}; + +void ambiguous3(char C, Ambiguous A) {} // NO-WARN: Ambiguous. + +struct CDouble { + CDouble(const double &); + operator const double &() const; +}; + +void userDefinedConversion2(double D, CDouble CD) { userDefinedConversion2(CD, D); } +// CHECK-MESSAGES: :[[@LINE-1]]:29: warning: 2 adjacent parameters of 'userDefinedConversion2' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:36: note: the first parameter in the range is 'D' +// CHECK-MESSAGES: :[[@LINE-3]]:47: note: the last parameter in the range is 'CD' +// CHECK-MESSAGES: :[[@LINE-4]]:39: note: 'double' and 'CDouble' may be implicitly converted: 'double' -> 'const double &' -> 'CDouble', 'CDouble' -> 'const double &' -> 'double' +// CHECK-MESSAGES: :[[@LINE-9]]:3: note: the implicit conversion involves the converting constructor declared here +// CHECK-MESSAGES: :[[@LINE-9]]:3: note: the implicit conversion involves the conversion operator declared here + +void userDefinedConversion3(int I, CDouble CD) { userDefinedConversion3(CD, I); } +// CHECK-MESSAGES: :[[@LINE-1]]:29: warning: 2 adjacent parameters of 'userDefinedConversion3' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:33: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:44: note: the last parameter in the range is 'CD' +// CHECK-MESSAGES: :[[@LINE-4]]:36: note: 'int' and 'CDouble' may be implicitly converted: 'int' -> 'double' -> 'const double &' -> 'CDouble', 'CDouble' -> 'const double &' -> 'int' +// CHECK-MESSAGES: :[[@LINE-17]]:3: note: the implicit conversion involves the converting constructor declared here +// CHECK-MESSAGES: :[[@LINE-17]]:3: note: the implicit conversion involves the conversion operator declared here + +struct TDInt { + TDInt(const MyInt &); + operator MyInt() const; +}; + +void userDefinedConversion4(int I, TDInt TDI) { userDefinedConversion4(TDI, I); } +// CHECK-MESSAGES: :[[@LINE-1]]:29: warning: 2 adjacent parameters of 'userDefinedConversion4' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:33: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:42: note: the last parameter in the range is 'TDI' +// CHECK-MESSAGES: :[[@LINE-4]]:36: note: 'int' and 'TDInt' may be implicitly converted: 'int' -> 'const MyInt &' -> 'TDInt', 'TDInt' -> 'MyInt' -> 'int' +// CHECK-MESSAGES: :[[@LINE-9]]:3: note: the implicit conversion involves the converting constructor declared here +// CHECK-MESSAGES: :[[@LINE-9]]:3: note: the implicit conversion involves the conversion operator declared here + +struct TDIntDouble { + TDIntDouble(const MyInt &); + TDIntDouble(const MyDouble &); + operator MyInt() const; + operator MyDouble() const; +}; + +void userDefinedConversion5(int I, TDIntDouble TDID) { userDefinedConversion5(TDID, I); } +// CHECK-MESSAGES: :[[@LINE-1]]:29: warning: 2 adjacent parameters of 'userDefinedConversion5' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:33: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:48: note: the last parameter in the range is 'TDID' +// CHECK-MESSAGES: :[[@LINE-4]]:36: note: 'int' and 'TDIntDouble' may be implicitly converted: 'int' -> 'const MyInt &' -> 'TDIntDouble', 'TDIntDouble' -> 'MyInt' -> 'int' +// CHECK-MESSAGES: :[[@LINE-11]]:3: note: the implicit conversion involves the converting constructor declared here +// CHECK-MESSAGES: :[[@LINE-10]]:3: note: the implicit conversion involves the conversion operator declared here + +void userDefinedConversion6(double D, TDIntDouble TDID) { userDefinedConversion6(TDID, D); } +// CHECK-MESSAGES: :[[@LINE-1]]:29: warning: 2 adjacent parameters of 'userDefinedConversion6' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:36: note: the first parameter in the range is 'D' +// CHECK-MESSAGES: :[[@LINE-3]]:51: note: the last parameter in the range is 'TDID' +// CHECK-MESSAGES: :[[@LINE-4]]:39: note: 'double' and 'TDIntDouble' may be implicitly converted: 'double' -> 'const MyDouble &' -> 'TDIntDouble', 'TDIntDouble' -> 'MyDouble' -> 'double' +// CHECK-MESSAGES: :[[@LINE-18]]:3: note: the implicit conversion involves the converting constructor declared here +// CHECK-MESSAGES: :[[@LINE-17]]:3: note: the implicit conversion involves the conversion operator declared here + +void userDefinedConversion7(char C, TDIntDouble TDID) {} // NO-WARN: Ambiguous. + +struct Forward1; +struct Forward2; + +void incomplete(Forward1 *F1, Forward2 *F2) {} // NO-WARN: Do not compare incomplete types. + +void pointeeConverison(int *IP, double *DP) {} // NO-WARN. + +void pointerConversion1(void *VP, int *IP) {} // NO-WARN: One-way. + +struct PointerBox { + PointerBox(void *); + operator int *() const; +}; + +void pointerConversion2(PointerBox PB, int *IP) { pointerConversion2(IP, PB); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'pointerConversion2' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:36: note: the first parameter in the range is 'PB' +// CHECK-MESSAGES: :[[@LINE-3]]:45: note: the last parameter in the range is 'IP' +// CHECK-MESSAGES: :[[@LINE-4]]:40: note: 'PointerBox' and 'int *' may be implicitly converted: 'PointerBox' -> 'int *', 'int *' -> 'void *' -> 'PointerBox' +// CHECK-MESSAGES: :[[@LINE-8]]:3: note: the implicit conversion involves the conversion operator declared here +// CHECK-MESSAGES: :[[@LINE-10]]:3: note: the implicit conversion involves the converting constructor declared here + +void pointerConversion3(PointerBox PB, double *DP) {} // NO-WARN: Not convertible. + +struct Base {}; +struct Derived : Base {}; + +void pointerConversion4(Base *BP, Derived *DP) {} // NO-WARN: One-way. + +struct BaseAndDerivedInverter { + BaseAndDerivedInverter(Base); // Takes a Base + operator Derived() const; // and becomes a Derived. +}; + +void pointerConversion5(BaseAndDerivedInverter BADI, Derived D) { pointerConversion5(D, BADI); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'pointerConversion5' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:48: note: the first parameter in the range is 'BADI' +// CHECK-MESSAGES: :[[@LINE-3]]:62: note: the last parameter in the range is 'D' +// CHECK-MESSAGES: :[[@LINE-4]]:54: note: 'BaseAndDerivedInverter' and 'Derived' may be implicitly converted: 'BaseAndDerivedInverter' -> 'Derived', 'Derived' -> 'Base' -> 'BaseAndDerivedInverter' +// CHECK-MESSAGES: :[[@LINE-8]]:3: note: the implicit conversion involves the conversion operator declared here +// CHECK-MESSAGES: :[[@LINE-10]]:3: note: the implicit conversion involves the converting constructor declared here + +void pointerConversion6(void (*NTF)() noexcept, void (*TF)()) {} +// NO-WARN: This call cannot be swapped, even if "getCanonicalType()" believes otherwise. + +using NonThrowingFunction = void (*)() noexcept; + +struct NoexceptMaker { + NoexceptMaker(void (*ThrowingFunction)()); + // Need to use a typedef here because + // "conversion function cannot convert to a function type". + // operator (void (*)() noexcept) () const; + operator NonThrowingFunction() const; +}; + +void pointerConversion7(void (*NTF)() noexcept, NoexceptMaker NM) { pointerConversion7(NM, NTF); } +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'pointerConversion7' of convertible types +// CHECK-MESSAGES: :[[@LINE-2]]:32: note: the first parameter in the range is 'NTF' +// CHECK-MESSAGES: :[[@LINE-3]]:63: note: the last parameter in the range is 'NM' +// CHECK-MESSAGES: :[[@LINE-4]]:49: note: 'void (*)() noexcept' and 'NoexceptMaker' may be implicitly converted: 'void (*)() noexcept' -> 'void (*)()' -> 'NoexceptMaker', 'NoexceptMaker' -> 'NonThrowingFunction' -> 'void (*)() noexcept' +// CHECK-MESSAGES: :[[@LINE-12]]:3: note: the implicit conversion involves the converting constructor declared here +// CHECK-MESSAGES: :[[@LINE-9]]:3: note: the implicit conversion involves the conversion operator declared here + +struct ToType; +struct MiddleStep1 { + operator ToType() const; +}; +struct FromType { + operator MiddleStep1() const; +}; +struct MiddleStep2 { + operator FromType() const; +}; +struct ToType { + operator MiddleStep2() const; +}; + +void f(FromType F, ToType T) { // NO-WARN: The path takes two steps. + MiddleStep2 MS2 = T; + FromType F2 = MS2; + + MiddleStep1 MS1 = F; + ToType T2 = MS1; + + f(F2, T2); +} + +// Synthesised example from OpenCV. +template +struct TemplateConversion { + template + operator TemplateConversion() const; +}; +using IntConverter = TemplateConversion; +using FloatConverter = TemplateConversion; + +void templateConversion(IntConverter IC, FloatConverter FC) { templateConversion(FC, IC); } +// Note: even though this swap is possible, we do not model things when it comes to "template magic". +// But at least the check should not crash! diff --git a/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-len2.cpp b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-len2.cpp new file mode 100644 index 0000000000000..e2e836b67cc33 --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-len2.cpp @@ -0,0 +1,348 @@ +// RUN: %check_clang_tidy %s bugprone-easily-swappable-parameters %t \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: bugprone-easily-swappable-parameters.MinimumLength, value: 2}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterNames, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterTypeSuffixes, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.QualifiersMix, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.ModelImplicitConversions, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.SuppressParametersUsedTogether, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.NamePrefixSuffixSilenceDissimilarityTreshold, value: 0} \ +// RUN: ]}' -- + +namespace std { +using size_t = decltype(sizeof(int)); +} // namespace std + +#define assert(X) ((void)(X)) + +void declaration(int Param, int Other); // NO-WARN: No chance to change this function. + +struct S {}; + +S *allocate() { return nullptr; } // NO-WARN: 0 parameters. +void allocate(S **Out) {} // NO-WARN: 1 parameter. +bool operator<(const S &LHS, const S &RHS) { return true; } // NO-WARN: Binary operator. + +struct MyComparator { + bool operator()(const S &LHS, const S &RHS) { return true; } // NO-WARN: Binary operator. +}; + +struct MyFactory { + S operator()() { return {}; } // NO-WARN: 0 parameters, overloaded operator. + S operator()(int I) { return {}; } // NO-WARN: 1 parameter, overloaded operator. + S operator()(int I, int J) { return {}; } // NO-WARN: Binary operator. + + S operator()(int I, int J, int K) { return {}; } + // CHECK-MESSAGES: :[[@LINE-1]]:16: warning: 3 adjacent parameters of 'operator()' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters] + // CHECK-MESSAGES: :[[@LINE-2]]:20: note: the first parameter in the range is 'I' + // CHECK-MESSAGES: :[[@LINE-3]]:34: note: the last parameter in the range is 'K' +}; + +// Variadic functions are not checked because the types are not seen from the +// *definition*. It would require analysing the call sites to do something +// for these. +int printf(const char *Format, ...) { return 0; } // NO-WARN: Variadic function not checked. +int sum(...) { return 0; } // NO-WARN: Variadic function not checked. + +void *operator new(std::size_t Count, S &Manager, S &Janitor) noexcept { return nullptr; } +// CHECK-MESSAGES: :[[@LINE-1]]:39: warning: 2 adjacent parameters of 'operator new' of similar type ('S &') +// CHECK-MESSAGES: :[[@LINE-2]]:42: note: the first parameter in the range is 'Manager' +// CHECK-MESSAGES: :[[@LINE-3]]:54: note: the last parameter in the range is 'Janitor' + +void redeclChain(int, int, int); +void redeclChain(int I, int, int); +void redeclChain(int, int J, int); +void redeclChain(int I, int J, int K) {} +// CHECK-MESSAGES: :[[@LINE-1]]:18: warning: 3 adjacent parameters of 'redeclChain' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-2]]:22: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:36: note: the last parameter in the range is 'K' + +void copyMany(S *Src, S *Dst, unsigned Num) {} +// CHECK-MESSAGES: :[[@LINE-1]]:15: warning: 2 adjacent parameters of 'copyMany' of similar type ('S *') +// CHECK-MESSAGES: :[[@LINE-2]]:18: note: the first parameter in the range is 'Src' +// CHECK-MESSAGES: :[[@LINE-3]]:26: note: the last parameter in the range is 'Dst' + +template +bool binaryPredicate(T L, U R) { return false; } // NO-WARN: Distinct types in template. + +template <> // Explicit specialisation. +bool binaryPredicate(S *L, S *R) { return true; } +// CHECK-MESSAGES: :[[@LINE-1]]:22: warning: 2 adjacent parameters of 'binaryPredicate' of similar type ('S *') +// CHECK-MESSAGES: :[[@LINE-2]]:25: note: the first parameter in the range is 'L' +// CHECK-MESSAGES: :[[@LINE-3]]:31: note: the last parameter in the range is 'R' + +template +T algebraicOperation(T L, T R) { return L; } +// CHECK-MESSAGES: :[[@LINE-1]]:22: warning: 2 adjacent parameters of 'algebraicOperation' of similar type ('T') +// CHECK-MESSAGES: :[[@LINE-2]]:24: note: the first parameter in the range is 'L' +// CHECK-MESSAGES: :[[@LINE-3]]:29: note: the last parameter in the range is 'R' + +void applyBinaryToS(S SInstance) { // NO-WARN: 1 parameter. + assert(binaryPredicate(SInstance, SInstance) != + binaryPredicate(&SInstance, &SInstance)); + // NO-WARN: binaryPredicate(S, S) is instantiated, but it's not written + // by the user. +} + +void unnamedParameter(int I, int, int K, int) {} +// CHECK-MESSAGES: :[[@LINE-1]]:23: warning: 4 adjacent parameters of 'unnamedParameter' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-2]]:27: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:45: note: the last parameter in the range is '' + +void fullyUnnamed(int, int) {} +// CHECK-MESSAGES: :[[@LINE-1]]:19: warning: 2 adjacent parameters of 'fullyUnnamed' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-2]]:22: note: the first parameter in the range is '' +// CHECK-MESSAGES: :[[@LINE-3]]:27: note: the last parameter in the range is '' + +void multipleDistinctTypes(int I, int J, long L, long M) {} +// CHECK-MESSAGES: :[[@LINE-1]]:28: warning: 2 adjacent parameters of 'multipleDistinctTypes' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-2]]:32: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:39: note: the last parameter in the range is 'J' +// CHECK-MESSAGES: :[[@LINE-4]]:42: warning: 2 adjacent parameters of 'multipleDistinctTypes' of similar type ('long') +// CHECK-MESSAGES: :[[@LINE-5]]:47: note: the first parameter in the range is 'L' +// CHECK-MESSAGES: :[[@LINE-6]]:55: note: the last parameter in the range is 'M' + +void variableAndPtr(int I, int *IP) {} // NO-WARN: Not the same type. + +void differentPtrs(int *IP, long *LP) {} // NO-WARN: Not the same type. + +typedef int MyInt1; +using MyInt2 = int; +typedef MyInt2 MyInt2b; + +using CInt = const int; +using CMyInt1 = const MyInt1; +using CMyInt2 = const MyInt2; + +typedef long MyLong1; +using MyLong2 = long; + +void typedefAndTypedef1(MyInt1 I1, MyInt1 I2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'typedefAndTypedef1' of similar type ('MyInt1') +// CHECK-MESSAGES: :[[@LINE-2]]:32: note: the first parameter in the range is 'I1' +// CHECK-MESSAGES: :[[@LINE-3]]:43: note: the last parameter in the range is 'I2' + +void typedefAndTypedef2(MyInt2 I1, MyInt2 I2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'typedefAndTypedef2' of similar type ('MyInt2') +// CHECK-MESSAGES: :[[@LINE-2]]:32: note: the first parameter in the range is 'I1' +// CHECK-MESSAGES: :[[@LINE-3]]:43: note: the last parameter in the range is 'I2' + +void typedefMultiple(MyInt1 I1, MyInt2 I2x, MyInt2 I2y) {} +// CHECK-MESSAGES: :[[@LINE-1]]:22: warning: 3 adjacent parameters of 'typedefMultiple' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:29: note: the first parameter in the range is 'I1' +// CHECK-MESSAGES: :[[@LINE-3]]:52: note: the last parameter in the range is 'I2y' +// CHECK-MESSAGES: :[[@LINE-4]]:22: note: after resolving type aliases, the common type of 'MyInt1' and 'MyInt2' is 'int' + +void throughTypedef1(int I, MyInt1 J) {} +// CHECK-MESSAGES: :[[@LINE-1]]:22: warning: 2 adjacent parameters of 'throughTypedef1' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:26: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:36: note: the last parameter in the range is 'J' +// CHECK-MESSAGES: :[[@LINE-4]]:22: note: after resolving type aliases, 'int' and 'MyInt1' are the same + +void betweenTypedef2(MyInt1 I, MyInt2 J) {} +// CHECK-MESSAGES: :[[@LINE-1]]:22: warning: 2 adjacent parameters of 'betweenTypedef2' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:29: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:39: note: the last parameter in the range is 'J' +// CHECK-MESSAGES: :[[@LINE-4]]:22: note: after resolving type aliases, the common type of 'MyInt1' and 'MyInt2' is 'int' + +void typedefChain(int I, MyInt1 MI1, MyInt2 MI2, MyInt2b MI2b) {} +// CHECK-MESSAGES: :[[@LINE-1]]:19: warning: 4 adjacent parameters of 'typedefChain' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:23: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:58: note: the last parameter in the range is 'MI2b' +// CHECK-MESSAGES: :[[@LINE-4]]:19: note: after resolving type aliases, 'int' and 'MyInt1' are the same +// CHECK-MESSAGES: :[[@LINE-5]]:19: note: after resolving type aliases, 'int' and 'MyInt2' are the same +// CHECK-MESSAGES: :[[@LINE-6]]:19: note: after resolving type aliases, 'int' and 'MyInt2b' are the same + +void throughTypedefToOtherType(MyInt1 I, MyLong1 J) {} // NO-WARN: int and long. + +void qualified1(int I, const int CI) {} // NO-WARN: Different qualifiers. + +void qualified2(int I, volatile int VI) {} // NO-WARN: Different qualifiers. + +void qualified3(int *IP, const int *CIP) {} // NO-WARN: Different qualifiers. + +void qualified4(const int CI, const long CL) {} // NO-WARN: Not the same type. + +void qualifiedPtr1(int *IP, int *const IPC) {} // NO-WARN: Different qualifiers. + +void qualifiedTypeAndQualifiedPtr1(const int *CIP, int *const volatile IPCV) {} // NO-WARN: Not the same type. + +void qualifiedThroughTypedef1(int I, CInt CI) {} // NO-WARN: Different qualifiers. + +void qualifiedThroughTypedef2(CInt CI1, const int CI2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:31: warning: 2 adjacent parameters of 'qualifiedThroughTypedef2' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:36: note: the first parameter in the range is 'CI1' +// CHECK-MESSAGES: :[[@LINE-3]]:51: note: the last parameter in the range is 'CI2' +// CHECK-MESSAGES: :[[@LINE-4]]:31: note: after resolving type aliases, 'CInt' and 'const int' are the same + +void qualifiedThroughTypedef3(CInt CI1, const MyInt1 CI2, const int CI3) {} +// CHECK-MESSAGES: :[[@LINE-1]]:31: warning: 3 adjacent parameters of 'qualifiedThroughTypedef3' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:36: note: the first parameter in the range is 'CI1' +// CHECK-MESSAGES: :[[@LINE-3]]:69: note: the last parameter in the range is 'CI3' +// CHECK-MESSAGES: :[[@LINE-4]]:31: note: after resolving type aliases, the common type of 'CInt' and 'const MyInt1' is 'const int' +// CHECK-MESSAGES: :[[@LINE-5]]:31: note: after resolving type aliases, 'CInt' and 'const int' are the same +// CHECK-MESSAGES: :[[@LINE-6]]:41: note: after resolving type aliases, 'const MyInt1' and 'const int' are the same + +void qualifiedThroughTypedef4(CInt CI1, const MyInt1 CI2, const MyInt2 CI3) {} +// CHECK-MESSAGES: :[[@LINE-1]]:31: warning: 3 adjacent parameters of 'qualifiedThroughTypedef4' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:36: note: the first parameter in the range is 'CI1' +// CHECK-MESSAGES: :[[@LINE-3]]:72: note: the last parameter in the range is 'CI3' +// CHECK-MESSAGES: :[[@LINE-4]]:31: note: after resolving type aliases, the common type of 'CInt' and 'const MyInt1' is 'const int' +// CHECK-MESSAGES: :[[@LINE-5]]:31: note: after resolving type aliases, the common type of 'CInt' and 'const MyInt2' is 'const int' +// CHECK-MESSAGES: :[[@LINE-6]]:41: note: after resolving type aliases, the common type of 'const MyInt1' and 'const MyInt2' is 'const int' + +void qualifiedThroughTypedef5(CMyInt1 CMI1, CMyInt2 CMI2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:31: warning: 2 adjacent parameters of 'qualifiedThroughTypedef5' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:39: note: the first parameter in the range is 'CMI1' +// CHECK-MESSAGES: :[[@LINE-3]]:53: note: the last parameter in the range is 'CMI2' +// CHECK-MESSAGES: :[[@LINE-4]]:31: note: after resolving type aliases, the common type of 'CMyInt1' and 'CMyInt2' is 'const int' + +void qualifiedThroughTypedef6(CMyInt1 CMI1, int I) {} // NO-WARN: Different qualifiers. + +template +void copy(const T *Dest, T *Source) {} // NO-WARN: Different qualifiers. + +void reference1(int I, int &IR) {} // NO-WARN: Distinct semantics when called. + +void reference2(int I, const int &CIR) {} +// CHECK-MESSAGES: :[[@LINE-1]]:17: warning: 2 adjacent parameters of 'reference2' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:21: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:35: note: the last parameter in the range is 'CIR' +// CHECK-MESSAGES: :[[@LINE-4]]:24: note: 'int' and 'const int &' parameters accept and bind the same kind of values + +void reference3(int I, int &&IRR) {} // NO-WARN: Distinct semantics when called. + +void reference4(int I, const int &&CIRR) {} // NO-WARN: Distinct semantics when called. + +void reference5(const int CI, const int &CIR) {} +// CHECK-MESSAGES: :[[@LINE-1]]:17: warning: 2 adjacent parameters of 'reference5' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:27: note: the first parameter in the range is 'CI' +// CHECK-MESSAGES: :[[@LINE-3]]:42: note: the last parameter in the range is 'CIR' +// CHECK-MESSAGES: :[[@LINE-4]]:31: note: 'const int' and 'const int &' parameters accept and bind the same kind of values + +void reference6(int I, const int &CIR, int J, const int &CJR) {} +// CHECK-MESSAGES: :[[@LINE-1]]:17: warning: 4 adjacent parameters of 'reference6' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:21: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:58: note: the last parameter in the range is 'CJR' +// CHECK-MESSAGES: :[[@LINE-4]]:24: note: 'int' and 'const int &' parameters accept and bind the same kind of values + +using ICRTy = const int &; +using MyIntCRTy = const MyInt1 &; + +void referenceToTypedef1(CInt &CIR, int I) {} +// CHECK-MESSAGES: :[[@LINE-1]]:26: warning: 2 adjacent parameters of 'referenceToTypedef1' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:32: note: the first parameter in the range is 'CIR' +// CHECK-MESSAGES: :[[@LINE-3]]:41: note: the last parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-4]]:37: note: 'CInt &' and 'int' parameters accept and bind the same kind of values + +void referenceThroughTypedef(int I, ICRTy Builtin, MyIntCRTy MyInt) {} +// CHECK-MESSAGES: :[[@LINE-1]]:30: warning: 3 adjacent parameters of 'referenceThroughTypedef' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:34: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:62: note: the last parameter in the range is 'MyInt' +// CHECK-MESSAGES: :[[@LINE-4]]:37: note: 'int' and 'ICRTy' parameters accept and bind the same kind of values +// CHECK-MESSAGES: :[[@LINE-5]]:30: note: after resolving type aliases, 'int' and 'MyIntCRTy' are the same +// CHECK-MESSAGES: :[[@LINE-6]]:52: note: 'int' and 'MyIntCRTy' parameters accept and bind the same kind of values +// CHECK-MESSAGES: :[[@LINE-7]]:37: note: after resolving type aliases, the common type of 'ICRTy' and 'MyIntCRTy' is 'int' +// CHECK-MESSAGES: :[[@LINE-8]]:52: note: 'ICRTy' and 'MyIntCRTy' parameters accept and bind the same kind of values + +short const typedef int unsigned Eldritch; +typedef const unsigned short Holy; + +void collapse(Eldritch Cursed, Holy Blessed) {} +// CHECK-MESSAGES: :[[@LINE-1]]:15: warning: 2 adjacent parameters of 'collapse' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:24: note: the first parameter in the range is 'Cursed' +// CHECK-MESSAGES: :[[@LINE-3]]:37: note: the last parameter in the range is 'Blessed' +// CHECK-MESSAGES: :[[@LINE-4]]:15: note: after resolving type aliases, the common type of 'Eldritch' and 'Holy' is 'const unsigned short' + +void collapseAndTypedef(Eldritch Cursed, const Holy &Blessed) {} +// CHECK-MESSAGES: :[[@LINE-1]]:25: warning: 2 adjacent parameters of 'collapseAndTypedef' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:34: note: the first parameter in the range is 'Cursed' +// CHECK-MESSAGES: :[[@LINE-3]]:54: note: the last parameter in the range is 'Blessed' +// CHECK-MESSAGES: :[[@LINE-4]]:25: note: after resolving type aliases, the common type of 'Eldritch' and 'const Holy &' is 'const unsigned short' +// CHECK-MESSAGES: :[[@LINE-5]]:42: note: 'Eldritch' and 'const Holy &' parameters accept and bind the same kind of values + +template +struct Pair {}; + +void templateParam1(Pair P1, Pair P2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:21: warning: 2 adjacent parameters of 'templateParam1' of similar type ('Pair') +// CHECK-MESSAGES: :[[@LINE-2]]:36: note: the first parameter in the range is 'P1' +// CHECK-MESSAGES: :[[@LINE-3]]:55: note: the last parameter in the range is 'P2' + +void templateParam2(Pair P1, Pair P2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:21: warning: 2 adjacent parameters of 'templateParam2' of similar type ('Pair') +// CHECK-MESSAGES: :[[@LINE-2]]:37: note: the first parameter in the range is 'P1' +// CHECK-MESSAGES: :[[@LINE-3]]:57: note: the last parameter in the range is 'P2' + +void templateParam3(Pair P1, Pair P2) {} // NO-WARN: Not the same type. + +template +struct Coord {}; + +void templateAndOtherTemplate1(Pair P, Coord C) {} // NO-WARN: Not the same type. + +template +void templateVariadic1(Ts TVars...) {} // NO-WARN: Requires instantiation to check. + +template +void templateVariadic2(T TVar, Us... UVars) {} // NO-WARN: Distinct types in primary template. + +template <> +void templateVariadic2(int TVar, int UVars1, int UVars2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:24: warning: 3 adjacent parameters of 'templateVariadic2' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-2]]:28: note: the first parameter in the range is 'TVar' +// CHECK-MESSAGES: :[[@LINE-3]]:50: note: the last parameter in the range is 'UVars2' + +template +using TwoOf = Pair; + +void templateAndAliasTemplate(Pair P, TwoOf I) {} +// CHECK-MESSAGES: :[[@LINE-1]]:31: warning: 2 adjacent parameters of 'templateAndAliasTemplate' of similar type ('Pair') +// CHECK-MESSAGES: :[[@LINE-2]]:46: note: the first parameter in the range is 'P' +// CHECK-MESSAGES: :[[@LINE-3]]:60: note: the last parameter in the range is 'I' + +template +struct Vector { + typedef T element_type; + typedef T &reference_type; + typedef const T const_element_type; + typedef const T &const_reference_type; +}; + +void memberTypedef(int I, Vector::element_type E) {} +// CHECK-MESSAGES: :[[@LINE-1]]:20: warning: 2 adjacent parameters of 'memberTypedef' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:24: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:53: note: the last parameter in the range is 'E' +// CHECK-MESSAGES: :[[@LINE-4]]:20: note: after resolving type aliases, 'int' and 'Vector::element_type' are the same + +template +void memberTypedefDependent1(T T1, typename Vector::element_type T2) {} // NO-WARN: Dependent name is not instantiated and resolved against other type. + +template +void memberTypedefDependent2(typename Vector::element_type E1, + typename Vector::element_type E2) {} +// CHECK-MESSAGES: :[[@LINE-2]]:30: warning: 2 adjacent parameters of 'memberTypedefDependent2' of similar type ('typename Vector::element_type') +// CHECK-MESSAGES: :[[@LINE-3]]:63: note: the first parameter in the range is 'E1' +// CHECK-MESSAGES: :[[@LINE-3]]:63: note: the last parameter in the range is 'E2' + +template +void memberTypedefDependentReference1( + typename Vector::element_type E, + typename Vector::const_element_type &R) {} // NO-WARN: Not instantiated. + +template +void memberTypedefDependentReference2( + typename Vector::element_type E, + typename Vector::const_reference_type R) {} // NO-WARN: Not instantiated. + +template +void memberTypedefDependentReference3( + typename Vector::element_type E, + const typename Vector::element_type &R) {} +// CHECK-MESSAGES: :[[@LINE-2]]:5: warning: 2 adjacent parameters of 'memberTypedefDependentReference3' of similar type are +// CHECK-MESSAGES: :[[@LINE-3]]:38: note: the first parameter in the range is 'E' +// CHECK-MESSAGES: :[[@LINE-3]]:45: note: the last parameter in the range is 'R' +// CHECK-MESSAGES: :[[@LINE-4]]:5: note: 'typename Vector::element_type' and 'const typename Vector::element_type &' parameters accept and bind the same kind of values + +void functionPrototypeLosesNoexcept(void (*NonThrowing)() noexcept, void (*Throwing)()) {} +// NO-WARN: This call cannot be swapped, even if "getCanonicalType()" believes otherwise. diff --git a/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-len3.cpp b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-len3.cpp new file mode 100644 index 0000000000000..ee943e39d0386 --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-len3.cpp @@ -0,0 +1,28 @@ +// RUN: %check_clang_tidy %s bugprone-easily-swappable-parameters %t \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: bugprone-easily-swappable-parameters.MinimumLength, value: 3}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterNames, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterTypeSuffixes, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.QualifiersMix, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.ModelImplicitConversions, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.SuppressParametersUsedTogether, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.NamePrefixSuffixSilenceDissimilarityTreshold, value: 0} \ +// RUN: ]}' -- + +int add(int Left, int Right) { return Left + Right; } // NO-WARN: Only 2 parameters. + +int magic(int Left, int Right, int X, int Y) { return 0; } +// CHECK-MESSAGES: :[[@LINE-1]]:11: warning: 4 adjacent parameters of 'magic' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters] +// CHECK-MESSAGES: :[[@LINE-2]]:15: note: the first parameter in the range is 'Left' +// CHECK-MESSAGES: :[[@LINE-3]]:43: note: the last parameter in the range is 'Y' + +void multipleDistinctTypes(int I, int J, int K, + long L, long M, + double D, double E, double F) {} +// CHECK-MESSAGES: :[[@LINE-3]]:28: warning: 3 adjacent parameters of 'multipleDistinctTypes' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-4]]:32: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-5]]:46: note: the last parameter in the range is 'K' +// NO-WARN: The [long, long] range is length of 2. +// CHECK-MESSAGES: :[[@LINE-5]]:28: warning: 3 adjacent parameters of 'multipleDistinctTypes' of similar type ('double') +// CHECK-MESSAGES: :[[@LINE-6]]:35: note: the first parameter in the range is 'D' +// CHECK-MESSAGES: :[[@LINE-7]]:55: note: the last parameter in the range is 'F' diff --git a/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-prefixsuffixname.cpp b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-prefixsuffixname.cpp new file mode 100644 index 0000000000000..a60b45f4cf5ce --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-prefixsuffixname.cpp @@ -0,0 +1,56 @@ +// RUN: %check_clang_tidy %s bugprone-easily-swappable-parameters %t \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: bugprone-easily-swappable-parameters.MinimumLength, value: 2}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterNames, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterTypeSuffixes, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.QualifiersMix, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.ModelImplicitConversions, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.SuppressParametersUsedTogether, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.NamePrefixSuffixSilenceDissimilarityTreshold, value: 1} \ +// RUN: ]}' -- + +namespace std { +struct string {}; +} // namespace std +class Matrix {}; + +void test1(int Foo, int Bar) {} +// CHECK-MESSAGES: :[[@LINE-1]]:12: warning: 2 adjacent parameters of 'test1' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters] +// CHECK-MESSAGES: :[[@LINE-2]]:16: note: the first parameter in the range is 'Foo' +// CHECK-MESSAGES: :[[@LINE-3]]:25: note: the last parameter in the range is 'Bar' + +void test2(int A, int B) {} +// CHECK-MESSAGES: :[[@LINE-1]]:12: warning: 2 adjacent parameters of 'test2' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-2]]:16: note: the first parameter in the range is 'A' +// CHECK-MESSAGES: :[[@LINE-3]]:23: note: the last parameter in the range is 'B' + +void test3(int Val1, int Val2) {} // NO-WARN. + +void test4(int ValA, int Valb) {} // NO-WARN. + +void test5(int Val1, int ValZ) {} // NO-WARN. + +void test6(int PValue, int QValue) {} // NO-WARN. + +void test7(std::string Astr, std::string Bstr) {} // NO-WARN. + +void test8(int Aladdin, int Alabaster) {} +// CHECK-MESSAGES: :[[@LINE-1]]:12: warning: 2 adjacent parameters of 'test8' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-2]]:16: note: the first parameter in the range is 'Aladdin' +// CHECK-MESSAGES: :[[@LINE-3]]:29: note: the last parameter in the range is 'Alabaster' + +void test9(Matrix Qmat, Matrix Rmat, Matrix Tmat) {} // NO-WARN. + +void test10(int Something, int Other, int Foo, int Bar1, int Bar2, int Baz, int Qux) {} +// CHECK-MESSAGES: :[[@LINE-1]]:13: warning: 4 adjacent parameters of 'test10' of similar type ('int') are +// CHECK-MESSAGES: :[[@LINE-2]]:17: note: the first parameter in the range is 'Something' +// CHECK-MESSAGES: :[[@LINE-3]]:52: note: the last parameter in the range is 'Bar1' +// +// CHECK-MESSAGES: :[[@LINE-5]]:58: warning: 3 adjacent parameters of 'test10' of similar type ('int') are +// CHECK-MESSAGES: :[[@LINE-6]]:62: note: the first parameter in the range is 'Bar2' +// CHECK-MESSAGES: :[[@LINE-7]]:81: note: the last parameter in the range is 'Qux' + +void test11(int Foobar, int Foo) {} +// CHECK-MESSAGES: :[[@LINE-1]]:13: warning: 2 adjacent parameters of 'test11' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-2]]:17: note: the first parameter in the range is 'Foobar' +// CHECK-MESSAGES: :[[@LINE-3]]:29: note: the last parameter in the range is 'Foo' diff --git a/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-qualifiermixing.cpp b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-qualifiermixing.cpp new file mode 100644 index 0000000000000..9ba81a484163e --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-qualifiermixing.cpp @@ -0,0 +1,115 @@ +// RUN: %check_clang_tidy %s bugprone-easily-swappable-parameters %t \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: bugprone-easily-swappable-parameters.MinimumLength, value: 2}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterNames, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterTypeSuffixes, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.QualifiersMix, value: 1}, \ +// RUN: {key: bugprone-easily-swappable-parameters.ModelImplicitConversions, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.SuppressParametersUsedTogether, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.NamePrefixSuffixSilenceDissimilarityTreshold, value: 0} \ +// RUN: ]}' -- + +typedef int MyInt1; +typedef int MyInt2; +using CInt = const int; +using CMyInt1 = const MyInt1; +using CMyInt2 = const MyInt2; + +void qualified1(int I, const int CI) {} +// CHECK-MESSAGES: :[[@LINE-1]]:17: warning: 2 adjacent parameters of 'qualified1' of similar type are easily swapped by mistake [bugprone-easily-swappable-parameters] +// CHECK-MESSAGES: :[[@LINE-2]]:21: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:34: note: the last parameter in the range is 'CI' +// CHECK-MESSAGES: :[[@LINE-4]]:24: note: 'int' and 'const int' parameters accept and bind the same kind of values + +void qualified2(int I, volatile int VI) {} +// CHECK-MESSAGES: :[[@LINE-1]]:17: warning: 2 adjacent parameters of 'qualified2' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:21: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:37: note: the last parameter in the range is 'VI' +// CHECK-MESSAGES: :[[@LINE-4]]:24: note: 'int' and 'volatile int' parameters accept and bind the same kind of values + +void qualified3(int I, const volatile int CVI) {} +// CHECK-MESSAGES: :[[@LINE-1]]:17: warning: 2 adjacent parameters of 'qualified3' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:21: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:43: note: the last parameter in the range is 'CVI' +// CHECK-MESSAGES: :[[@LINE-4]]:24: note: 'int' and 'const volatile int' parameters accept and bind the same kind of values + +void qualified4(int *IP, const int *CIP) {} +// CHECK-MESSAGES: :[[@LINE-1]]:17: warning: 2 adjacent parameters of 'qualified4' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:22: note: the first parameter in the range is 'IP' +// CHECK-MESSAGES: :[[@LINE-3]]:37: note: the last parameter in the range is 'CIP' +// CHECK-MESSAGES: :[[@LINE-4]]:26: note: 'int *' and 'const int *' parameters accept and bind the same kind of values + +void qualified5(const int CI, const long CL) {} // NO-WARN: Not the same type + +void qualifiedPtr1(int *IP, int *const IPC) {} +// CHECK-MESSAGES: :[[@LINE-1]]:20: warning: 2 adjacent parameters of 'qualifiedPtr1' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:25: note: the first parameter in the range is 'IP' +// CHECK-MESSAGES: :[[@LINE-3]]:40: note: the last parameter in the range is 'IPC' +// CHECK-MESSAGES: :[[@LINE-4]]:29: note: 'int *' and 'int *const' parameters accept and bind the same kind of values + +void qualifiedPtr2(int *IP, int *volatile IPV) {} +// CHECK-MESSAGES: :[[@LINE-1]]:20: warning: 2 adjacent parameters of 'qualifiedPtr2' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:25: note: the first parameter in the range is 'IP' +// CHECK-MESSAGES: :[[@LINE-3]]:43: note: the last parameter in the range is 'IPV' +// CHECK-MESSAGES: :[[@LINE-4]]:29: note: 'int *' and 'int *volatile' parameters accept and bind the same kind of values + +void qualifiedTypeAndQualifiedPtr1(const int *CIP, int *const volatile IPCV) {} +// CHECK-MESSAGES: :[[@LINE-1]]:36: warning: 2 adjacent parameters of 'qualifiedTypeAndQualifiedPtr1' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:47: note: the first parameter in the range is 'CIP' +// CHECK-MESSAGES: :[[@LINE-3]]:72: note: the last parameter in the range is 'IPCV' +// CHECK-MESSAGES: :[[@LINE-4]]:52: note: 'const int *' and 'int *const volatile' parameters accept and bind the same kind of values + +void qualifiedThroughTypedef1(int I, CInt CI) {} +// CHECK-MESSAGES: :[[@LINE-1]]:31: warning: 2 adjacent parameters of 'qualifiedThroughTypedef1' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:35: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:43: note: the last parameter in the range is 'CI' +// CHECK-MESSAGES: :[[@LINE-4]]:31: note: after resolving type aliases, 'int' and 'CInt' share a common type +// CHECK-MESSAGES: :[[@LINE-5]]:38: note: 'int' and 'CInt' parameters accept and bind the same kind of values + +void qualifiedThroughTypedef2(CInt CI1, const int CI2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:31: warning: 2 adjacent parameters of 'qualifiedThroughTypedef2' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:36: note: the first parameter in the range is 'CI1' +// CHECK-MESSAGES: :[[@LINE-3]]:51: note: the last parameter in the range is 'CI2' +// CHECK-MESSAGES: :[[@LINE-4]]:31: note: after resolving type aliases, 'CInt' and 'const int' are the same + +void qualifiedThroughTypedef3(CInt CI1, const MyInt1 CI2, const int CI3) {} +// CHECK-MESSAGES: :[[@LINE-1]]:31: warning: 3 adjacent parameters of 'qualifiedThroughTypedef3' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:36: note: the first parameter in the range is 'CI1' +// CHECK-MESSAGES: :[[@LINE-3]]:69: note: the last parameter in the range is 'CI3' +// CHECK-MESSAGES: :[[@LINE-4]]:31: note: after resolving type aliases, the common type of 'CInt' and 'const MyInt1' is 'const int' +// CHECK-MESSAGES: :[[@LINE-5]]:31: note: after resolving type aliases, 'CInt' and 'const int' are the same +// CHECK-MESSAGES: :[[@LINE-6]]:41: note: after resolving type aliases, 'const MyInt1' and 'const int' are the same + +void qualifiedThroughTypedef4(CInt CI1, const MyInt1 CI2, const MyInt2 CI3) {} +// CHECK-MESSAGES: :[[@LINE-1]]:31: warning: 3 adjacent parameters of 'qualifiedThroughTypedef4' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:36: note: the first parameter in the range is 'CI1' +// CHECK-MESSAGES: :[[@LINE-3]]:72: note: the last parameter in the range is 'CI3' +// CHECK-MESSAGES: :[[@LINE-4]]:31: note: after resolving type aliases, the common type of 'CInt' and 'const MyInt1' is 'const int' +// CHECK-MESSAGES: :[[@LINE-5]]:31: note: after resolving type aliases, the common type of 'CInt' and 'const MyInt2' is 'const int' +// CHECK-MESSAGES: :[[@LINE-6]]:41: note: after resolving type aliases, the common type of 'const MyInt1' and 'const MyInt2' is 'const int' + +void qualifiedThroughTypedef5(CMyInt1 CMI1, CMyInt2 CMI2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:31: warning: 2 adjacent parameters of 'qualifiedThroughTypedef5' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:39: note: the first parameter in the range is 'CMI1' +// CHECK-MESSAGES: :[[@LINE-3]]:53: note: the last parameter in the range is 'CMI2' +// CHECK-MESSAGES: :[[@LINE-4]]:31: note: after resolving type aliases, the common type of 'CMyInt1' and 'CMyInt2' is 'const int' + +void qualifiedThroughTypedef6(CMyInt1 CMI1, int I) {} +// CHECK-MESSAGES: :[[@LINE-1]]:31: warning: 2 adjacent parameters of 'qualifiedThroughTypedef6' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:39: note: the first parameter in the range is 'CMI1' +// CHECK-MESSAGES: :[[@LINE-3]]:49: note: the last parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-4]]:31: note: after resolving type aliases, 'CMyInt1' and 'int' share a common type +// CHECK-MESSAGES: :[[@LINE-5]]:45: note: 'CMyInt1' and 'int' parameters accept and bind the same kind of values + +void referenceToTypedef1(CInt &CIR, int I) {} +// CHECK-MESSAGES: :[[@LINE-1]]:26: warning: 2 adjacent parameters of 'referenceToTypedef1' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:32: note: the first parameter in the range is 'CIR' +// CHECK-MESSAGES: :[[@LINE-3]]:41: note: the last parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-4]]:37: note: 'CInt &' and 'int' parameters accept and bind the same kind of values + +template +void copy(const T *Dest, T *Source) {} +// CHECK-MESSAGES: :[[@LINE-1]]:11: warning: 2 adjacent parameters of 'copy' of similar type are +// CHECK-MESSAGES: :[[@LINE-2]]:20: note: the first parameter in the range is 'Dest' +// CHECK-MESSAGES: :[[@LINE-3]]:29: note: the last parameter in the range is 'Source' +// CHECK-MESSAGES: :[[@LINE-4]]:26: note: 'const T *' and 'T *' parameters accept and bind the same kind of values diff --git a/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-relatedness.c b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-relatedness.c new file mode 100644 index 0000000000000..a6f2a736fcfb8 --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-relatedness.c @@ -0,0 +1,31 @@ +// RUN: %check_clang_tidy %s bugprone-easily-swappable-parameters %t \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: bugprone-easily-swappable-parameters.MinimumLength, value: 2}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterNames, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterTypeSuffixes, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.QualifiersMix, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.ModelImplicitConversions, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.SuppressParametersUsedTogether, value: 1}, \ +// RUN: {key: bugprone-easily-swappable-parameters.NamePrefixSuffixSilenceDissimilarityTreshold, value: 0} \ +// RUN: ]}' -- -x c + +int myprint(); +int add(int X, int Y); + +void notRelated(int A, int B) {} +// CHECK-MESSAGES: :[[@LINE-1]]:17: warning: 2 adjacent parameters of 'notRelated' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-2]]:21: note: the first parameter in the range is 'A' +// CHECK-MESSAGES: :[[@LINE-3]]:28: note: the last parameter in the range is 'B' + +int addedTogether(int A, int B) { return add(A, B); } // NO-WARN: Passed to same function. + +void passedToSameKNRFunction(int A, int B) { + myprint("foo", A); + myprint("bar", B); +} +// CHECK-MESSAGES: :[[@LINE-4]]:30: warning: 2 adjacent parameters of 'passedToSameKNRFunction' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-5]]:34: note: the first parameter in the range is 'A' +// CHECK-MESSAGES: :[[@LINE-6]]:41: note: the last parameter in the range is 'B' +// This is actually a false positive: the "passed to same function" heuristic +// can't map the parameter index 1 to A and B because myprint() has no +// parameters. diff --git a/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-relatedness.cpp b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-relatedness.cpp new file mode 100644 index 0000000000000..c202d20423004 --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters-relatedness.cpp @@ -0,0 +1,232 @@ +// RUN: %check_clang_tidy %s bugprone-easily-swappable-parameters %t \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: bugprone-easily-swappable-parameters.MinimumLength, value: 2}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterNames, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterTypeSuffixes, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.QualifiersMix, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.ModelImplicitConversions, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.SuppressParametersUsedTogether, value: 1}, \ +// RUN: {key: bugprone-easily-swappable-parameters.NamePrefixSuffixSilenceDissimilarityTreshold, value: 0} \ +// RUN: ]}' -- + +namespace std { +template +T max(const T &A, const T &B); +} // namespace std + +bool coin(); +void f(int); +void g(int); +void h(int, int); +void i(int, bool); +void i(int, char); + +struct Tmp { + int f(int); + int g(int, int); +}; + +struct Int { + int I; +}; + +void compare(int Left, int Right) {} +// CHECK-MESSAGES: :[[@LINE-1]]:14: warning: 2 adjacent parameters of 'compare' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-2]]:18: note: the first parameter in the range is 'Left' +// CHECK-MESSAGES: :[[@LINE-3]]:28: note: the last parameter in the range is 'Right' + +int decideSequence(int A, int B) { + if (A) + return 1; + if (B) + return 2; + return 3; +} +// CHECK-MESSAGES: :[[@LINE-7]]:20: warning: 2 adjacent parameters of 'decideSequence' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-8]]:24: note: the first parameter in the range is 'A' +// CHECK-MESSAGES: :[[@LINE-9]]:31: note: the last parameter in the range is 'B' + +int myMax(int A, int B) { // NO-WARN: Appears in same expression. + return A < B ? A : B; +} + +int myMax2(int A, int B) { // NO-WARN: Appears in same expression. + if (A < B) + return A; + return B; +} + +int myMax3(int A, int B) { // NO-WARN: Appears in same expression. + return std::max(A, B); +} + +int binaryToUnary(int A, int) { + return A; +} +// CHECK-MESSAGES: :[[@LINE-3]]:19: warning: 2 adjacent parameters of 'binaryToUnary' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-4]]:23: note: the first parameter in the range is 'A' +// CHECK-MESSAGES: :[[@LINE-5]]:29: note: the last parameter in the range is '' + +int randomReturn1(int A, int B) { // NO-WARN: Appears in same expression. + return coin() ? A : B; +} + +int randomReturn2(int A, int B) { // NO-WARN: Both parameters returned. + if (coin()) + return A; + return B; +} + +int randomReturn3(int A, int B) { // NO-WARN: Both parameters returned. + bool Flip = coin(); + if (Flip) + return A; + Flip = coin(); + if (Flip) + return B; + Flip = coin(); + if (!Flip) + return 0; + return -1; +} + +void passthrough1(int A, int B) { // WARN: Different functions, different params. + f(A); + g(B); +} +// CHECK-MESSAGES: :[[@LINE-4]]:19: warning: 2 adjacent parameters of 'passthrough1' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-5]]:23: note: the first parameter in the range is 'A' +// CHECK-MESSAGES: :[[@LINE-6]]:30: note: the last parameter in the range is 'B' + +void passthrough2(int A, int B) { // NO-WARN: Passed to same index of same function. + f(A); + f(B); +} + +void passthrough3(int A, int B) { // NO-WARN: Passed to same index of same funtion. + h(1, A); + h(1, B); +} + +void passthrough4(int A, int B) { // WARN: Different index used. + h(1, A); + h(B, 2); +} +// CHECK-MESSAGES: :[[@LINE-4]]:19: warning: 2 adjacent parameters of 'passthrough4' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-5]]:23: note: the first parameter in the range is 'A' +// CHECK-MESSAGES: :[[@LINE-6]]:30: note: the last parameter in the range is 'B' + +void passthrough5(int A, int B) { // WARN: Different function overload. + i(A, false); + i(A, '\0'); +} +// CHECK-MESSAGES: :[[@LINE-4]]:19: warning: 2 adjacent parameters of 'passthrough5' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-5]]:23: note: the first parameter in the range is 'A' +// CHECK-MESSAGES: :[[@LINE-6]]:30: note: the last parameter in the range is 'B' + +void passthrough6(int A, int B) { // NO-WARN: Passed to same index of same function. + Tmp Temp; + Temp.f(A); + Temp.f(B); +} + +void passthrough7(int A, int B) { // NO-WARN: Passed to same index of same function. + // Clang-Tidy isn't path sensitive, the fact that the two objects we call the + // function on is different is not modelled. + Tmp Temp1, Temp2; + Temp1.f(A); + Temp2.f(B); +} + +void passthrough8(int A, int B) { // WARN: Different functions used. + f(A); + Tmp{}.f(B); +} +// CHECK-MESSAGES: :[[@LINE-4]]:19: warning: 2 adjacent parameters of 'passthrough8' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-5]]:23: note: the first parameter in the range is 'A' +// CHECK-MESSAGES: :[[@LINE-6]]:30: note: the last parameter in the range is 'B' + +// Test that the matching of "passed-to-function" is done to the proper node. +// Put simply, this test should not crash here. +void forwardDeclared(int X); + +void passthrough9(int A, int B) { // NO-WARN: Passed to same index of same function. + forwardDeclared(A); + forwardDeclared(B); +} + +void forwardDeclared(int X) {} + +void passthrough10(int A, int B) { // NO-WARN: Passed to same index of same function. + forwardDeclared(A); + forwardDeclared(B); +} + +bool compare1(Int I, Int J) { // NO-WARN: Same member accessed. + int Val1 = I.I; + int Val2 = J.I; + return Val1 < Val2; +} + +bool compare2(Tmp T1, Tmp T2) { // NO-WARN: Same member accessed. + int Val1 = T1.g(0, 1); + int Val2 = T2.g(2, 3); + return Val1 < Val2; +} + +bool compare3(Tmp T1, Tmp T2) { // WARN: Different member accessed. + int Val1 = T1.f(0); + int Val2 = T2.g(1, 2); + return Val1 < Val2; +} +// CHECK-MESSAGES: :[[@LINE-5]]:15: warning: 2 adjacent parameters of 'compare3' of similar type ('Tmp') +// CHECK-MESSAGES: :[[@LINE-6]]:19: note: the first parameter in the range is 'T1' +// CHECK-MESSAGES: :[[@LINE-7]]:27: note: the last parameter in the range is 'T2' + +int rangeBreaker(int I, int J, int K, int L, int M, int N) { + // (I, J) swappable. + + if (J == K) // (J, K) related. + return -1; + + if (K + 2 > Tmp{}.f(K)) + return M; + + // (K, L, M) swappable. + + return N; // (M, N) related. +} +// CHECK-MESSAGES: :[[@LINE-13]]:18: warning: 2 adjacent parameters of 'rangeBreaker' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-14]]:22: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-15]]:29: note: the last parameter in the range is 'J' +// CHECK-MESSAGES: :[[@LINE-16]]:32: warning: 3 adjacent parameters of 'rangeBreaker' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-17]]:36: note: the first parameter in the range is 'K' +// CHECK-MESSAGES: :[[@LINE-18]]:50: note: the last parameter in the range is 'M' + +int returnsNotOwnParameter(int I, int J, int K) { + const auto &Lambda = [&K](int L, int M, int N) { + if (K) + return L; + return M; // (L, M) related. + }; + + if (Lambda(-1, 0, 1)) + return I; + return J; // (I, J) related. +} +// CHECK-MESSAGES: :[[@LINE-11]]:35: warning: 2 adjacent parameters of 'returnsNotOwnParameter' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-12]]:39: note: the first parameter in the range is 'J' +// CHECK-MESSAGES: :[[@LINE-13]]:46: note: the last parameter in the range is 'K' +// CHECK-MESSAGES: :[[@LINE-13]]:36: warning: 2 adjacent parameters of 'operator()' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-14]]:40: note: the first parameter in the range is 'M' +// CHECK-MESSAGES: :[[@LINE-15]]:47: note: the last parameter in the range is 'N' + +int usedTogetherInCapture(int I, int J, int K) { // NO-WARN: Used together. + const auto &Lambda = [I, J, K]() { + int A = I + 1; + int B = J - 2; + int C = K * 3; + return A + B + C; + }; + return Lambda(); +} diff --git a/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters.c b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters.c new file mode 100644 index 0000000000000..9a945dab08cda --- /dev/null +++ b/clang-tools-extra/test/clang-tidy/checkers/bugprone-easily-swappable-parameters.c @@ -0,0 +1,152 @@ +// RUN: %check_clang_tidy %s bugprone-easily-swappable-parameters %t \ +// RUN: -config='{CheckOptions: [ \ +// RUN: {key: bugprone-easily-swappable-parameters.MinimumLength, value: 2}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterNames, value: ""}, \ +// RUN: {key: bugprone-easily-swappable-parameters.IgnoredParameterTypeSuffixes, value: "bool;MyBool;struct U;MAKE_LOGICAL_TYPE(int)"}, \ +// RUN: {key: bugprone-easily-swappable-parameters.QualifiersMix, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.ModelImplicitConversions, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.SuppressParametersUsedTogether, value: 0}, \ +// RUN: {key: bugprone-easily-swappable-parameters.NamePrefixSuffixSilenceDissimilarityTreshold, value: 0} \ +// RUN: ]}' -- -x c + +#define bool _Bool +#define true 1 +#define false 0 + +typedef bool MyBool; + +#define TheLogicalType bool + +void declVoid(void); // NO-WARN: Declaration only. +void decl(); // NO-WARN: Declaration only. +void oneParam(int I) {} // NO-WARN: 1 parameter. +void variadic(int I, ...) {} // NO-WARN: 1 visible parameter. + +void trivial(int I, int J) {} +// CHECK-MESSAGES: :[[@LINE-1]]:14: warning: 2 adjacent parameters of 'trivial' of similar type ('int') are easily swapped by mistake [bugprone-easily-swappable-parameters] +// CHECK-MESSAGES: :[[@LINE-2]]:18: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-3]]:25: note: the last parameter in the range is 'J' + +void qualifier(int I, const int CI) {} // NO-WARN: Distinct types. + +void restrictQualifier(char *restrict CPR1, char *restrict CPR2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:24: warning: 2 adjacent parameters of 'restrictQualifier' of similar type ('char *restrict') +// CHECK-MESSAGES: :[[@LINE-2]]:39: note: the first parameter in the range is 'CPR1' +// CHECK-MESSAGES: :[[@LINE-3]]:60: note: the last parameter in the range is 'CPR2' + +void pointer1(int *IP1, int *IP2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:15: warning: 2 adjacent parameters of 'pointer1' of similar type ('int *') +// CHECK-MESSAGES: :[[@LINE-2]]:20: note: the first parameter in the range is 'IP1' +// CHECK-MESSAGES: :[[@LINE-3]]:30: note: the last parameter in the range is 'IP2' + +void pointerConversion(int *IP, long *LP) {} +// NO-WARN: Even though C can convert any T* to U* back and forth, compiler +// warnings already exist for this. + +void testVariadicsCall() { + int IVal = 1; + decl(IVal); // NO-WARN: Particular calls to "variadics" are like template + // instantiations, and we do not model them. + + variadic(IVal); // NO-WARN. + variadic(IVal, 2, 3, 4); // NO-WARN. +} + +struct S {}; +struct T {}; + +void taggedTypes1(struct S SVar, struct T TVar) {} // NO-WARN: Distinct types. + +void taggedTypes2(struct S SVar1, struct S SVar2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:19: warning: 2 adjacent parameters of 'taggedTypes2' of similar type ('struct S') +// CHECK-MESSAGES: :[[@LINE-2]]:28: note: the first parameter in the range is 'SVar1' +// CHECK-MESSAGES: :[[@LINE-3]]:44: note: the last parameter in the range is 'SVar2' + +void wrappers(struct { int I; } I1, struct { int I; } I2) {} // NO-WARN: Distinct anonymous types. + +void knr(I, J) + int I; + int J; +{} +// CHECK-MESSAGES: :[[@LINE-3]]:3: warning: 2 adjacent parameters of 'knr' of similar type ('int') +// CHECK-MESSAGES: :[[@LINE-4]]:7: note: the first parameter in the range is 'I' +// CHECK-MESSAGES: :[[@LINE-4]]:7: note: the last parameter in the range is 'J' + +void boolAsWritten(bool B1, bool B2) {} // NO-WARN: The type name is ignored. +// Note that "bool" is a macro that expands to "_Bool" internally, but it is +// only "bool" that is ignored from the two. + +void underscoreBoolAsWritten(_Bool B1, _Bool B2) {} +// Even though it is "_Bool" that is written in the code, the diagnostic message +// respects the printing policy as defined by the compilation commands. Clang's +// default in C mode seems to say that the type itself is "bool", not "_Bool". +// CHECK-MESSAGES: :[[@LINE-4]]:30: warning: 2 adjacent parameters of 'underscoreBoolAsWritten' of similar type ('bool') +// CHECK-MESSAGES: :[[@LINE-5]]:36: note: the first parameter in the range is 'B1' +// CHECK-MESSAGES: :[[@LINE-6]]:46: note: the last parameter in the range is 'B2' + +void typedefdBoolAsWritten(MyBool MB1, MyBool MB2) {} // NO-WARN: "MyBool" as written type name ignored. + +void otherBoolMacroAsWritten(TheLogicalType TLT1, TheLogicalType TLT2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:30: warning: 2 adjacent parameters of 'otherBoolMacroAsWritten' of similar type ('bool') +// CHECK-MESSAGES: :[[@LINE-2]]:45: note: the first parameter in the range is 'TLT1' +// CHECK-MESSAGES: :[[@LINE-3]]:66: note: the last parameter in the range is 'TLT2' + +struct U {}; +typedef struct U U; + +void typedefStruct(U X, U Y) {} +// CHECK-MESSAGES: :[[@LINE-1]]:20: warning: 2 adjacent parameters of 'typedefStruct' of similar type ('U') +// CHECK-MESSAGES: :[[@LINE-2]]:22: note: the first parameter in the range is 'X' +// CHECK-MESSAGES: :[[@LINE-3]]:27: note: the last parameter in the range is 'Y' + +void ignoredStructU(struct U X, struct U Y) {} // NO-WARN: "struct U" ignored. + +#define TYPE_TAG_TO_USE struct // We are in C! +#define MAKE_TYPE_NAME(T) TYPE_TAG_TO_USE T + +void macroMagic1(TYPE_TAG_TO_USE T X, TYPE_TAG_TO_USE T Y) {} +// CHECK-MESSAGES: :[[@LINE-1]]:18: warning: 2 adjacent parameters of 'macroMagic1' of similar type ('struct T') +// CHECK-MESSAGES: :[[@LINE-5]]:25: note: expanded from macro 'TYPE_TAG_TO_USE' +// CHECK-MESSAGES: :[[@LINE-3]]:36: note: the first parameter in the range is 'X' +// CHECK-MESSAGES: :[[@LINE-4]]:57: note: the last parameter in the range is 'Y' + +void macroMagic2(TYPE_TAG_TO_USE U X, TYPE_TAG_TO_USE U Y) {} +// "struct U" is ignored, but that is not what is written here! +// CHECK-MESSAGES: :[[@LINE-2]]:18: warning: 2 adjacent parameters of 'macroMagic2' of similar type ('struct U') +// CHECK-MESSAGES: :[[@LINE-12]]:25: note: expanded from macro 'TYPE_TAG_TO_USE' +// CHECK-MESSAGES: :[[@LINE-4]]:36: note: the first parameter in the range is 'X' +// CHECK-MESSAGES: :[[@LINE-5]]:57: note: the last parameter in the range is 'Y' + +void evenMoreMacroMagic1(MAKE_TYPE_NAME(T) X, MAKE_TYPE_NAME(T) Y) {} +// CHECK-MESSAGES: :[[@LINE-1]]:26: warning: 2 adjacent parameters of 'evenMoreMacroMagic1' of similar type ('struct T') +// CHECK-MESSAGES: :[[@LINE-17]]:27: note: expanded from macro 'MAKE_TYPE_NAME' +// CHECK-MESSAGES: :[[@LINE-19]]:25: note: expanded from macro 'TYPE_TAG_TO_USE' +// CHECK-MESSAGES: :[[@LINE-4]]:44: note: the first parameter in the range is 'X' +// CHECK-MESSAGES: :[[@LINE-5]]:65: note: the last parameter in the range is 'Y' + +void evenMoreMacroMagic2(MAKE_TYPE_NAME(U) X, MAKE_TYPE_NAME(U) Y) {} +// "struct U" is ignored, but that is not what is written here! +// CHECK-MESSAGES: :[[@LINE-2]]:26: warning: 2 adjacent parameters of 'evenMoreMacroMagic2' of similar type ('struct U') +// CHECK-MESSAGES: :[[@LINE-25]]:27: note: expanded from macro 'MAKE_TYPE_NAME' +// CHECK-MESSAGES: :[[@LINE-27]]:25: note: expanded from macro 'TYPE_TAG_TO_USE' +// CHECK-MESSAGES: :[[@LINE-5]]:44: note: the first parameter in the range is 'X' +// CHECK-MESSAGES: :[[@LINE-6]]:65: note: the last parameter in the range is 'Y' + +#define MAKE_PRIMITIVE_WRAPPER(WRAPPED_TYPE) \ + MAKE_TYPE_NAME() { \ + WRAPPED_TYPE Member; \ + } + +void thisIsGettingRidiculous(MAKE_PRIMITIVE_WRAPPER(int) I1, + MAKE_PRIMITIVE_WRAPPER(int) I2) {} // NO-WARN: Distinct anonymous types. + +#define MAKE_LOGICAL_TYPE(X) bool + +void macroMagic3(MAKE_LOGICAL_TYPE(char) B1, MAKE_LOGICAL_TYPE(long) B2) {} +// CHECK-MESSAGES: :[[@LINE-1]]:18: warning: 2 adjacent parameters of 'macroMagic3' of similar type ('bool') +// CHECK-MESSAGES: :[[@LINE-4]]:30: note: expanded from macro 'MAKE_LOGICAL_TYPE' +// CHECK-MESSAGES: :[[@LINE-136]]:14: note: expanded from macro 'bool' +// CHECK-MESSAGES: :[[@LINE-4]]:42: note: the first parameter in the range is 'B1' +// CHECK-MESSAGES: :[[@LINE-5]]:70: note: the last parameter in the range is 'B2' + +void macroMagic4(MAKE_LOGICAL_TYPE(int) B1, MAKE_LOGICAL_TYPE(int) B2) {} // NO-WARN: "Type name" ignored. diff --git a/clang/cmake/caches/Fuchsia-stage2.cmake b/clang/cmake/caches/Fuchsia-stage2.cmake index eb001ef6579ce..c031465002cca 100644 --- a/clang/cmake/caches/Fuchsia-stage2.cmake +++ b/clang/cmake/caches/Fuchsia-stage2.cmake @@ -222,41 +222,15 @@ if(FUCHSIA_SDK) set(RUNTIMES_${target}+asan+noexcept_LIBCXXABI_ENABLE_EXCEPTIONS OFF CACHE BOOL "") set(RUNTIMES_${target}+asan+noexcept_LIBCXX_ENABLE_EXCEPTIONS OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables_LLVM_BUILD_COMPILER_RT OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables_CMAKE_CXX_FLAGS "${FUCHSIA_${target}_COMPILER_FLAGS} -Xclang -fexperimental-relative-c++-abi-vtables" CACHE STRING "") - - set(RUNTIMES_${target}+relative-vtables+asan_LLVM_BUILD_COMPILER_RT OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables+asan_LLVM_USE_SANITIZER "Address" CACHE STRING "") - set(RUNTIMES_${target}+relative-vtables+asan_LIBCXXABI_ENABLE_NEW_DELETE_DEFINITIONS OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables+asan_LIBCXX_ENABLE_NEW_DELETE_DEFINITIONS OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables+asan_CMAKE_CXX_FLAGS "${FUCHSIA_${target}_COMPILER_FLAGS} -Xclang -fexperimental-relative-c++-abi-vtables" CACHE STRING "") - - set(RUNTIMES_${target}+relative-vtables+noexcept_LLVM_BUILD_COMPILER_RT OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables+noexcept_CMAKE_CXX_FLAGS "${FUCHSIA_${target}_COMPILER_FLAGS} -Xclang -fexperimental-relative-c++-abi-vtables" CACHE STRING "") - set(RUNTIMES_${target}+relative-vtables+noexcept_LIBCXXABI_ENABLE_EXCEPTIONS OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables+noexcept_LIBCXX_ENABLE_EXCEPTIONS OFF CACHE BOOL "") - - set(RUNTIMES_${target}+relative-vtables+asan+noexcept_LLVM_BUILD_COMPILER_RT OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables+asan+noexcept_LLVM_USE_SANITIZER "Address" CACHE STRING "") - set(RUNTIMES_${target}+relative-vtables+asan+noexcept_LIBCXXABI_ENABLE_NEW_DELETE_DEFINITIONS OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables+asan+noexcept_LIBCXX_ENABLE_NEW_DELETE_DEFINITIONS OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables+asan+noexcept_LIBCXXABI_ENABLE_EXCEPTIONS OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables+asan+noexcept_LIBCXX_ENABLE_EXCEPTIONS OFF CACHE BOOL "") - set(RUNTIMES_${target}+relative-vtables+asan+noexcept_CMAKE_CXX_FLAGS "${FUCHSIA_${target}_COMPILER_FLAGS} -Xclang -fexperimental-relative-c++-abi-vtables" CACHE STRING "") - # Use .build-id link. list(APPEND RUNTIME_BUILD_ID_LINK "${target}") endforeach() - set(LLVM_RUNTIME_MULTILIBS "asan;noexcept;compat;asan+noexcept;relative-vtables;relative-vtables+noexcept;relative-vtables+asan;relative-vtables+asan+noexcept" CACHE STRING "") + set(LLVM_RUNTIME_MULTILIBS "asan;noexcept;compat;asan+noexcept" CACHE STRING "") set(LLVM_RUNTIME_MULTILIB_asan_TARGETS "x86_64-unknown-fuchsia;aarch64-unknown-fuchsia" CACHE STRING "") set(LLVM_RUNTIME_MULTILIB_noexcept_TARGETS "x86_64-unknown-fuchsia;aarch64-unknown-fuchsia" CACHE STRING "") set(LLVM_RUNTIME_MULTILIB_compat_TARGETS "x86_64-unknown-fuchsia;aarch64-unknown-fuchsia" CACHE STRING "") set(LLVM_RUNTIME_MULTILIB_asan+noexcept_TARGETS "x86_64-unknown-fuchsia;aarch64-unknown-fuchsia" CACHE STRING "") - set(LLVM_RUNTIME_MULTILIB_relative-vtables_TARGETS "x86_64-unknown-fuchsia;aarch64-unknown-fuchsia" CACHE STRING "") - set(LLVM_RUNTIME_MULTILIB_relative-vtables+noexcept_TARGETS "x86_64-unknown-fuchsia;aarch64-unknown-fuchsia" CACHE STRING "") - set(LLVM_RUNTIME_MULTILIB_relative-vtables+asan_TARGETS "x86_64-unknown-fuchsia;aarch64-unknown-fuchsia" CACHE STRING "") - set(LLVM_RUNTIME_MULTILIB_relative-vtables+asan+noexcept_TARGETS "x86_64-unknown-fuchsia;aarch64-unknown-fuchsia" CACHE STRING "") endif() set(LLVM_BUILTIN_TARGETS "${BUILTIN_TARGETS}" CACHE STRING "") diff --git a/clang/docs/ClangOffloadBundler.rst b/clang/docs/ClangOffloadBundler.rst index 68c5116b235f4..c92d8a94cfb54 100644 --- a/clang/docs/ClangOffloadBundler.rst +++ b/clang/docs/ClangOffloadBundler.rst @@ -121,7 +121,15 @@ Where: ============= ============================================================== **target-triple** - The target triple of the code object. + The target triple of the code object: + +.. code:: + + --- + +It is required to have all four components present, if target-id is present. +Components are hyphen separated. If a component is not specified then the +empty string must be used in its place. **target-id** The canonical target ID of the code object. Present only if the target diff --git a/clang/docs/UsersManual.rst b/clang/docs/UsersManual.rst index 244212a1336db..9e8bac635337e 100644 --- a/clang/docs/UsersManual.rst +++ b/clang/docs/UsersManual.rst @@ -1478,6 +1478,26 @@ Note that floating-point operations performed as part of constant initialization * ``maytrap`` The compiler avoids transformations that may raise exceptions that would not have been raised by the original code. Constant folding performed by the compiler is exempt from this option. * ``strict`` The compiler ensures that all transformations strictly preserve the floating point exception semantics of the original code. +.. option:: -f[no-]protect-parens: + + This option pertains to floating-point types, complex types with + floating-point components, and vectors of these types. Some arithmetic + expression transformations that are mathematically correct and permissible + according to the C and C++ language standards may be incorrect when dealing + with floating-point types, such as reassociation and distribution. Further, + the optimizer may ignore parentheses when computing arithmetic expressions + in circumstances where the parenthesized and unparenthesized expression + express the same mathematical value. For example (a+b)+c is the same + mathematical value as a+(b+c), but the optimizer is free to evaluate the + additions in any order regardless of the parentheses. When enabled, this + option forces the optimizer to honor the order of operations with respect + to parentheses in all circumstances. + + Note that floating-point contraction (option `-ffp-contract=`) is disabled + when `-fprotect-parens` is enabled. Also note that in safe floating-point + modes, such as `-ffp-model=precise` or `-ffp-model=strict`, this option + has no effect because the optimizer is prohibited from making unsafe + transformations. .. _fp-constant-eval: diff --git a/clang/include/clang/AST/ASTNodeTraverser.h b/clang/include/clang/AST/ASTNodeTraverser.h index c4f0355b352ea..18e7f491f2225 100644 --- a/clang/include/clang/AST/ASTNodeTraverser.h +++ b/clang/include/clang/AST/ASTNodeTraverser.h @@ -53,6 +53,7 @@ struct { void Visit(const OMPClause *C); void Visit(const BlockDecl::Capture &C); void Visit(const GenericSelectionExpr::ConstAssociation &A); + void Visit(const concepts::Requirement *R); void Visit(const APValue &Value, QualType Ty); }; */ @@ -141,7 +142,8 @@ class ASTNodeTraverser ConstStmtVisitor::Visit(S); // Some statements have custom mechanisms for dumping their children. - if (isa(S) || isa(S)) + if (isa(S) || isa(S) || + isa(S)) return; if (Traversal == TK_IgnoreUnlessSpelledInSource && @@ -228,6 +230,28 @@ class ASTNodeTraverser }); } + void Visit(const concepts::Requirement *R) { + getNodeDelegate().AddChild([=] { + getNodeDelegate().Visit(R); + if (!R) + return; + if (auto *TR = dyn_cast(R)) { + if (!TR->isSubstitutionFailure()) + Visit(TR->getType()->getType().getTypePtr()); + } else if (auto *ER = dyn_cast(R)) { + if (!ER->isExprSubstitutionFailure()) + Visit(ER->getExpr()); + if (!ER->getReturnTypeRequirement().isEmpty()) + Visit(ER->getReturnTypeRequirement() + .getTypeConstraint() + ->getImmediatelyDeclaredConstraint()); + } else if (auto *NR = dyn_cast(R)) { + if (!NR->isSubstitutionFailure()) + Visit(NR->getConstraintExpr()); + } + }); + } + void Visit(const APValue &Value, QualType Ty) { getNodeDelegate().AddChild([=] { getNodeDelegate().Visit(Value, Ty); }); } @@ -689,6 +713,13 @@ class ASTNodeTraverser } } + void VisitRequiresExpr(const RequiresExpr *E) { + for (auto *D : E->getLocalParameters()) + Visit(D); + for (auto *R : E->getRequirements()) + Visit(R); + } + void VisitLambdaExpr(const LambdaExpr *Node) { if (Traversal == TK_IgnoreUnlessSpelledInSource) { for (unsigned I = 0, N = Node->capture_size(); I != N; ++I) { diff --git a/clang/include/clang/AST/Expr.h b/clang/include/clang/AST/Expr.h index b04dbf7997b81..1d991b0c275e9 100644 --- a/clang/include/clang/AST/Expr.h +++ b/clang/include/clang/AST/Expr.h @@ -3039,11 +3039,22 @@ class CallExpr : public Expr { } /// setArg - Set the specified argument. + /// ! the dependence bits might be stale after calling this setter, it is + /// *caller*'s responsibility to recompute them by calling + /// computeDependence(). void setArg(unsigned Arg, Expr *ArgExpr) { assert(Arg < getNumArgs() && "Arg access out of range!"); getArgs()[Arg] = ArgExpr; } + /// Compute and set dependence bits. + void computeDependence() { + setDependence(clang::computeDependence( + this, llvm::makeArrayRef( + reinterpret_cast(getTrailingStmts() + PREARGS_START), + getNumPreArgs()))); + } + /// Reduce the number of arguments in this call expression. This is used for /// example during error recovery to drop extra arguments. There is no way /// to perform the opposite because: 1.) We don't track how much storage diff --git a/clang/include/clang/AST/JSONNodeDumper.h b/clang/include/clang/AST/JSONNodeDumper.h index 676b4f0dc5590..733ddeef9c07a 100644 --- a/clang/include/clang/AST/JSONNodeDumper.h +++ b/clang/include/clang/AST/JSONNodeDumper.h @@ -21,6 +21,7 @@ #include "clang/AST/AttrVisitor.h" #include "clang/AST/CommentCommandTraits.h" #include "clang/AST/CommentVisitor.h" +#include "clang/AST/ExprConcepts.h" #include "clang/AST/ExprCXX.h" #include "clang/AST/Mangle.h" #include "clang/AST/Type.h" @@ -204,6 +205,7 @@ class JSONNodeDumper void Visit(const OMPClause *C); void Visit(const BlockDecl::Capture &C); void Visit(const GenericSelectionExpr::ConstAssociation &A); + void Visit(const concepts::Requirement *R); void Visit(const APValue &Value, QualType Ty); void VisitTypedefType(const TypedefType *TT); @@ -291,6 +293,7 @@ class JSONNodeDumper void VisitCXXBindTemporaryExpr(const CXXBindTemporaryExpr *BTE); void VisitMaterializeTemporaryExpr(const MaterializeTemporaryExpr *MTE); void VisitCXXDependentScopeMemberExpr(const CXXDependentScopeMemberExpr *ME); + void VisitRequiresExpr(const RequiresExpr *RE); void VisitObjCEncodeExpr(const ObjCEncodeExpr *OEE); void VisitObjCMessageExpr(const ObjCMessageExpr *OME); diff --git a/clang/include/clang/AST/TextNodeDumper.h b/clang/include/clang/AST/TextNodeDumper.h index 4f7050914c6c6..38bd43516af94 100644 --- a/clang/include/clang/AST/TextNodeDumper.h +++ b/clang/include/clang/AST/TextNodeDumper.h @@ -19,6 +19,7 @@ #include "clang/AST/CommentCommandTraits.h" #include "clang/AST/CommentVisitor.h" #include "clang/AST/DeclVisitor.h" +#include "clang/AST/ExprConcepts.h" #include "clang/AST/ExprCXX.h" #include "clang/AST/StmtVisitor.h" #include "clang/AST/TemplateArgumentVisitor.h" @@ -188,6 +189,8 @@ class TextNodeDumper void Visit(const GenericSelectionExpr::ConstAssociation &A); + void Visit(const concepts::Requirement *R); + void Visit(const APValue &Value, QualType Ty); void dumpPointer(const void *Ptr); @@ -297,6 +300,7 @@ class TextNodeDumper void VisitObjCBoolLiteralExpr(const ObjCBoolLiteralExpr *Node); void VisitOMPIteratorExpr(const OMPIteratorExpr *Node); void VisitConceptSpecializationExpr(const ConceptSpecializationExpr *Node); + void VisitRequiresExpr(const RequiresExpr *Node); void VisitRValueReferenceType(const ReferenceType *T); void VisitArrayType(const ArrayType *T); diff --git a/clang/include/clang/Basic/AttributeCommonInfo.h b/clang/include/clang/Basic/AttributeCommonInfo.h index f4a5db84aa9f1..4be598e109fd8 100644 --- a/clang/include/clang/Basic/AttributeCommonInfo.h +++ b/clang/include/clang/Basic/AttributeCommonInfo.h @@ -155,6 +155,12 @@ class AttributeCommonInfo { bool isC2xAttribute() const { return SyntaxUsed == AS_C2x; } + /// The attribute is spelled [[]] in either C or C++ mode, including standard + /// attributes spelled with a keyword, like alignas. + bool isStandardAttributeSyntax() const { + return isCXX11Attribute() || isC2xAttribute(); + } + bool isKeywordAttribute() const { return SyntaxUsed == AS_Keyword || SyntaxUsed == AS_ContextSensitiveKeyword; } diff --git a/clang/include/clang/Basic/Builtins.def b/clang/include/clang/Basic/Builtins.def index 96975ffcfe4fd..32825f63494c9 100644 --- a/clang/include/clang/Basic/Builtins.def +++ b/clang/include/clang/Basic/Builtins.def @@ -1657,6 +1657,9 @@ BUILTIN(__builtin_ms_va_start, "vc*&.", "nt") BUILTIN(__builtin_ms_va_end, "vc*&", "n") BUILTIN(__builtin_ms_va_copy, "vc*&c*&", "n") +// Arithmetic Fence: to prevent FP reordering and reassociation optimizations +LANGBUILTIN(__arithmetic_fence, "v.", "t", ALL_LANGUAGES) + // Builtins for Intel FPGA BUILTIN(__builtin_intel_fpga_reg, "v.", "nt") BUILTIN(__builtin_intel_fpga_mem, "v.", "nt") diff --git a/clang/include/clang/Basic/BuiltinsAMDGPU.def b/clang/include/clang/Basic/BuiltinsAMDGPU.def index f9d079accb56f..3570431d952cb 100644 --- a/clang/include/clang/Basic/BuiltinsAMDGPU.def +++ b/clang/include/clang/Basic/BuiltinsAMDGPU.def @@ -215,6 +215,17 @@ TARGET_BUILTIN(__builtin_amdgcn_permlane16, "UiUiUiUiUiIbIb", "nc", "gfx10-insts TARGET_BUILTIN(__builtin_amdgcn_permlanex16, "UiUiUiUiUiIbIb", "nc", "gfx10-insts") TARGET_BUILTIN(__builtin_amdgcn_mov_dpp8, "UiUiIUi", "nc", "gfx10-insts") +//===----------------------------------------------------------------------===// +// Raytracing builtins. +// By default the 1st argument is i32 and the 4/5-th arguments are float4. +// Postfix l indicates the 1st argument is i64. +// Postfix h indicates the 4/5-th arguments are half4. +//===----------------------------------------------------------------------===// +TARGET_BUILTIN(__builtin_amdgcn_image_bvh_intersect_ray, "V4UiUifV4fV4fV4fV4Ui", "nc", "gfx10-insts") +TARGET_BUILTIN(__builtin_amdgcn_image_bvh_intersect_ray_h, "V4UiUifV4fV4hV4hV4Ui", "nc", "gfx10-insts") +TARGET_BUILTIN(__builtin_amdgcn_image_bvh_intersect_ray_l, "V4UiWUifV4fV4fV4fV4Ui", "nc", "gfx10-insts") +TARGET_BUILTIN(__builtin_amdgcn_image_bvh_intersect_ray_lh, "V4UiWUifV4fV4hV4hV4Ui", "nc", "gfx10-insts") + //===----------------------------------------------------------------------===// // Special builtins. //===----------------------------------------------------------------------===// diff --git a/clang/include/clang/Basic/BuiltinsNVPTX.def b/clang/include/clang/Basic/BuiltinsNVPTX.def index df7d054cb7211..1ac5c8e646118 100644 --- a/clang/include/clang/Basic/BuiltinsNVPTX.def +++ b/clang/include/clang/Basic/BuiltinsNVPTX.def @@ -762,6 +762,29 @@ TARGET_BUILTIN(__imma_m8n8k32_mma_s4, "vi*iC*iC*iC*IiIi", "", AND(SM_75,PTX63)) TARGET_BUILTIN(__imma_m8n8k32_mma_u4, "vi*iC*iC*iC*IiIi", "", AND(SM_75,PTX63)) TARGET_BUILTIN(__imma_m8n8k32_st_c_i32, "vi*iC*UiIi", "", AND(SM_75,PTX63)) +// Builtins to support double and alternate float WMMA instructions on sm_80 +TARGET_BUILTIN(__dmma_m8n8k4_ld_a, "vd*dC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__dmma_m8n8k4_ld_b, "vd*dC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__dmma_m8n8k4_ld_c, "vd*dC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__dmma_m8n8k4_st_c_f64, "vd*dC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__dmma_m8n8k4_mma_f64, "vd*dC*dC*dC*IiIi", "", AND(SM_80,PTX70)) + +TARGET_BUILTIN(__mma_bf16_m16n16k16_ld_a, "vi*iC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_bf16_m16n16k16_ld_b, "vi*iC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_bf16_m16n16k16_mma_f32, "vf*iC*iC*fC*IiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_bf16_m8n32k16_ld_a, "vi*iC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_bf16_m8n32k16_ld_b, "vi*iC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_bf16_m8n32k16_mma_f32, "vf*iC*iC*fC*IiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_bf16_m32n8k16_ld_a, "vi*iC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_bf16_m32n8k16_ld_b, "vi*iC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_bf16_m32n8k16_mma_f32, "vf*iC*iC*fC*IiIi", "", AND(SM_80,PTX70)) + +TARGET_BUILTIN(__mma_tf32_m16n16k8_ld_a, "vi*iC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_tf32_m16n16k8_ld_b, "vi*iC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_tf32_m16n16k8_ld_c, "vf*fC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_m16n16k8_st_c_f32, "vf*fC*UiIi", "", AND(SM_80,PTX70)) +TARGET_BUILTIN(__mma_tf32_m16n16k8_mma_f32, "vf*iC*iC*fC*IiIi", "", AND(SM_80,PTX70)) + // Async Copy TARGET_BUILTIN(__nvvm_cp_async_mbarrier_arrive, "vWi*", "", AND(SM_80,PTX70)) TARGET_BUILTIN(__nvvm_cp_async_mbarrier_arrive_shared, "vWi*3", "", AND(SM_80,PTX70)) diff --git a/clang/include/clang/Basic/DiagnosticSemaKinds.td b/clang/include/clang/Basic/DiagnosticSemaKinds.td index d8eb716abf9a6..82eb974963f27 100644 --- a/clang/include/clang/Basic/DiagnosticSemaKinds.td +++ b/clang/include/clang/Basic/DiagnosticSemaKinds.td @@ -6533,12 +6533,6 @@ def warn_pessimizing_move_on_initialization : Warning< InGroup, DefaultIgnore; def note_remove_move : Note<"remove std::move call here">; -def warn_return_std_move : Warning< - "local variable %0 will be copied despite being %select{returned|thrown}1 by name">, - InGroup, DefaultIgnore; -def note_add_std_move : Note< - "call 'std::move' explicitly to avoid copying">; - def warn_string_plus_int : Warning< "adding %0 to a string does not append to the string">, InGroup; @@ -7489,6 +7483,12 @@ def warn_deprecated_volatile_structured_binding : Warning< "volatile qualifier in structured binding declaration is deprecated">, InGroup; +def warn_deprecated_altivec_src_compat : Warning< + "Current handling of vector bool and vector pixel types in this context are " + "deprecated. The default behaviour will soon change to that implied by the " + "'-altivec-compat=xl' option">, + InGroup>; + def err_catch_incomplete_ptr : Error< "cannot catch pointer to incomplete type %0">; def err_catch_incomplete_ref : Error< @@ -8574,6 +8574,9 @@ def err_typecheck_expect_scalar_operand : Error< "operand of type %0 where arithmetic or pointer type is required">; def err_typecheck_cond_incompatible_operands : Error< "incompatible operand types%diff{ ($ and $)|}0,1">; +def err_typecheck_expect_flt_or_vector : Error< + "invalid operand of type %0 where floating, complex or " + "a vector of such types is required">; def err_cast_selector_expr : Error< "cannot type cast @selector expression">; def ext_typecheck_cond_incompatible_pointers : ExtWarn< diff --git a/clang/include/clang/Basic/LangOptions.def b/clang/include/clang/Basic/LangOptions.def index 3e92d4e76f268..54869a314a2e4 100644 --- a/clang/include/clang/Basic/LangOptions.def +++ b/clang/include/clang/Basic/LangOptions.def @@ -126,6 +126,8 @@ LANGOPT(WritableStrings , 1, 0, "writable string support") LANGOPT(ConstStrings , 1, 0, "const-qualified string support") ENUM_LANGOPT(LaxVectorConversions, LaxVectorConversionKind, 2, LaxVectorConversionKind::All, "lax vector conversions") +ENUM_LANGOPT(AltivecSrcCompat, AltivecSrcCompatKind, 2, + AltivecSrcCompatKind::Default, "Altivec source compatibility") LANGOPT(ConvergentFunctions, 1, 1, "Assume convergent functions") LANGOPT(AltiVec , 1, 0, "AltiVec-style vector initializers") LANGOPT(ZVector , 1, 0, "System z vector extensions") @@ -197,6 +199,8 @@ COMPATIBLE_LANGOPT(Deprecated , 1, 0, "__DEPRECATED predefined macro") COMPATIBLE_LANGOPT(FastMath , 1, 0, "fast FP math optimizations, and __FAST_MATH__ predefined macro") COMPATIBLE_LANGOPT(FiniteMathOnly , 1, 0, "__FINITE_MATH_ONLY__ predefined macro") COMPATIBLE_LANGOPT(UnsafeFPMath , 1, 0, "Unsafe Floating Point Math") +COMPATIBLE_LANGOPT(ProtectParens , 1, 0, "optimizer honors parentheses " + "when floating-point expressions are evaluated") BENIGN_LANGOPT(AllowFPReassoc , 1, 0, "Permit Floating Point reassociation") BENIGN_LANGOPT(NoHonorNaNs , 1, 0, "Permit Floating Point optimization without regard to NaN") BENIGN_LANGOPT(NoHonorInfs , 1, 0, "Permit Floating Point optimization without regard to infinities") diff --git a/clang/include/clang/Basic/LangOptions.h b/clang/include/clang/Basic/LangOptions.h index 3af11e5c526ea..b82c2775c4e89 100644 --- a/clang/include/clang/Basic/LangOptions.h +++ b/clang/include/clang/Basic/LangOptions.h @@ -249,6 +249,18 @@ class LangOptions : public LangOptionsBase { All, }; + enum class AltivecSrcCompatKind { + // All vector compares produce scalars except vector pixel and vector bool. + // The types vector pixel and vector bool return vector results. + Mixed, + // All vector compares produce vector results as in GCC. + GCC, + // All vector compares produce scalars as in XL. + XL, + // Default clang behaviour. + Default = Mixed, + }; + enum class SignReturnAddressScopeKind { /// No signing for any function. None, diff --git a/clang/include/clang/Basic/TargetInfo.h b/clang/include/clang/Basic/TargetInfo.h index d59bad30e7428..4f0cbf986b31b 100644 --- a/clang/include/clang/Basic/TargetInfo.h +++ b/clang/include/clang/Basic/TargetInfo.h @@ -1162,7 +1162,7 @@ class TargetInfo : public virtual TransferrableTargetInfo, /// Apply changes to the target information with respect to certain /// language options which change the target configuration and adjust /// the language based on the target options where applicable. - virtual void adjust(LangOptions &Opts); + virtual void adjust(DiagnosticsEngine &Diags, LangOptions &Opts); /// Adjust target options based on codegen options. virtual void adjustTargetOptions(const CodeGenOptions &CGOpts, @@ -1424,6 +1424,9 @@ class TargetInfo : public virtual TransferrableTargetInfo, /// Whether the option -fextend-arguments={32,64} is supported on the target. virtual bool supportsExtendIntArgs() const { return false; } + /// Controls if __arithmetic_fence is supported in the targeted backend. + virtual bool checkArithmeticFenceSupported() const { return false; } + /// Gets the default calling convention for the given target and /// declaration context. virtual CallingConv getDefaultCallingConv() const { diff --git a/clang/include/clang/Driver/Options.td b/clang/include/clang/Driver/Options.td index d8ff8d9b14ac6..7646b0089d505 100644 --- a/clang/include/clang/Driver/Options.td +++ b/clang/include/clang/Driver/Options.td @@ -1783,6 +1783,13 @@ defm strict_float_cast_overflow : BoolFOption<"strict-float-cast-overflow", " of the target's native float-to-int conversion instructions">, PosFlag>; +defm protect_parens : BoolFOption<"protect-parens", + LangOpts<"ProtectParens">, DefaultFalse, + PosFlag, + NegFlag>; + def ffor_scope : Flag<["-"], "ffor-scope">, Group; def fno_for_scope : Flag<["-"], "fno-for-scope">, Group; @@ -3300,8 +3307,8 @@ defm aapcs_bitfield_width : BoolOption<"f", "aapcs-bitfield-width", " volatile bit-field width is dictated by the field container type. (ARM only).">>, Group; -def mgeneral_regs_only : Flag<["-"], "mgeneral-regs-only">, Group, - HelpText<"Generate code which only uses the general purpose registers (AArch64 only)">; +def mgeneral_regs_only : Flag<["-"], "mgeneral-regs-only">, Group, + HelpText<"Generate code which only uses the general purpose registers (AArch64/x86 only)">; def mfix_cortex_a53_835769 : Flag<["-"], "mfix-cortex-a53-835769">, Group, HelpText<"Workaround Cortex-A53 erratum 835769 (AArch64 only)">; @@ -3918,6 +3925,18 @@ def u : JoinedOrSeparate<["-"], "u">, Group; def v : Flag<["-"], "v">, Flags<[CC1Option, CoreOption]>, HelpText<"Show commands to run and use verbose output">, MarshallingInfoFlag>; +def altivec_src_compat : Joined<["-"], "faltivec-src-compat=">, + Flags<[CC1Option]>, Group, + HelpText<"Source-level compatibility for Altivec vectors (for PowerPC " + "targets). This includes results of vector comparison (scalar for " + "'xl', vector for 'gcc') as well as behavior when initializing with " + "a scalar (splatting for 'xl', element zero only for 'gcc'). For " + "'mixed', the compatibility is as 'gcc' for 'vector bool/vector " + "pixel' and as 'xl' for other types. Current default is 'mixed'.">, + Values<"mixed,gcc,xl">, + NormalizedValuesScope<"LangOptions::AltivecSrcCompatKind">, + NormalizedValues<["Mixed", "GCC", "XL"]>, + MarshallingInfoEnum, "Mixed">; def verify_debug_info : Flag<["--"], "verify-debug-info">, Flags<[NoXarchOption]>, HelpText<"Verify the binary representation of debug output">; def weak_l : Joined<["-"], "weak-l">, Flags<[LinkerInput]>; @@ -4491,7 +4510,7 @@ defm integer_4_integer_8 : BooleanFFlag<"integer-4-integer-8">, Group, Group; defm module_private : BooleanFFlag<"module-private">, Group; defm pack_derived : BooleanFFlag<"pack-derived">, Group; -defm protect_parens : BooleanFFlag<"protect-parens">, Group; +//defm protect_parens : BooleanFFlag<"protect-parens">, Group; defm range_check : BooleanFFlag<"range-check">, Group; defm real_4_real_10 : BooleanFFlag<"real-4-real-10">, Group; defm real_4_real_16 : BooleanFFlag<"real-4-real-16">, Group; diff --git a/clang/include/clang/Lex/PPCallbacks.h b/clang/include/clang/Lex/PPCallbacks.h index d57be1990caff..bcf49c5777352 100644 --- a/clang/include/clang/Lex/PPCallbacks.h +++ b/clang/include/clang/Lex/PPCallbacks.h @@ -191,6 +191,10 @@ class PPCallbacks { StringRef Str) { } + /// Callback invoked when a \#pragma mark comment is read. + virtual void PragmaMark(SourceLocation Loc, StringRef Trivia) { + } + /// Callback invoked when a \#pragma detect_mismatch directive is /// read. virtual void PragmaDetectMismatch(SourceLocation Loc, StringRef Name, diff --git a/clang/include/clang/Lex/Preprocessor.h b/clang/include/clang/Lex/Preprocessor.h index 16fbf5ea5a5bb..2d6335471383c 100644 --- a/clang/include/clang/Lex/Preprocessor.h +++ b/clang/include/clang/Lex/Preprocessor.h @@ -2365,7 +2365,7 @@ class Preprocessor { public: void HandlePragmaOnce(Token &OnceTok); - void HandlePragmaMark(); + void HandlePragmaMark(Token &MarkTok); void HandlePragmaPoison(); void HandlePragmaSystemHeader(Token &SysHeaderTok); void HandlePragmaDependency(Token &DependencyTok); diff --git a/clang/include/clang/Sema/Sema.h b/clang/include/clang/Sema/Sema.h index 94b144604af5c..aa5a33a67875e 100644 --- a/clang/include/clang/Sema/Sema.h +++ b/clang/include/clang/Sema/Sema.h @@ -36,6 +36,7 @@ #include "clang/AST/TypeLoc.h" #include "clang/AST/TypeOrdering.h" #include "clang/Basic/BitmaskEnum.h" +#include "clang/Basic/Builtins.h" #include "clang/Basic/DiagnosticSema.h" #include "clang/Basic/ExpressionTraits.h" #include "clang/Basic/Module.h" @@ -5022,8 +5023,7 @@ class Sema final { bool isCopyElidable() const { return S == MoveEligibleAndCopyElidable; } }; NamedReturnInfo getNamedReturnInfo(Expr *&E, bool ForceCXX2b = false); - NamedReturnInfo getNamedReturnInfo(const VarDecl *VD, - bool ForceCXX20 = false); + NamedReturnInfo getNamedReturnInfo(const VarDecl *VD); const VarDecl *getCopyElisionCandidate(NamedReturnInfo &Info, QualType ReturnType); @@ -5672,6 +5672,8 @@ class Sema final { Expr *ExecConfig = nullptr, bool IsExecConfig = false, bool AllowRecovery = false); + Expr *BuildBuiltinCallExpr(SourceLocation Loc, Builtin::ID Id, + MultiExprArg CallArgs); enum class AtomicArgumentOrder { API, AST }; ExprResult BuildAtomicExpr(SourceRange CallRange, SourceRange ExprRange, @@ -12929,6 +12931,7 @@ class Sema final { private: bool SemaBuiltinPrefetch(CallExpr *TheCall); bool SemaBuiltinAllocaWithAlign(CallExpr *TheCall); + bool SemaBuiltinArithmeticFence(CallExpr *TheCall); bool SemaBuiltinAssume(CallExpr *TheCall); bool SemaBuiltinAssumeAligned(CallExpr *TheCall); bool SemaBuiltinLongjmp(CallExpr *TheCall); diff --git a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h index f59b254094db8..bb598af681666 100644 --- a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h +++ b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h @@ -52,6 +52,8 @@ class CompoundValData : public llvm::FoldingSetNode { iterator begin() const { return L.begin(); } iterator end() const { return L.end(); } + QualType getType() const { return T; } + static void Profile(llvm::FoldingSetNodeID& ID, QualType T, llvm::ImmutableList L); diff --git a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h index bf00fd98a4616..c67df1e51b4ff 100644 --- a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h +++ b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/RangedConstraintManager.h @@ -213,6 +213,9 @@ class RangeSet { /// where N = size(What) RangeSet negate(RangeSet What); + /// Return associated value factory. + BasicValueFactory &getValueFactory() const { return ValueFactory; } + private: /// Return a persistent version of the given container. RangeSet makePersistent(ContainerType &&From); diff --git a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h index b1c33713febd9..6199c8d8d179c 100644 --- a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h +++ b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/SVals.h @@ -201,6 +201,19 @@ class SVal { SymExpr::symbol_iterator symbol_end() const { return SymExpr::symbol_end(); } + + /// Try to get a reasonable type for the given value. + /// + /// \returns The best approximation of the value type or Null. + /// In theory, all symbolic values should be typed, but this function + /// is still a WIP and might have a few blind spots. + /// + /// \note This function should not be used when the user has access to the + /// bound expression AST node as well, since AST always has exact types. + /// + /// \note Loc values are interpreted as pointer rvalues for the purposes of + /// this method. + QualType getType(const ASTContext &) const; }; inline raw_ostream &operator<<(raw_ostream &os, clang::ento::SVal V) { diff --git a/clang/lib/AST/ASTImporter.cpp b/clang/lib/AST/ASTImporter.cpp index ed8a869a7aa40..89ed2718a54f0 100644 --- a/clang/lib/AST/ASTImporter.cpp +++ b/clang/lib/AST/ASTImporter.cpp @@ -496,6 +496,7 @@ namespace clang { ExpectedDecl VisitAccessSpecDecl(AccessSpecDecl *D); ExpectedDecl VisitStaticAssertDecl(StaticAssertDecl *D); ExpectedDecl VisitTranslationUnitDecl(TranslationUnitDecl *D); + ExpectedDecl VisitBindingDecl(BindingDecl *D); ExpectedDecl VisitNamespaceDecl(NamespaceDecl *D); ExpectedDecl VisitNamespaceAliasDecl(NamespaceAliasDecl *D); ExpectedDecl VisitTypedefNameDecl(TypedefNameDecl *D, bool IsAlias); @@ -2297,6 +2298,35 @@ ExpectedDecl ASTNodeImporter::VisitTranslationUnitDecl(TranslationUnitDecl *D) { return ToD; } +ExpectedDecl ASTNodeImporter::VisitBindingDecl(BindingDecl *D) { + DeclContext *DC, *LexicalDC; + DeclarationName Name; + SourceLocation Loc; + NamedDecl *ToND; + if (Error Err = ImportDeclParts(D, DC, LexicalDC, Name, ToND, Loc)) + return std::move(Err); + if (ToND) + return ToND; + + Error Err = Error::success(); + QualType ToType = importChecked(Err, D->getType()); + Expr *ToBinding = importChecked(Err, D->getBinding()); + ValueDecl *ToDecomposedDecl = importChecked(Err, D->getDecomposedDecl()); + if (Err) + return std::move(Err); + + BindingDecl *ToD; + if (GetImportedOrCreateDecl(ToD, D, Importer.getToContext(), DC, Loc, + Name.getAsIdentifierInfo())) + return ToD; + + ToD->setBinding(ToType, ToBinding); + ToD->setDecomposedDecl(ToDecomposedDecl); + addDeclToContexts(D, ToD); + + return ToD; +} + ExpectedDecl ASTNodeImporter::VisitAccessSpecDecl(AccessSpecDecl *D) { ExpectedSLoc LocOrErr = import(D->getLocation()); if (!LocOrErr) diff --git a/clang/lib/AST/DeclPrinter.cpp b/clang/lib/AST/DeclPrinter.cpp index 965c32c8804be..f2d13d90ab362 100644 --- a/clang/lib/AST/DeclPrinter.cpp +++ b/clang/lib/AST/DeclPrinter.cpp @@ -1152,7 +1152,6 @@ void DeclPrinter::VisitTemplateDecl(const TemplateDecl *D) { Out << "concept " << Concept->getName() << " = " ; Concept->getConstraintExpr()->printPretty(Out, nullptr, Policy, Indentation, "\n", &Context); - Out << ";"; } } diff --git a/clang/lib/AST/Expr.cpp b/clang/lib/AST/Expr.cpp index 0f303c2c62be5..065acdb5ac537 100644 --- a/clang/lib/AST/Expr.cpp +++ b/clang/lib/AST/Expr.cpp @@ -1453,7 +1453,7 @@ CallExpr::CallExpr(StmtClass SC, Expr *Fn, ArrayRef PreArgs, for (unsigned I = Args.size(); I != NumArgs; ++I) setArg(I, nullptr); - setDependence(computeDependence(this, PreArgs)); + this->computeDependence(); CallExprBits.HasFPFeatures = FPFeatures.requiresTrailingStorage(); if (hasStoredFPFeatures()) diff --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp index 5e850900b5741..5136c88ffb98e 100644 --- a/clang/lib/AST/ExprConstant.cpp +++ b/clang/lib/AST/ExprConstant.cpp @@ -13724,6 +13724,9 @@ bool FloatExprEvaluator::VisitCallExpr(const CallExpr *E) { Result.changeSign(); return true; + case Builtin::BI__arithmetic_fence: + return EvaluateFloat(E->getArg(0), Result, Info); + // FIXME: Builtin::BI__builtin_powi // FIXME: Builtin::BI__builtin_powif // FIXME: Builtin::BI__builtin_powil diff --git a/clang/lib/AST/JSONNodeDumper.cpp b/clang/lib/AST/JSONNodeDumper.cpp index e4511b66a13c5..44a0badb84323 100644 --- a/clang/lib/AST/JSONNodeDumper.cpp +++ b/clang/lib/AST/JSONNodeDumper.cpp @@ -185,6 +185,35 @@ void JSONNodeDumper::Visit(const GenericSelectionExpr::ConstAssociation &A) { attributeOnlyIfTrue("selected", A.isSelected()); } +void JSONNodeDumper::Visit(const concepts::Requirement *R) { + if (!R) + return; + + switch (R->getKind()) { + case concepts::Requirement::RK_Type: + JOS.attribute("kind", "TypeRequirement"); + break; + case concepts::Requirement::RK_Simple: + JOS.attribute("kind", "SimpleRequirement"); + break; + case concepts::Requirement::RK_Compound: + JOS.attribute("kind", "CompoundRequirement"); + break; + case concepts::Requirement::RK_Nested: + JOS.attribute("kind", "NestedRequirement"); + break; + } + + if (auto *ER = dyn_cast(R)) + attributeOnlyIfTrue("noexcept", ER->hasNoexceptRequirement()); + + attributeOnlyIfTrue("isDependent", R->isDependent()); + if (!R->isDependent()) + JOS.attribute("satisfied", R->isSatisfied()); + attributeOnlyIfTrue("containsUnexpandedPack", + R->containsUnexpandedParameterPack()); +} + void JSONNodeDumper::Visit(const APValue &Value, QualType Ty) { std::string Str; llvm::raw_string_ostream OS(Str); @@ -713,9 +742,13 @@ void JSONNodeDumper::VisitMemberPointerType(const MemberPointerType *MPT) { void JSONNodeDumper::VisitNamedDecl(const NamedDecl *ND) { if (ND && ND->getDeclName()) { JOS.attribute("name", ND->getNameAsString()); - std::string MangledName = ASTNameGen.getName(ND); - if (!MangledName.empty()) - JOS.attribute("mangledName", MangledName); + // FIXME: There are likely other contexts in which it makes no sense to ask + // for a mangled name. + if (!isa(ND->getDeclContext())) { + std::string MangledName = ASTNameGen.getName(ND); + if (!MangledName.empty()) + JOS.attribute("mangledName", MangledName); + } } } @@ -1418,6 +1451,11 @@ void JSONNodeDumper::VisitCXXDependentScopeMemberExpr( } } +void JSONNodeDumper::VisitRequiresExpr(const RequiresExpr *RE) { + if (!RE->isValueDependent()) + JOS.attribute("satisfied", RE->isSatisfied()); +} + void JSONNodeDumper::VisitIntegerLiteral(const IntegerLiteral *IL) { llvm::SmallString<16> Buffer; IL->getValue().toString(Buffer, diff --git a/clang/lib/AST/TextNodeDumper.cpp b/clang/lib/AST/TextNodeDumper.cpp index 149590f42f6dd..286a3d53a2c6c 100644 --- a/clang/lib/AST/TextNodeDumper.cpp +++ b/clang/lib/AST/TextNodeDumper.cpp @@ -356,6 +356,46 @@ void TextNodeDumper::Visit(const GenericSelectionExpr::ConstAssociation &A) { OS << " selected"; } +void TextNodeDumper::Visit(const concepts::Requirement *R) { + if (!R) { + ColorScope Color(OS, ShowColors, NullColor); + OS << "<<>> Requirement"; + return; + } + + { + ColorScope Color(OS, ShowColors, StmtColor); + switch (R->getKind()) { + case concepts::Requirement::RK_Type: + OS << "TypeRequirement"; + break; + case concepts::Requirement::RK_Simple: + OS << "SimpleRequirement"; + break; + case concepts::Requirement::RK_Compound: + OS << "CompoundRequirement"; + break; + case concepts::Requirement::RK_Nested: + OS << "NestedRequirement"; + break; + } + } + + dumpPointer(R); + + if (auto *ER = dyn_cast(R)) { + if (ER->hasNoexceptRequirement()) + OS << " noexcept"; + } + + if (R->isDependent()) + OS << " dependent"; + else + OS << (R->isSatisfied() ? " satisfied" : " unsatisfied"); + if (R->containsUnexpandedParameterPack()) + OS << " contains_unexpanded_pack"; +} + static double GetApproxValue(const llvm::APFloat &F) { llvm::APFloat V = F; bool ignored; @@ -1369,6 +1409,12 @@ void TextNodeDumper::VisitConceptSpecializationExpr( dumpBareDeclRef(Node->getFoundDecl()); } +void TextNodeDumper::VisitRequiresExpr( + const RequiresExpr *Node) { + if (!Node->isValueDependent()) + OS << (Node->isSatisfied() ? " satisfied" : " unsatisfied"); +} + void TextNodeDumper::VisitRValueReferenceType(const ReferenceType *T) { if (T->isSpelledAsLValue()) OS << " written as lvalue reference"; diff --git a/clang/lib/AST/TypePrinter.cpp b/clang/lib/AST/TypePrinter.cpp index 685d47c8b740f..6e36af106d66c 100644 --- a/clang/lib/AST/TypePrinter.cpp +++ b/clang/lib/AST/TypePrinter.cpp @@ -1456,8 +1456,7 @@ void TypePrinter::printTemplateId(const TemplateSpecializationType *T, T->getTemplateName().print(OS, Policy); } - const TemplateParameterList *TPL = TD ? TD->getTemplateParameters() : nullptr; - printTemplateArgumentList(OS, T->template_arguments(), Policy, TPL); + printTemplateArgumentList(OS, T->template_arguments(), Policy); spaceBeforePlaceHolder(OS); } diff --git a/clang/lib/Analysis/ThreadSafety.cpp b/clang/lib/Analysis/ThreadSafety.cpp index 3eb1b640e7290..5b2c882c4235a 100644 --- a/clang/lib/Analysis/ThreadSafety.cpp +++ b/clang/lib/Analysis/ThreadSafety.cpp @@ -865,7 +865,7 @@ class LockableFactEntry : public FactEntry { handleRemovalFromIntersection(const FactSet &FSet, FactManager &FactMan, SourceLocation JoinLoc, LockErrorKind LEK, ThreadSafetyHandler &Handler) const override { - if (!managed() && !asserted() && !negative() && !isUniversal()) { + if (!asserted() && !negative() && !isUniversal()) { Handler.handleMutexHeldEndOfScope("mutex", toString(), loc(), JoinLoc, LEK); } @@ -1052,13 +1052,13 @@ class ThreadSafetyAnalyzer { bool join(const FactEntry &a, const FactEntry &b); - void intersectAndWarn(FactSet &FSet1, const FactSet &FSet2, - SourceLocation JoinLoc, LockErrorKind LEK1, - LockErrorKind LEK2); + void intersectAndWarn(FactSet &EntrySet, const FactSet &ExitSet, + SourceLocation JoinLoc, LockErrorKind EntryLEK, + LockErrorKind ExitLEK); - void intersectAndWarn(FactSet &FSet1, const FactSet &FSet2, - SourceLocation JoinLoc, LockErrorKind LEK1) { - intersectAndWarn(FSet1, FSet2, JoinLoc, LEK1, LEK1); + void intersectAndWarn(FactSet &EntrySet, const FactSet &ExitSet, + SourceLocation JoinLoc, LockErrorKind LEK) { + intersectAndWarn(EntrySet, ExitSet, JoinLoc, LEK, LEK); } void runAnalysis(AnalysisDeclContext &AC); @@ -2219,42 +2219,44 @@ bool ThreadSafetyAnalyzer::join(const FactEntry &A, const FactEntry &B) { /// are the same. In the event of a difference, we use the intersection of these /// two locksets at the start of D. /// -/// \param FSet1 The first lockset. -/// \param FSet2 The second lockset. +/// \param EntrySet A lockset for entry into a (possibly new) block. +/// \param ExitSet The lockset on exiting a preceding block. /// \param JoinLoc The location of the join point for error reporting -/// \param LEK1 The error message to report if a mutex is missing from LSet1 -/// \param LEK2 The error message to report if a mutex is missing from Lset2 -void ThreadSafetyAnalyzer::intersectAndWarn(FactSet &FSet1, - const FactSet &FSet2, +/// \param EntryLEK The warning if a mutex is missing from \p EntrySet. +/// \param ExitLEK The warning if a mutex is missing from \p ExitSet. +void ThreadSafetyAnalyzer::intersectAndWarn(FactSet &EntrySet, + const FactSet &ExitSet, SourceLocation JoinLoc, - LockErrorKind LEK1, - LockErrorKind LEK2) { - FactSet FSet1Orig = FSet1; - - // Find locks in FSet2 that conflict or are not in FSet1, and warn. - for (const auto &Fact : FSet2) { - const FactEntry &LDat2 = FactMan[Fact]; - - FactSet::iterator Iter1 = FSet1.findLockIter(FactMan, LDat2); - if (Iter1 != FSet1.end()) { - if (join(FactMan[*Iter1], LDat2) && LEK1 == LEK_LockedSomePredecessors) - *Iter1 = Fact; - } else { - LDat2.handleRemovalFromIntersection(FSet2, FactMan, JoinLoc, LEK1, - Handler); + LockErrorKind EntryLEK, + LockErrorKind ExitLEK) { + FactSet EntrySetOrig = EntrySet; + + // Find locks in ExitSet that conflict or are not in EntrySet, and warn. + for (const auto &Fact : ExitSet) { + const FactEntry &ExitFact = FactMan[Fact]; + + FactSet::iterator EntryIt = EntrySet.findLockIter(FactMan, ExitFact); + if (EntryIt != EntrySet.end()) { + if (join(FactMan[*EntryIt], ExitFact) && + EntryLEK == LEK_LockedSomePredecessors) + *EntryIt = Fact; + } else if (!ExitFact.managed()) { + ExitFact.handleRemovalFromIntersection(ExitSet, FactMan, JoinLoc, + EntryLEK, Handler); } } - // Find locks in FSet1 that are not in FSet2, and remove them. - for (const auto &Fact : FSet1Orig) { - const FactEntry *LDat1 = &FactMan[Fact]; - const FactEntry *LDat2 = FSet2.findLock(FactMan, *LDat1); + // Find locks in EntrySet that are not in ExitSet, and remove them. + for (const auto &Fact : EntrySetOrig) { + const FactEntry *EntryFact = &FactMan[Fact]; + const FactEntry *ExitFact = ExitSet.findLock(FactMan, *EntryFact); - if (!LDat2) { - LDat1->handleRemovalFromIntersection(FSet1Orig, FactMan, JoinLoc, LEK2, - Handler); - if (LEK2 == LEK_LockedSomePredecessors) - FSet1.removeLock(FactMan, *LDat1); + if (!ExitFact) { + if (!EntryFact->managed() || ExitLEK == LEK_LockedSomeLoopIterations) + EntryFact->handleRemovalFromIntersection(EntrySetOrig, FactMan, JoinLoc, + ExitLEK, Handler); + if (ExitLEK == LEK_LockedSomePredecessors) + EntrySet.removeLock(FactMan, *EntryFact); } } } @@ -2528,7 +2530,7 @@ void ThreadSafetyAnalyzer::runAnalysis(AnalysisDeclContext &AC) { CFGBlock *FirstLoopBlock = *SI; CFGBlockInfo *PreLoop = &BlockInfo[FirstLoopBlock->getBlockID()]; CFGBlockInfo *LoopEnd = &BlockInfo[CurrBlockID]; - intersectAndWarn(LoopEnd->ExitSet, PreLoop->EntrySet, PreLoop->EntryLoc, + intersectAndWarn(PreLoop->EntrySet, LoopEnd->ExitSet, PreLoop->EntryLoc, LEK_LockedSomeLoopIterations); } } diff --git a/clang/lib/Basic/TargetInfo.cpp b/clang/lib/Basic/TargetInfo.cpp index e73b4a3a40c74..88086fa2fed74 100644 --- a/clang/lib/Basic/TargetInfo.cpp +++ b/clang/lib/Basic/TargetInfo.cpp @@ -346,7 +346,7 @@ bool TargetInfo::isTypeSigned(IntType T) { /// Apply changes to the target information with respect to certain /// language options which change the target configuration and adjust /// the language based on the target options where applicable. -void TargetInfo::adjust(LangOptions &Opts) { +void TargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) { if (Opts.NoBitFieldTypeAlign) UseBitFieldTypeAlignment = false; @@ -430,6 +430,11 @@ void TargetInfo::adjust(LangOptions &Opts) { // its corresponding signed type. PaddingOnUnsignedFixedPoint |= Opts.PaddingOnUnsignedFixedPoint; CheckFixedPointBits(); + + if (Opts.ProtectParens && !checkArithmeticFenceSupported()) { + Diags.Report(diag::err_opt_not_valid_on_target) << "-fprotect-parens"; + Opts.ProtectParens = false; + } } bool TargetInfo::initFeatureMap( diff --git a/clang/lib/Basic/Targets/AMDGPU.cpp b/clang/lib/Basic/Targets/AMDGPU.cpp index 595132e2e70ba..fac786dbcf9e2 100644 --- a/clang/lib/Basic/Targets/AMDGPU.cpp +++ b/clang/lib/Basic/Targets/AMDGPU.cpp @@ -358,8 +358,8 @@ AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple, MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64; } -void AMDGPUTargetInfo::adjust(LangOptions &Opts) { - TargetInfo::adjust(Opts); +void AMDGPUTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) { + TargetInfo::adjust(Diags, Opts); // ToDo: There are still a few places using default address space as private // address space in OpenCL, which needs to be cleaned up, then Opts.OpenCL // can be removed from the following line. diff --git a/clang/lib/Basic/Targets/AMDGPU.h b/clang/lib/Basic/Targets/AMDGPU.h index fe5c61c6ba2bb..244a6e0446905 100644 --- a/clang/lib/Basic/Targets/AMDGPU.h +++ b/clang/lib/Basic/Targets/AMDGPU.h @@ -93,7 +93,7 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo { void setAddressSpaceMap(bool DefaultIsPrivate); - void adjust(LangOptions &Opts) override; + void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override; uint64_t getPointerWidthV(unsigned AddrSpace) const override { if (isR600(getTriple())) diff --git a/clang/lib/Basic/Targets/NVPTX.h b/clang/lib/Basic/Targets/NVPTX.h index bff8be61400f5..68f8b736e9456 100644 --- a/clang/lib/Basic/Targets/NVPTX.h +++ b/clang/lib/Basic/Targets/NVPTX.h @@ -179,8 +179,8 @@ class LLVM_LIBRARY_VISIBILITY NVPTXTargetInfo : public TargetInfo { return CCCR_Warning; } - void adjust(LangOptions &Opts) override { - TargetInfo::adjust(Opts); + void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override { + TargetInfo::adjust(Diags, Opts); // FIXME: Needed for compiling SYCL to PTX. TLSSupported = TLSSupported || Opts.SYCLIsDevice; } diff --git a/clang/lib/Basic/Targets/OSTargets.h b/clang/lib/Basic/Targets/OSTargets.h index ce56b4f1f005e..335ca5635642c 100644 --- a/clang/lib/Basic/Targets/OSTargets.h +++ b/clang/lib/Basic/Targets/OSTargets.h @@ -948,8 +948,16 @@ class LLVM_LIBRARY_VISIBILITY EmscriptenTargetInfo } public: - explicit EmscriptenTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts) - : WebAssemblyOSTargetInfo(Triple, Opts) {} + explicit EmscriptenTargetInfo(const llvm::Triple &Triple, + const TargetOptions &Opts) + : WebAssemblyOSTargetInfo(Triple, Opts) { + // Keeping the alignment of long double to 8 bytes even though its size is + // 16 bytes allows emscripten to have an 8-byte-aligned max_align_t which + // in turn gives is a 8-byte aligned malloc. + // Emscripten's ABI is unstable and we may change this back to 128 to match + // the WebAssembly default in the future. + this->LongDoubleAlign = 64; + } }; } // namespace targets diff --git a/clang/lib/Basic/Targets/PPC.cpp b/clang/lib/Basic/Targets/PPC.cpp index 6860b5e5d02fa..d431dda970222 100644 --- a/clang/lib/Basic/Targets/PPC.cpp +++ b/clang/lib/Basic/Targets/PPC.cpp @@ -614,10 +614,10 @@ void PPCTargetInfo::fillValidCPUList(SmallVectorImpl &Values) const { Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames)); } -void PPCTargetInfo::adjust(LangOptions &Opts) { +void PPCTargetInfo::adjust(DiagnosticsEngine &Diags, LangOptions &Opts) { if (HasAltivec) Opts.AltiVec = 1; - TargetInfo::adjust(Opts); + TargetInfo::adjust(Diags, Opts); if (LongDoubleFormat != &llvm::APFloat::IEEEdouble()) LongDoubleFormat = Opts.PPCIEEELongDouble ? &llvm::APFloat::IEEEquad() diff --git a/clang/lib/Basic/Targets/PPC.h b/clang/lib/Basic/Targets/PPC.h index 554f2174fee00..18ee1194c759d 100644 --- a/clang/lib/Basic/Targets/PPC.h +++ b/clang/lib/Basic/Targets/PPC.h @@ -89,7 +89,7 @@ class LLVM_LIBRARY_VISIBILITY PPCTargetInfo : public TargetInfo { } // Set the language option for altivec based on our value. - void adjust(LangOptions &Opts) override; + void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override; // Note: GCC recognizes the following additional cpus: // 401, 403, 405, 405fp, 440fp, 464, 464fp, 476, 476fp, 505, 740, 801, diff --git a/clang/lib/Basic/Targets/SPIR.h b/clang/lib/Basic/Targets/SPIR.h index 977fc48a4fee5..6f6adfc0b3763 100644 --- a/clang/lib/Basic/Targets/SPIR.h +++ b/clang/lib/Basic/Targets/SPIR.h @@ -136,8 +136,8 @@ class LLVM_LIBRARY_VISIBILITY SPIRTargetInfo : public TargetInfo { AddrSpaceMap = DefaultIsGeneric ? &SPIRDefIsGenMap : &SPIRDefIsPrivMap; } - void adjust(LangOptions &Opts) override { - TargetInfo::adjust(Opts); + void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override { + TargetInfo::adjust(Diags, Opts); // NOTE: SYCL specification considers unannotated pointers and references // to be pointing to the generic address space. See section 5.9.3 of // SYCL 2020 specification. diff --git a/clang/lib/Basic/Targets/WebAssembly.cpp b/clang/lib/Basic/Targets/WebAssembly.cpp index 2a5055c3d534b..7ef79849cb75d 100644 --- a/clang/lib/Basic/Targets/WebAssembly.cpp +++ b/clang/lib/Basic/Targets/WebAssembly.cpp @@ -234,7 +234,8 @@ ArrayRef WebAssemblyTargetInfo::getTargetBuiltins() const { Builtin::FirstTSBuiltin); } -void WebAssemblyTargetInfo::adjust(LangOptions &Opts) { +void WebAssemblyTargetInfo::adjust(DiagnosticsEngine &Diags, + LangOptions &Opts) { // If the Atomics feature isn't available, turn off POSIXThreads and // ThreadModel, so that we don't predefine _REENTRANT or __STDCPP_THREADS__. if (!HasAtomics) { diff --git a/clang/lib/Basic/Targets/WebAssembly.h b/clang/lib/Basic/Targets/WebAssembly.h index 70115183e46b9..b29730c5d706b 100644 --- a/clang/lib/Basic/Targets/WebAssembly.h +++ b/clang/lib/Basic/Targets/WebAssembly.h @@ -138,7 +138,7 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public TargetInfo { bool hasProtectedVisibility() const override { return false; } - void adjust(LangOptions &Opts) override; + void adjust(DiagnosticsEngine &Diags, LangOptions &Opts) override; }; class LLVM_LIBRARY_VISIBILITY WebAssembly32TargetInfo diff --git a/clang/lib/Basic/Targets/X86.cpp b/clang/lib/Basic/Targets/X86.cpp index 3143a70adf858..9db96c20250f6 100644 --- a/clang/lib/Basic/Targets/X86.cpp +++ b/clang/lib/Basic/Targets/X86.cpp @@ -117,7 +117,20 @@ bool X86TargetInfo::initFeatureMap( for (auto &F : CPUFeatures) setFeatureEnabled(Features, F, true); - if (!TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec)) + std::vector UpdatedFeaturesVec; + for (const auto &Feature : FeaturesVec) { + // Expand general-regs-only to -x86, -mmx and -sse + if (Feature == "+general-regs-only") { + UpdatedFeaturesVec.push_back("-x87"); + UpdatedFeaturesVec.push_back("-mmx"); + UpdatedFeaturesVec.push_back("-sse"); + continue; + } + + UpdatedFeaturesVec.push_back(Feature); + } + + if (!TargetInfo::initFeatureMap(Features, Diags, CPU, UpdatedFeaturesVec)) return false; // Can't do this earlier because we need to be able to explicitly enable @@ -126,20 +139,20 @@ bool X86TargetInfo::initFeatureMap( // Enable popcnt if sse4.2 is enabled and popcnt is not explicitly disabled. auto I = Features.find("sse4.2"); if (I != Features.end() && I->getValue() && - llvm::find(FeaturesVec, "-popcnt") == FeaturesVec.end()) + llvm::find(UpdatedFeaturesVec, "-popcnt") == UpdatedFeaturesVec.end()) Features["popcnt"] = true; // Additionally, if SSE is enabled and mmx is not explicitly disabled, // then enable MMX. I = Features.find("sse"); if (I != Features.end() && I->getValue() && - llvm::find(FeaturesVec, "-mmx") == FeaturesVec.end()) + llvm::find(UpdatedFeaturesVec, "-mmx") == UpdatedFeaturesVec.end()) Features["mmx"] = true; // Enable xsave if avx is enabled and xsave is not explicitly disabled. I = Features.find("avx"); if (I != Features.end() && I->getValue() && - llvm::find(FeaturesVec, "-xsave") == FeaturesVec.end()) + llvm::find(UpdatedFeaturesVec, "-xsave") == UpdatedFeaturesVec.end()) Features["xsave"] = true; return true; @@ -866,6 +879,7 @@ bool X86TargetInfo::isValidFeatureName(StringRef Name) const { .Case("fma4", true) .Case("fsgsbase", true) .Case("fxsr", true) + .Case("general-regs-only", true) .Case("gfni", true) .Case("hreset", true) .Case("invpcid", true) diff --git a/clang/lib/Basic/Targets/X86.h b/clang/lib/Basic/Targets/X86.h index 7639ea835ebc7..e798962617a30 100644 --- a/clang/lib/Basic/Targets/X86.h +++ b/clang/lib/Basic/Targets/X86.h @@ -362,6 +362,8 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo { } } + bool checkArithmeticFenceSupported() const override { return true; } + CallingConv getDefaultCallingConv() const override { return CC_C; } diff --git a/clang/lib/CodeGen/CGBuiltin.cpp b/clang/lib/CodeGen/CGBuiltin.cpp index ef79d82c0473c..0ae530cfe3d48 100644 --- a/clang/lib/CodeGen/CGBuiltin.cpp +++ b/clang/lib/CodeGen/CGBuiltin.cpp @@ -1681,7 +1681,6 @@ llvm::Function *CodeGenFunction::generateBuiltinOSLogHelperFunction( } QualType ReturnTy = Ctx.VoidTy; - QualType FuncionTy = Ctx.getFunctionType(ReturnTy, ArgTys, {}); // The helper function has linkonce_odr linkage to enable the linker to merge // identical functions. To ensure the merging always happens, 'noinline' is @@ -1701,14 +1700,7 @@ llvm::Function *CodeGenFunction::generateBuiltinOSLogHelperFunction( Fn->addFnAttr(llvm::Attribute::NoInline); auto NL = ApplyDebugLocation::CreateEmpty(*this); - IdentifierInfo *II = &Ctx.Idents.get(Name); - FunctionDecl *FD = FunctionDecl::Create( - Ctx, Ctx.getTranslationUnitDecl(), SourceLocation(), SourceLocation(), II, - FuncionTy, nullptr, SC_PrivateExtern, false, false); - // Avoid generating debug location info for the function. - FD->setImplicit(); - - StartFunction(FD, ReturnTy, Fn, FI, Args); + StartFunction(GlobalDecl(), ReturnTy, Fn, FI, Args); // Create a scope with an artificial location for the body of this function. auto AL = ApplyDebugLocation::CreateArtificial(*this); @@ -2833,6 +2825,36 @@ RValue CodeGenFunction::EmitBuiltinExpr(const GlobalDecl GD, unsigned BuiltinID, Function *FnAssume = CGM.getIntrinsic(Intrinsic::assume); return RValue::get(Builder.CreateCall(FnAssume, ArgValue)); } + case Builtin::BI__arithmetic_fence: { + // Create the builtin call if FastMath is selected, and the target + // supports the builtin, otherwise just return the argument. + CodeGenFunction::CGFPOptionsRAII FPOptsRAII(*this, E); + llvm::FastMathFlags FMF = Builder.getFastMathFlags(); + bool isArithmeticFenceEnabled = + FMF.allowReassoc() && + getContext().getTargetInfo().checkArithmeticFenceSupported(); + QualType ArgType = E->getArg(0)->getType(); + if (ArgType->isComplexType()) { + if (isArithmeticFenceEnabled) { + QualType ElementType = ArgType->castAs()->getElementType(); + ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); + Value *Real = Builder.CreateArithmeticFence(ComplexVal.first, + ConvertType(ElementType)); + Value *Imag = Builder.CreateArithmeticFence(ComplexVal.second, + ConvertType(ElementType)); + return RValue::getComplex(std::make_pair(Real, Imag)); + } + ComplexPairTy ComplexVal = EmitComplexExpr(E->getArg(0)); + Value *Real = ComplexVal.first; + Value *Imag = ComplexVal.second; + return RValue::getComplex(std::make_pair(Real, Imag)); + } + Value *ArgValue = EmitScalarExpr(E->getArg(0)); + if (isArithmeticFenceEnabled) + return RValue::get( + Builder.CreateArithmeticFence(ArgValue, ConvertType(ArgType))); + return RValue::get(ArgValue); + } case Builtin::BI__builtin_bswap16: case Builtin::BI__builtin_bswap32: case Builtin::BI__builtin_bswap64: { @@ -11730,14 +11752,14 @@ static Value *EmitX86MaskedStore(CodeGenFunction &CGF, ArrayRef Ops, static Value *EmitX86MaskedLoad(CodeGenFunction &CGF, ArrayRef Ops, Align Alignment) { // Cast the pointer to right type. - Value *Ptr = CGF.Builder.CreateBitCast(Ops[0], - llvm::PointerType::getUnqual(Ops[1]->getType())); + llvm::Type *Ty = Ops[1]->getType(); + Value *Ptr = + CGF.Builder.CreateBitCast(Ops[0], llvm::PointerType::getUnqual(Ty)); Value *MaskVec = getMaskVecValue( - CGF, Ops[2], - cast(Ops[1]->getType())->getNumElements()); + CGF, Ops[2], cast(Ty)->getNumElements()); - return CGF.Builder.CreateMaskedLoad(Ptr, Alignment, MaskVec, Ops[1]); + return CGF.Builder.CreateMaskedLoad(Ty, Ptr, Alignment, MaskVec, Ops[1]); } static Value *EmitX86ExpandLoad(CodeGenFunction &CGF, @@ -14742,27 +14764,50 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, case X86::BI__builtin_ia32_aesenc256kl_u8: case X86::BI__builtin_ia32_aesdec256kl_u8: { Intrinsic::ID IID; + StringRef BlockName; switch (BuiltinID) { - default: llvm_unreachable("Unexpected builtin"); + default: + llvm_unreachable("Unexpected builtin"); case X86::BI__builtin_ia32_aesenc128kl_u8: IID = Intrinsic::x86_aesenc128kl; + BlockName = "aesenc128kl"; break; case X86::BI__builtin_ia32_aesdec128kl_u8: IID = Intrinsic::x86_aesdec128kl; + BlockName = "aesdec128kl"; break; case X86::BI__builtin_ia32_aesenc256kl_u8: IID = Intrinsic::x86_aesenc256kl; + BlockName = "aesenc256kl"; break; case X86::BI__builtin_ia32_aesdec256kl_u8: IID = Intrinsic::x86_aesdec256kl; + BlockName = "aesdec256kl"; break; } Value *Call = Builder.CreateCall(CGM.getIntrinsic(IID), {Ops[1], Ops[2]}); - Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 1), - Ops[0]); + BasicBlock *NoError = + createBasicBlock(BlockName + "_no_error", this->CurFn); + BasicBlock *Error = createBasicBlock(BlockName + "_error", this->CurFn); + BasicBlock *End = createBasicBlock(BlockName + "_end", this->CurFn); + + Value *Ret = Builder.CreateExtractValue(Call, 0); + Value *Succ = Builder.CreateTrunc(Ret, Builder.getInt1Ty()); + Value *Out = Builder.CreateExtractValue(Call, 1); + Builder.CreateCondBr(Succ, NoError, Error); + Builder.SetInsertPoint(NoError); + Builder.CreateDefaultAlignedStore(Out, Ops[0]); + Builder.CreateBr(End); + + Builder.SetInsertPoint(Error); + Constant *Zero = llvm::Constant::getNullValue(Out->getType()); + Builder.CreateDefaultAlignedStore(Zero, Ops[0]); + Builder.CreateBr(End); + + Builder.SetInsertPoint(End); return Builder.CreateExtractValue(Call, 0); } case X86::BI__builtin_ia32_aesencwide128kl_u8: @@ -14770,18 +14815,23 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, case X86::BI__builtin_ia32_aesencwide256kl_u8: case X86::BI__builtin_ia32_aesdecwide256kl_u8: { Intrinsic::ID IID; + StringRef BlockName; switch (BuiltinID) { case X86::BI__builtin_ia32_aesencwide128kl_u8: IID = Intrinsic::x86_aesencwide128kl; + BlockName = "aesencwide128kl"; break; case X86::BI__builtin_ia32_aesdecwide128kl_u8: IID = Intrinsic::x86_aesdecwide128kl; + BlockName = "aesdecwide128kl"; break; case X86::BI__builtin_ia32_aesencwide256kl_u8: IID = Intrinsic::x86_aesencwide256kl; + BlockName = "aesencwide256kl"; break; case X86::BI__builtin_ia32_aesdecwide256kl_u8: IID = Intrinsic::x86_aesdecwide256kl; + BlockName = "aesdecwide256kl"; break; } @@ -14795,12 +14845,33 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, Value *Call = Builder.CreateCall(CGM.getIntrinsic(IID), InOps); + BasicBlock *NoError = + createBasicBlock(BlockName + "_no_error", this->CurFn); + BasicBlock *Error = createBasicBlock(BlockName + "_error", this->CurFn); + BasicBlock *End = createBasicBlock(BlockName + "_end", this->CurFn); + + Value *Ret = Builder.CreateExtractValue(Call, 0); + Value *Succ = Builder.CreateTrunc(Ret, Builder.getInt1Ty()); + Builder.CreateCondBr(Succ, NoError, Error); + + Builder.SetInsertPoint(NoError); for (int i = 0; i != 8; ++i) { Value *Extract = Builder.CreateExtractValue(Call, i + 1); Value *Ptr = Builder.CreateConstGEP1_32(Ops[0], i); Builder.CreateAlignedStore(Extract, Ptr, Align(16)); } + Builder.CreateBr(End); + + Builder.SetInsertPoint(Error); + for (int i = 0; i != 8; ++i) { + Value *Out = Builder.CreateExtractValue(Call, i + 1); + Constant *Zero = llvm::Constant::getNullValue(Out->getType()); + Value *Ptr = Builder.CreateConstGEP1_32(Ops[0], i); + Builder.CreateAlignedStore(Zero, Ptr, Align(16)); + } + Builder.CreateBr(End); + Builder.SetInsertPoint(End); return Builder.CreateExtractValue(Call, 0); } } @@ -15772,6 +15843,23 @@ Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID, CI->setConvergent(); return CI; } + case AMDGPU::BI__builtin_amdgcn_image_bvh_intersect_ray: + case AMDGPU::BI__builtin_amdgcn_image_bvh_intersect_ray_h: + case AMDGPU::BI__builtin_amdgcn_image_bvh_intersect_ray_l: + case AMDGPU::BI__builtin_amdgcn_image_bvh_intersect_ray_lh: { + llvm::Value *NodePtr = EmitScalarExpr(E->getArg(0)); + llvm::Value *RayExtent = EmitScalarExpr(E->getArg(1)); + llvm::Value *RayOrigin = EmitScalarExpr(E->getArg(2)); + llvm::Value *RayDir = EmitScalarExpr(E->getArg(3)); + llvm::Value *RayInverseDir = EmitScalarExpr(E->getArg(4)); + llvm::Value *TextureDescr = EmitScalarExpr(E->getArg(5)); + + Function *F = CGM.getIntrinsic(Intrinsic::amdgcn_image_bvh_intersect_ray, + {NodePtr->getType(), RayDir->getType()}); + return Builder.CreateCall(F, {NodePtr, RayExtent, RayOrigin, RayDir, + RayInverseDir, TextureDescr}); + } + // amdgcn workitem case AMDGPU::BI__builtin_amdgcn_workitem_id_x: return emitRangedBuiltin(*this, Intrinsic::amdgcn_workitem_id_x, 0, 1024); @@ -16354,6 +16442,34 @@ static NVPTXMmaLdstInfo getNVPTXMmaLdstInfo(unsigned BuiltinID) { case NVPTX::BI__bmma_m8n8k128_ld_c: return MMA_LDST(2, m8n8k128_load_c_s32); + // Double MMA loads + case NVPTX::BI__dmma_m8n8k4_ld_a: + return MMA_LDST(1, m8n8k4_load_a_f64); + case NVPTX::BI__dmma_m8n8k4_ld_b: + return MMA_LDST(1, m8n8k4_load_b_f64); + case NVPTX::BI__dmma_m8n8k4_ld_c: + return MMA_LDST(2, m8n8k4_load_c_f64); + + // Alternate float MMA loads + case NVPTX::BI__mma_bf16_m16n16k16_ld_a: + return MMA_LDST(4, m16n16k16_load_a_bf16); + case NVPTX::BI__mma_bf16_m16n16k16_ld_b: + return MMA_LDST(4, m16n16k16_load_b_bf16); + case NVPTX::BI__mma_bf16_m8n32k16_ld_a: + return MMA_LDST(2, m8n32k16_load_a_bf16); + case NVPTX::BI__mma_bf16_m8n32k16_ld_b: + return MMA_LDST(8, m8n32k16_load_b_bf16); + case NVPTX::BI__mma_bf16_m32n8k16_ld_a: + return MMA_LDST(8, m32n8k16_load_a_bf16); + case NVPTX::BI__mma_bf16_m32n8k16_ld_b: + return MMA_LDST(2, m32n8k16_load_b_bf16); + case NVPTX::BI__mma_tf32_m16n16k8_ld_a: + return MMA_LDST(4, m16n16k8_load_a_tf32); + case NVPTX::BI__mma_tf32_m16n16k8_ld_b: + return MMA_LDST(2, m16n16k8_load_b_tf32); + case NVPTX::BI__mma_tf32_m16n16k8_ld_c: + return MMA_LDST(8, m16n16k8_load_c_f32); + // NOTE: We need to follow inconsitent naming scheme used by NVCC. Unlike // PTX and LLVM IR where stores always use fragment D, NVCC builtins always // use fragment C for both loads and stores. @@ -16385,6 +16501,14 @@ static NVPTXMmaLdstInfo getNVPTXMmaLdstInfo(unsigned BuiltinID) { case NVPTX::BI__bmma_m8n8k128_st_c_i32: return MMA_LDST(2, m8n8k128_store_d_s32); + // Double MMA store + case NVPTX::BI__dmma_m8n8k4_st_c_f64: + return MMA_LDST(2, m8n8k4_store_d_f64); + + // Alternate float MMA store + case NVPTX::BI__mma_m16n16k8_st_c_f32: + return MMA_LDST(8, m16n16k8_store_d_f32); + default: llvm_unreachable("Unknown MMA builtin"); } @@ -16398,10 +16522,14 @@ struct NVPTXMmaInfo { unsigned NumEltsB; unsigned NumEltsC; unsigned NumEltsD; + + // Variants are ordered by layout-A/layout-B/satf, where 'row' has priority + // over 'col' for layout. The index of non-satf variants is expected to match + // the undocumented layout constants used by CUDA's mma.hpp. std::array Variants; unsigned getMMAIntrinsic(int Layout, bool Satf) { - unsigned Index = Layout * 2 + Satf; + unsigned Index = Layout + 4 * Satf; if (Index >= Variants.size()) return 0; return Variants[Index]; @@ -16412,93 +16540,107 @@ struct NVPTXMmaInfo { // Layout and Satf, 0 otherwise. static NVPTXMmaInfo getNVPTXMmaInfo(unsigned BuiltinID) { // clang-format off -#define MMA_VARIANTS(geom, type) {{ \ +#define MMA_VARIANTS(geom, type) \ Intrinsic::nvvm_wmma_##geom##_mma_row_row_##type, \ - Intrinsic::nvvm_wmma_##geom##_mma_row_row_##type##_satfinite, \ Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type, \ - Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type##_satfinite, \ Intrinsic::nvvm_wmma_##geom##_mma_col_row_##type, \ + Intrinsic::nvvm_wmma_##geom##_mma_col_col_##type +#define MMA_SATF_VARIANTS(geom, type) \ + MMA_VARIANTS(geom, type), \ + Intrinsic::nvvm_wmma_##geom##_mma_row_row_##type##_satfinite, \ + Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type##_satfinite, \ Intrinsic::nvvm_wmma_##geom##_mma_col_row_##type##_satfinite, \ - Intrinsic::nvvm_wmma_##geom##_mma_col_col_##type, \ - Intrinsic::nvvm_wmma_##geom##_mma_col_col_##type##_satfinite \ - }} + Intrinsic::nvvm_wmma_##geom##_mma_col_col_##type##_satfinite // Sub-integer MMA only supports row.col layout. -#define MMA_VARIANTS_I4(geom, type) {{ \ - 0, \ +#define MMA_VARIANTS_I4(geom, type) \ 0, \ Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type, \ - Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type##_satfinite, \ 0, \ 0, \ 0, \ - 0 \ - }} -// b1 MMA does not support .satfinite. -#define MMA_VARIANTS_B1(geom, type) {{ \ + Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type##_satfinite, \ 0, \ + 0 +// b1 MMA does not support .satfinite. +#define MMA_VARIANTS_B1(geom, type) \ 0, \ Intrinsic::nvvm_wmma_##geom##_mma_row_col_##type, \ 0, \ 0, \ 0, \ 0, \ - 0 \ - }} - // clang-format on - switch (BuiltinID) { - // FP MMA - // Note that 'type' argument of MMA_VARIANT uses D_C notation, while - // NumEltsN of return value are ordered as A,B,C,D. - case NVPTX::BI__hmma_m16n16k16_mma_f16f16: - return {8, 8, 4, 4, MMA_VARIANTS(m16n16k16, f16_f16)}; - case NVPTX::BI__hmma_m16n16k16_mma_f32f16: - return {8, 8, 4, 8, MMA_VARIANTS(m16n16k16, f32_f16)}; - case NVPTX::BI__hmma_m16n16k16_mma_f16f32: - return {8, 8, 8, 4, MMA_VARIANTS(m16n16k16, f16_f32)}; - case NVPTX::BI__hmma_m16n16k16_mma_f32f32: - return {8, 8, 8, 8, MMA_VARIANTS(m16n16k16, f32_f32)}; - case NVPTX::BI__hmma_m32n8k16_mma_f16f16: - return {8, 8, 4, 4, MMA_VARIANTS(m32n8k16, f16_f16)}; - case NVPTX::BI__hmma_m32n8k16_mma_f32f16: - return {8, 8, 4, 8, MMA_VARIANTS(m32n8k16, f32_f16)}; - case NVPTX::BI__hmma_m32n8k16_mma_f16f32: - return {8, 8, 8, 4, MMA_VARIANTS(m32n8k16, f16_f32)}; - case NVPTX::BI__hmma_m32n8k16_mma_f32f32: - return {8, 8, 8, 8, MMA_VARIANTS(m32n8k16, f32_f32)}; - case NVPTX::BI__hmma_m8n32k16_mma_f16f16: - return {8, 8, 4, 4, MMA_VARIANTS(m8n32k16, f16_f16)}; - case NVPTX::BI__hmma_m8n32k16_mma_f32f16: - return {8, 8, 4, 8, MMA_VARIANTS(m8n32k16, f32_f16)}; - case NVPTX::BI__hmma_m8n32k16_mma_f16f32: - return {8, 8, 8, 4, MMA_VARIANTS(m8n32k16, f16_f32)}; - case NVPTX::BI__hmma_m8n32k16_mma_f32f32: - return {8, 8, 8, 8, MMA_VARIANTS(m8n32k16, f32_f32)}; - - // Integer MMA - case NVPTX::BI__imma_m16n16k16_mma_s8: - return {2, 2, 8, 8, MMA_VARIANTS(m16n16k16, s8)}; - case NVPTX::BI__imma_m16n16k16_mma_u8: - return {2, 2, 8, 8, MMA_VARIANTS(m16n16k16, u8)}; - case NVPTX::BI__imma_m32n8k16_mma_s8: - return {4, 1, 8, 8, MMA_VARIANTS(m32n8k16, s8)}; - case NVPTX::BI__imma_m32n8k16_mma_u8: - return {4, 1, 8, 8, MMA_VARIANTS(m32n8k16, u8)}; - case NVPTX::BI__imma_m8n32k16_mma_s8: - return {1, 4, 8, 8, MMA_VARIANTS(m8n32k16, s8)}; - case NVPTX::BI__imma_m8n32k16_mma_u8: - return {1, 4, 8, 8, MMA_VARIANTS(m8n32k16, u8)}; - - // Sub-integer MMA - case NVPTX::BI__imma_m8n8k32_mma_s4: - return {1, 1, 2, 2, MMA_VARIANTS_I4(m8n8k32, s4)}; - case NVPTX::BI__imma_m8n8k32_mma_u4: - return {1, 1, 2, 2, MMA_VARIANTS_I4(m8n8k32, u4)}; - case NVPTX::BI__bmma_m8n8k128_mma_xor_popc_b1: - return {1, 1, 2, 2, MMA_VARIANTS_B1(m8n8k128, b1)}; - default: - llvm_unreachable("Unexpected builtin ID."); - } + 0, \ + 0 + // clang-format on + switch (BuiltinID) { + // FP MMA + // Note that 'type' argument of MMA_SATF_VARIANTS uses D_C notation, while + // NumEltsN of return value are ordered as A,B,C,D. + case NVPTX::BI__hmma_m16n16k16_mma_f16f16: + return {8, 8, 4, 4, {{MMA_SATF_VARIANTS(m16n16k16, f16_f16)}}}; + case NVPTX::BI__hmma_m16n16k16_mma_f32f16: + return {8, 8, 4, 8, {{MMA_SATF_VARIANTS(m16n16k16, f32_f16)}}}; + case NVPTX::BI__hmma_m16n16k16_mma_f16f32: + return {8, 8, 8, 4, {{MMA_SATF_VARIANTS(m16n16k16, f16_f32)}}}; + case NVPTX::BI__hmma_m16n16k16_mma_f32f32: + return {8, 8, 8, 8, {{MMA_SATF_VARIANTS(m16n16k16, f32_f32)}}}; + case NVPTX::BI__hmma_m32n8k16_mma_f16f16: + return {8, 8, 4, 4, {{MMA_SATF_VARIANTS(m32n8k16, f16_f16)}}}; + case NVPTX::BI__hmma_m32n8k16_mma_f32f16: + return {8, 8, 4, 8, {{MMA_SATF_VARIANTS(m32n8k16, f32_f16)}}}; + case NVPTX::BI__hmma_m32n8k16_mma_f16f32: + return {8, 8, 8, 4, {{MMA_SATF_VARIANTS(m32n8k16, f16_f32)}}}; + case NVPTX::BI__hmma_m32n8k16_mma_f32f32: + return {8, 8, 8, 8, {{MMA_SATF_VARIANTS(m32n8k16, f32_f32)}}}; + case NVPTX::BI__hmma_m8n32k16_mma_f16f16: + return {8, 8, 4, 4, {{MMA_SATF_VARIANTS(m8n32k16, f16_f16)}}}; + case NVPTX::BI__hmma_m8n32k16_mma_f32f16: + return {8, 8, 4, 8, {{MMA_SATF_VARIANTS(m8n32k16, f32_f16)}}}; + case NVPTX::BI__hmma_m8n32k16_mma_f16f32: + return {8, 8, 8, 4, {{MMA_SATF_VARIANTS(m8n32k16, f16_f32)}}}; + case NVPTX::BI__hmma_m8n32k16_mma_f32f32: + return {8, 8, 8, 8, {{MMA_SATF_VARIANTS(m8n32k16, f32_f32)}}}; + + // Integer MMA + case NVPTX::BI__imma_m16n16k16_mma_s8: + return {2, 2, 8, 8, {{MMA_SATF_VARIANTS(m16n16k16, s8)}}}; + case NVPTX::BI__imma_m16n16k16_mma_u8: + return {2, 2, 8, 8, {{MMA_SATF_VARIANTS(m16n16k16, u8)}}}; + case NVPTX::BI__imma_m32n8k16_mma_s8: + return {4, 1, 8, 8, {{MMA_SATF_VARIANTS(m32n8k16, s8)}}}; + case NVPTX::BI__imma_m32n8k16_mma_u8: + return {4, 1, 8, 8, {{MMA_SATF_VARIANTS(m32n8k16, u8)}}}; + case NVPTX::BI__imma_m8n32k16_mma_s8: + return {1, 4, 8, 8, {{MMA_SATF_VARIANTS(m8n32k16, s8)}}}; + case NVPTX::BI__imma_m8n32k16_mma_u8: + return {1, 4, 8, 8, {{MMA_SATF_VARIANTS(m8n32k16, u8)}}}; + + // Sub-integer MMA + case NVPTX::BI__imma_m8n8k32_mma_s4: + return {1, 1, 2, 2, {{MMA_VARIANTS_I4(m8n8k32, s4)}}}; + case NVPTX::BI__imma_m8n8k32_mma_u4: + return {1, 1, 2, 2, {{MMA_VARIANTS_I4(m8n8k32, u4)}}}; + case NVPTX::BI__bmma_m8n8k128_mma_xor_popc_b1: + return {1, 1, 2, 2, {{MMA_VARIANTS_B1(m8n8k128, b1)}}}; + + // Double MMA + case NVPTX::BI__dmma_m8n8k4_mma_f64: + return {1, 1, 2, 2, {{MMA_VARIANTS(m8n8k4, f64)}}}; + + // Alternate FP MMA + case NVPTX::BI__mma_bf16_m16n16k16_mma_f32: + return {4, 4, 8, 8, {{MMA_VARIANTS(m16n16k16, bf16)}}}; + case NVPTX::BI__mma_bf16_m8n32k16_mma_f32: + return {2, 8, 8, 8, {{MMA_VARIANTS(m8n32k16, bf16)}}}; + case NVPTX::BI__mma_bf16_m32n8k16_mma_f32: + return {8, 2, 8, 8, {{MMA_VARIANTS(m32n8k16, bf16)}}}; + case NVPTX::BI__mma_tf32_m16n16k8_mma_f32: + return {4, 4, 8, 8, {{MMA_VARIANTS(m16n16k8, tf32)}}}; + default: + llvm_unreachable("Unexpected builtin ID."); + } #undef MMA_VARIANTS +#undef MMA_SATF_VARIANTS #undef MMA_VARIANTS_I4 #undef MMA_VARIANTS_B1 } @@ -16796,7 +16938,20 @@ CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, const CallExpr *E) { case NVPTX::BI__bmma_m8n8k128_ld_a_b1: case NVPTX::BI__bmma_m8n8k128_ld_b_b1: case NVPTX::BI__bmma_m8n8k128_ld_c: - { + // Double MMA loads. + case NVPTX::BI__dmma_m8n8k4_ld_a: + case NVPTX::BI__dmma_m8n8k4_ld_b: + case NVPTX::BI__dmma_m8n8k4_ld_c: + // Alternate float MMA loads. + case NVPTX::BI__mma_bf16_m16n16k16_ld_a: + case NVPTX::BI__mma_bf16_m16n16k16_ld_b: + case NVPTX::BI__mma_bf16_m8n32k16_ld_a: + case NVPTX::BI__mma_bf16_m8n32k16_ld_b: + case NVPTX::BI__mma_bf16_m32n8k16_ld_a: + case NVPTX::BI__mma_bf16_m32n8k16_ld_b: + case NVPTX::BI__mma_tf32_m16n16k8_ld_a: + case NVPTX::BI__mma_tf32_m16n16k8_ld_b: + case NVPTX::BI__mma_tf32_m16n16k8_ld_c: { Address Dst = EmitPointerWithAlignment(E->getArg(0)); Value *Src = EmitScalarExpr(E->getArg(1)); Value *Ldm = EmitScalarExpr(E->getArg(2)); @@ -16841,7 +16996,9 @@ CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, const CallExpr *E) { case NVPTX::BI__imma_m32n8k16_st_c_i32: case NVPTX::BI__imma_m8n32k16_st_c_i32: case NVPTX::BI__imma_m8n8k32_st_c_i32: - case NVPTX::BI__bmma_m8n8k128_st_c_i32: { + case NVPTX::BI__bmma_m8n8k128_st_c_i32: + case NVPTX::BI__dmma_m8n8k4_st_c_f64: + case NVPTX::BI__mma_m16n16k8_st_c_f32: { Value *Dst = EmitScalarExpr(E->getArg(0)); Address Src = EmitPointerWithAlignment(E->getArg(1)); Value *Ldm = EmitScalarExpr(E->getArg(2)); @@ -16893,7 +17050,12 @@ CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, const CallExpr *E) { case NVPTX::BI__imma_m8n32k16_mma_u8: case NVPTX::BI__imma_m8n8k32_mma_s4: case NVPTX::BI__imma_m8n8k32_mma_u4: - case NVPTX::BI__bmma_m8n8k128_mma_xor_popc_b1: { + case NVPTX::BI__bmma_m8n8k128_mma_xor_popc_b1: + case NVPTX::BI__dmma_m8n8k4_mma_f64: + case NVPTX::BI__mma_bf16_m16n16k16_mma_f32: + case NVPTX::BI__mma_bf16_m8n32k16_mma_f32: + case NVPTX::BI__mma_bf16_m32n8k16_mma_f32: + case NVPTX::BI__mma_tf32_m16n16k8_mma_f32: { Address Dst = EmitPointerWithAlignment(E->getArg(0)); Address SrcA = EmitPointerWithAlignment(E->getArg(1)); Address SrcB = EmitPointerWithAlignment(E->getArg(2)); diff --git a/clang/lib/CodeGen/CGCall.cpp b/clang/lib/CodeGen/CGCall.cpp index 0869876a02958..19444bbaf53f5 100644 --- a/clang/lib/CodeGen/CGCall.cpp +++ b/clang/lib/CodeGen/CGCall.cpp @@ -2180,8 +2180,9 @@ void CodeGenModule::ConstructAttributeList(StringRef Name, // Add "sample-profile-suffix-elision-policy" attribute for internal linkage // functions with -funique-internal-linkage-names. if (TargetDecl && CodeGenOpts.UniqueInternalLinkageNames) { - if (auto *Fn = dyn_cast(TargetDecl)) { - if (this->getFunctionLinkage(Fn) == llvm::GlobalValue::InternalLinkage) + if (isa(TargetDecl)) { + if (this->getFunctionLinkage(CalleeInfo.getCalleeDecl()) == + llvm::GlobalValue::InternalLinkage) FuncAttrs.addAttribute("sample-profile-suffix-elision-policy", "selected"); } diff --git a/clang/lib/CodeGen/CGExprScalar.cpp b/clang/lib/CodeGen/CGExprScalar.cpp index c9a92a6d5976d..3673deb165605 100644 --- a/clang/lib/CodeGen/CGExprScalar.cpp +++ b/clang/lib/CodeGen/CGExprScalar.cpp @@ -2116,24 +2116,11 @@ Value *ScalarExprEmitter::VisitCastExpr(CastExpr *CE) { isa(DstTy)) || (isa(SrcTy) && isa(DstTy))) { - if (const CallExpr *CE = dyn_cast(E)) { - // Call expressions can't have a scalar return unless the return type - // is a reference type so an lvalue can't be emitted. Create a temp - // alloca to store the call, bitcast the address then load. - QualType RetTy = CE->getCallReturnType(CGF.getContext()); - Address Addr = - CGF.CreateDefaultAlignTempAlloca(SrcTy, "saved-call-rvalue"); - LValue LV = CGF.MakeAddrLValue(Addr, RetTy); - CGF.EmitStoreOfScalar(Src, LV); - Addr = Builder.CreateElementBitCast(Addr, CGF.ConvertTypeForMem(DestTy), - "castFixedSve"); - LValue DestLV = CGF.MakeAddrLValue(Addr, DestTy); - DestLV.setTBAAInfo(TBAAAccessInfo::getMayAliasInfo()); - return EmitLoadOfLValue(DestLV, CE->getExprLoc()); - } - - Address Addr = EmitLValue(E).getAddress(CGF); - Addr = Builder.CreateElementBitCast(Addr, CGF.ConvertTypeForMem(DestTy)); + Address Addr = CGF.CreateDefaultAlignTempAlloca(SrcTy, "saved-value"); + LValue LV = CGF.MakeAddrLValue(Addr, E->getType()); + CGF.EmitStoreOfScalar(Src, LV); + Addr = Builder.CreateElementBitCast(Addr, CGF.ConvertTypeForMem(DestTy), + "castFixedSve"); LValue DestLV = CGF.MakeAddrLValue(Addr, DestTy); DestLV.setTBAAInfo(TBAAAccessInfo::getMayAliasInfo()); return EmitLoadOfLValue(DestLV, CE->getExprLoc()); diff --git a/clang/lib/CodeGen/CGNonTrivialStruct.cpp b/clang/lib/CodeGen/CGNonTrivialStruct.cpp index 9c6bbbc048b72..ad505fc5a0d4f 100644 --- a/clang/lib/CodeGen/CGNonTrivialStruct.cpp +++ b/clang/lib/CodeGen/CGNonTrivialStruct.cpp @@ -472,14 +472,10 @@ template struct GenFuncBase { F->setVisibility(llvm::GlobalValue::HiddenVisibility); CGM.SetLLVMFunctionAttributes(GlobalDecl(), FI, F, /*IsThunk=*/false); CGM.SetLLVMFunctionAttributesForDefinition(nullptr, F); - IdentifierInfo *II = &Ctx.Idents.get(FuncName); - FunctionDecl *FD = FunctionDecl::Create( - Ctx, Ctx.getTranslationUnitDecl(), SourceLocation(), SourceLocation(), - II, Ctx.getFunctionType(Ctx.VoidTy, llvm::None, {}), nullptr, - SC_PrivateExtern, false, false); CodeGenFunction NewCGF(CGM); setCGF(&NewCGF); - CGF->StartFunction(FD, Ctx.VoidTy, F, FI, Args); + CGF->StartFunction(GlobalDecl(), Ctx.VoidTy, F, FI, Args); + auto AL = ApplyDebugLocation::CreateArtificial(*CGF); std::array Addrs = getParamAddrs(std::make_index_sequence{}, Alignments, Args, CGF); asDerived().visitStructFields(QT, CharUnits::Zero(), Addrs); diff --git a/clang/lib/CodeGen/CGObjC.cpp b/clang/lib/CodeGen/CGObjC.cpp index 6c36dde1f526d..b865780ffe93c 100644 --- a/clang/lib/CodeGen/CGObjC.cpp +++ b/clang/lib/CodeGen/CGObjC.cpp @@ -2939,8 +2939,12 @@ static llvm::Value *emitARCOperationAfterCall(CodeGenFunction &CGF, ValueTransform doAfterCall, ValueTransform doFallback) { CGBuilderTy::InsertPoint ip = CGF.Builder.saveIP(); + auto *callBase = dyn_cast(value); - if (llvm::CallInst *call = dyn_cast(value)) { + if (callBase && llvm::objcarc::hasAttachedCallOpBundle(callBase)) { + // Fall back if the call base has operand bundle "clang.arc.attachedcall". + value = doFallback(CGF, value); + } else if (llvm::CallInst *call = dyn_cast(value)) { // Place the retain immediately following the call. CGF.Builder.SetInsertPoint(call->getParent(), ++llvm::BasicBlock::iterator(call)); @@ -3694,12 +3698,18 @@ CodeGenFunction::GenerateObjCAtomicSetterCopyHelperFunction( FunctionTy, nullptr, SC_Static, false, false); FunctionArgList args; - ImplicitParamDecl DstDecl(C, FD, SourceLocation(), /*Id=*/nullptr, DestTy, - ImplicitParamDecl::Other); - args.push_back(&DstDecl); - ImplicitParamDecl SrcDecl(C, FD, SourceLocation(), /*Id=*/nullptr, SrcTy, - ImplicitParamDecl::Other); - args.push_back(&SrcDecl); + ParmVarDecl *Params[2]; + ParmVarDecl *DstDecl = ParmVarDecl::Create( + C, FD, SourceLocation(), SourceLocation(), nullptr, DestTy, + C.getTrivialTypeSourceInfo(DestTy, SourceLocation()), SC_None, + /*DefArg=*/nullptr); + args.push_back(Params[0] = DstDecl); + ParmVarDecl *SrcDecl = ParmVarDecl::Create( + C, FD, SourceLocation(), SourceLocation(), nullptr, SrcTy, + C.getTrivialTypeSourceInfo(SrcTy, SourceLocation()), SC_None, + /*DefArg=*/nullptr); + args.push_back(Params[1] = SrcDecl); + FD->setParams(Params); const CGFunctionInfo &FI = CGM.getTypes().arrangeBuiltinFunctionDeclaration(ReturnTy, args); @@ -3715,12 +3725,12 @@ CodeGenFunction::GenerateObjCAtomicSetterCopyHelperFunction( StartFunction(FD, ReturnTy, Fn, FI, args); - DeclRefExpr DstExpr(C, &DstDecl, false, DestTy, VK_PRValue, SourceLocation()); + DeclRefExpr DstExpr(C, DstDecl, false, DestTy, VK_PRValue, SourceLocation()); UnaryOperator *DST = UnaryOperator::Create( C, &DstExpr, UO_Deref, DestTy->getPointeeType(), VK_LValue, OK_Ordinary, SourceLocation(), false, FPOptionsOverride()); - DeclRefExpr SrcExpr(C, &SrcDecl, false, SrcTy, VK_PRValue, SourceLocation()); + DeclRefExpr SrcExpr(C, SrcDecl, false, SrcTy, VK_PRValue, SourceLocation()); UnaryOperator *SRC = UnaryOperator::Create( C, &SrcExpr, UO_Deref, SrcTy->getPointeeType(), VK_LValue, OK_Ordinary, SourceLocation(), false, FPOptionsOverride()); @@ -3778,12 +3788,18 @@ CodeGenFunction::GenerateObjCAtomicGetterCopyHelperFunction( FunctionTy, nullptr, SC_Static, false, false); FunctionArgList args; - ImplicitParamDecl DstDecl(C, FD, SourceLocation(), /*Id=*/nullptr, DestTy, - ImplicitParamDecl::Other); - args.push_back(&DstDecl); - ImplicitParamDecl SrcDecl(C, FD, SourceLocation(), /*Id=*/nullptr, SrcTy, - ImplicitParamDecl::Other); - args.push_back(&SrcDecl); + ParmVarDecl *Params[2]; + ParmVarDecl *DstDecl = ParmVarDecl::Create( + C, FD, SourceLocation(), SourceLocation(), nullptr, DestTy, + C.getTrivialTypeSourceInfo(DestTy, SourceLocation()), SC_None, + /*DefArg=*/nullptr); + args.push_back(Params[0] = DstDecl); + ParmVarDecl *SrcDecl = ParmVarDecl::Create( + C, FD, SourceLocation(), SourceLocation(), nullptr, SrcTy, + C.getTrivialTypeSourceInfo(SrcTy, SourceLocation()), SC_None, + /*DefArg=*/nullptr); + args.push_back(Params[1] = SrcDecl); + FD->setParams(Params); const CGFunctionInfo &FI = CGM.getTypes().arrangeBuiltinFunctionDeclaration(ReturnTy, args); @@ -3798,7 +3814,7 @@ CodeGenFunction::GenerateObjCAtomicGetterCopyHelperFunction( StartFunction(FD, ReturnTy, Fn, FI, args); - DeclRefExpr SrcExpr(getContext(), &SrcDecl, false, SrcTy, VK_PRValue, + DeclRefExpr SrcExpr(getContext(), SrcDecl, false, SrcTy, VK_PRValue, SourceLocation()); UnaryOperator *SRC = UnaryOperator::Create( @@ -3825,7 +3841,7 @@ CodeGenFunction::GenerateObjCAtomicGetterCopyHelperFunction( CXXConstExpr->getConstructionKind(), SourceRange()); - DeclRefExpr DstExpr(getContext(), &DstDecl, false, DestTy, VK_PRValue, + DeclRefExpr DstExpr(getContext(), DstDecl, false, DestTy, VK_PRValue, SourceLocation()); RValue DV = EmitAnyExpr(&DstExpr); diff --git a/clang/lib/CodeGen/CodeGenFunction.cpp b/clang/lib/CodeGen/CodeGenFunction.cpp index f119084e29495..6be261c48911d 100644 --- a/clang/lib/CodeGen/CodeGenFunction.cpp +++ b/clang/lib/CodeGen/CodeGenFunction.cpp @@ -1486,8 +1486,14 @@ void CodeGenFunction::GenerateCode(GlobalDecl GD, llvm::Function *Fn, QualType ResTy = BuildFunctionArgList(GD, Args); // Check if we should generate debug info for this function. - if (FD->hasAttr()) - DebugInfo = nullptr; // disable debug info indefinitely for this function + if (FD->hasAttr()) { + // Clear non-distinct debug info that was possibly attached to the function + // due to an earlier declaration without the nodebug attribute + if (Fn) + Fn->setSubprogram(nullptr); + // Disable debug info indefinitely for this function + DebugInfo = nullptr; + } // The function might not have a body if we're generating thunks for a // function declaration. diff --git a/clang/lib/CodeGen/ItaniumCXXABI.cpp b/clang/lib/CodeGen/ItaniumCXXABI.cpp index fd62d9aee159f..3b6c014154e2d 100644 --- a/clang/lib/CodeGen/ItaniumCXXABI.cpp +++ b/clang/lib/CodeGen/ItaniumCXXABI.cpp @@ -2611,15 +2611,6 @@ static llvm::Function *createGlobalInitOrCleanupFn(CodeGen::CodeGenModule &CGM, return GlobalInitOrCleanupFn; } -static FunctionDecl * -createGlobalInitOrCleanupFnDecl(CodeGen::CodeGenModule &CGM, StringRef FnName) { - ASTContext &Ctx = CGM.getContext(); - QualType FunctionTy = Ctx.getFunctionType(Ctx.VoidTy, llvm::None, {}); - return FunctionDecl::Create( - Ctx, Ctx.getTranslationUnitDecl(), SourceLocation(), SourceLocation(), - &Ctx.Idents.get(FnName), FunctionTy, nullptr, SC_Static, false, false); -} - void CodeGenModule::unregisterGlobalDtorsWithUnAtExit() { for (const auto &I : DtorsUsingAtExit) { int Priority = I.first; @@ -2629,13 +2620,11 @@ void CodeGenModule::unregisterGlobalDtorsWithUnAtExit() { llvm::Function *GlobalCleanupFn = createGlobalInitOrCleanupFn(*this, GlobalCleanupFnName); - FunctionDecl *GlobalCleanupFD = - createGlobalInitOrCleanupFnDecl(*this, GlobalCleanupFnName); - CodeGenFunction CGF(*this); - CGF.StartFunction(GlobalDecl(GlobalCleanupFD), getContext().VoidTy, - GlobalCleanupFn, getTypes().arrangeNullaryFunction(), - FunctionArgList(), SourceLocation(), SourceLocation()); + CGF.StartFunction(GlobalDecl(), getContext().VoidTy, GlobalCleanupFn, + getTypes().arrangeNullaryFunction(), FunctionArgList(), + SourceLocation(), SourceLocation()); + auto AL = ApplyDebugLocation::CreateArtificial(CGF); // Get the destructor function type, void(*)(void). llvm::FunctionType *dtorFuncTy = llvm::FunctionType::get(CGF.VoidTy, false); @@ -2688,13 +2677,12 @@ void CodeGenModule::registerGlobalDtorsWithAtExit() { std::string("__GLOBAL_init_") + llvm::to_string(Priority); llvm::Function *GlobalInitFn = createGlobalInitOrCleanupFn(*this, GlobalInitFnName); - FunctionDecl *GlobalInitFD = - createGlobalInitOrCleanupFnDecl(*this, GlobalInitFnName); CodeGenFunction CGF(*this); - CGF.StartFunction(GlobalDecl(GlobalInitFD), getContext().VoidTy, - GlobalInitFn, getTypes().arrangeNullaryFunction(), - FunctionArgList(), SourceLocation(), SourceLocation()); + CGF.StartFunction(GlobalDecl(), getContext().VoidTy, GlobalInitFn, + getTypes().arrangeNullaryFunction(), FunctionArgList(), + SourceLocation(), SourceLocation()); + auto AL = ApplyDebugLocation::CreateArtificial(CGF); // Since constructor functions are run in non-descending order of their // priorities, destructors are registered in non-descending order of their diff --git a/clang/lib/CodeGen/TargetInfo.cpp b/clang/lib/CodeGen/TargetInfo.cpp index ae6ba443b0995..f2bac305169fd 100644 --- a/clang/lib/CodeGen/TargetInfo.cpp +++ b/clang/lib/CodeGen/TargetInfo.cpp @@ -8154,14 +8154,39 @@ void M68kTargetCodeGenInfo::setTargetAttributes( } //===----------------------------------------------------------------------===// -// AVR ABI Implementation. +// AVR ABI Implementation. Documented at +// https://gcc.gnu.org/wiki/avr-gcc#Calling_Convention +// https://gcc.gnu.org/wiki/avr-gcc#Reduced_Tiny //===----------------------------------------------------------------------===// namespace { +class AVRABIInfo : public DefaultABIInfo { +public: + AVRABIInfo(CodeGenTypes &CGT) : DefaultABIInfo(CGT) {} + + ABIArgInfo classifyReturnType(QualType Ty) const { + // A return struct with size less than or equal to 8 bytes is returned + // directly via registers R18-R25. + if (isAggregateTypeForABI(Ty) && getContext().getTypeSize(Ty) <= 64) + return ABIArgInfo::getDirect(); + else + return DefaultABIInfo::classifyReturnType(Ty); + } + + // Just copy the original implementation of DefaultABIInfo::computeInfo(), + // since DefaultABIInfo::classify{Return,Argument}Type() are not virtual. + void computeInfo(CGFunctionInfo &FI) const override { + if (!getCXXABI().classifyReturnType(FI)) + FI.getReturnInfo() = classifyReturnType(FI.getReturnType()); + for (auto &I : FI.arguments()) + I.info = classifyArgumentType(I.type); + } +}; + class AVRTargetCodeGenInfo : public TargetCodeGenInfo { public: AVRTargetCodeGenInfo(CodeGenTypes &CGT) - : TargetCodeGenInfo(std::make_unique(CGT)) {} + : TargetCodeGenInfo(std::make_unique(CGT)) {} LangAS getGlobalVarAddressSpace(CodeGenModule &CGM, const VarDecl *D) const override { diff --git a/clang/lib/Driver/ToolChains/Arch/X86.cpp b/clang/lib/Driver/ToolChains/Arch/X86.cpp index 94a53f9d9e467..12749c7ec871c 100644 --- a/clang/lib/Driver/ToolChains/Arch/X86.cpp +++ b/clang/lib/Driver/ToolChains/Arch/X86.cpp @@ -213,5 +213,24 @@ void x86::getX86TargetFeatures(const Driver &D, const llvm::Triple &Triple, // Now add any that the user explicitly requested on the command line, // which may override the defaults. - handleTargetFeaturesGroup(Args, Features, options::OPT_m_x86_Features_Group); + for (const Arg *A : Args.filtered(options::OPT_m_x86_Features_Group, + options::OPT_mgeneral_regs_only)) { + StringRef Name = A->getOption().getName(); + A->claim(); + + // Skip over "-m". + assert(Name.startswith("m") && "Invalid feature name."); + Name = Name.substr(1); + + // Replace -mgeneral-regs-only with -x87, -mmx, -sse + if (A->getOption().getID() == options::OPT_mgeneral_regs_only) { + Features.insert(Features.end(), {"-x87", "-mmx", "-sse"}); + continue; + } + + bool IsNegative = Name.startswith("no-"); + if (IsNegative) + Name = Name.substr(3); + Features.push_back(Args.MakeArgString((IsNegative ? "-" : "+") + Name)); + } } diff --git a/clang/lib/Driver/ToolChains/Clang.cpp b/clang/lib/Driver/ToolChains/Clang.cpp index 22e92baa990a4..b52a1004ae085 100644 --- a/clang/lib/Driver/ToolChains/Clang.cpp +++ b/clang/lib/Driver/ToolChains/Clang.cpp @@ -5377,6 +5377,11 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, false)) CmdArgs.push_back("-fsplit-stack"); + // -fprotect-parens=0 is default. + if (Args.hasFlag(options::OPT_fprotect_parens, + options::OPT_fno_protect_parens, false)) + CmdArgs.push_back("-fprotect-parens"); + RenderFloatingPointOptions(TC, D, OFastEnabled, Args, CmdArgs, JA); if (Arg *A = Args.getLastArg(options::OPT_fextend_args_EQ)) { @@ -5671,15 +5676,20 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, } if (Arg *A = Args.getLastArg(options::OPT_fbasic_block_sections_EQ)) { + StringRef Val = A->getValue(); if (Triple.isX86() && Triple.isOSBinFormatELF()) { - StringRef Val = A->getValue(); if (Val != "all" && Val != "labels" && Val != "none" && !Val.startswith("list=")) D.Diag(diag::err_drv_invalid_value) << A->getAsString(Args) << A->getValue(); else A->render(Args, CmdArgs); - } else { + } else if (Triple.isNVPTX()) { + // Do not pass the option to the GPU compilation. We still want it enabled + // for the host-side compilation, so seeing it here is not an error. + } else if (Val != "none") { + // =none is allowed everywhere. It's useful for overriding the option + // and is the same as not specifying the option. D.Diag(diag::err_drv_unsupported_opt_for_target) << A->getAsString(Args) << TripleStr; } @@ -6237,6 +6247,7 @@ void Clang::ConstructJob(Compilation &C, const JobAction &JA, (Args.hasArg(options::OPT_mkernel) && types::isCXX(InputType))) CmdArgs.push_back("-fapple-kext"); + Args.AddLastArg(CmdArgs, options::OPT_altivec_src_compat); Args.AddLastArg(CmdArgs, options::OPT_flax_vector_conversions_EQ); Args.AddLastArg(CmdArgs, options::OPT_fobjc_sender_dependent_dispatch); Args.AddLastArg(CmdArgs, options::OPT_fdiagnostics_print_source_range_info); @@ -8110,10 +8121,16 @@ void OffloadBundler::ConstructJob(Compilation &C, const JobAction &JA, }); } Triples += Action::GetOffloadKindName(CurKind); - Triples += '-'; - Triples += CurTC->getTriple().normalize(); - if (CurKind == Action::OFK_HIP && CurDep->getOffloadingArch()) { - Triples += '-'; + Triples += "-"; + std::string NormalizedTriple = CurTC->getTriple().normalize(); + Triples += NormalizedTriple; + + if (CurDep->getOffloadingArch() != nullptr) { + // If OffloadArch is present it can only appear as the 6th hypen + // sepearated field of Bundle Entry ID. So, pad required number of + // hyphens in Triple. + for (int i = 4 - StringRef(NormalizedTriple).count("-"); i > 0; i--) + Triples += "-"; Triples += CurDep->getOffloadingArch(); } } @@ -8267,11 +8284,17 @@ void OffloadBundler::ConstructJobMultipleOutputs( if (J++) Triples += ','; Triples += Action::GetOffloadKindName(Dep.DependentOffloadKind); - Triples += '-'; - Triples += Dep.DependentToolChain->getTriple().normalize(); - if (Dep.DependentOffloadKind == Action::OFK_HIP && - !Dep.DependentBoundArch.empty()) { - Triples += '-'; + Triples += "-"; + std::string NormalizedTriple = + Dep.DependentToolChain->getTriple().normalize(); + Triples += NormalizedTriple; + + if (!Dep.DependentBoundArch.empty()) { + // If OffloadArch is present it can only appear as the 6th hypen + // sepearated field of Bundle Entry ID. So, pad required number of + // hyphens in Triple. + for (int i = 4 - StringRef(NormalizedTriple).count("-"); i > 0; i--) + Triples += "-"; Triples += Dep.DependentBoundArch; } } diff --git a/clang/lib/Format/TokenAnnotator.cpp b/clang/lib/Format/TokenAnnotator.cpp index aa69ff88bd747..2b83ff4f78503 100644 --- a/clang/lib/Format/TokenAnnotator.cpp +++ b/clang/lib/Format/TokenAnnotator.cpp @@ -363,7 +363,7 @@ class AnnotatingParser { Left->Previous && Left->Previous->is(tok::l_paren)) { // Detect the case where macros are used to generate lambdas or // function bodies, e.g.: - // auto my_lambda = MARCO((Type *type, int i) { .. body .. }); + // auto my_lambda = MACRO((Type *type, int i) { .. body .. }); for (FormatToken *Tok = Left; Tok != CurrentToken; Tok = Tok->Next) { if (Tok->is(TT_BinaryOperator) && Tok->isOneOf(tok::star, tok::amp, tok::ampamp)) diff --git a/clang/lib/Format/UnwrappedLineParser.cpp b/clang/lib/Format/UnwrappedLineParser.cpp index 45ff319b5841d..f76cb4d341a22 100644 --- a/clang/lib/Format/UnwrappedLineParser.cpp +++ b/clang/lib/Format/UnwrappedLineParser.cpp @@ -1482,8 +1482,8 @@ void UnwrappedLineParser::parseStructuralElement() { } case tok::equal: // Fat arrows (=>) have tok::TokenKind tok::equal but TokenType - // TT_FatArrow. The always start an expression or a child block if - // followed by a curly. + // TT_FatArrow. They always start an expression or a child block if + // followed by a curly brace. if (FormatTok->is(TT_FatArrow)) { nextToken(); if (FormatTok->is(tok::l_brace)) { @@ -1790,14 +1790,20 @@ bool UnwrappedLineParser::parseBracedList(bool ContinueOnSemicolons, bool HasError = false; // FIXME: Once we have an expression parser in the UnwrappedLineParser, - // replace this by using parseAssigmentExpression() inside. + // replace this by using parseAssignmentExpression() inside. do { if (Style.isCSharp()) { + // Fat arrows (=>) have tok::TokenKind tok::equal but TokenType + // TT_FatArrow. They always start an expression or a child block if + // followed by a curly brace. if (FormatTok->is(TT_FatArrow)) { nextToken(); - // Fat arrows can be followed by simple expressions or by child blocks - // in curly braces. if (FormatTok->is(tok::l_brace)) { + // C# may break after => if the next character is a newline. + if (Style.isCSharp() && Style.BraceWrapping.AfterFunction == true) { + // calling `addUnwrappedLine()` here causes odd parsing errors. + FormatTok->MustBreakBefore = true; + } parseChildBlock(); continue; } @@ -1927,6 +1933,12 @@ void UnwrappedLineParser::parseParens() { parseBracedList(); } break; + case tok::equal: + if (Style.isCSharp() && FormatTok->is(TT_FatArrow)) + parseStructuralElement(); + else + nextToken(); + break; case tok::kw_class: if (Style.Language == FormatStyle::LK_JavaScript) parseRecord(/*ParseAsExpr=*/true); diff --git a/clang/lib/Frontend/ASTUnit.cpp b/clang/lib/Frontend/ASTUnit.cpp index 988090a8b1b13..4f92833e4229c 100644 --- a/clang/lib/Frontend/ASTUnit.cpp +++ b/clang/lib/Frontend/ASTUnit.cpp @@ -588,7 +588,7 @@ class ASTInfoCollector : public ASTReaderListener { // // FIXME: We shouldn't need to do this, the target should be immutable once // created. This complexity should be lifted elsewhere. - Target->adjust(LangOpt); + Target->adjust(PP.getDiagnostics(), LangOpt); // Initialize the preprocessor. PP.Initialize(*Target); diff --git a/clang/lib/Frontend/CompilerInstance.cpp b/clang/lib/Frontend/CompilerInstance.cpp index 14052a5426fbb..95b8e03b805f4 100644 --- a/clang/lib/Frontend/CompilerInstance.cpp +++ b/clang/lib/Frontend/CompilerInstance.cpp @@ -143,13 +143,13 @@ bool CompilerInstance::createTarget() { // // FIXME: We shouldn't need to do this, the target should be immutable once // created. This complexity should be lifted elsewhere. - getTarget().adjust(getLangOpts()); + getTarget().adjust(getDiagnostics(), getLangOpts()); // Adjust target options based on codegen options. getTarget().adjustTargetOptions(getCodeGenOpts(), getTargetOpts()); if (auto *Aux = getAuxTarget()) { - Aux->adjust(getLangOpts()); + Aux->adjust(getDiagnostics(), getLangOpts()); getTarget().setAuxTarget(Aux); } @@ -460,7 +460,7 @@ void CompilerInstance::createPreprocessor(TranslationUnitKind TUKind) { getSourceManager(), *HeaderInfo, *this, /*IdentifierInfoLookup=*/nullptr, /*OwnsHeaderSearch=*/true, TUKind); - getTarget().adjust(getLangOpts()); + getTarget().adjust(getDiagnostics(), getLangOpts()); PP->Initialize(getTarget(), getAuxTarget()); if (PPOpts.DetailedRecord) diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt index 6d80d66fa11d7..382d40b2c0a99 100644 --- a/clang/lib/Headers/CMakeLists.txt +++ b/clang/lib/Headers/CMakeLists.txt @@ -66,6 +66,10 @@ set(files fmaintrin.h fxsrintrin.h gfniintrin.h + hexagon_circ_brev_intrinsics.h + hexagon_protos.h + hexagon_types.h + hvx_hexagon_protos.h hresetintrin.h htmintrin.h htmxlintrin.h diff --git a/clang/lib/Headers/__clang_cuda_math.h b/clang/lib/Headers/__clang_cuda_math.h index acb26ad345d59..538556f394da4 100644 --- a/clang/lib/Headers/__clang_cuda_math.h +++ b/clang/lib/Headers/__clang_cuda_math.h @@ -166,6 +166,8 @@ __DEVICE__ long long llrint(double __a) { return __nv_llrint(__a); } __DEVICE__ long long llrintf(float __a) { return __nv_llrintf(__a); } __DEVICE__ long long llround(double __a) { return __nv_llround(__a); } __DEVICE__ long long llroundf(float __a) { return __nv_llroundf(__a); } +__DEVICE__ double round(double __a) { return __nv_round(__a); } +__DEVICE__ float roundf(float __a) { return __nv_roundf(__a); } __DEVICE__ double log(double __a) { return __nv_log(__a); } __DEVICE__ double log10(double __a) { return __nv_log10(__a); } __DEVICE__ float log10f(float __a) { return __nv_log10f(__a); } @@ -270,8 +272,6 @@ __DEVICE__ float rnorm4df(float __a, float __b, float __c, float __d) { __DEVICE__ float rnormf(int __dim, const float *__t) { return __nv_rnormf(__dim, __t); } -__DEVICE__ double round(double __a) { return __nv_round(__a); } -__DEVICE__ float roundf(float __a) { return __nv_roundf(__a); } __DEVICE__ double rsqrt(double __a) { return __nv_rsqrt(__a); } __DEVICE__ float rsqrtf(float __a) { return __nv_rsqrtf(__a); } __DEVICE__ double scalbn(double __a, int __b) { return __nv_scalbn(__a, __b); } diff --git a/clang/lib/Headers/hexagon_circ_brev_intrinsics.h b/clang/lib/Headers/hexagon_circ_brev_intrinsics.h new file mode 100644 index 0000000000000..c53786d3c37bc --- /dev/null +++ b/clang/lib/Headers/hexagon_circ_brev_intrinsics.h @@ -0,0 +1,298 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _HEXAGON_CIRC_BREV_INTRINSICS_H_ +#define _HEXAGON_CIRC_BREV_INTRINSICS_H_ 1 + +#include +#include + +/* Circular Load */ +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_D(Word64 dst, Word64 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_D(dest,ptr,incr,bufsize,K) \ + { ptr = (int64_t *) HEXAGON_circ_ldd (ptr, &(dest), ((((K)+1)<<24)|((bufsize)<<3)), ((incr)*8)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_W(Word32 dst, Word32 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_W(dest,ptr,incr,bufsize,K) \ + { ptr = (int *) HEXAGON_circ_ldw (ptr, &(dest), (((K)<<24)|((bufsize)<<2)), ((incr)*4)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_H(Word16 dst, Word16 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_H(dest,ptr,incr,bufsize,K) \ + { ptr = (int16_t *) HEXAGON_circ_ldh (ptr, &(dest), ((((K)-1)<<24)|((bufsize)<<1)), ((incr)*2)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_UH( UWord16 dst, UWord16 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_UH(dest,ptr,incr,bufsize,K) \ + { ptr = (uint16_t *) HEXAGON_circ_lduh (ptr, &(dest), ((((K)-1)<<24)|((bufsize)<<1)), ((incr)*2)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_B(Word8 dst, Word8 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_B(dest,ptr,incr,bufsize,K) \ + { ptr = (int8_t *) HEXAGON_circ_ldb (ptr, &(dest), ((((K)-2)<<24)|(bufsize)), incr); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_load_update_UB(UWord8 dst, UWord8 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_load_update_UB(dest,ptr,incr,bufsize,K) \ + { ptr = (uint8_t *) HEXAGON_circ_ldub (ptr, &(dest), ((((K)-2)<<24)|(bufsize)), incr); } + +/* Circular Store */ +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_store_update_D(Word64 *src, Word64 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_store_update_D(src,ptr,incr,bufsize,K) \ + { ptr = (int64_t *) HEXAGON_circ_std (ptr, src, ((((K)+1)<<24)|((bufsize)<<3)), ((incr)*8)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_store_update_W(Word32 *src, Word32 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_store_update_W(src,ptr,incr,bufsize,K) \ + { ptr = (int *) HEXAGON_circ_stw (ptr, src, (((K)<<24)|((bufsize)<<2)), ((incr)*4)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_store_update_HL(Word16 *src, Word16 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_store_update_HL(src,ptr,incr,bufsize,K) \ + { ptr = (int16_t *) HEXAGON_circ_sth (ptr, src, ((((K)-1)<<24)|((bufsize)<<1)), ((incr)*2)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_store_update_HH(Word16 *src, Word16 *ptr, UWord32 incr, UWord32 bufsize, UWord32 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_store_update_HH(src,ptr,incr,bufsize,K) \ + { ptr = (int16_t *) HEXAGON_circ_sthhi (ptr, src, ((((K)-1)<<24)|((bufsize)<<1)), ((incr)*2)); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_circ_store_update_B(Word8 *src, Word8 *ptr, UWord32 I4, UWord32 bufsize, UWord64 K) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_circ_store_update_B(src,ptr,incr,bufsize,K) \ + { ptr = (int8_t *) HEXAGON_circ_stb (ptr, src, ((((K)-2)<<24)|(bufsize)), incr); } + + +/* Bit Reverse Load */ +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_D(Word64 dst, Word64 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_D(dest,ptr,log2bufsize) \ + { ptr = (int64_t *) HEXAGON_brev_ldd (ptr, &(dest), (1<<(16-((log2bufsize) + 3)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_W(Word32 dst, Word32 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_W(dest,ptr,log2bufsize) \ + { ptr = (int *) HEXAGON_brev_ldw (ptr, &(dest), (1<<(16-((log2bufsize) + 2)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_H(Word16 dst, Word16 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_H(dest,ptr,log2bufsize) \ + { ptr = (int16_t *) HEXAGON_brev_ldh (ptr, &(dest), (1<<(16-((log2bufsize) + 1)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_UH(UWord16 dst, UWord16 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_UH(dest,ptr,log2bufsize) \ + { ptr = (uint16_t *) HEXAGON_brev_lduh (ptr, &(dest), (1<<(16-((log2bufsize) + 1)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_B(Word8 dst, Word8 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_B(dest,ptr,log2bufsize) \ + { ptr = (int8_t *) HEXAGON_brev_ldb (ptr, &(dest), (1<<(16-((log2bufsize))))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_load_update_UB(UWord8 dst, UWord8 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_load_update_UB(dest,ptr,log2bufsize) \ + { ptr = (uint8_t *) HEXAGON_brev_ldub (ptr, &(dest), (1<<(16-((log2bufsize))))); } + +/* Bit Reverse Store */ + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_store_update_D(Word64 *src, Word64 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_store_update_D(src,ptr,log2bufsize) \ + { ptr = (int64_t *) HEXAGON_brev_std (ptr, src, (1<<(16-((log2bufsize) + 3)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_store_update_W(Word32 *src, Word32 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_store_update_W(src,ptr,log2bufsize) \ + { ptr = (int *) HEXAGON_brev_stw (ptr, src, (1<<(16-((log2bufsize) + 2)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_store_update_HL(Word16 *src, Word16 *ptr, Word32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_store_update_HL(src,ptr,log2bufsize) \ + { ptr = (int16_t *) HEXAGON_brev_sth (ptr, src, (1<<(16-((log2bufsize) + 1)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_store_update_HH(Word16 *src, Word16 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_store_update_HH(src,ptr,log2bufsize) \ + { ptr = (int16_t *) HEXAGON_brev_sthhi (ptr, src, (1<<(16-((log2bufsize) + 1)))); } + +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: void Q6_bitrev_store_update_B(Word8 *src, Word8 *ptr, UWord32 Iu4) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#define Q6_bitrev_store_update_B(src,ptr,log2bufsize) \ + { ptr = (int8_t *) HEXAGON_brev_stb (ptr, src, (1<<(16-((log2bufsize))))); } + + +#define HEXAGON_circ_ldd __builtin_circ_ldd +#define HEXAGON_circ_ldw __builtin_circ_ldw +#define HEXAGON_circ_ldh __builtin_circ_ldh +#define HEXAGON_circ_lduh __builtin_circ_lduh +#define HEXAGON_circ_ldb __builtin_circ_ldb +#define HEXAGON_circ_ldub __builtin_circ_ldub + + +#define HEXAGON_circ_std __builtin_circ_std +#define HEXAGON_circ_stw __builtin_circ_stw +#define HEXAGON_circ_sth __builtin_circ_sth +#define HEXAGON_circ_sthhi __builtin_circ_sthhi +#define HEXAGON_circ_stb __builtin_circ_stb + + +#define HEXAGON_brev_ldd __builtin_brev_ldd +#define HEXAGON_brev_ldw __builtin_brev_ldw +#define HEXAGON_brev_ldh __builtin_brev_ldh +#define HEXAGON_brev_lduh __builtin_brev_lduh +#define HEXAGON_brev_ldb __builtin_brev_ldb +#define HEXAGON_brev_ldub __builtin_brev_ldub + +#define HEXAGON_brev_std __builtin_brev_std +#define HEXAGON_brev_stw __builtin_brev_stw +#define HEXAGON_brev_sth __builtin_brev_sth +#define HEXAGON_brev_sthhi __builtin_brev_sthhi +#define HEXAGON_brev_stb __builtin_brev_stb + +#ifdef __HVX__ +/* ========================================================================== + Assembly Syntax: if (Qt) vmem(Rt+#0) = Vs + C Intrinsic Prototype: void Q6_vmaskedstoreq_QAV(HVX_VectorPred Qt, HVX_VectorAddress A, HVX_Vector Vs) + Instruction Type: COPROC_VMEM + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmaskedstoreq_QAV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaskedstoreq) + +/* ========================================================================== + Assembly Syntax: if (!Qt) vmem(Rt+#0) = Vs + C Intrinsic Prototype: void Q6_vmaskedstorenq_QAV(HVX_VectorPred Qt, HVX_VectorAddress A, HVX_Vector Vs) + Instruction Type: COPROC_VMEM + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmaskedstorenq_QAV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaskedstorenq) + +/* ========================================================================== + Assembly Syntax: if (Qt) vmem(Rt+#0):nt = Vs + C Intrinsic Prototype: void Q6_vmaskedstorentq_QAV(HVX_VectorPred Qt, HVX_VectorAddress A, HVX_Vector Vs) + Instruction Type: COPROC_VMEM + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmaskedstorentq_QAV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaskedstorentq) + +/* ========================================================================== + Assembly Syntax: if (!Qt) vmem(Rt+#0):nt = Vs + C Intrinsic Prototype: void Q6_vmaskedstorentnq_QAV(HVX_VectorPred Qt, HVX_VectorAddress A, HVX_Vector Vs) + Instruction Type: COPROC_VMEM + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmaskedstorentnq_QAV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaskedstorentnq) + +#endif + + +#endif /* #ifndef _HEXAGON_CIRC_BREV_INTRINSICS_H_ */ + +#ifdef __NOT_DEFINED__ +/*** comment block template ***/ +/* ========================================================================== + Assembly Syntax: Return=instruction() + C Intrinsic Prototype: ReturnType Intrinsic(ParamType Rs, ParamType Rt) + Instruction Type: InstructionType + Execution Slots: SLOT0123 + ========================================================================== */ +#endif /*** __NOT_DEFINED__ ***/ diff --git a/clang/lib/Headers/hexagon_protos.h b/clang/lib/Headers/hexagon_protos.h new file mode 100644 index 0000000000000..cdffd93bb8593 --- /dev/null +++ b/clang/lib/Headers/hexagon_protos.h @@ -0,0 +1,8450 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// Automatically generated file, do not edit! +//===----------------------------------------------------------------------===// + + + +#ifndef __HEXAGON_PROTOS_H_ +#define __HEXAGON_PROTOS_H_ 1 + +/* ========================================================================== + Assembly Syntax: Rd32=abs(Rs32) + C Intrinsic Prototype: Word32 Q6_R_abs_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_abs_R __builtin_HEXAGON_A2_abs + +/* ========================================================================== + Assembly Syntax: Rdd32=abs(Rss32) + C Intrinsic Prototype: Word64 Q6_P_abs_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_abs_P __builtin_HEXAGON_A2_absp + +/* ========================================================================== + Assembly Syntax: Rd32=abs(Rs32):sat + C Intrinsic Prototype: Word32 Q6_R_abs_R_sat(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_abs_R_sat __builtin_HEXAGON_A2_abssat + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_add_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_add_RR __builtin_HEXAGON_A2_add + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.h,Rs32.h):<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RhRh_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RhRh_s16 __builtin_HEXAGON_A2_addh_h16_hh + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.h,Rs32.l):<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RhRl_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RhRl_s16 __builtin_HEXAGON_A2_addh_h16_hl + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.h):<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RlRh_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRh_s16 __builtin_HEXAGON_A2_addh_h16_lh + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.l):<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RlRl_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRl_s16 __builtin_HEXAGON_A2_addh_h16_ll + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.h,Rs32.h):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RhRh_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RhRh_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_hh + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.h,Rs32.l):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RhRl_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RhRl_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_hl + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.h):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RlRh_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRh_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_lh + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.l):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_add_RlRl_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRl_sat_s16 __builtin_HEXAGON_A2_addh_h16_sat_ll + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.h) + C Intrinsic Prototype: Word32 Q6_R_add_RlRh(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRh __builtin_HEXAGON_A2_addh_l16_hl + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.l) + C Intrinsic Prototype: Word32 Q6_R_add_RlRl(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRl __builtin_HEXAGON_A2_addh_l16_ll + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.h):sat + C Intrinsic Prototype: Word32 Q6_R_add_RlRh_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRh_sat __builtin_HEXAGON_A2_addh_l16_sat_hl + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rt32.l,Rs32.l):sat + C Intrinsic Prototype: Word32 Q6_R_add_RlRl_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_RlRl_sat __builtin_HEXAGON_A2_addh_l16_sat_ll + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rs32,#s16) + C Intrinsic Prototype: Word32 Q6_R_add_RI(Word32 Rs, Word32 Is16) + Instruction Type: ALU32_ADDI + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_add_RI __builtin_HEXAGON_A2_addi + +/* ========================================================================== + Assembly Syntax: Rdd32=add(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_add_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_add_PP __builtin_HEXAGON_A2_addp + +/* ========================================================================== + Assembly Syntax: Rdd32=add(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_add_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_add_PP_sat __builtin_HEXAGON_A2_addpsat + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_add_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_add_RR_sat __builtin_HEXAGON_A2_addsat + +/* ========================================================================== + Assembly Syntax: Rdd32=add(Rs32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_add_RP(Word32 Rs, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_add_RP __builtin_HEXAGON_A2_addsp + +/* ========================================================================== + Assembly Syntax: Rd32=and(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_and_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_and_RR __builtin_HEXAGON_A2_and + +/* ========================================================================== + Assembly Syntax: Rd32=and(Rs32,#s10) + C Intrinsic Prototype: Word32 Q6_R_and_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_and_RI __builtin_HEXAGON_A2_andir + +/* ========================================================================== + Assembly Syntax: Rdd32=and(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_and_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_and_PP __builtin_HEXAGON_A2_andp + +/* ========================================================================== + Assembly Syntax: Rd32=aslh(Rs32) + C Intrinsic Prototype: Word32 Q6_R_aslh_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_aslh_R __builtin_HEXAGON_A2_aslh + +/* ========================================================================== + Assembly Syntax: Rd32=asrh(Rs32) + C Intrinsic Prototype: Word32 Q6_R_asrh_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_asrh_R __builtin_HEXAGON_A2_asrh + +/* ========================================================================== + Assembly Syntax: Rd32=combine(Rt32.h,Rs32.h) + C Intrinsic Prototype: Word32 Q6_R_combine_RhRh(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_combine_RhRh __builtin_HEXAGON_A2_combine_hh + +/* ========================================================================== + Assembly Syntax: Rd32=combine(Rt32.h,Rs32.l) + C Intrinsic Prototype: Word32 Q6_R_combine_RhRl(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_combine_RhRl __builtin_HEXAGON_A2_combine_hl + +/* ========================================================================== + Assembly Syntax: Rd32=combine(Rt32.l,Rs32.h) + C Intrinsic Prototype: Word32 Q6_R_combine_RlRh(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_combine_RlRh __builtin_HEXAGON_A2_combine_lh + +/* ========================================================================== + Assembly Syntax: Rd32=combine(Rt32.l,Rs32.l) + C Intrinsic Prototype: Word32 Q6_R_combine_RlRl(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_combine_RlRl __builtin_HEXAGON_A2_combine_ll + +/* ========================================================================== + Assembly Syntax: Rdd32=combine(#s8,#S8) + C Intrinsic Prototype: Word64 Q6_P_combine_II(Word32 Is8, Word32 IS8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_combine_II __builtin_HEXAGON_A2_combineii + +/* ========================================================================== + Assembly Syntax: Rdd32=combine(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_combine_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_combine_RR __builtin_HEXAGON_A2_combinew + +/* ========================================================================== + Assembly Syntax: Rd32=max(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_max_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_max_RR __builtin_HEXAGON_A2_max + +/* ========================================================================== + Assembly Syntax: Rdd32=max(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_max_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_max_PP __builtin_HEXAGON_A2_maxp + +/* ========================================================================== + Assembly Syntax: Rd32=maxu(Rs32,Rt32) + C Intrinsic Prototype: UWord32 Q6_R_maxu_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_maxu_RR __builtin_HEXAGON_A2_maxu + +/* ========================================================================== + Assembly Syntax: Rdd32=maxu(Rss32,Rtt32) + C Intrinsic Prototype: UWord64 Q6_P_maxu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_maxu_PP __builtin_HEXAGON_A2_maxup + +/* ========================================================================== + Assembly Syntax: Rd32=min(Rt32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_min_RR(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_min_RR __builtin_HEXAGON_A2_min + +/* ========================================================================== + Assembly Syntax: Rdd32=min(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_min_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_min_PP __builtin_HEXAGON_A2_minp + +/* ========================================================================== + Assembly Syntax: Rd32=minu(Rt32,Rs32) + C Intrinsic Prototype: UWord32 Q6_R_minu_RR(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_minu_RR __builtin_HEXAGON_A2_minu + +/* ========================================================================== + Assembly Syntax: Rdd32=minu(Rtt32,Rss32) + C Intrinsic Prototype: UWord64 Q6_P_minu_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_minu_PP __builtin_HEXAGON_A2_minup + +/* ========================================================================== + Assembly Syntax: Rd32=neg(Rs32) + C Intrinsic Prototype: Word32 Q6_R_neg_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_neg_R __builtin_HEXAGON_A2_neg + +/* ========================================================================== + Assembly Syntax: Rdd32=neg(Rss32) + C Intrinsic Prototype: Word64 Q6_P_neg_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_neg_P __builtin_HEXAGON_A2_negp + +/* ========================================================================== + Assembly Syntax: Rd32=neg(Rs32):sat + C Intrinsic Prototype: Word32 Q6_R_neg_R_sat(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_neg_R_sat __builtin_HEXAGON_A2_negsat + +/* ========================================================================== + Assembly Syntax: Rd32=not(Rs32) + C Intrinsic Prototype: Word32 Q6_R_not_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_not_R __builtin_HEXAGON_A2_not + +/* ========================================================================== + Assembly Syntax: Rdd32=not(Rss32) + C Intrinsic Prototype: Word64 Q6_P_not_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_not_P __builtin_HEXAGON_A2_notp + +/* ========================================================================== + Assembly Syntax: Rd32=or(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_or_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_or_RR __builtin_HEXAGON_A2_or + +/* ========================================================================== + Assembly Syntax: Rd32=or(Rs32,#s10) + C Intrinsic Prototype: Word32 Q6_R_or_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_or_RI __builtin_HEXAGON_A2_orir + +/* ========================================================================== + Assembly Syntax: Rdd32=or(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_or_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_or_PP __builtin_HEXAGON_A2_orp + +/* ========================================================================== + Assembly Syntax: Rd32=round(Rss32):sat + C Intrinsic Prototype: Word32 Q6_R_round_P_sat(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_round_P_sat __builtin_HEXAGON_A2_roundsat + +/* ========================================================================== + Assembly Syntax: Rd32=sat(Rss32) + C Intrinsic Prototype: Word32 Q6_R_sat_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sat_P __builtin_HEXAGON_A2_sat + +/* ========================================================================== + Assembly Syntax: Rd32=satb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_satb_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_satb_R __builtin_HEXAGON_A2_satb + +/* ========================================================================== + Assembly Syntax: Rd32=sath(Rs32) + C Intrinsic Prototype: Word32 Q6_R_sath_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sath_R __builtin_HEXAGON_A2_sath + +/* ========================================================================== + Assembly Syntax: Rd32=satub(Rs32) + C Intrinsic Prototype: Word32 Q6_R_satub_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_satub_R __builtin_HEXAGON_A2_satub + +/* ========================================================================== + Assembly Syntax: Rd32=satuh(Rs32) + C Intrinsic Prototype: Word32 Q6_R_satuh_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_satuh_R __builtin_HEXAGON_A2_satuh + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_sub_RR(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_sub_RR __builtin_HEXAGON_A2_sub + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.h,Rs32.h):<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RhRh_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RhRh_s16 __builtin_HEXAGON_A2_subh_h16_hh + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.h,Rs32.l):<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RhRl_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RhRl_s16 __builtin_HEXAGON_A2_subh_h16_hl + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.h):<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RlRh_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRh_s16 __builtin_HEXAGON_A2_subh_h16_lh + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.l):<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RlRl_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRl_s16 __builtin_HEXAGON_A2_subh_h16_ll + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.h,Rs32.h):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RhRh_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RhRh_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_hh + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.h,Rs32.l):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RhRl_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RhRl_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_hl + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.h):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RlRh_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRh_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_lh + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.l):sat:<<16 + C Intrinsic Prototype: Word32 Q6_R_sub_RlRl_sat_s16(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRl_sat_s16 __builtin_HEXAGON_A2_subh_h16_sat_ll + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.h) + C Intrinsic Prototype: Word32 Q6_R_sub_RlRh(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRh __builtin_HEXAGON_A2_subh_l16_hl + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.l) + C Intrinsic Prototype: Word32 Q6_R_sub_RlRl(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRl __builtin_HEXAGON_A2_subh_l16_ll + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.h):sat + C Intrinsic Prototype: Word32 Q6_R_sub_RlRh_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRh_sat __builtin_HEXAGON_A2_subh_l16_sat_hl + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32.l,Rs32.l):sat + C Intrinsic Prototype: Word32 Q6_R_sub_RlRl_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_RlRl_sat __builtin_HEXAGON_A2_subh_l16_sat_ll + +/* ========================================================================== + Assembly Syntax: Rdd32=sub(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_sub_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_sub_PP __builtin_HEXAGON_A2_subp + +/* ========================================================================== + Assembly Syntax: Rd32=sub(#s10,Rs32) + C Intrinsic Prototype: Word32 Q6_R_sub_IR(Word32 Is10, Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_sub_IR __builtin_HEXAGON_A2_subri + +/* ========================================================================== + Assembly Syntax: Rd32=sub(Rt32,Rs32):sat + C Intrinsic Prototype: Word32 Q6_R_sub_RR_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_sub_RR_sat __builtin_HEXAGON_A2_subsat + +/* ========================================================================== + Assembly Syntax: Rd32=vaddh(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_vaddh_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vaddh_RR __builtin_HEXAGON_A2_svaddh + +/* ========================================================================== + Assembly Syntax: Rd32=vaddh(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_vaddh_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vaddh_RR_sat __builtin_HEXAGON_A2_svaddhs + +/* ========================================================================== + Assembly Syntax: Rd32=vadduh(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_vadduh_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vadduh_RR_sat __builtin_HEXAGON_A2_svadduhs + +/* ========================================================================== + Assembly Syntax: Rd32=vavgh(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_vavgh_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vavgh_RR __builtin_HEXAGON_A2_svavgh + +/* ========================================================================== + Assembly Syntax: Rd32=vavgh(Rs32,Rt32):rnd + C Intrinsic Prototype: Word32 Q6_R_vavgh_RR_rnd(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vavgh_RR_rnd __builtin_HEXAGON_A2_svavghs + +/* ========================================================================== + Assembly Syntax: Rd32=vnavgh(Rt32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_vnavgh_RR(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vnavgh_RR __builtin_HEXAGON_A2_svnavgh + +/* ========================================================================== + Assembly Syntax: Rd32=vsubh(Rt32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_vsubh_RR(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vsubh_RR __builtin_HEXAGON_A2_svsubh + +/* ========================================================================== + Assembly Syntax: Rd32=vsubh(Rt32,Rs32):sat + C Intrinsic Prototype: Word32 Q6_R_vsubh_RR_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vsubh_RR_sat __builtin_HEXAGON_A2_svsubhs + +/* ========================================================================== + Assembly Syntax: Rd32=vsubuh(Rt32,Rs32):sat + C Intrinsic Prototype: Word32 Q6_R_vsubuh_RR_sat(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vsubuh_RR_sat __builtin_HEXAGON_A2_svsubuhs + +/* ========================================================================== + Assembly Syntax: Rd32=swiz(Rs32) + C Intrinsic Prototype: Word32 Q6_R_swiz_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_swiz_R __builtin_HEXAGON_A2_swiz + +/* ========================================================================== + Assembly Syntax: Rd32=sxtb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_sxtb_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_sxtb_R __builtin_HEXAGON_A2_sxtb + +/* ========================================================================== + Assembly Syntax: Rd32=sxth(Rs32) + C Intrinsic Prototype: Word32 Q6_R_sxth_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_sxth_R __builtin_HEXAGON_A2_sxth + +/* ========================================================================== + Assembly Syntax: Rdd32=sxtw(Rs32) + C Intrinsic Prototype: Word64 Q6_P_sxtw_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_sxtw_R __builtin_HEXAGON_A2_sxtw + +/* ========================================================================== + Assembly Syntax: Rd32=Rs32 + C Intrinsic Prototype: Word32 Q6_R_equals_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_equals_R __builtin_HEXAGON_A2_tfr + +/* ========================================================================== + Assembly Syntax: Rx32.h=#u16 + C Intrinsic Prototype: Word32 Q6_Rh_equals_I(Word32 Rx, Word32 Iu16) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Rh_equals_I __builtin_HEXAGON_A2_tfrih + +/* ========================================================================== + Assembly Syntax: Rx32.l=#u16 + C Intrinsic Prototype: Word32 Q6_Rl_equals_I(Word32 Rx, Word32 Iu16) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Rl_equals_I __builtin_HEXAGON_A2_tfril + +/* ========================================================================== + Assembly Syntax: Rdd32=Rss32 + C Intrinsic Prototype: Word64 Q6_P_equals_P(Word64 Rss) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_equals_P __builtin_HEXAGON_A2_tfrp + +/* ========================================================================== + Assembly Syntax: Rdd32=#s8 + C Intrinsic Prototype: Word64 Q6_P_equals_I(Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_equals_I __builtin_HEXAGON_A2_tfrpi + +/* ========================================================================== + Assembly Syntax: Rd32=#s16 + C Intrinsic Prototype: Word32 Q6_R_equals_I(Word32 Is16) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_equals_I __builtin_HEXAGON_A2_tfrsi + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsh(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsh_P __builtin_HEXAGON_A2_vabsh + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsh(Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vabsh_P_sat(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsh_P_sat __builtin_HEXAGON_A2_vabshsat + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsw(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsw_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsw_P __builtin_HEXAGON_A2_vabsw + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsw(Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vabsw_P_sat(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsw_P_sat __builtin_HEXAGON_A2_vabswsat + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddb(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vaddb_PP(Word64 Rss, Word64 Rtt) + Instruction Type: MAPPING + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_vaddb_PP __builtin_HEXAGON_A2_vaddb_map + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vaddh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddh_PP __builtin_HEXAGON_A2_vaddh + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vaddh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddh_PP_sat __builtin_HEXAGON_A2_vaddhs + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vaddub_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddub_PP __builtin_HEXAGON_A2_vaddub + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddub(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vaddub_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddub_PP_sat __builtin_HEXAGON_A2_vaddubs + +/* ========================================================================== + Assembly Syntax: Rdd32=vadduh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vadduh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vadduh_PP_sat __builtin_HEXAGON_A2_vadduhs + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vaddw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddw_PP __builtin_HEXAGON_A2_vaddw + +/* ========================================================================== + Assembly Syntax: Rdd32=vaddw(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vaddw_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaddw_PP_sat __builtin_HEXAGON_A2_vaddws + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vavgh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgh_PP __builtin_HEXAGON_A2_vavgh + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgh(Rss32,Rtt32):crnd + C Intrinsic Prototype: Word64 Q6_P_vavgh_PP_crnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgh_PP_crnd __builtin_HEXAGON_A2_vavghcr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgh(Rss32,Rtt32):rnd + C Intrinsic Prototype: Word64 Q6_P_vavgh_PP_rnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgh_PP_rnd __builtin_HEXAGON_A2_vavghr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vavgub_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgub_PP __builtin_HEXAGON_A2_vavgub + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgub(Rss32,Rtt32):rnd + C Intrinsic Prototype: Word64 Q6_P_vavgub_PP_rnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgub_PP_rnd __builtin_HEXAGON_A2_vavgubr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavguh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vavguh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavguh_PP __builtin_HEXAGON_A2_vavguh + +/* ========================================================================== + Assembly Syntax: Rdd32=vavguh(Rss32,Rtt32):rnd + C Intrinsic Prototype: Word64 Q6_P_vavguh_PP_rnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavguh_PP_rnd __builtin_HEXAGON_A2_vavguhr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavguw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vavguw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavguw_PP __builtin_HEXAGON_A2_vavguw + +/* ========================================================================== + Assembly Syntax: Rdd32=vavguw(Rss32,Rtt32):rnd + C Intrinsic Prototype: Word64 Q6_P_vavguw_PP_rnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavguw_PP_rnd __builtin_HEXAGON_A2_vavguwr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vavgw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgw_PP __builtin_HEXAGON_A2_vavgw + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgw(Rss32,Rtt32):crnd + C Intrinsic Prototype: Word64 Q6_P_vavgw_PP_crnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgw_PP_crnd __builtin_HEXAGON_A2_vavgwcr + +/* ========================================================================== + Assembly Syntax: Rdd32=vavgw(Rss32,Rtt32):rnd + C Intrinsic Prototype: Word64 Q6_P_vavgw_PP_rnd(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vavgw_PP_rnd __builtin_HEXAGON_A2_vavgwr + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.eq(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpb_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_eq_PP __builtin_HEXAGON_A2_vcmpbeq + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.gtu(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpb_gtu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_gtu_PP __builtin_HEXAGON_A2_vcmpbgtu + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.eq(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmph_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_eq_PP __builtin_HEXAGON_A2_vcmpheq + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.gt(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmph_gt_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_gt_PP __builtin_HEXAGON_A2_vcmphgt + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.gtu(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmph_gtu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_gtu_PP __builtin_HEXAGON_A2_vcmphgtu + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.eq(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpw_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_eq_PP __builtin_HEXAGON_A2_vcmpweq + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.gt(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpw_gt_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_gt_PP __builtin_HEXAGON_A2_vcmpwgt + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.gtu(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpw_gtu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_gtu_PP __builtin_HEXAGON_A2_vcmpwgtu + +/* ========================================================================== + Assembly Syntax: Rdd32=vconj(Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vconj_P_sat(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vconj_P_sat __builtin_HEXAGON_A2_vconj + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxb(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxb_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxb_PP __builtin_HEXAGON_A2_vmaxb + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxh_PP __builtin_HEXAGON_A2_vmaxh + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxub(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxub_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxub_PP __builtin_HEXAGON_A2_vmaxub + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxuh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxuh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxuh_PP __builtin_HEXAGON_A2_vmaxuh + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxuw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxuw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxuw_PP __builtin_HEXAGON_A2_vmaxuw + +/* ========================================================================== + Assembly Syntax: Rdd32=vmaxw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vmaxw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmaxw_PP __builtin_HEXAGON_A2_vmaxw + +/* ========================================================================== + Assembly Syntax: Rdd32=vminb(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminb_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminb_PP __builtin_HEXAGON_A2_vminb + +/* ========================================================================== + Assembly Syntax: Rdd32=vminh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminh_PP __builtin_HEXAGON_A2_vminh + +/* ========================================================================== + Assembly Syntax: Rdd32=vminub(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminub_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminub_PP __builtin_HEXAGON_A2_vminub + +/* ========================================================================== + Assembly Syntax: Rdd32=vminuh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminuh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminuh_PP __builtin_HEXAGON_A2_vminuh + +/* ========================================================================== + Assembly Syntax: Rdd32=vminuw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminuw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminuw_PP __builtin_HEXAGON_A2_vminuw + +/* ========================================================================== + Assembly Syntax: Rdd32=vminw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vminw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vminw_PP __builtin_HEXAGON_A2_vminw + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vnavgh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgh_PP __builtin_HEXAGON_A2_vnavgh + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgh(Rtt32,Rss32):crnd:sat + C Intrinsic Prototype: Word64 Q6_P_vnavgh_PP_crnd_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgh_PP_crnd_sat __builtin_HEXAGON_A2_vnavghcr + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgh(Rtt32,Rss32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vnavgh_PP_rnd_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgh_PP_rnd_sat __builtin_HEXAGON_A2_vnavghr + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vnavgw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgw_PP __builtin_HEXAGON_A2_vnavgw + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgw(Rtt32,Rss32):crnd:sat + C Intrinsic Prototype: Word64 Q6_P_vnavgw_PP_crnd_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgw_PP_crnd_sat __builtin_HEXAGON_A2_vnavgwcr + +/* ========================================================================== + Assembly Syntax: Rdd32=vnavgw(Rtt32,Rss32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vnavgw_PP_rnd_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vnavgw_PP_rnd_sat __builtin_HEXAGON_A2_vnavgwr + +/* ========================================================================== + Assembly Syntax: Rdd32=vraddub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vraddub_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vraddub_PP __builtin_HEXAGON_A2_vraddub + +/* ========================================================================== + Assembly Syntax: Rxx32+=vraddub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vraddubacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vraddubacc_PP __builtin_HEXAGON_A2_vraddub_acc + +/* ========================================================================== + Assembly Syntax: Rdd32=vrsadub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrsadub_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrsadub_PP __builtin_HEXAGON_A2_vrsadub + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrsadub(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrsadubacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrsadubacc_PP __builtin_HEXAGON_A2_vrsadub_acc + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubb(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vsubb_PP(Word64 Rss, Word64 Rtt) + Instruction Type: MAPPING + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_vsubb_PP __builtin_HEXAGON_A2_vsubb_map + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsubh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubh_PP __builtin_HEXAGON_A2_vsubh + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubh(Rtt32,Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vsubh_PP_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubh_PP_sat __builtin_HEXAGON_A2_vsubhs + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubub(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsubub_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubub_PP __builtin_HEXAGON_A2_vsubub + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubub(Rtt32,Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vsubub_PP_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubub_PP_sat __builtin_HEXAGON_A2_vsububs + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubuh(Rtt32,Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vsubuh_PP_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubuh_PP_sat __builtin_HEXAGON_A2_vsubuhs + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsubw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubw_PP __builtin_HEXAGON_A2_vsubw + +/* ========================================================================== + Assembly Syntax: Rdd32=vsubw(Rtt32,Rss32):sat + C Intrinsic Prototype: Word64 Q6_P_vsubw_PP_sat(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsubw_PP_sat __builtin_HEXAGON_A2_vsubws + +/* ========================================================================== + Assembly Syntax: Rd32=xor(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_xor_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_xor_RR __builtin_HEXAGON_A2_xor + +/* ========================================================================== + Assembly Syntax: Rdd32=xor(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_xor_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_xor_PP __builtin_HEXAGON_A2_xorp + +/* ========================================================================== + Assembly Syntax: Rd32=zxtb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_zxtb_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_zxtb_R __builtin_HEXAGON_A2_zxtb + +/* ========================================================================== + Assembly Syntax: Rd32=zxth(Rs32) + C Intrinsic Prototype: Word32 Q6_R_zxth_R(Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_zxth_R __builtin_HEXAGON_A2_zxth + +/* ========================================================================== + Assembly Syntax: Rd32=and(Rt32,~Rs32) + C Intrinsic Prototype: Word32 Q6_R_and_RnR(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_and_RnR __builtin_HEXAGON_A4_andn + +/* ========================================================================== + Assembly Syntax: Rdd32=and(Rtt32,~Rss32) + C Intrinsic Prototype: Word64 Q6_P_and_PnP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_and_PnP __builtin_HEXAGON_A4_andnp + +/* ========================================================================== + Assembly Syntax: Rdd32=bitsplit(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_bitsplit_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_bitsplit_RR __builtin_HEXAGON_A4_bitsplit + +/* ========================================================================== + Assembly Syntax: Rdd32=bitsplit(Rs32,#u5) + C Intrinsic Prototype: Word64 Q6_P_bitsplit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_bitsplit_RI __builtin_HEXAGON_A4_bitspliti + +/* ========================================================================== + Assembly Syntax: Pd4=boundscheck(Rs32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_boundscheck_RP(Word32 Rs, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_boundscheck_RP __builtin_HEXAGON_A4_boundscheck + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.eq(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmpb_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_eq_RR __builtin_HEXAGON_A4_cmpbeq + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.eq(Rs32,#u8) + C Intrinsic Prototype: Byte Q6_p_cmpb_eq_RI(Word32 Rs, Word32 Iu8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_eq_RI __builtin_HEXAGON_A4_cmpbeqi + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.gt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmpb_gt_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_gt_RR __builtin_HEXAGON_A4_cmpbgt + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.gt(Rs32,#s8) + C Intrinsic Prototype: Byte Q6_p_cmpb_gt_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_gt_RI __builtin_HEXAGON_A4_cmpbgti + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.gtu(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmpb_gtu_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_gtu_RR __builtin_HEXAGON_A4_cmpbgtu + +/* ========================================================================== + Assembly Syntax: Pd4=cmpb.gtu(Rs32,#u7) + C Intrinsic Prototype: Byte Q6_p_cmpb_gtu_RI(Word32 Rs, Word32 Iu7) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmpb_gtu_RI __builtin_HEXAGON_A4_cmpbgtui + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.eq(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmph_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_eq_RR __builtin_HEXAGON_A4_cmpheq + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.eq(Rs32,#s8) + C Intrinsic Prototype: Byte Q6_p_cmph_eq_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_eq_RI __builtin_HEXAGON_A4_cmpheqi + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.gt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmph_gt_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_gt_RR __builtin_HEXAGON_A4_cmphgt + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.gt(Rs32,#s8) + C Intrinsic Prototype: Byte Q6_p_cmph_gt_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_gt_RI __builtin_HEXAGON_A4_cmphgti + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.gtu(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmph_gtu_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_gtu_RR __builtin_HEXAGON_A4_cmphgtu + +/* ========================================================================== + Assembly Syntax: Pd4=cmph.gtu(Rs32,#u7) + C Intrinsic Prototype: Byte Q6_p_cmph_gtu_RI(Word32 Rs, Word32 Iu7) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmph_gtu_RI __builtin_HEXAGON_A4_cmphgtui + +/* ========================================================================== + Assembly Syntax: Rdd32=combine(#s8,Rs32) + C Intrinsic Prototype: Word64 Q6_P_combine_IR(Word32 Is8, Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_combine_IR __builtin_HEXAGON_A4_combineir + +/* ========================================================================== + Assembly Syntax: Rdd32=combine(Rs32,#s8) + C Intrinsic Prototype: Word64 Q6_P_combine_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_combine_RI __builtin_HEXAGON_A4_combineri + +/* ========================================================================== + Assembly Syntax: Rd32=cround(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_cround_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cround_RI __builtin_HEXAGON_A4_cround_ri + +/* ========================================================================== + Assembly Syntax: Rd32=cround(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_cround_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cround_RR __builtin_HEXAGON_A4_cround_rr + +/* ========================================================================== + Assembly Syntax: Rd32=modwrap(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_modwrap_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_modwrap_RR __builtin_HEXAGON_A4_modwrapu + +/* ========================================================================== + Assembly Syntax: Rd32=or(Rt32,~Rs32) + C Intrinsic Prototype: Word32 Q6_R_or_RnR(Word32 Rt, Word32 Rs) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_or_RnR __builtin_HEXAGON_A4_orn + +/* ========================================================================== + Assembly Syntax: Rdd32=or(Rtt32,~Rss32) + C Intrinsic Prototype: Word64 Q6_P_or_PnP(Word64 Rtt, Word64 Rss) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_or_PnP __builtin_HEXAGON_A4_ornp + +/* ========================================================================== + Assembly Syntax: Rd32=cmp.eq(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_cmp_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_cmp_eq_RR __builtin_HEXAGON_A4_rcmpeq + +/* ========================================================================== + Assembly Syntax: Rd32=cmp.eq(Rs32,#s8) + C Intrinsic Prototype: Word32 Q6_R_cmp_eq_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_cmp_eq_RI __builtin_HEXAGON_A4_rcmpeqi + +/* ========================================================================== + Assembly Syntax: Rd32=!cmp.eq(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_not_cmp_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_not_cmp_eq_RR __builtin_HEXAGON_A4_rcmpneq + +/* ========================================================================== + Assembly Syntax: Rd32=!cmp.eq(Rs32,#s8) + C Intrinsic Prototype: Word32 Q6_R_not_cmp_eq_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_not_cmp_eq_RI __builtin_HEXAGON_A4_rcmpneqi + +/* ========================================================================== + Assembly Syntax: Rd32=round(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_round_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_round_RI __builtin_HEXAGON_A4_round_ri + +/* ========================================================================== + Assembly Syntax: Rd32=round(Rs32,#u5):sat + C Intrinsic Prototype: Word32 Q6_R_round_RI_sat(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_round_RI_sat __builtin_HEXAGON_A4_round_ri_sat + +/* ========================================================================== + Assembly Syntax: Rd32=round(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_round_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_round_RR __builtin_HEXAGON_A4_round_rr + +/* ========================================================================== + Assembly Syntax: Rd32=round(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_round_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_round_RR_sat __builtin_HEXAGON_A4_round_rr_sat + +/* ========================================================================== + Assembly Syntax: Pd4=tlbmatch(Rss32,Rt32) + C Intrinsic Prototype: Byte Q6_p_tlbmatch_PR(Word64 Rss, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_tlbmatch_PR __builtin_HEXAGON_A4_tlbmatch + +/* ========================================================================== + Assembly Syntax: Pd4=any8(vcmpb.eq(Rss32,Rtt32)) + C Intrinsic Prototype: Byte Q6_p_any8_vcmpb_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_any8_vcmpb_eq_PP __builtin_HEXAGON_A4_vcmpbeq_any + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.eq(Rss32,#u8) + C Intrinsic Prototype: Byte Q6_p_vcmpb_eq_PI(Word64 Rss, Word32 Iu8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_eq_PI __builtin_HEXAGON_A4_vcmpbeqi + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.gt(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_vcmpb_gt_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_gt_PP __builtin_HEXAGON_A4_vcmpbgt + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.gt(Rss32,#s8) + C Intrinsic Prototype: Byte Q6_p_vcmpb_gt_PI(Word64 Rss, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_gt_PI __builtin_HEXAGON_A4_vcmpbgti + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpb.gtu(Rss32,#u7) + C Intrinsic Prototype: Byte Q6_p_vcmpb_gtu_PI(Word64 Rss, Word32 Iu7) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpb_gtu_PI __builtin_HEXAGON_A4_vcmpbgtui + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.eq(Rss32,#s8) + C Intrinsic Prototype: Byte Q6_p_vcmph_eq_PI(Word64 Rss, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_eq_PI __builtin_HEXAGON_A4_vcmpheqi + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.gt(Rss32,#s8) + C Intrinsic Prototype: Byte Q6_p_vcmph_gt_PI(Word64 Rss, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_gt_PI __builtin_HEXAGON_A4_vcmphgti + +/* ========================================================================== + Assembly Syntax: Pd4=vcmph.gtu(Rss32,#u7) + C Intrinsic Prototype: Byte Q6_p_vcmph_gtu_PI(Word64 Rss, Word32 Iu7) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmph_gtu_PI __builtin_HEXAGON_A4_vcmphgtui + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.eq(Rss32,#s8) + C Intrinsic Prototype: Byte Q6_p_vcmpw_eq_PI(Word64 Rss, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_eq_PI __builtin_HEXAGON_A4_vcmpweqi + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.gt(Rss32,#s8) + C Intrinsic Prototype: Byte Q6_p_vcmpw_gt_PI(Word64 Rss, Word32 Is8) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_gt_PI __builtin_HEXAGON_A4_vcmpwgti + +/* ========================================================================== + Assembly Syntax: Pd4=vcmpw.gtu(Rss32,#u7) + C Intrinsic Prototype: Byte Q6_p_vcmpw_gtu_PI(Word64 Rss, Word32 Iu7) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_vcmpw_gtu_PI __builtin_HEXAGON_A4_vcmpwgtui + +/* ========================================================================== + Assembly Syntax: Rxx32=vrmaxh(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrmaxh_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmaxh_PR __builtin_HEXAGON_A4_vrmaxh + +/* ========================================================================== + Assembly Syntax: Rxx32=vrmaxuh(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrmaxuh_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmaxuh_PR __builtin_HEXAGON_A4_vrmaxuh + +/* ========================================================================== + Assembly Syntax: Rxx32=vrmaxuw(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrmaxuw_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmaxuw_PR __builtin_HEXAGON_A4_vrmaxuw + +/* ========================================================================== + Assembly Syntax: Rxx32=vrmaxw(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrmaxw_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmaxw_PR __builtin_HEXAGON_A4_vrmaxw + +/* ========================================================================== + Assembly Syntax: Rxx32=vrminh(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrminh_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrminh_PR __builtin_HEXAGON_A4_vrminh + +/* ========================================================================== + Assembly Syntax: Rxx32=vrminuh(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrminuh_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrminuh_PR __builtin_HEXAGON_A4_vrminuh + +/* ========================================================================== + Assembly Syntax: Rxx32=vrminuw(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrminuw_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrminuw_PR __builtin_HEXAGON_A4_vrminuw + +/* ========================================================================== + Assembly Syntax: Rxx32=vrminw(Rss32,Ru32) + C Intrinsic Prototype: Word64 Q6_P_vrminw_PR(Word64 Rxx, Word64 Rss, Word32 Ru) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrminw_PR __builtin_HEXAGON_A4_vrminw + +/* ========================================================================== + Assembly Syntax: Rd32=vaddhub(Rss32,Rtt32):sat + C Intrinsic Prototype: Word32 Q6_R_vaddhub_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vaddhub_PP_sat __builtin_HEXAGON_A5_vaddhubs + +/* ========================================================================== + Assembly Syntax: Pd4=all8(Ps4) + C Intrinsic Prototype: Byte Q6_p_all8_p(Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_all8_p __builtin_HEXAGON_C2_all8 + +/* ========================================================================== + Assembly Syntax: Pd4=and(Pt4,Ps4) + C Intrinsic Prototype: Byte Q6_p_and_pp(Byte Pt, Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_pp __builtin_HEXAGON_C2_and + +/* ========================================================================== + Assembly Syntax: Pd4=and(Pt4,!Ps4) + C Intrinsic Prototype: Byte Q6_p_and_pnp(Byte Pt, Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_pnp __builtin_HEXAGON_C2_andn + +/* ========================================================================== + Assembly Syntax: Pd4=any8(Ps4) + C Intrinsic Prototype: Byte Q6_p_any8_p(Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_any8_p __builtin_HEXAGON_C2_any8 + +/* ========================================================================== + Assembly Syntax: Pd4=bitsclr(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_bitsclr_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_bitsclr_RR __builtin_HEXAGON_C2_bitsclr + +/* ========================================================================== + Assembly Syntax: Pd4=bitsclr(Rs32,#u6) + C Intrinsic Prototype: Byte Q6_p_bitsclr_RI(Word32 Rs, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_bitsclr_RI __builtin_HEXAGON_C2_bitsclri + +/* ========================================================================== + Assembly Syntax: Pd4=bitsset(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_bitsset_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_bitsset_RR __builtin_HEXAGON_C2_bitsset + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.eq(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmp_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_eq_RR __builtin_HEXAGON_C2_cmpeq + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.eq(Rs32,#s10) + C Intrinsic Prototype: Byte Q6_p_cmp_eq_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_eq_RI __builtin_HEXAGON_C2_cmpeqi + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.eq(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_cmp_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmp_eq_PP __builtin_HEXAGON_C2_cmpeqp + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.ge(Rs32,#s8) + C Intrinsic Prototype: Byte Q6_p_cmp_ge_RI(Word32 Rs, Word32 Is8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_ge_RI __builtin_HEXAGON_C2_cmpgei + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.geu(Rs32,#u8) + C Intrinsic Prototype: Byte Q6_p_cmp_geu_RI(Word32 Rs, Word32 Iu8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_geu_RI __builtin_HEXAGON_C2_cmpgeui + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmp_gt_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_gt_RR __builtin_HEXAGON_C2_cmpgt + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gt(Rs32,#s10) + C Intrinsic Prototype: Byte Q6_p_cmp_gt_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_gt_RI __builtin_HEXAGON_C2_cmpgti + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gt(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_cmp_gt_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmp_gt_PP __builtin_HEXAGON_C2_cmpgtp + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gtu(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmp_gtu_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_gtu_RR __builtin_HEXAGON_C2_cmpgtu + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gtu(Rs32,#u9) + C Intrinsic Prototype: Byte Q6_p_cmp_gtu_RI(Word32 Rs, Word32 Iu9) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_gtu_RI __builtin_HEXAGON_C2_cmpgtui + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.gtu(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_cmp_gtu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_cmp_gtu_PP __builtin_HEXAGON_C2_cmpgtup + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.lt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmp_lt_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_lt_RR __builtin_HEXAGON_C2_cmplt + +/* ========================================================================== + Assembly Syntax: Pd4=cmp.ltu(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_cmp_ltu_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_cmp_ltu_RR __builtin_HEXAGON_C2_cmpltu + +/* ========================================================================== + Assembly Syntax: Rdd32=mask(Pt4) + C Intrinsic Prototype: Word64 Q6_P_mask_p(Byte Pt) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mask_p __builtin_HEXAGON_C2_mask + +/* ========================================================================== + Assembly Syntax: Rd32=mux(Pu4,Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mux_pRR(Byte Pu, Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mux_pRR __builtin_HEXAGON_C2_mux + +/* ========================================================================== + Assembly Syntax: Rd32=mux(Pu4,#s8,#S8) + C Intrinsic Prototype: Word32 Q6_R_mux_pII(Byte Pu, Word32 Is8, Word32 IS8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mux_pII __builtin_HEXAGON_C2_muxii + +/* ========================================================================== + Assembly Syntax: Rd32=mux(Pu4,Rs32,#s8) + C Intrinsic Prototype: Word32 Q6_R_mux_pRI(Byte Pu, Word32 Rs, Word32 Is8) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mux_pRI __builtin_HEXAGON_C2_muxir + +/* ========================================================================== + Assembly Syntax: Rd32=mux(Pu4,#s8,Rs32) + C Intrinsic Prototype: Word32 Q6_R_mux_pIR(Byte Pu, Word32 Is8, Word32 Rs) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mux_pIR __builtin_HEXAGON_C2_muxri + +/* ========================================================================== + Assembly Syntax: Pd4=not(Ps4) + C Intrinsic Prototype: Byte Q6_p_not_p(Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_p __builtin_HEXAGON_C2_not + +/* ========================================================================== + Assembly Syntax: Pd4=or(Pt4,Ps4) + C Intrinsic Prototype: Byte Q6_p_or_pp(Byte Pt, Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_pp __builtin_HEXAGON_C2_or + +/* ========================================================================== + Assembly Syntax: Pd4=or(Pt4,!Ps4) + C Intrinsic Prototype: Byte Q6_p_or_pnp(Byte Pt, Byte Ps) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_pnp __builtin_HEXAGON_C2_orn + +/* ========================================================================== + Assembly Syntax: Pd4=Ps4 + C Intrinsic Prototype: Byte Q6_p_equals_p(Byte Ps) + Instruction Type: MAPPING + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_equals_p __builtin_HEXAGON_C2_pxfer_map + +/* ========================================================================== + Assembly Syntax: Rd32=Ps4 + C Intrinsic Prototype: Word32 Q6_R_equals_p(Byte Ps) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_equals_p __builtin_HEXAGON_C2_tfrpr + +/* ========================================================================== + Assembly Syntax: Pd4=Rs32 + C Intrinsic Prototype: Byte Q6_p_equals_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_equals_R __builtin_HEXAGON_C2_tfrrp + +/* ========================================================================== + Assembly Syntax: Rd32=vitpack(Ps4,Pt4) + C Intrinsic Prototype: Word32 Q6_R_vitpack_pp(Byte Ps, Byte Pt) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vitpack_pp __builtin_HEXAGON_C2_vitpack + +/* ========================================================================== + Assembly Syntax: Rdd32=vmux(Pu4,Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vmux_pPP(Byte Pu, Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmux_pPP __builtin_HEXAGON_C2_vmux + +/* ========================================================================== + Assembly Syntax: Pd4=xor(Ps4,Pt4) + C Intrinsic Prototype: Byte Q6_p_xor_pp(Byte Ps, Byte Pt) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_xor_pp __builtin_HEXAGON_C2_xor + +/* ========================================================================== + Assembly Syntax: Pd4=and(Ps4,and(Pt4,Pu4)) + C Intrinsic Prototype: Byte Q6_p_and_and_ppp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_and_ppp __builtin_HEXAGON_C4_and_and + +/* ========================================================================== + Assembly Syntax: Pd4=and(Ps4,and(Pt4,!Pu4)) + C Intrinsic Prototype: Byte Q6_p_and_and_ppnp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_and_ppnp __builtin_HEXAGON_C4_and_andn + +/* ========================================================================== + Assembly Syntax: Pd4=and(Ps4,or(Pt4,Pu4)) + C Intrinsic Prototype: Byte Q6_p_and_or_ppp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_or_ppp __builtin_HEXAGON_C4_and_or + +/* ========================================================================== + Assembly Syntax: Pd4=and(Ps4,or(Pt4,!Pu4)) + C Intrinsic Prototype: Byte Q6_p_and_or_ppnp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_and_or_ppnp __builtin_HEXAGON_C4_and_orn + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.gt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_cmp_gt_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_gt_RR __builtin_HEXAGON_C4_cmplte + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.gt(Rs32,#s10) + C Intrinsic Prototype: Byte Q6_p_not_cmp_gt_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_gt_RI __builtin_HEXAGON_C4_cmpltei + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.gtu(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_cmp_gtu_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_gtu_RR __builtin_HEXAGON_C4_cmplteu + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.gtu(Rs32,#u9) + C Intrinsic Prototype: Byte Q6_p_not_cmp_gtu_RI(Word32 Rs, Word32 Iu9) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_gtu_RI __builtin_HEXAGON_C4_cmplteui + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.eq(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_cmp_eq_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_eq_RR __builtin_HEXAGON_C4_cmpneq + +/* ========================================================================== + Assembly Syntax: Pd4=!cmp.eq(Rs32,#s10) + C Intrinsic Prototype: Byte Q6_p_not_cmp_eq_RI(Word32 Rs, Word32 Is10) + Instruction Type: ALU32_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_p_not_cmp_eq_RI __builtin_HEXAGON_C4_cmpneqi + +/* ========================================================================== + Assembly Syntax: Pd4=fastcorner9(Ps4,Pt4) + C Intrinsic Prototype: Byte Q6_p_fastcorner9_pp(Byte Ps, Byte Pt) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_fastcorner9_pp __builtin_HEXAGON_C4_fastcorner9 + +/* ========================================================================== + Assembly Syntax: Pd4=!fastcorner9(Ps4,Pt4) + C Intrinsic Prototype: Byte Q6_p_not_fastcorner9_pp(Byte Ps, Byte Pt) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_fastcorner9_pp __builtin_HEXAGON_C4_fastcorner9_not + +/* ========================================================================== + Assembly Syntax: Pd4=!bitsclr(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_bitsclr_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_bitsclr_RR __builtin_HEXAGON_C4_nbitsclr + +/* ========================================================================== + Assembly Syntax: Pd4=!bitsclr(Rs32,#u6) + C Intrinsic Prototype: Byte Q6_p_not_bitsclr_RI(Word32 Rs, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_bitsclr_RI __builtin_HEXAGON_C4_nbitsclri + +/* ========================================================================== + Assembly Syntax: Pd4=!bitsset(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_bitsset_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_bitsset_RR __builtin_HEXAGON_C4_nbitsset + +/* ========================================================================== + Assembly Syntax: Pd4=or(Ps4,and(Pt4,Pu4)) + C Intrinsic Prototype: Byte Q6_p_or_and_ppp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_and_ppp __builtin_HEXAGON_C4_or_and + +/* ========================================================================== + Assembly Syntax: Pd4=or(Ps4,and(Pt4,!Pu4)) + C Intrinsic Prototype: Byte Q6_p_or_and_ppnp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_and_ppnp __builtin_HEXAGON_C4_or_andn + +/* ========================================================================== + Assembly Syntax: Pd4=or(Ps4,or(Pt4,Pu4)) + C Intrinsic Prototype: Byte Q6_p_or_or_ppp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_or_ppp __builtin_HEXAGON_C4_or_or + +/* ========================================================================== + Assembly Syntax: Pd4=or(Ps4,or(Pt4,!Pu4)) + C Intrinsic Prototype: Byte Q6_p_or_or_ppnp(Byte Ps, Byte Pt, Byte Pu) + Instruction Type: CR + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_or_or_ppnp __builtin_HEXAGON_C4_or_orn + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_d2df(Rss32) + C Intrinsic Prototype: Float64 Q6_P_convert_d2df_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_d2df_P __builtin_HEXAGON_F2_conv_d2df + +/* ========================================================================== + Assembly Syntax: Rd32=convert_d2sf(Rss32) + C Intrinsic Prototype: Float32 Q6_R_convert_d2sf_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_d2sf_P __builtin_HEXAGON_F2_conv_d2sf + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_df2d(Rss32) + C Intrinsic Prototype: Word64 Q6_P_convert_df2d_P(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_df2d_P __builtin_HEXAGON_F2_conv_df2d + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_df2d(Rss32):chop + C Intrinsic Prototype: Word64 Q6_P_convert_df2d_P_chop(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_df2d_P_chop __builtin_HEXAGON_F2_conv_df2d_chop + +/* ========================================================================== + Assembly Syntax: Rd32=convert_df2sf(Rss32) + C Intrinsic Prototype: Float32 Q6_R_convert_df2sf_P(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_df2sf_P __builtin_HEXAGON_F2_conv_df2sf + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_df2ud(Rss32) + C Intrinsic Prototype: Word64 Q6_P_convert_df2ud_P(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_df2ud_P __builtin_HEXAGON_F2_conv_df2ud + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_df2ud(Rss32):chop + C Intrinsic Prototype: Word64 Q6_P_convert_df2ud_P_chop(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_df2ud_P_chop __builtin_HEXAGON_F2_conv_df2ud_chop + +/* ========================================================================== + Assembly Syntax: Rd32=convert_df2uw(Rss32) + C Intrinsic Prototype: Word32 Q6_R_convert_df2uw_P(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_df2uw_P __builtin_HEXAGON_F2_conv_df2uw + +/* ========================================================================== + Assembly Syntax: Rd32=convert_df2uw(Rss32):chop + C Intrinsic Prototype: Word32 Q6_R_convert_df2uw_P_chop(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_df2uw_P_chop __builtin_HEXAGON_F2_conv_df2uw_chop + +/* ========================================================================== + Assembly Syntax: Rd32=convert_df2w(Rss32) + C Intrinsic Prototype: Word32 Q6_R_convert_df2w_P(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_df2w_P __builtin_HEXAGON_F2_conv_df2w + +/* ========================================================================== + Assembly Syntax: Rd32=convert_df2w(Rss32):chop + C Intrinsic Prototype: Word32 Q6_R_convert_df2w_P_chop(Float64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_df2w_P_chop __builtin_HEXAGON_F2_conv_df2w_chop + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_sf2d(Rs32) + C Intrinsic Prototype: Word64 Q6_P_convert_sf2d_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_sf2d_R __builtin_HEXAGON_F2_conv_sf2d + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_sf2d(Rs32):chop + C Intrinsic Prototype: Word64 Q6_P_convert_sf2d_R_chop(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_sf2d_R_chop __builtin_HEXAGON_F2_conv_sf2d_chop + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_sf2df(Rs32) + C Intrinsic Prototype: Float64 Q6_P_convert_sf2df_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_sf2df_R __builtin_HEXAGON_F2_conv_sf2df + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_sf2ud(Rs32) + C Intrinsic Prototype: Word64 Q6_P_convert_sf2ud_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_sf2ud_R __builtin_HEXAGON_F2_conv_sf2ud + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_sf2ud(Rs32):chop + C Intrinsic Prototype: Word64 Q6_P_convert_sf2ud_R_chop(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_sf2ud_R_chop __builtin_HEXAGON_F2_conv_sf2ud_chop + +/* ========================================================================== + Assembly Syntax: Rd32=convert_sf2uw(Rs32) + C Intrinsic Prototype: Word32 Q6_R_convert_sf2uw_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_sf2uw_R __builtin_HEXAGON_F2_conv_sf2uw + +/* ========================================================================== + Assembly Syntax: Rd32=convert_sf2uw(Rs32):chop + C Intrinsic Prototype: Word32 Q6_R_convert_sf2uw_R_chop(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_sf2uw_R_chop __builtin_HEXAGON_F2_conv_sf2uw_chop + +/* ========================================================================== + Assembly Syntax: Rd32=convert_sf2w(Rs32) + C Intrinsic Prototype: Word32 Q6_R_convert_sf2w_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_sf2w_R __builtin_HEXAGON_F2_conv_sf2w + +/* ========================================================================== + Assembly Syntax: Rd32=convert_sf2w(Rs32):chop + C Intrinsic Prototype: Word32 Q6_R_convert_sf2w_R_chop(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_sf2w_R_chop __builtin_HEXAGON_F2_conv_sf2w_chop + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_ud2df(Rss32) + C Intrinsic Prototype: Float64 Q6_P_convert_ud2df_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_ud2df_P __builtin_HEXAGON_F2_conv_ud2df + +/* ========================================================================== + Assembly Syntax: Rd32=convert_ud2sf(Rss32) + C Intrinsic Prototype: Float32 Q6_R_convert_ud2sf_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_ud2sf_P __builtin_HEXAGON_F2_conv_ud2sf + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_uw2df(Rs32) + C Intrinsic Prototype: Float64 Q6_P_convert_uw2df_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_uw2df_R __builtin_HEXAGON_F2_conv_uw2df + +/* ========================================================================== + Assembly Syntax: Rd32=convert_uw2sf(Rs32) + C Intrinsic Prototype: Float32 Q6_R_convert_uw2sf_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_uw2sf_R __builtin_HEXAGON_F2_conv_uw2sf + +/* ========================================================================== + Assembly Syntax: Rdd32=convert_w2df(Rs32) + C Intrinsic Prototype: Float64 Q6_P_convert_w2df_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_convert_w2df_R __builtin_HEXAGON_F2_conv_w2df + +/* ========================================================================== + Assembly Syntax: Rd32=convert_w2sf(Rs32) + C Intrinsic Prototype: Float32 Q6_R_convert_w2sf_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_convert_w2sf_R __builtin_HEXAGON_F2_conv_w2sf + +/* ========================================================================== + Assembly Syntax: Pd4=dfclass(Rss32,#u5) + C Intrinsic Prototype: Byte Q6_p_dfclass_PI(Float64 Rss, Word32 Iu5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_dfclass_PI __builtin_HEXAGON_F2_dfclass + +/* ========================================================================== + Assembly Syntax: Pd4=dfcmp.eq(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_dfcmp_eq_PP(Float64 Rss, Float64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_dfcmp_eq_PP __builtin_HEXAGON_F2_dfcmpeq + +/* ========================================================================== + Assembly Syntax: Pd4=dfcmp.ge(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_dfcmp_ge_PP(Float64 Rss, Float64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_dfcmp_ge_PP __builtin_HEXAGON_F2_dfcmpge + +/* ========================================================================== + Assembly Syntax: Pd4=dfcmp.gt(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_dfcmp_gt_PP(Float64 Rss, Float64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_dfcmp_gt_PP __builtin_HEXAGON_F2_dfcmpgt + +/* ========================================================================== + Assembly Syntax: Pd4=dfcmp.uo(Rss32,Rtt32) + C Intrinsic Prototype: Byte Q6_p_dfcmp_uo_PP(Float64 Rss, Float64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_dfcmp_uo_PP __builtin_HEXAGON_F2_dfcmpuo + +/* ========================================================================== + Assembly Syntax: Rdd32=dfmake(#u10):neg + C Intrinsic Prototype: Float64 Q6_P_dfmake_I_neg(Word32 Iu10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmake_I_neg __builtin_HEXAGON_F2_dfimm_n + +/* ========================================================================== + Assembly Syntax: Rdd32=dfmake(#u10):pos + C Intrinsic Prototype: Float64 Q6_P_dfmake_I_pos(Word32 Iu10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmake_I_pos __builtin_HEXAGON_F2_dfimm_p + +/* ========================================================================== + Assembly Syntax: Rd32=sfadd(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfadd_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfadd_RR __builtin_HEXAGON_F2_sfadd + +/* ========================================================================== + Assembly Syntax: Pd4=sfclass(Rs32,#u5) + C Intrinsic Prototype: Byte Q6_p_sfclass_RI(Float32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_sfclass_RI __builtin_HEXAGON_F2_sfclass + +/* ========================================================================== + Assembly Syntax: Pd4=sfcmp.eq(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_sfcmp_eq_RR(Float32 Rs, Float32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_sfcmp_eq_RR __builtin_HEXAGON_F2_sfcmpeq + +/* ========================================================================== + Assembly Syntax: Pd4=sfcmp.ge(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_sfcmp_ge_RR(Float32 Rs, Float32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_sfcmp_ge_RR __builtin_HEXAGON_F2_sfcmpge + +/* ========================================================================== + Assembly Syntax: Pd4=sfcmp.gt(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_sfcmp_gt_RR(Float32 Rs, Float32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_sfcmp_gt_RR __builtin_HEXAGON_F2_sfcmpgt + +/* ========================================================================== + Assembly Syntax: Pd4=sfcmp.uo(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_sfcmp_uo_RR(Float32 Rs, Float32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_sfcmp_uo_RR __builtin_HEXAGON_F2_sfcmpuo + +/* ========================================================================== + Assembly Syntax: Rd32=sffixupd(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sffixupd_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sffixupd_RR __builtin_HEXAGON_F2_sffixupd + +/* ========================================================================== + Assembly Syntax: Rd32=sffixupn(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sffixupn_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sffixupn_RR __builtin_HEXAGON_F2_sffixupn + +/* ========================================================================== + Assembly Syntax: Rd32=sffixupr(Rs32) + C Intrinsic Prototype: Float32 Q6_R_sffixupr_R(Float32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sffixupr_R __builtin_HEXAGON_F2_sffixupr + +/* ========================================================================== + Assembly Syntax: Rx32+=sfmpy(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfmpyacc_RR(Float32 Rx, Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpyacc_RR __builtin_HEXAGON_F2_sffma + +/* ========================================================================== + Assembly Syntax: Rx32+=sfmpy(Rs32,Rt32):lib + C Intrinsic Prototype: Float32 Q6_R_sfmpyacc_RR_lib(Float32 Rx, Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpyacc_RR_lib __builtin_HEXAGON_F2_sffma_lib + +/* ========================================================================== + Assembly Syntax: Rx32+=sfmpy(Rs32,Rt32,Pu4):scale + C Intrinsic Prototype: Float32 Q6_R_sfmpyacc_RRp_scale(Float32 Rx, Float32 Rs, Float32 Rt, Byte Pu) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpyacc_RRp_scale __builtin_HEXAGON_F2_sffma_sc + +/* ========================================================================== + Assembly Syntax: Rx32-=sfmpy(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfmpynac_RR(Float32 Rx, Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpynac_RR __builtin_HEXAGON_F2_sffms + +/* ========================================================================== + Assembly Syntax: Rx32-=sfmpy(Rs32,Rt32):lib + C Intrinsic Prototype: Float32 Q6_R_sfmpynac_RR_lib(Float32 Rx, Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpynac_RR_lib __builtin_HEXAGON_F2_sffms_lib + +/* ========================================================================== + Assembly Syntax: Rd32=sfmake(#u10):neg + C Intrinsic Prototype: Float32 Q6_R_sfmake_I_neg(Word32 Iu10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmake_I_neg __builtin_HEXAGON_F2_sfimm_n + +/* ========================================================================== + Assembly Syntax: Rd32=sfmake(#u10):pos + C Intrinsic Prototype: Float32 Q6_R_sfmake_I_pos(Word32 Iu10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmake_I_pos __builtin_HEXAGON_F2_sfimm_p + +/* ========================================================================== + Assembly Syntax: Rd32=sfmax(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfmax_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmax_RR __builtin_HEXAGON_F2_sfmax + +/* ========================================================================== + Assembly Syntax: Rd32=sfmin(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfmin_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmin_RR __builtin_HEXAGON_F2_sfmin + +/* ========================================================================== + Assembly Syntax: Rd32=sfmpy(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfmpy_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfmpy_RR __builtin_HEXAGON_F2_sfmpy + +/* ========================================================================== + Assembly Syntax: Rd32=sfsub(Rs32,Rt32) + C Intrinsic Prototype: Float32 Q6_R_sfsub_RR(Float32 Rs, Float32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sfsub_RR __builtin_HEXAGON_F2_sfsub + +/* ========================================================================== + Assembly Syntax: Rd32=memb(Rx32++#s4:0:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memb_IM_circ(void** Rx, Word32 Is4_0, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memb_IM_circ __builtin_HEXAGON_L2_loadrb_pci + +/* ========================================================================== + Assembly Syntax: Rd32=memb(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memb_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memb_M_circ __builtin_HEXAGON_L2_loadrb_pcr + +/* ========================================================================== + Assembly Syntax: Rdd32=memd(Rx32++#s4:3:circ(Mu2)) + C Intrinsic Prototype: Word64 Q6_P_memd_IM_circ(void** Rx, Word32 Is4_3, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_P_memd_IM_circ __builtin_HEXAGON_L2_loadrd_pci + +/* ========================================================================== + Assembly Syntax: Rdd32=memd(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word64 Q6_P_memd_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_P_memd_M_circ __builtin_HEXAGON_L2_loadrd_pcr + +/* ========================================================================== + Assembly Syntax: Rd32=memh(Rx32++#s4:1:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memh_IM_circ(void** Rx, Word32 Is4_1, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memh_IM_circ __builtin_HEXAGON_L2_loadrh_pci + +/* ========================================================================== + Assembly Syntax: Rd32=memh(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memh_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memh_M_circ __builtin_HEXAGON_L2_loadrh_pcr + +/* ========================================================================== + Assembly Syntax: Rd32=memw(Rx32++#s4:2:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memw_IM_circ(void** Rx, Word32 Is4_2, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memw_IM_circ __builtin_HEXAGON_L2_loadri_pci + +/* ========================================================================== + Assembly Syntax: Rd32=memw(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memw_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memw_M_circ __builtin_HEXAGON_L2_loadri_pcr + +/* ========================================================================== + Assembly Syntax: Rd32=memub(Rx32++#s4:0:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memub_IM_circ(void** Rx, Word32 Is4_0, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memub_IM_circ __builtin_HEXAGON_L2_loadrub_pci + +/* ========================================================================== + Assembly Syntax: Rd32=memub(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memub_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memub_M_circ __builtin_HEXAGON_L2_loadrub_pcr + +/* ========================================================================== + Assembly Syntax: Rd32=memuh(Rx32++#s4:1:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memuh_IM_circ(void** Rx, Word32 Is4_1, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memuh_IM_circ __builtin_HEXAGON_L2_loadruh_pci + +/* ========================================================================== + Assembly Syntax: Rd32=memuh(Rx32++I:circ(Mu2)) + C Intrinsic Prototype: Word32 Q6_R_memuh_M_circ(void** Rx, Word32 Mu, void* BaseAddress) + Instruction Type: LD + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_R_memuh_M_circ __builtin_HEXAGON_L2_loadruh_pcr + +/* ========================================================================== + Assembly Syntax: Rx32+=add(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_addacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_addacc_RR __builtin_HEXAGON_M2_acci + +/* ========================================================================== + Assembly Syntax: Rx32+=add(Rs32,#s8) + C Intrinsic Prototype: Word32 Q6_R_addacc_RI(Word32 Rx, Word32 Rs, Word32 Is8) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_addacc_RI __builtin_HEXAGON_M2_accii + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyi(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyiacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyiacc_RR __builtin_HEXAGON_M2_cmaci_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyr(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyracc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyracc_RR __builtin_HEXAGON_M2_cmacr_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpy(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyacc_RR_sat __builtin_HEXAGON_M2_cmacs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyacc_RR_s1_sat __builtin_HEXAGON_M2_cmacs_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpy(Rs32,Rt32*):sat + C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_conj_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyacc_RR_conj_sat __builtin_HEXAGON_M2_cmacsc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpy(Rs32,Rt32*):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpyacc_RR_conj_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyacc_RR_conj_s1_sat __builtin_HEXAGON_M2_cmacsc_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyi(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyi_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyi_RR __builtin_HEXAGON_M2_cmpyi_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyr(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyr_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpyr_RR __builtin_HEXAGON_M2_cmpyr_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=cmpy(Rs32,Rt32):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpy_RR_rnd_sat __builtin_HEXAGON_M2_cmpyrs_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=cmpy(Rs32,Rt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpy_RR_s1_rnd_sat __builtin_HEXAGON_M2_cmpyrs_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=cmpy(Rs32,Rt32*):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_conj_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpy_RR_conj_rnd_sat __builtin_HEXAGON_M2_cmpyrsc_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=cmpy(Rs32,Rt32*):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpy_RR_conj_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpy_RR_conj_s1_rnd_sat __builtin_HEXAGON_M2_cmpyrsc_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpy(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpy_RR_sat __builtin_HEXAGON_M2_cmpys_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpy_RR_s1_sat __builtin_HEXAGON_M2_cmpys_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpy(Rs32,Rt32*):sat + C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_conj_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpy_RR_conj_sat __builtin_HEXAGON_M2_cmpysc_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=cmpy(Rs32,Rt32*):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpy_RR_conj_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpy_RR_conj_s1_sat __builtin_HEXAGON_M2_cmpysc_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=cmpy(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpynac_RR_sat __builtin_HEXAGON_M2_cnacs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=cmpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpynac_RR_s1_sat __builtin_HEXAGON_M2_cnacs_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=cmpy(Rs32,Rt32*):sat + C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_conj_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpynac_RR_conj_sat __builtin_HEXAGON_M2_cnacsc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=cmpy(Rs32,Rt32*):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_cmpynac_RR_conj_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cmpynac_RR_conj_s1_sat __builtin_HEXAGON_M2_cnacsc_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RR __builtin_HEXAGON_M2_dpmpyss_acc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_mpynac_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RR __builtin_HEXAGON_M2_dpmpyss_nac_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32):rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RR_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RR_rnd __builtin_HEXAGON_M2_dpmpyss_rnd_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_mpy_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RR __builtin_HEXAGON_M2_dpmpyss_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RR __builtin_HEXAGON_M2_dpmpyuu_acc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RR __builtin_HEXAGON_M2_dpmpyuu_nac_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32,Rt32) + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RR __builtin_HEXAGON_M2_dpmpyuu_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32.h):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RRh_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RRh_s1_rnd_sat __builtin_HEXAGON_M2_hmmpyh_rs1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RRh_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RRh_s1_sat __builtin_HEXAGON_M2_hmmpyh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32.l):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RRl_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RRl_s1_rnd_sat __builtin_HEXAGON_M2_hmmpyl_rs1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RRl_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RRl_s1_sat __builtin_HEXAGON_M2_hmmpyl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyi(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpyiacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyiacc_RR __builtin_HEXAGON_M2_maci + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyi(Rs32,#u8) + C Intrinsic Prototype: Word32 Q6_R_mpyinac_RI(Word32 Rx, Word32 Rs, Word32 Iu8) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyinac_RI __builtin_HEXAGON_M2_macsin + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyi(Rs32,#u8) + C Intrinsic Prototype: Word32 Q6_R_mpyiacc_RI(Word32 Rx, Word32 Rs, Word32 Iu8) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyiacc_RI __builtin_HEXAGON_M2_macsip + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywoh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywohacc_PP_rnd_sat __builtin_HEXAGON_M2_mmachs_rs0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywoh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywohacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmachs_rs1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywoh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywohacc_PP_sat __builtin_HEXAGON_M2_mmachs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywoh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywohacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywohacc_PP_s1_sat __builtin_HEXAGON_M2_mmachs_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywehacc_PP_rnd_sat __builtin_HEXAGON_M2_mmacls_rs0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywehacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmacls_rs1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywehacc_PP_sat __builtin_HEXAGON_M2_mmacls_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywehacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywehacc_PP_s1_sat __builtin_HEXAGON_M2_mmacls_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywouh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouhacc_PP_rnd_sat __builtin_HEXAGON_M2_mmacuhs_rs0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywouh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouhacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmacuhs_rs1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywouh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouhacc_PP_sat __builtin_HEXAGON_M2_mmacuhs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpywouh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouhacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouhacc_PP_s1_sat __builtin_HEXAGON_M2_mmacuhs_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweuh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuhacc_PP_rnd_sat __builtin_HEXAGON_M2_mmaculs_rs0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweuh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_s1_rnd_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuhacc_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmaculs_rs1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweuh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuhacc_PP_sat __builtin_HEXAGON_M2_mmaculs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyweuh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuhacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuhacc_PP_s1_sat __builtin_HEXAGON_M2_mmaculs_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywoh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywoh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyh_rs0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywoh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywoh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyh_rs1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywoh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywoh_PP_sat __builtin_HEXAGON_M2_mmpyh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywoh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywoh_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywoh_PP_s1_sat __builtin_HEXAGON_M2_mmpyh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyl_rs0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyl_rs1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweh_PP_sat __builtin_HEXAGON_M2_mmpyl_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweh_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweh_PP_s1_sat __builtin_HEXAGON_M2_mmpyl_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywouh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyuh_rs0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywouh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyuh_rs1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywouh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouh_PP_sat __builtin_HEXAGON_M2_mmpyuh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpywouh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpywouh_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpywouh_PP_s1_sat __builtin_HEXAGON_M2_mmpyuh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweuh(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuh_PP_rnd_sat __builtin_HEXAGON_M2_mmpyul_rs0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweuh(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuh_PP_s1_rnd_sat __builtin_HEXAGON_M2_mmpyul_rs1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweuh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuh_PP_sat __builtin_HEXAGON_M2_mmpyul_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyweuh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyweuh_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyweuh_PP_s1_sat __builtin_HEXAGON_M2_mmpyul_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRh __builtin_HEXAGON_M2_mpy_acc_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRh_s1 __builtin_HEXAGON_M2_mpy_acc_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRl __builtin_HEXAGON_M2_mpy_acc_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRl_s1 __builtin_HEXAGON_M2_mpy_acc_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRh __builtin_HEXAGON_M2_mpy_acc_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRh_s1 __builtin_HEXAGON_M2_mpy_acc_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRl __builtin_HEXAGON_M2_mpy_acc_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRl_s1 __builtin_HEXAGON_M2_mpy_acc_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRh_sat __builtin_HEXAGON_M2_mpy_acc_sat_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRh_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRl_sat __builtin_HEXAGON_M2_mpy_acc_sat_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.h,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RhRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RhRl_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRh_sat __builtin_HEXAGON_M2_mpy_acc_sat_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRh_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRl_sat __builtin_HEXAGON_M2_mpy_acc_sat_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32.l,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RlRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RlRl_s1_sat __builtin_HEXAGON_M2_mpy_acc_sat_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh __builtin_HEXAGON_M2_mpy_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_s1 __builtin_HEXAGON_M2_mpy_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl __builtin_HEXAGON_M2_mpy_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_s1 __builtin_HEXAGON_M2_mpy_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh __builtin_HEXAGON_M2_mpy_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_s1 __builtin_HEXAGON_M2_mpy_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl __builtin_HEXAGON_M2_mpy_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_s1 __builtin_HEXAGON_M2_mpy_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRh __builtin_HEXAGON_M2_mpy_nac_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRh_s1 __builtin_HEXAGON_M2_mpy_nac_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRl __builtin_HEXAGON_M2_mpy_nac_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRl_s1 __builtin_HEXAGON_M2_mpy_nac_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRh __builtin_HEXAGON_M2_mpy_nac_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRh_s1 __builtin_HEXAGON_M2_mpy_nac_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRl __builtin_HEXAGON_M2_mpy_nac_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRl_s1 __builtin_HEXAGON_M2_mpy_nac_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRh_sat __builtin_HEXAGON_M2_mpy_nac_sat_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRh_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRl_sat __builtin_HEXAGON_M2_mpy_nac_sat_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.h,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RhRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RhRl_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRh_sat __builtin_HEXAGON_M2_mpy_nac_sat_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRh_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRh_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRl_sat __builtin_HEXAGON_M2_mpy_nac_sat_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32.l,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RlRl_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RlRl_s1_sat __builtin_HEXAGON_M2_mpy_nac_sat_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_rnd __builtin_HEXAGON_M2_mpy_rnd_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):<<1:rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_rnd __builtin_HEXAGON_M2_mpy_rnd_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):<<1:rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_rnd __builtin_HEXAGON_M2_mpy_rnd_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):<<1:rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_rnd __builtin_HEXAGON_M2_mpy_rnd_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):<<1:rnd + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_s1_rnd __builtin_HEXAGON_M2_mpy_rnd_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_sat __builtin_HEXAGON_M2_mpy_sat_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_s1_sat __builtin_HEXAGON_M2_mpy_sat_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_sat __builtin_HEXAGON_M2_mpy_sat_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_s1_sat __builtin_HEXAGON_M2_mpy_sat_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_sat __builtin_HEXAGON_M2_mpy_sat_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_s1_sat __builtin_HEXAGON_M2_mpy_sat_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_sat __builtin_HEXAGON_M2_mpy_sat_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_s1_sat __builtin_HEXAGON_M2_mpy_sat_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.h):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRh_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRh_s1_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.h,Rt32.l):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RhRl_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RhRl_s1_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.h):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRh_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRh_s1_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32.l,Rt32.l):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RlRl_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RlRl_s1_rnd_sat __builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpy_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RR __builtin_HEXAGON_M2_mpy_up + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpy_RR_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RR_s1 __builtin_HEXAGON_M2_mpy_up_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpy_RR_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpy_RR_s1_sat __builtin_HEXAGON_M2_mpy_up_s1_sat + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RhRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RhRh __builtin_HEXAGON_M2_mpyd_acc_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RhRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RhRh_s1 __builtin_HEXAGON_M2_mpyd_acc_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RhRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RhRl __builtin_HEXAGON_M2_mpyd_acc_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RhRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RhRl_s1 __builtin_HEXAGON_M2_mpyd_acc_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RlRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RlRh __builtin_HEXAGON_M2_mpyd_acc_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RlRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RlRh_s1 __builtin_HEXAGON_M2_mpyd_acc_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RlRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RlRl __builtin_HEXAGON_M2_mpyd_acc_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyacc_RlRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyacc_RlRl_s1 __builtin_HEXAGON_M2_mpyd_acc_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRh __builtin_HEXAGON_M2_mpyd_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRh_s1 __builtin_HEXAGON_M2_mpyd_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRl __builtin_HEXAGON_M2_mpyd_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRl_s1 __builtin_HEXAGON_M2_mpyd_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRh __builtin_HEXAGON_M2_mpyd_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRh_s1 __builtin_HEXAGON_M2_mpyd_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRl __builtin_HEXAGON_M2_mpyd_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRl_s1 __builtin_HEXAGON_M2_mpyd_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpynac_RhRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RhRh __builtin_HEXAGON_M2_mpyd_nac_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpynac_RhRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RhRh_s1 __builtin_HEXAGON_M2_mpyd_nac_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpynac_RhRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RhRl __builtin_HEXAGON_M2_mpyd_nac_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpynac_RhRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RhRl_s1 __builtin_HEXAGON_M2_mpyd_nac_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpynac_RlRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RlRh __builtin_HEXAGON_M2_mpyd_nac_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpynac_RlRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RlRh_s1 __builtin_HEXAGON_M2_mpyd_nac_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpynac_RlRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RlRl __builtin_HEXAGON_M2_mpyd_nac_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpy(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpynac_RlRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpynac_RlRl_s1 __builtin_HEXAGON_M2_mpyd_nac_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.h):rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRh_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRh_rnd __builtin_HEXAGON_M2_mpyd_rnd_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.h):<<1:rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRh_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRh_s1_rnd __builtin_HEXAGON_M2_mpyd_rnd_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.l):rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRl_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRl_rnd __builtin_HEXAGON_M2_mpyd_rnd_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.h,Rt32.l):<<1:rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RhRl_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RhRl_s1_rnd __builtin_HEXAGON_M2_mpyd_rnd_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.h):rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRh_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRh_rnd __builtin_HEXAGON_M2_mpyd_rnd_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.h):<<1:rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRh_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRh_s1_rnd __builtin_HEXAGON_M2_mpyd_rnd_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.l):rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRl_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRl_rnd __builtin_HEXAGON_M2_mpyd_rnd_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpy(Rs32.l,Rt32.l):<<1:rnd + C Intrinsic Prototype: Word64 Q6_P_mpy_RlRl_s1_rnd(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpy_RlRl_s1_rnd __builtin_HEXAGON_M2_mpyd_rnd_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyi(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpyi_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyi_RR __builtin_HEXAGON_M2_mpyi + +/* ========================================================================== + Assembly Syntax: Rd32=mpyi(Rs32,#m9) + C Intrinsic Prototype: Word32 Q6_R_mpyi_RI(Word32 Rs, Word32 Im9) + Instruction Type: M + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mpyi_RI __builtin_HEXAGON_M2_mpysmi + +/* ========================================================================== + Assembly Syntax: Rd32=mpysu(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpysu_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpysu_RR __builtin_HEXAGON_M2_mpysu_up + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RhRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RhRh __builtin_HEXAGON_M2_mpyu_acc_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RhRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RhRh_s1 __builtin_HEXAGON_M2_mpyu_acc_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RhRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RhRl __builtin_HEXAGON_M2_mpyu_acc_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RhRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RhRl_s1 __builtin_HEXAGON_M2_mpyu_acc_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RlRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RlRh __builtin_HEXAGON_M2_mpyu_acc_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RlRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RlRh_s1 __builtin_HEXAGON_M2_mpyu_acc_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RlRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RlRl __builtin_HEXAGON_M2_mpyu_acc_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32+=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyuacc_RlRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyuacc_RlRl_s1 __builtin_HEXAGON_M2_mpyu_acc_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RhRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RhRh __builtin_HEXAGON_M2_mpyu_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RhRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RhRh_s1 __builtin_HEXAGON_M2_mpyu_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RhRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RhRl __builtin_HEXAGON_M2_mpyu_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RhRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RhRl_s1 __builtin_HEXAGON_M2_mpyu_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RlRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RlRh __builtin_HEXAGON_M2_mpyu_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RlRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RlRh_s1 __builtin_HEXAGON_M2_mpyu_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RlRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RlRl __builtin_HEXAGON_M2_mpyu_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RlRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RlRl_s1 __builtin_HEXAGON_M2_mpyu_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RhRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RhRh __builtin_HEXAGON_M2_mpyu_nac_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RhRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RhRh_s1 __builtin_HEXAGON_M2_mpyu_nac_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RhRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RhRl __builtin_HEXAGON_M2_mpyu_nac_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RhRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RhRl_s1 __builtin_HEXAGON_M2_mpyu_nac_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RlRh(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RlRh __builtin_HEXAGON_M2_mpyu_nac_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RlRh_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RlRh_s1 __builtin_HEXAGON_M2_mpyu_nac_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RlRl(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RlRl __builtin_HEXAGON_M2_mpyu_nac_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rx32-=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word32 Q6_R_mpyunac_RlRl_s1(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyunac_RlRl_s1 __builtin_HEXAGON_M2_mpyu_nac_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyu(Rs32,Rt32) + C Intrinsic Prototype: UWord32 Q6_R_mpyu_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyu_RR __builtin_HEXAGON_M2_mpyu_up + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RhRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RhRh __builtin_HEXAGON_M2_mpyud_acc_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RhRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RhRh_s1 __builtin_HEXAGON_M2_mpyud_acc_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RhRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RhRl __builtin_HEXAGON_M2_mpyud_acc_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RhRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RhRl_s1 __builtin_HEXAGON_M2_mpyud_acc_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RlRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RlRh __builtin_HEXAGON_M2_mpyud_acc_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RlRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RlRh_s1 __builtin_HEXAGON_M2_mpyud_acc_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RlRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RlRl __builtin_HEXAGON_M2_mpyud_acc_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyuacc_RlRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyuacc_RlRl_s1 __builtin_HEXAGON_M2_mpyud_acc_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RhRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RhRh __builtin_HEXAGON_M2_mpyud_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RhRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RhRh_s1 __builtin_HEXAGON_M2_mpyud_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RhRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RhRl __builtin_HEXAGON_M2_mpyud_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RhRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RhRl_s1 __builtin_HEXAGON_M2_mpyud_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RlRh(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RlRh __builtin_HEXAGON_M2_mpyud_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RlRh_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RlRh_s1 __builtin_HEXAGON_M2_mpyud_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RlRl(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RlRl __builtin_HEXAGON_M2_mpyud_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: UWord64 Q6_P_mpyu_RlRl_s1(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyu_RlRl_s1 __builtin_HEXAGON_M2_mpyud_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.h,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RhRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RhRh __builtin_HEXAGON_M2_mpyud_nac_hh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.h,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RhRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RhRh_s1 __builtin_HEXAGON_M2_mpyud_nac_hh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.h,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RhRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RhRl __builtin_HEXAGON_M2_mpyud_nac_hl_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.h,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RhRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RhRl_s1 __builtin_HEXAGON_M2_mpyud_nac_hl_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.l,Rt32.h) + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RlRh(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RlRh __builtin_HEXAGON_M2_mpyud_nac_lh_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.l,Rt32.h):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RlRh_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RlRh_s1 __builtin_HEXAGON_M2_mpyud_nac_lh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.l,Rt32.l) + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RlRl(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RlRl __builtin_HEXAGON_M2_mpyud_nac_ll_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32-=mpyu(Rs32.l,Rt32.l):<<1 + C Intrinsic Prototype: Word64 Q6_P_mpyunac_RlRl_s1(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_mpyunac_RlRl_s1 __builtin_HEXAGON_M2_mpyud_nac_ll_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=mpyui(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpyui_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_mpyui_RR __builtin_HEXAGON_M2_mpyui + +/* ========================================================================== + Assembly Syntax: Rx32-=add(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_addnac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_addnac_RR __builtin_HEXAGON_M2_nacci + +/* ========================================================================== + Assembly Syntax: Rx32-=add(Rs32,#s8) + C Intrinsic Prototype: Word32 Q6_R_addnac_RI(Word32 Rx, Word32 Rs, Word32 Is8) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_addnac_RI __builtin_HEXAGON_M2_naccii + +/* ========================================================================== + Assembly Syntax: Rx32+=sub(Rt32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_subacc_RR(Word32 Rx, Word32 Rt, Word32 Rs) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_subacc_RR __builtin_HEXAGON_M2_subacc + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsdiffh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsdiffh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsdiffh_PP __builtin_HEXAGON_M2_vabsdiffh + +/* ========================================================================== + Assembly Syntax: Rdd32=vabsdiffw(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsdiffw_PP(Word64 Rtt, Word64 Rss) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsdiffw_PP __builtin_HEXAGON_M2_vabsdiffw + +/* ========================================================================== + Assembly Syntax: Rxx32+=vcmpyi(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyiacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyiacc_PP_sat __builtin_HEXAGON_M2_vcmac_s0_sat_i + +/* ========================================================================== + Assembly Syntax: Rxx32+=vcmpyr(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyracc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyracc_PP_sat __builtin_HEXAGON_M2_vcmac_s0_sat_r + +/* ========================================================================== + Assembly Syntax: Rdd32=vcmpyi(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyi_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyi_PP_sat __builtin_HEXAGON_M2_vcmpy_s0_sat_i + +/* ========================================================================== + Assembly Syntax: Rdd32=vcmpyr(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyr_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyr_PP_sat __builtin_HEXAGON_M2_vcmpy_s0_sat_r + +/* ========================================================================== + Assembly Syntax: Rdd32=vcmpyi(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyi_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyi_PP_s1_sat __builtin_HEXAGON_M2_vcmpy_s1_sat_i + +/* ========================================================================== + Assembly Syntax: Rdd32=vcmpyr(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vcmpyr_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcmpyr_PP_s1_sat __builtin_HEXAGON_M2_vcmpy_s1_sat_r + +/* ========================================================================== + Assembly Syntax: Rxx32+=vdmpy(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vdmpyacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpyacc_PP_sat __builtin_HEXAGON_M2_vdmacs_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vdmpy(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vdmpyacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpyacc_PP_s1_sat __builtin_HEXAGON_M2_vdmacs_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=vdmpy(Rss32,Rtt32):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vdmpy_PP_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vdmpy_PP_rnd_sat __builtin_HEXAGON_M2_vdmpyrs_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=vdmpy(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vdmpy_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vdmpy_PP_s1_rnd_sat __builtin_HEXAGON_M2_vdmpyrs_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vdmpy(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vdmpy_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpy_PP_sat __builtin_HEXAGON_M2_vdmpys_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vdmpy(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vdmpy_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpy_PP_s1_sat __builtin_HEXAGON_M2_vdmpys_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyh(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vmpyhacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhacc_RR __builtin_HEXAGON_M2_vmac2 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyeh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vmpyehacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyehacc_PP __builtin_HEXAGON_M2_vmac2es + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyeh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyehacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyehacc_PP_sat __builtin_HEXAGON_M2_vmac2es_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyeh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyehacc_PP_s1_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyehacc_PP_s1_sat __builtin_HEXAGON_M2_vmac2es_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyh(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhacc_RR_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhacc_RR_sat __builtin_HEXAGON_M2_vmac2s_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyh(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhacc_RR_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhacc_RR_s1_sat __builtin_HEXAGON_M2_vmac2s_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyhsu(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhsuacc_RR_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhsuacc_RR_sat __builtin_HEXAGON_M2_vmac2su_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpyhsu(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhsuacc_RR_s1_sat(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhsuacc_RR_s1_sat __builtin_HEXAGON_M2_vmac2su_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyeh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyeh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyeh_PP_sat __builtin_HEXAGON_M2_vmpy2es_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyeh(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyeh_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyeh_PP_s1_sat __builtin_HEXAGON_M2_vmpy2es_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyh(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyh_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyh_RR_sat __builtin_HEXAGON_M2_vmpy2s_s0 + +/* ========================================================================== + Assembly Syntax: Rd32=vmpyh(Rs32,Rt32):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vmpyh_RR_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vmpyh_RR_rnd_sat __builtin_HEXAGON_M2_vmpy2s_s0pack + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyh(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyh_RR_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyh_RR_s1_sat __builtin_HEXAGON_M2_vmpy2s_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=vmpyh(Rs32,Rt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vmpyh_RR_s1_rnd_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vmpyh_RR_s1_rnd_sat __builtin_HEXAGON_M2_vmpy2s_s1pack + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyhsu(Rs32,Rt32):sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhsu_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhsu_RR_sat __builtin_HEXAGON_M2_vmpy2su_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpyhsu(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vmpyhsu_RR_s1_sat(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpyhsu_RR_s1_sat __builtin_HEXAGON_M2_vmpy2su_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=vraddh(Rss32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_vraddh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vraddh_PP __builtin_HEXAGON_M2_vraddh + +/* ========================================================================== + Assembly Syntax: Rd32=vradduh(Rss32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_vradduh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vradduh_PP __builtin_HEXAGON_M2_vradduh + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcmpyi(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyiacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyiacc_PP __builtin_HEXAGON_M2_vrcmaci_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcmpyi(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyiacc_PP_conj(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyiacc_PP_conj __builtin_HEXAGON_M2_vrcmaci_s0c + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcmpyr(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyracc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyracc_PP __builtin_HEXAGON_M2_vrcmacr_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcmpyr(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyracc_PP_conj(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyracc_PP_conj __builtin_HEXAGON_M2_vrcmacr_s0c + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcmpyi(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyi_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyi_PP __builtin_HEXAGON_M2_vrcmpyi_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcmpyi(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyi_PP_conj(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyi_PP_conj __builtin_HEXAGON_M2_vrcmpyi_s0c + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcmpyr(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyr_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyr_PP __builtin_HEXAGON_M2_vrcmpyr_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcmpyr(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_vrcmpyr_PP_conj(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcmpyr_PP_conj __builtin_HEXAGON_M2_vrcmpyr_s0c + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcmpys(Rss32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vrcmpysacc_PR_s1_sat(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_vrcmpysacc_PR_s1_sat __builtin_HEXAGON_M2_vrcmpys_acc_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcmpys(Rss32,Rt32):<<1:sat + C Intrinsic Prototype: Word64 Q6_P_vrcmpys_PR_s1_sat(Word64 Rss, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_vrcmpys_PR_s1_sat __builtin_HEXAGON_M2_vrcmpys_s1 + +/* ========================================================================== + Assembly Syntax: Rd32=vrcmpys(Rss32,Rt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vrcmpys_PR_s1_rnd_sat(Word64 Rss, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vrcmpys_PR_s1_rnd_sat __builtin_HEXAGON_M2_vrcmpys_s1rp + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpyh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpyhacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpyhacc_PP __builtin_HEXAGON_M2_vrmac_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpyh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpyh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpyh_PP __builtin_HEXAGON_M2_vrmpy_s0 + +/* ========================================================================== + Assembly Syntax: Rx32^=xor(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_xorxacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_xorxacc_RR __builtin_HEXAGON_M2_xor_xacc + +/* ========================================================================== + Assembly Syntax: Rx32&=and(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_andand_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andand_RR __builtin_HEXAGON_M4_and_and + +/* ========================================================================== + Assembly Syntax: Rx32&=and(Rs32,~Rt32) + C Intrinsic Prototype: Word32 Q6_R_andand_RnR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andand_RnR __builtin_HEXAGON_M4_and_andn + +/* ========================================================================== + Assembly Syntax: Rx32&=or(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_orand_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_orand_RR __builtin_HEXAGON_M4_and_or + +/* ========================================================================== + Assembly Syntax: Rx32&=xor(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_xorand_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_xorand_RR __builtin_HEXAGON_M4_and_xor + +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiwh(Rss32,Rt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiwh_PR_s1_rnd_sat(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpyiwh_PR_s1_rnd_sat __builtin_HEXAGON_M4_cmpyi_wh + +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiwh(Rss32,Rt32*):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiwh_PR_conj_s1_rnd_sat(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpyiwh_PR_conj_s1_rnd_sat __builtin_HEXAGON_M4_cmpyi_whc + +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrwh(Rss32,Rt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrwh_PR_s1_rnd_sat(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpyrwh_PR_s1_rnd_sat __builtin_HEXAGON_M4_cmpyr_wh + +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrwh(Rss32,Rt32*):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrwh_PR_conj_s1_rnd_sat(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cmpyrwh_PR_conj_s1_rnd_sat __builtin_HEXAGON_M4_cmpyr_whc + +/* ========================================================================== + Assembly Syntax: Rx32+=mpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpyacc_RR_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyacc_RR_s1_sat __builtin_HEXAGON_M4_mac_up_s1_sat + +/* ========================================================================== + Assembly Syntax: Rd32=add(#u6,mpyi(Rs32,#U6)) + C Intrinsic Prototype: Word32 Q6_R_add_mpyi_IRI(Word32 Iu6, Word32 Rs, Word32 IU6) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_mpyi_IRI __builtin_HEXAGON_M4_mpyri_addi + +/* ========================================================================== + Assembly Syntax: Rd32=add(Ru32,mpyi(Rs32,#u6)) + C Intrinsic Prototype: Word32 Q6_R_add_mpyi_RRI(Word32 Ru, Word32 Rs, Word32 Iu6) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_mpyi_RRI __builtin_HEXAGON_M4_mpyri_addr + +/* ========================================================================== + Assembly Syntax: Rd32=add(Ru32,mpyi(#u6:2,Rs32)) + C Intrinsic Prototype: Word32 Q6_R_add_mpyi_RIR(Word32 Ru, Word32 Iu6_2, Word32 Rs) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_mpyi_RIR __builtin_HEXAGON_M4_mpyri_addr_u2 + +/* ========================================================================== + Assembly Syntax: Rd32=add(#u6,mpyi(Rs32,Rt32)) + C Intrinsic Prototype: Word32 Q6_R_add_mpyi_IRR(Word32 Iu6, Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_mpyi_IRR __builtin_HEXAGON_M4_mpyrr_addi + +/* ========================================================================== + Assembly Syntax: Ry32=add(Ru32,mpyi(Ry32,Rs32)) + C Intrinsic Prototype: Word32 Q6_R_add_mpyi_RRR(Word32 Ru, Word32 Ry, Word32 Rs) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_mpyi_RRR __builtin_HEXAGON_M4_mpyrr_addr + +/* ========================================================================== + Assembly Syntax: Rx32-=mpy(Rs32,Rt32):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_mpynac_RR_s1_sat(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpynac_RR_s1_sat __builtin_HEXAGON_M4_nac_up_s1_sat + +/* ========================================================================== + Assembly Syntax: Rx32|=and(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_andor_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andor_RR __builtin_HEXAGON_M4_or_and + +/* ========================================================================== + Assembly Syntax: Rx32|=and(Rs32,~Rt32) + C Intrinsic Prototype: Word32 Q6_R_andor_RnR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andor_RnR __builtin_HEXAGON_M4_or_andn + +/* ========================================================================== + Assembly Syntax: Rx32|=or(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_oror_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_oror_RR __builtin_HEXAGON_M4_or_or + +/* ========================================================================== + Assembly Syntax: Rx32|=xor(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_xoror_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_xoror_RR __builtin_HEXAGON_M4_or_xor + +/* ========================================================================== + Assembly Syntax: Rdd32=pmpyw(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_pmpyw_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_pmpyw_RR __builtin_HEXAGON_M4_pmpyw + +/* ========================================================================== + Assembly Syntax: Rxx32^=pmpyw(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_pmpywxacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_pmpywxacc_RR __builtin_HEXAGON_M4_pmpyw_acc + +/* ========================================================================== + Assembly Syntax: Rdd32=vpmpyh(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vpmpyh_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vpmpyh_RR __builtin_HEXAGON_M4_vpmpyh + +/* ========================================================================== + Assembly Syntax: Rxx32^=vpmpyh(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vpmpyhxacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vpmpyhxacc_RR __builtin_HEXAGON_M4_vpmpyh_acc + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpyweh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpywehacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywehacc_PP __builtin_HEXAGON_M4_vrmpyeh_acc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpyweh(Rss32,Rtt32):<<1 + C Intrinsic Prototype: Word64 Q6_P_vrmpywehacc_PP_s1(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywehacc_PP_s1 __builtin_HEXAGON_M4_vrmpyeh_acc_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpyweh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpyweh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpyweh_PP __builtin_HEXAGON_M4_vrmpyeh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpyweh(Rss32,Rtt32):<<1 + C Intrinsic Prototype: Word64 Q6_P_vrmpyweh_PP_s1(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpyweh_PP_s1 __builtin_HEXAGON_M4_vrmpyeh_s1 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpywoh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpywohacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywohacc_PP __builtin_HEXAGON_M4_vrmpyoh_acc_s0 + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpywoh(Rss32,Rtt32):<<1 + C Intrinsic Prototype: Word64 Q6_P_vrmpywohacc_PP_s1(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywohacc_PP_s1 __builtin_HEXAGON_M4_vrmpyoh_acc_s1 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpywoh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpywoh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywoh_PP __builtin_HEXAGON_M4_vrmpyoh_s0 + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpywoh(Rss32,Rtt32):<<1 + C Intrinsic Prototype: Word64 Q6_P_vrmpywoh_PP_s1(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpywoh_PP_s1 __builtin_HEXAGON_M4_vrmpyoh_s1 + +/* ========================================================================== + Assembly Syntax: Rx32^=and(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_andxacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andxacc_RR __builtin_HEXAGON_M4_xor_and + +/* ========================================================================== + Assembly Syntax: Rx32^=and(Rs32,~Rt32) + C Intrinsic Prototype: Word32 Q6_R_andxacc_RnR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andxacc_RnR __builtin_HEXAGON_M4_xor_andn + +/* ========================================================================== + Assembly Syntax: Rx32^=or(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_orxacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_orxacc_RR __builtin_HEXAGON_M4_xor_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=xor(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_xorxacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_xorxacc_PP __builtin_HEXAGON_M4_xor_xacc + +/* ========================================================================== + Assembly Syntax: Rxx32+=vdmpybsu(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vdmpybsuacc_PP_sat(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpybsuacc_PP_sat __builtin_HEXAGON_M5_vdmacbsu + +/* ========================================================================== + Assembly Syntax: Rdd32=vdmpybsu(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vdmpybsu_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vdmpybsu_PP_sat __builtin_HEXAGON_M5_vdmpybsu + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpybsu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vmpybsuacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpybsuacc_RR __builtin_HEXAGON_M5_vmacbsu + +/* ========================================================================== + Assembly Syntax: Rxx32+=vmpybu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vmpybuacc_RR(Word64 Rxx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpybuacc_RR __builtin_HEXAGON_M5_vmacbuu + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpybsu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vmpybsu_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpybsu_RR __builtin_HEXAGON_M5_vmpybsu + +/* ========================================================================== + Assembly Syntax: Rdd32=vmpybu(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vmpybu_RR(Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vmpybu_RR __builtin_HEXAGON_M5_vmpybuu + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpybsu(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpybsuacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpybsuacc_PP __builtin_HEXAGON_M5_vrmacbsu + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrmpybu(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpybuacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpybuacc_PP __builtin_HEXAGON_M5_vrmacbuu + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpybsu(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpybsu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpybsu_PP __builtin_HEXAGON_M5_vrmpybsu + +/* ========================================================================== + Assembly Syntax: Rdd32=vrmpybu(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vrmpybu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrmpybu_PP __builtin_HEXAGON_M5_vrmpybuu + +/* ========================================================================== + Assembly Syntax: Rd32=addasl(Rt32,Rs32,#u3) + C Intrinsic Prototype: Word32 Q6_R_addasl_RRI(Word32 Rt, Word32 Rs, Word32 Iu3) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_addasl_RRI __builtin_HEXAGON_S2_addasl_rrri + +/* ========================================================================== + Assembly Syntax: Rdd32=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asl_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asl_PI __builtin_HEXAGON_S2_asl_i_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_aslacc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslacc_PI __builtin_HEXAGON_S2_asl_i_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asland_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asland_PI __builtin_HEXAGON_S2_asl_i_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_aslnac_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslnac_PI __builtin_HEXAGON_S2_asl_i_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_aslor_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslor_PI __builtin_HEXAGON_S2_asl_i_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=asl(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_aslxacc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslxacc_PI __builtin_HEXAGON_S2_asl_i_p_xacc + +/* ========================================================================== + Assembly Syntax: Rd32=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asl_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asl_RI __builtin_HEXAGON_S2_asl_i_r + +/* ========================================================================== + Assembly Syntax: Rx32+=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_aslacc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslacc_RI __builtin_HEXAGON_S2_asl_i_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asland_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asland_RI __builtin_HEXAGON_S2_asl_i_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_aslnac_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslnac_RI __builtin_HEXAGON_S2_asl_i_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_aslor_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslor_RI __builtin_HEXAGON_S2_asl_i_r_or + +/* ========================================================================== + Assembly Syntax: Rd32=asl(Rs32,#u5):sat + C Intrinsic Prototype: Word32 Q6_R_asl_RI_sat(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asl_RI_sat __builtin_HEXAGON_S2_asl_i_r_sat + +/* ========================================================================== + Assembly Syntax: Rx32^=asl(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_aslxacc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslxacc_RI __builtin_HEXAGON_S2_asl_i_r_xacc + +/* ========================================================================== + Assembly Syntax: Rdd32=vaslh(Rss32,#u4) + C Intrinsic Prototype: Word64 Q6_P_vaslh_PI(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaslh_PI __builtin_HEXAGON_S2_asl_i_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vaslw(Rss32,#u5) + C Intrinsic Prototype: Word64 Q6_P_vaslw_PI(Word64 Rss, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaslw_PI __builtin_HEXAGON_S2_asl_i_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asl_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asl_PR __builtin_HEXAGON_S2_asl_r_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_aslacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslacc_PR __builtin_HEXAGON_S2_asl_r_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asland_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asland_PR __builtin_HEXAGON_S2_asl_r_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_aslnac_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslnac_PR __builtin_HEXAGON_S2_asl_r_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_aslor_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslor_PR __builtin_HEXAGON_S2_asl_r_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=asl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_aslxacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_aslxacc_PR __builtin_HEXAGON_S2_asl_r_p_xor + +/* ========================================================================== + Assembly Syntax: Rd32=asl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asl_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asl_RR __builtin_HEXAGON_S2_asl_r_r + +/* ========================================================================== + Assembly Syntax: Rx32+=asl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_aslacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslacc_RR __builtin_HEXAGON_S2_asl_r_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=asl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asland_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asland_RR __builtin_HEXAGON_S2_asl_r_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=asl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_aslnac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslnac_RR __builtin_HEXAGON_S2_asl_r_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=asl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_aslor_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_aslor_RR __builtin_HEXAGON_S2_asl_r_r_or + +/* ========================================================================== + Assembly Syntax: Rd32=asl(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_asl_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asl_RR_sat __builtin_HEXAGON_S2_asl_r_r_sat + +/* ========================================================================== + Assembly Syntax: Rdd32=vaslh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vaslh_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaslh_PR __builtin_HEXAGON_S2_asl_r_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vaslw(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vaslw_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vaslw_PR __builtin_HEXAGON_S2_asl_r_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=asr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asr_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asr_PI __builtin_HEXAGON_S2_asr_i_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=asr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asracc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asracc_PI __builtin_HEXAGON_S2_asr_i_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=asr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asrand_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asrand_PI __builtin_HEXAGON_S2_asr_i_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=asr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asrnac_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asrnac_PI __builtin_HEXAGON_S2_asr_i_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=asr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asror_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asror_PI __builtin_HEXAGON_S2_asr_i_p_or + +/* ========================================================================== + Assembly Syntax: Rdd32=asr(Rss32,#u6):rnd + C Intrinsic Prototype: Word64 Q6_P_asr_PI_rnd(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asr_PI_rnd __builtin_HEXAGON_S2_asr_i_p_rnd + +/* ========================================================================== + Assembly Syntax: Rdd32=asrrnd(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_asrrnd_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_asrrnd_PI __builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rd32=asr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asr_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asr_RI __builtin_HEXAGON_S2_asr_i_r + +/* ========================================================================== + Assembly Syntax: Rx32+=asr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asracc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asracc_RI __builtin_HEXAGON_S2_asr_i_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=asr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asrand_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asrand_RI __builtin_HEXAGON_S2_asr_i_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=asr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asrnac_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asrnac_RI __builtin_HEXAGON_S2_asr_i_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=asr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asror_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asror_RI __builtin_HEXAGON_S2_asr_i_r_or + +/* ========================================================================== + Assembly Syntax: Rd32=asr(Rs32,#u5):rnd + C Intrinsic Prototype: Word32 Q6_R_asr_RI_rnd(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asr_RI_rnd __builtin_HEXAGON_S2_asr_i_r_rnd + +/* ========================================================================== + Assembly Syntax: Rd32=asrrnd(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_asrrnd_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_asrrnd_RI __builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rd32=vasrw(Rss32,#u5) + C Intrinsic Prototype: Word32 Q6_R_vasrw_PI(Word64 Rss, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vasrw_PI __builtin_HEXAGON_S2_asr_i_svw_trun + +/* ========================================================================== + Assembly Syntax: Rdd32=vasrh(Rss32,#u4) + C Intrinsic Prototype: Word64 Q6_P_vasrh_PI(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vasrh_PI __builtin_HEXAGON_S2_asr_i_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vasrw(Rss32,#u5) + C Intrinsic Prototype: Word64 Q6_P_vasrw_PI(Word64 Rss, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vasrw_PI __builtin_HEXAGON_S2_asr_i_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asr_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asr_PR __builtin_HEXAGON_S2_asr_r_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asracc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asracc_PR __builtin_HEXAGON_S2_asr_r_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asrand_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asrand_PR __builtin_HEXAGON_S2_asr_r_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asrnac_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asrnac_PR __builtin_HEXAGON_S2_asr_r_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asror_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asror_PR __builtin_HEXAGON_S2_asr_r_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=asr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_asrxacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_asrxacc_PR __builtin_HEXAGON_S2_asr_r_p_xor + +/* ========================================================================== + Assembly Syntax: Rd32=asr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asr_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asr_RR __builtin_HEXAGON_S2_asr_r_r + +/* ========================================================================== + Assembly Syntax: Rx32+=asr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asracc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asracc_RR __builtin_HEXAGON_S2_asr_r_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=asr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asrand_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asrand_RR __builtin_HEXAGON_S2_asr_r_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=asr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asrnac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asrnac_RR __builtin_HEXAGON_S2_asr_r_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=asr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_asror_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asror_RR __builtin_HEXAGON_S2_asr_r_r_or + +/* ========================================================================== + Assembly Syntax: Rd32=asr(Rs32,Rt32):sat + C Intrinsic Prototype: Word32 Q6_R_asr_RR_sat(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_asr_RR_sat __builtin_HEXAGON_S2_asr_r_r_sat + +/* ========================================================================== + Assembly Syntax: Rd32=vasrw(Rss32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_vasrw_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vasrw_PR __builtin_HEXAGON_S2_asr_r_svw_trun + +/* ========================================================================== + Assembly Syntax: Rdd32=vasrh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vasrh_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vasrh_PR __builtin_HEXAGON_S2_asr_r_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vasrw(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vasrw_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vasrw_PR __builtin_HEXAGON_S2_asr_r_vw + +/* ========================================================================== + Assembly Syntax: Rd32=brev(Rs32) + C Intrinsic Prototype: Word32 Q6_R_brev_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_brev_R __builtin_HEXAGON_S2_brev + +/* ========================================================================== + Assembly Syntax: Rdd32=brev(Rss32) + C Intrinsic Prototype: Word64 Q6_P_brev_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_brev_P __builtin_HEXAGON_S2_brevp + +/* ========================================================================== + Assembly Syntax: Rd32=cl0(Rs32) + C Intrinsic Prototype: Word32 Q6_R_cl0_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cl0_R __builtin_HEXAGON_S2_cl0 + +/* ========================================================================== + Assembly Syntax: Rd32=cl0(Rss32) + C Intrinsic Prototype: Word32 Q6_R_cl0_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cl0_P __builtin_HEXAGON_S2_cl0p + +/* ========================================================================== + Assembly Syntax: Rd32=cl1(Rs32) + C Intrinsic Prototype: Word32 Q6_R_cl1_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cl1_R __builtin_HEXAGON_S2_cl1 + +/* ========================================================================== + Assembly Syntax: Rd32=cl1(Rss32) + C Intrinsic Prototype: Word32 Q6_R_cl1_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_cl1_P __builtin_HEXAGON_S2_cl1p + +/* ========================================================================== + Assembly Syntax: Rd32=clb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_clb_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_clb_R __builtin_HEXAGON_S2_clb + +/* ========================================================================== + Assembly Syntax: Rd32=normamt(Rs32) + C Intrinsic Prototype: Word32 Q6_R_normamt_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_normamt_R __builtin_HEXAGON_S2_clbnorm + +/* ========================================================================== + Assembly Syntax: Rd32=clb(Rss32) + C Intrinsic Prototype: Word32 Q6_R_clb_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_clb_P __builtin_HEXAGON_S2_clbp + +/* ========================================================================== + Assembly Syntax: Rd32=clrbit(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_clrbit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_clrbit_RI __builtin_HEXAGON_S2_clrbit_i + +/* ========================================================================== + Assembly Syntax: Rd32=clrbit(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_clrbit_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_clrbit_RR __builtin_HEXAGON_S2_clrbit_r + +/* ========================================================================== + Assembly Syntax: Rd32=ct0(Rs32) + C Intrinsic Prototype: Word32 Q6_R_ct0_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_ct0_R __builtin_HEXAGON_S2_ct0 + +/* ========================================================================== + Assembly Syntax: Rd32=ct0(Rss32) + C Intrinsic Prototype: Word32 Q6_R_ct0_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_ct0_P __builtin_HEXAGON_S2_ct0p + +/* ========================================================================== + Assembly Syntax: Rd32=ct1(Rs32) + C Intrinsic Prototype: Word32 Q6_R_ct1_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_ct1_R __builtin_HEXAGON_S2_ct1 + +/* ========================================================================== + Assembly Syntax: Rd32=ct1(Rss32) + C Intrinsic Prototype: Word32 Q6_R_ct1_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_ct1_P __builtin_HEXAGON_S2_ct1p + +/* ========================================================================== + Assembly Syntax: Rdd32=deinterleave(Rss32) + C Intrinsic Prototype: Word64 Q6_P_deinterleave_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_deinterleave_P __builtin_HEXAGON_S2_deinterleave + +/* ========================================================================== + Assembly Syntax: Rd32=extractu(Rs32,#u5,#U5) + C Intrinsic Prototype: Word32 Q6_R_extractu_RII(Word32 Rs, Word32 Iu5, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_extractu_RII __builtin_HEXAGON_S2_extractu + +/* ========================================================================== + Assembly Syntax: Rd32=extractu(Rs32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_extractu_RP(Word32 Rs, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_extractu_RP __builtin_HEXAGON_S2_extractu_rp + +/* ========================================================================== + Assembly Syntax: Rdd32=extractu(Rss32,#u6,#U6) + C Intrinsic Prototype: Word64 Q6_P_extractu_PII(Word64 Rss, Word32 Iu6, Word32 IU6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_extractu_PII __builtin_HEXAGON_S2_extractup + +/* ========================================================================== + Assembly Syntax: Rdd32=extractu(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_extractu_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_extractu_PP __builtin_HEXAGON_S2_extractup_rp + +/* ========================================================================== + Assembly Syntax: Rx32=insert(Rs32,#u5,#U5) + C Intrinsic Prototype: Word32 Q6_R_insert_RII(Word32 Rx, Word32 Rs, Word32 Iu5, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_insert_RII __builtin_HEXAGON_S2_insert + +/* ========================================================================== + Assembly Syntax: Rx32=insert(Rs32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_insert_RP(Word32 Rx, Word32 Rs, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_insert_RP __builtin_HEXAGON_S2_insert_rp + +/* ========================================================================== + Assembly Syntax: Rxx32=insert(Rss32,#u6,#U6) + C Intrinsic Prototype: Word64 Q6_P_insert_PII(Word64 Rxx, Word64 Rss, Word32 Iu6, Word32 IU6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_insert_PII __builtin_HEXAGON_S2_insertp + +/* ========================================================================== + Assembly Syntax: Rxx32=insert(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_insert_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_insert_PP __builtin_HEXAGON_S2_insertp_rp + +/* ========================================================================== + Assembly Syntax: Rdd32=interleave(Rss32) + C Intrinsic Prototype: Word64 Q6_P_interleave_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_interleave_P __builtin_HEXAGON_S2_interleave + +/* ========================================================================== + Assembly Syntax: Rdd32=lfs(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_lfs_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lfs_PP __builtin_HEXAGON_S2_lfsp + +/* ========================================================================== + Assembly Syntax: Rdd32=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsl_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsl_PR __builtin_HEXAGON_S2_lsl_r_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lslacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lslacc_PR __builtin_HEXAGON_S2_lsl_r_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsland_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsland_PR __builtin_HEXAGON_S2_lsl_r_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lslnac_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lslnac_PR __builtin_HEXAGON_S2_lsl_r_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lslor_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lslor_PR __builtin_HEXAGON_S2_lsl_r_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=lsl(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lslxacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lslxacc_PR __builtin_HEXAGON_S2_lsl_r_p_xor + +/* ========================================================================== + Assembly Syntax: Rd32=lsl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsl_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsl_RR __builtin_HEXAGON_S2_lsl_r_r + +/* ========================================================================== + Assembly Syntax: Rx32+=lsl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lslacc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lslacc_RR __builtin_HEXAGON_S2_lsl_r_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=lsl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsland_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsland_RR __builtin_HEXAGON_S2_lsl_r_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=lsl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lslnac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lslnac_RR __builtin_HEXAGON_S2_lsl_r_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=lsl(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lslor_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lslor_RR __builtin_HEXAGON_S2_lsl_r_r_or + +/* ========================================================================== + Assembly Syntax: Rdd32=vlslh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vlslh_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlslh_PR __builtin_HEXAGON_S2_lsl_r_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vlslw(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vlslw_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlslw_PR __builtin_HEXAGON_S2_lsl_r_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsr_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsr_PI __builtin_HEXAGON_S2_lsr_i_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsracc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsracc_PI __builtin_HEXAGON_S2_lsr_i_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsrand_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrand_PI __builtin_HEXAGON_S2_lsr_i_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsrnac_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrnac_PI __builtin_HEXAGON_S2_lsr_i_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsror_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsror_PI __builtin_HEXAGON_S2_lsr_i_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=lsr(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_lsrxacc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrxacc_PI __builtin_HEXAGON_S2_lsr_i_p_xacc + +/* ========================================================================== + Assembly Syntax: Rd32=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsr_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsr_RI __builtin_HEXAGON_S2_lsr_i_r + +/* ========================================================================== + Assembly Syntax: Rx32+=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsracc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsracc_RI __builtin_HEXAGON_S2_lsr_i_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsrand_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsrand_RI __builtin_HEXAGON_S2_lsr_i_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsrnac_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsrnac_RI __builtin_HEXAGON_S2_lsr_i_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsror_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsror_RI __builtin_HEXAGON_S2_lsr_i_r_or + +/* ========================================================================== + Assembly Syntax: Rx32^=lsr(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_lsrxacc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsrxacc_RI __builtin_HEXAGON_S2_lsr_i_r_xacc + +/* ========================================================================== + Assembly Syntax: Rdd32=vlsrh(Rss32,#u4) + C Intrinsic Prototype: Word64 Q6_P_vlsrh_PI(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlsrh_PI __builtin_HEXAGON_S2_lsr_i_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vlsrw(Rss32,#u5) + C Intrinsic Prototype: Word64 Q6_P_vlsrw_PI(Word64 Rss, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlsrw_PI __builtin_HEXAGON_S2_lsr_i_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsr_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsr_PR __builtin_HEXAGON_S2_lsr_r_p + +/* ========================================================================== + Assembly Syntax: Rxx32+=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsracc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsracc_PR __builtin_HEXAGON_S2_lsr_r_p_acc + +/* ========================================================================== + Assembly Syntax: Rxx32&=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsrand_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrand_PR __builtin_HEXAGON_S2_lsr_r_p_and + +/* ========================================================================== + Assembly Syntax: Rxx32-=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsrnac_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrnac_PR __builtin_HEXAGON_S2_lsr_r_p_nac + +/* ========================================================================== + Assembly Syntax: Rxx32|=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsror_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsror_PR __builtin_HEXAGON_S2_lsr_r_p_or + +/* ========================================================================== + Assembly Syntax: Rxx32^=lsr(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_lsrxacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_lsrxacc_PR __builtin_HEXAGON_S2_lsr_r_p_xor + +/* ========================================================================== + Assembly Syntax: Rd32=lsr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsr_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsr_RR __builtin_HEXAGON_S2_lsr_r_r + +/* ========================================================================== + Assembly Syntax: Rx32+=lsr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsracc_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsracc_RR __builtin_HEXAGON_S2_lsr_r_r_acc + +/* ========================================================================== + Assembly Syntax: Rx32&=lsr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsrand_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsrand_RR __builtin_HEXAGON_S2_lsr_r_r_and + +/* ========================================================================== + Assembly Syntax: Rx32-=lsr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsrnac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsrnac_RR __builtin_HEXAGON_S2_lsr_r_r_nac + +/* ========================================================================== + Assembly Syntax: Rx32|=lsr(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsror_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsror_RR __builtin_HEXAGON_S2_lsr_r_r_or + +/* ========================================================================== + Assembly Syntax: Rdd32=vlsrh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vlsrh_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlsrh_PR __builtin_HEXAGON_S2_lsr_r_vh + +/* ========================================================================== + Assembly Syntax: Rdd32=vlsrw(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vlsrw_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vlsrw_PR __builtin_HEXAGON_S2_lsr_r_vw + +/* ========================================================================== + Assembly Syntax: Rdd32=packhl(Rs32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_packhl_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU32_3op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_packhl_RR __builtin_HEXAGON_S2_packhl + +/* ========================================================================== + Assembly Syntax: Rd32=parity(Rss32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_parity_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_parity_PP __builtin_HEXAGON_S2_parityp + +/* ========================================================================== + Assembly Syntax: Rd32=setbit(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_setbit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_setbit_RI __builtin_HEXAGON_S2_setbit_i + +/* ========================================================================== + Assembly Syntax: Rd32=setbit(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_setbit_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_setbit_RR __builtin_HEXAGON_S2_setbit_r + +/* ========================================================================== + Assembly Syntax: Rdd32=shuffeb(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_shuffeb_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_shuffeb_PP __builtin_HEXAGON_S2_shuffeb + +/* ========================================================================== + Assembly Syntax: Rdd32=shuffeh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_shuffeh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_shuffeh_PP __builtin_HEXAGON_S2_shuffeh + +/* ========================================================================== + Assembly Syntax: Rdd32=shuffob(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_shuffob_PP(Word64 Rtt, Word64 Rss) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_shuffob_PP __builtin_HEXAGON_S2_shuffob + +/* ========================================================================== + Assembly Syntax: Rdd32=shuffoh(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_shuffoh_PP(Word64 Rtt, Word64 Rss) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_shuffoh_PP __builtin_HEXAGON_S2_shuffoh + +/* ========================================================================== + Assembly Syntax: memb(Rx32++#s4:0:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memb_IMR_circ(void** Rx, Word32 Is4_0, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memb_IMR_circ __builtin_HEXAGON_S2_storerb_pci + +/* ========================================================================== + Assembly Syntax: memb(Rx32++I:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memb_MR_circ(void** Rx, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memb_MR_circ __builtin_HEXAGON_S2_storerb_pcr + +/* ========================================================================== + Assembly Syntax: memd(Rx32++#s4:3:circ(Mu2))=Rtt32 + C Intrinsic Prototype: void Q6_memd_IMP_circ(void** Rx, Word32 Is4_3, Word32 Mu, Word64 Rtt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memd_IMP_circ __builtin_HEXAGON_S2_storerd_pci + +/* ========================================================================== + Assembly Syntax: memd(Rx32++I:circ(Mu2))=Rtt32 + C Intrinsic Prototype: void Q6_memd_MP_circ(void** Rx, Word32 Mu, Word64 Rtt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memd_MP_circ __builtin_HEXAGON_S2_storerd_pcr + +/* ========================================================================== + Assembly Syntax: memh(Rx32++#s4:1:circ(Mu2))=Rt32.h + C Intrinsic Prototype: void Q6_memh_IMRh_circ(void** Rx, Word32 Is4_1, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memh_IMRh_circ __builtin_HEXAGON_S2_storerf_pci + +/* ========================================================================== + Assembly Syntax: memh(Rx32++I:circ(Mu2))=Rt32.h + C Intrinsic Prototype: void Q6_memh_MRh_circ(void** Rx, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memh_MRh_circ __builtin_HEXAGON_S2_storerf_pcr + +/* ========================================================================== + Assembly Syntax: memh(Rx32++#s4:1:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memh_IMR_circ(void** Rx, Word32 Is4_1, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memh_IMR_circ __builtin_HEXAGON_S2_storerh_pci + +/* ========================================================================== + Assembly Syntax: memh(Rx32++I:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memh_MR_circ(void** Rx, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memh_MR_circ __builtin_HEXAGON_S2_storerh_pcr + +/* ========================================================================== + Assembly Syntax: memw(Rx32++#s4:2:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memw_IMR_circ(void** Rx, Word32 Is4_2, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memw_IMR_circ __builtin_HEXAGON_S2_storeri_pci + +/* ========================================================================== + Assembly Syntax: memw(Rx32++I:circ(Mu2))=Rt32 + C Intrinsic Prototype: void Q6_memw_MR_circ(void** Rx, Word32 Mu, Word32 Rt, void* BaseAddress) + Instruction Type: ST + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_memw_MR_circ __builtin_HEXAGON_S2_storeri_pcr + +/* ========================================================================== + Assembly Syntax: Rd32=vsathb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_vsathb_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsathb_R __builtin_HEXAGON_S2_svsathb + +/* ========================================================================== + Assembly Syntax: Rd32=vsathub(Rs32) + C Intrinsic Prototype: Word32 Q6_R_vsathub_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsathub_R __builtin_HEXAGON_S2_svsathub + +/* ========================================================================== + Assembly Syntax: Rx32=tableidxb(Rs32,#u4,#U5) + C Intrinsic Prototype: Word32 Q6_R_tableidxb_RII(Word32 Rx, Word32 Rs, Word32 Iu4, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_tableidxb_RII __builtin_HEXAGON_S2_tableidxb_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rx32=tableidxd(Rs32,#u4,#U5) + C Intrinsic Prototype: Word32 Q6_R_tableidxd_RII(Word32 Rx, Word32 Rs, Word32 Iu4, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_tableidxd_RII __builtin_HEXAGON_S2_tableidxd_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rx32=tableidxh(Rs32,#u4,#U5) + C Intrinsic Prototype: Word32 Q6_R_tableidxh_RII(Word32 Rx, Word32 Rs, Word32 Iu4, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_tableidxh_RII __builtin_HEXAGON_S2_tableidxh_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rx32=tableidxw(Rs32,#u4,#U5) + C Intrinsic Prototype: Word32 Q6_R_tableidxw_RII(Word32 Rx, Word32 Rs, Word32 Iu4, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_tableidxw_RII __builtin_HEXAGON_S2_tableidxw_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rd32=togglebit(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_togglebit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_togglebit_RI __builtin_HEXAGON_S2_togglebit_i + +/* ========================================================================== + Assembly Syntax: Rd32=togglebit(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_togglebit_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_togglebit_RR __builtin_HEXAGON_S2_togglebit_r + +/* ========================================================================== + Assembly Syntax: Pd4=tstbit(Rs32,#u5) + C Intrinsic Prototype: Byte Q6_p_tstbit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_tstbit_RI __builtin_HEXAGON_S2_tstbit_i + +/* ========================================================================== + Assembly Syntax: Pd4=tstbit(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_tstbit_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_tstbit_RR __builtin_HEXAGON_S2_tstbit_r + +/* ========================================================================== + Assembly Syntax: Rdd32=valignb(Rtt32,Rss32,#u3) + C Intrinsic Prototype: Word64 Q6_P_valignb_PPI(Word64 Rtt, Word64 Rss, Word32 Iu3) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_valignb_PPI __builtin_HEXAGON_S2_valignib + +/* ========================================================================== + Assembly Syntax: Rdd32=valignb(Rtt32,Rss32,Pu4) + C Intrinsic Prototype: Word64 Q6_P_valignb_PPp(Word64 Rtt, Word64 Rss, Byte Pu) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_valignb_PPp __builtin_HEXAGON_S2_valignrb + +/* ========================================================================== + Assembly Syntax: Rdd32=vcnegh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vcnegh_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcnegh_PR __builtin_HEXAGON_S2_vcnegh + +/* ========================================================================== + Assembly Syntax: Rdd32=vcrotate(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vcrotate_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vcrotate_PR __builtin_HEXAGON_S2_vcrotate + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcnegh(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_vrcneghacc_PR(Word64 Rxx, Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcneghacc_PR __builtin_HEXAGON_S2_vrcnegh + +/* ========================================================================== + Assembly Syntax: Rd32=vrndwh(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vrndwh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vrndwh_P __builtin_HEXAGON_S2_vrndpackwh + +/* ========================================================================== + Assembly Syntax: Rd32=vrndwh(Rss32):sat + C Intrinsic Prototype: Word32 Q6_R_vrndwh_P_sat(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vrndwh_P_sat __builtin_HEXAGON_S2_vrndpackwhs + +/* ========================================================================== + Assembly Syntax: Rd32=vsathb(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vsathb_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsathb_P __builtin_HEXAGON_S2_vsathb + +/* ========================================================================== + Assembly Syntax: Rdd32=vsathb(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsathb_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsathb_P __builtin_HEXAGON_S2_vsathb_nopack + +/* ========================================================================== + Assembly Syntax: Rd32=vsathub(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vsathub_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsathub_P __builtin_HEXAGON_S2_vsathub + +/* ========================================================================== + Assembly Syntax: Rdd32=vsathub(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsathub_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsathub_P __builtin_HEXAGON_S2_vsathub_nopack + +/* ========================================================================== + Assembly Syntax: Rd32=vsatwh(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vsatwh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsatwh_P __builtin_HEXAGON_S2_vsatwh + +/* ========================================================================== + Assembly Syntax: Rdd32=vsatwh(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsatwh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsatwh_P __builtin_HEXAGON_S2_vsatwh_nopack + +/* ========================================================================== + Assembly Syntax: Rd32=vsatwuh(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vsatwuh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsatwuh_P __builtin_HEXAGON_S2_vsatwuh + +/* ========================================================================== + Assembly Syntax: Rdd32=vsatwuh(Rss32) + C Intrinsic Prototype: Word64 Q6_P_vsatwuh_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsatwuh_P __builtin_HEXAGON_S2_vsatwuh_nopack + +/* ========================================================================== + Assembly Syntax: Rd32=vsplatb(Rs32) + C Intrinsic Prototype: Word32 Q6_R_vsplatb_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vsplatb_R __builtin_HEXAGON_S2_vsplatrb + +/* ========================================================================== + Assembly Syntax: Rdd32=vsplath(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vsplath_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsplath_R __builtin_HEXAGON_S2_vsplatrh + +/* ========================================================================== + Assembly Syntax: Rdd32=vspliceb(Rss32,Rtt32,#u3) + C Intrinsic Prototype: Word64 Q6_P_vspliceb_PPI(Word64 Rss, Word64 Rtt, Word32 Iu3) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vspliceb_PPI __builtin_HEXAGON_S2_vspliceib + +/* ========================================================================== + Assembly Syntax: Rdd32=vspliceb(Rss32,Rtt32,Pu4) + C Intrinsic Prototype: Word64 Q6_P_vspliceb_PPp(Word64 Rss, Word64 Rtt, Byte Pu) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vspliceb_PPp __builtin_HEXAGON_S2_vsplicerb + +/* ========================================================================== + Assembly Syntax: Rdd32=vsxtbh(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vsxtbh_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsxtbh_R __builtin_HEXAGON_S2_vsxtbh + +/* ========================================================================== + Assembly Syntax: Rdd32=vsxthw(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vsxthw_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsxthw_R __builtin_HEXAGON_S2_vsxthw + +/* ========================================================================== + Assembly Syntax: Rd32=vtrunehb(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vtrunehb_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vtrunehb_P __builtin_HEXAGON_S2_vtrunehb + +/* ========================================================================== + Assembly Syntax: Rdd32=vtrunewh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vtrunewh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vtrunewh_PP __builtin_HEXAGON_S2_vtrunewh + +/* ========================================================================== + Assembly Syntax: Rd32=vtrunohb(Rss32) + C Intrinsic Prototype: Word32 Q6_R_vtrunohb_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vtrunohb_P __builtin_HEXAGON_S2_vtrunohb + +/* ========================================================================== + Assembly Syntax: Rdd32=vtrunowh(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vtrunowh_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vtrunowh_PP __builtin_HEXAGON_S2_vtrunowh + +/* ========================================================================== + Assembly Syntax: Rdd32=vzxtbh(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vzxtbh_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vzxtbh_R __builtin_HEXAGON_S2_vzxtbh + +/* ========================================================================== + Assembly Syntax: Rdd32=vzxthw(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vzxthw_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vzxthw_R __builtin_HEXAGON_S2_vzxthw + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rs32,add(Ru32,#s6)) + C Intrinsic Prototype: Word32 Q6_R_add_add_RRI(Word32 Rs, Word32 Ru, Word32 Is6) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_add_RRI __builtin_HEXAGON_S4_addaddi + +/* ========================================================================== + Assembly Syntax: Rx32=add(#u8,asl(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_add_asl_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_asl_IRI __builtin_HEXAGON_S4_addi_asl_ri + +/* ========================================================================== + Assembly Syntax: Rx32=add(#u8,lsr(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_add_lsr_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_lsr_IRI __builtin_HEXAGON_S4_addi_lsr_ri + +/* ========================================================================== + Assembly Syntax: Rx32=and(#u8,asl(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_and_asl_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_and_asl_IRI __builtin_HEXAGON_S4_andi_asl_ri + +/* ========================================================================== + Assembly Syntax: Rx32=and(#u8,lsr(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_and_lsr_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_and_lsr_IRI __builtin_HEXAGON_S4_andi_lsr_ri + +/* ========================================================================== + Assembly Syntax: Rd32=add(clb(Rs32),#s6) + C Intrinsic Prototype: Word32 Q6_R_add_clb_RI(Word32 Rs, Word32 Is6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_clb_RI __builtin_HEXAGON_S4_clbaddi + +/* ========================================================================== + Assembly Syntax: Rd32=add(clb(Rss32),#s6) + C Intrinsic Prototype: Word32 Q6_R_add_clb_PI(Word64 Rss, Word32 Is6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_clb_PI __builtin_HEXAGON_S4_clbpaddi + +/* ========================================================================== + Assembly Syntax: Rd32=normamt(Rss32) + C Intrinsic Prototype: Word32 Q6_R_normamt_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_normamt_P __builtin_HEXAGON_S4_clbpnorm + +/* ========================================================================== + Assembly Syntax: Rd32=extract(Rs32,#u5,#U5) + C Intrinsic Prototype: Word32 Q6_R_extract_RII(Word32 Rs, Word32 Iu5, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_extract_RII __builtin_HEXAGON_S4_extract + +/* ========================================================================== + Assembly Syntax: Rd32=extract(Rs32,Rtt32) + C Intrinsic Prototype: Word32 Q6_R_extract_RP(Word32 Rs, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_extract_RP __builtin_HEXAGON_S4_extract_rp + +/* ========================================================================== + Assembly Syntax: Rdd32=extract(Rss32,#u6,#U6) + C Intrinsic Prototype: Word64 Q6_P_extract_PII(Word64 Rss, Word32 Iu6, Word32 IU6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_extract_PII __builtin_HEXAGON_S4_extractp + +/* ========================================================================== + Assembly Syntax: Rdd32=extract(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_extract_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_extract_PP __builtin_HEXAGON_S4_extractp_rp + +/* ========================================================================== + Assembly Syntax: Rd32=lsl(#s6,Rt32) + C Intrinsic Prototype: Word32 Q6_R_lsl_IR(Word32 Is6, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_lsl_IR __builtin_HEXAGON_S4_lsli + +/* ========================================================================== + Assembly Syntax: Pd4=!tstbit(Rs32,#u5) + C Intrinsic Prototype: Byte Q6_p_not_tstbit_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_tstbit_RI __builtin_HEXAGON_S4_ntstbit_i + +/* ========================================================================== + Assembly Syntax: Pd4=!tstbit(Rs32,Rt32) + C Intrinsic Prototype: Byte Q6_p_not_tstbit_RR(Word32 Rs, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_tstbit_RR __builtin_HEXAGON_S4_ntstbit_r + +/* ========================================================================== + Assembly Syntax: Rx32|=and(Rs32,#s10) + C Intrinsic Prototype: Word32 Q6_R_andor_RI(Word32 Rx, Word32 Rs, Word32 Is10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_andor_RI __builtin_HEXAGON_S4_or_andi + +/* ========================================================================== + Assembly Syntax: Rx32=or(Ru32,and(Rx32,#s10)) + C Intrinsic Prototype: Word32 Q6_R_or_and_RRI(Word32 Ru, Word32 Rx, Word32 Is10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_or_and_RRI __builtin_HEXAGON_S4_or_andix + +/* ========================================================================== + Assembly Syntax: Rx32|=or(Rs32,#s10) + C Intrinsic Prototype: Word32 Q6_R_oror_RI(Word32 Rx, Word32 Rs, Word32 Is10) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_oror_RI __builtin_HEXAGON_S4_or_ori + +/* ========================================================================== + Assembly Syntax: Rx32=or(#u8,asl(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_or_asl_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_or_asl_IRI __builtin_HEXAGON_S4_ori_asl_ri + +/* ========================================================================== + Assembly Syntax: Rx32=or(#u8,lsr(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_or_lsr_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_or_lsr_IRI __builtin_HEXAGON_S4_ori_lsr_ri + +/* ========================================================================== + Assembly Syntax: Rd32=parity(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_parity_RR(Word32 Rs, Word32 Rt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_parity_RR __builtin_HEXAGON_S4_parity + +/* ========================================================================== + Assembly Syntax: Rd32=add(Rs32,sub(#s6,Ru32)) + C Intrinsic Prototype: Word32 Q6_R_add_sub_RIR(Word32 Rs, Word32 Is6, Word32 Ru) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_add_sub_RIR __builtin_HEXAGON_S4_subaddi + +/* ========================================================================== + Assembly Syntax: Rx32=sub(#u8,asl(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_sub_asl_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_asl_IRI __builtin_HEXAGON_S4_subi_asl_ri + +/* ========================================================================== + Assembly Syntax: Rx32=sub(#u8,lsr(Rx32,#U5)) + C Intrinsic Prototype: Word32 Q6_R_sub_lsr_IRI(Word32 Iu8, Word32 Rx, Word32 IU5) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_sub_lsr_IRI __builtin_HEXAGON_S4_subi_lsr_ri + +/* ========================================================================== + Assembly Syntax: Rdd32=vrcrotate(Rss32,Rt32,#u2) + C Intrinsic Prototype: Word64 Q6_P_vrcrotate_PRI(Word64 Rss, Word32 Rt, Word32 Iu2) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcrotate_PRI __builtin_HEXAGON_S4_vrcrotate + +/* ========================================================================== + Assembly Syntax: Rxx32+=vrcrotate(Rss32,Rt32,#u2) + C Intrinsic Prototype: Word64 Q6_P_vrcrotateacc_PRI(Word64 Rxx, Word64 Rss, Word32 Rt, Word32 Iu2) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vrcrotateacc_PRI __builtin_HEXAGON_S4_vrcrotate_acc + +/* ========================================================================== + Assembly Syntax: Rdd32=vxaddsubh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vxaddsubh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxaddsubh_PP_sat __builtin_HEXAGON_S4_vxaddsubh + +/* ========================================================================== + Assembly Syntax: Rdd32=vxaddsubh(Rss32,Rtt32):rnd:>>1:sat + C Intrinsic Prototype: Word64 Q6_P_vxaddsubh_PP_rnd_rs1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxaddsubh_PP_rnd_rs1_sat __builtin_HEXAGON_S4_vxaddsubhr + +/* ========================================================================== + Assembly Syntax: Rdd32=vxaddsubw(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vxaddsubw_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxaddsubw_PP_sat __builtin_HEXAGON_S4_vxaddsubw + +/* ========================================================================== + Assembly Syntax: Rdd32=vxsubaddh(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vxsubaddh_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxsubaddh_PP_sat __builtin_HEXAGON_S4_vxsubaddh + +/* ========================================================================== + Assembly Syntax: Rdd32=vxsubaddh(Rss32,Rtt32):rnd:>>1:sat + C Intrinsic Prototype: Word64 Q6_P_vxsubaddh_PP_rnd_rs1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxsubaddh_PP_rnd_rs1_sat __builtin_HEXAGON_S4_vxsubaddhr + +/* ========================================================================== + Assembly Syntax: Rdd32=vxsubaddw(Rss32,Rtt32):sat + C Intrinsic Prototype: Word64 Q6_P_vxsubaddw_PP_sat(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vxsubaddw_PP_sat __builtin_HEXAGON_S4_vxsubaddw + +/* ========================================================================== + Assembly Syntax: Rd32=vasrhub(Rss32,#u4):rnd:sat + C Intrinsic Prototype: Word32 Q6_R_vasrhub_PI_rnd_sat(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_R_vasrhub_PI_rnd_sat __builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax + +/* ========================================================================== + Assembly Syntax: Rd32=vasrhub(Rss32,#u4):sat + C Intrinsic Prototype: Word32 Q6_R_vasrhub_PI_sat(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_vasrhub_PI_sat __builtin_HEXAGON_S5_asrhub_sat + +/* ========================================================================== + Assembly Syntax: Rd32=popcount(Rss32) + C Intrinsic Prototype: Word32 Q6_R_popcount_P(Word64 Rss) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_popcount_P __builtin_HEXAGON_S5_popcountp + +/* ========================================================================== + Assembly Syntax: Rdd32=vasrh(Rss32,#u4):rnd + C Intrinsic Prototype: Word64 Q6_P_vasrh_PI_rnd(Word64 Rss, Word32 Iu4) + Instruction Type: S_2op + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_P_vasrh_PI_rnd __builtin_HEXAGON_S5_vasrhrnd_goodsyntax + +/* ========================================================================== + Assembly Syntax: dccleana(Rs32) + C Intrinsic Prototype: void Q6_dccleana_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dccleana_A __builtin_HEXAGON_Y2_dccleana + +/* ========================================================================== + Assembly Syntax: dccleaninva(Rs32) + C Intrinsic Prototype: void Q6_dccleaninva_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dccleaninva_A __builtin_HEXAGON_Y2_dccleaninva + +/* ========================================================================== + Assembly Syntax: dcfetch(Rs32) + C Intrinsic Prototype: void Q6_dcfetch_A(Address Rs) + Instruction Type: MAPPING + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_dcfetch_A __builtin_HEXAGON_Y2_dcfetch + +/* ========================================================================== + Assembly Syntax: dcinva(Rs32) + C Intrinsic Prototype: void Q6_dcinva_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dcinva_A __builtin_HEXAGON_Y2_dcinva + +/* ========================================================================== + Assembly Syntax: dczeroa(Rs32) + C Intrinsic Prototype: void Q6_dczeroa_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dczeroa_A __builtin_HEXAGON_Y2_dczeroa + +/* ========================================================================== + Assembly Syntax: l2fetch(Rs32,Rt32) + C Intrinsic Prototype: void Q6_l2fetch_AR(Address Rs, Word32 Rt) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_l2fetch_AR __builtin_HEXAGON_Y4_l2fetch + +/* ========================================================================== + Assembly Syntax: l2fetch(Rs32,Rtt32) + C Intrinsic Prototype: void Q6_l2fetch_AP(Address Rs, Word64 Rtt) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_l2fetch_AP __builtin_HEXAGON_Y5_l2fetch + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rdd32=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_rol_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_rol_PI __builtin_HEXAGON_S6_rol_i_p +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rxx32+=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_rolacc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_rolacc_PI __builtin_HEXAGON_S6_rol_i_p_acc +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rxx32&=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_roland_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_roland_PI __builtin_HEXAGON_S6_rol_i_p_and +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rxx32-=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_rolnac_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_rolnac_PI __builtin_HEXAGON_S6_rol_i_p_nac +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rxx32|=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_rolor_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_rolor_PI __builtin_HEXAGON_S6_rol_i_p_or +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rxx32^=rol(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_rolxacc_PI(Word64 Rxx, Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_rolxacc_PI __builtin_HEXAGON_S6_rol_i_p_xacc +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rd32=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_rol_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_rol_RI __builtin_HEXAGON_S6_rol_i_r +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rx32+=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_rolacc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_rolacc_RI __builtin_HEXAGON_S6_rol_i_r_acc +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rx32&=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_roland_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_roland_RI __builtin_HEXAGON_S6_rol_i_r_and +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rx32-=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_rolnac_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_rolnac_RI __builtin_HEXAGON_S6_rol_i_r_nac +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rx32|=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_rolor_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_rolor_RI __builtin_HEXAGON_S6_rol_i_r_or +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rx32^=rol(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_rolxacc_RI(Word32 Rx, Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_rolxacc_RI __builtin_HEXAGON_S6_rol_i_r_xacc +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HEXAGON_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Rdd32=vabsdiffb(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsdiffb_PP(Word64 Rtt, Word64 Rss) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsdiffb_PP __builtin_HEXAGON_M6_vabsdiffb +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HEXAGON_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Rdd32=vabsdiffub(Rtt32,Rss32) + C Intrinsic Prototype: Word64 Q6_P_vabsdiffub_PP(Word64 Rtt, Word64 Rss) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vabsdiffub_PP __builtin_HEXAGON_M6_vabsdiffub +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HEXAGON_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Rdd32=vsplatb(Rs32) + C Intrinsic Prototype: Word64 Q6_P_vsplatb_R(Word32 Rs) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vsplatb_R __builtin_HEXAGON_S6_vsplatrbp +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HEXAGON_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Rdd32=vtrunehb(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vtrunehb_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vtrunehb_PP __builtin_HEXAGON_S6_vtrunehb_ppp +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HEXAGON_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Rdd32=vtrunohb(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vtrunohb_PP(Word64 Rss, Word64 Rtt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vtrunohb_PP __builtin_HEXAGON_S6_vtrunohb_ppp +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HEXAGON_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32=vmem(Rt32):nt + C Intrinsic Prototype: HVX_Vector Q6_V_vmem_R_nt(Word32 Rt) + Instruction Type: MAPPING + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vmem_R_nt __builtin_HEXAGON_V6_ldntnt0 +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HEXAGON_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Pd4=!any8(vcmpb.eq(Rss32,Rtt32)) + C Intrinsic Prototype: Byte Q6_p_not_any8_vcmpb_eq_PP(Word64 Rss, Word64 Rtt) + Instruction Type: ALU64 + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_p_not_any8_vcmpb_eq_PP __builtin_HEXAGON_A6_vcmpbeq_notany +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HEXAGON_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Rdd32=dfadd(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfadd_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfadd_PP __builtin_HEXAGON_F2_dfadd +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HEXAGON_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Rdd32=dfsub(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfsub_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfsub_PP __builtin_HEXAGON_F2_dfsub +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HEXAGON_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Rx32-=mpyi(Rs32,Rt32) + C Intrinsic Prototype: Word32 Q6_R_mpyinac_RR(Word32 Rx, Word32 Rs, Word32 Rt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mpyinac_RR __builtin_HEXAGON_M2_mnaci +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HEXAGON_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Rd32=mask(#u5,#U5) + C Intrinsic Prototype: Word32 Q6_R_mask_II(Word32 Iu5, Word32 IU5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_mask_II __builtin_HEXAGON_S2_mask +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=clip(Rs32,#u5) + C Intrinsic Prototype: Word32 Q6_R_clip_RI(Word32 Rs, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_R_clip_RI __builtin_HEXAGON_A7_clip +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cround(Rss32,#u6) + C Intrinsic Prototype: Word64 Q6_P_cround_PI(Word64 Rss, Word32 Iu6) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cround_PI __builtin_HEXAGON_A7_croundd_ri +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cround(Rss32,Rt32) + C Intrinsic Prototype: Word64 Q6_P_cround_PR(Word64 Rss, Word32 Rt) + Instruction Type: S_3op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_cround_PR __builtin_HEXAGON_A7_croundd_rr +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=vclip(Rss32,#u5) + C Intrinsic Prototype: Word64 Q6_P_vclip_PI(Word64 Rss, Word32 Iu5) + Instruction Type: S_2op + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_vclip_PI __builtin_HEXAGON_A7_vclip +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rdd32=dfmax(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmax_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmax_PP __builtin_HEXAGON_F2_dfmax +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rdd32=dfmin(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmin_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmin_PP __builtin_HEXAGON_F2_dfmin +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rdd32=dfmpyfix(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmpyfix_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmpyfix_PP __builtin_HEXAGON_F2_dfmpyfix +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rxx32+=dfmpyhh(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmpyhhacc_PP(Float64 Rxx, Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmpyhhacc_PP __builtin_HEXAGON_F2_dfmpyhh +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rxx32+=dfmpylh(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmpylhacc_PP(Float64 Rxx, Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmpylhacc_PP __builtin_HEXAGON_F2_dfmpylh +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 +/* ========================================================================== + Assembly Syntax: Rdd32=dfmpyll(Rss32,Rtt32) + C Intrinsic Prototype: Float64 Q6_P_dfmpyll_PP(Float64 Rss, Float64 Rtt) + Instruction Type: M + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_P_dfmpyll_PP __builtin_HEXAGON_F2_dfmpyll +#endif /* __HEXAGON_ARCH___ >= 67 */ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyiw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyiw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyiw_PP __builtin_HEXAGON_M7_dcmpyiw +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyiw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyiwacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyiwacc_PP __builtin_HEXAGON_M7_dcmpyiw_acc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyiw(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_cmpyiw_PP_conj(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyiw_PP_conj __builtin_HEXAGON_M7_dcmpyiwc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyiw(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_cmpyiwacc_PP_conj(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyiwacc_PP_conj __builtin_HEXAGON_M7_dcmpyiwc_acc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyrw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyrw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyrw_PP __builtin_HEXAGON_M7_dcmpyrw +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyrw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_cmpyrwacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyrwacc_PP __builtin_HEXAGON_M7_dcmpyrw_acc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=cmpyrw(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_cmpyrw_PP_conj(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyrw_PP_conj __builtin_HEXAGON_M7_dcmpyrwc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rxx32+=cmpyrw(Rss32,Rtt32*) + C Intrinsic Prototype: Word64 Q6_P_cmpyrwacc_PP_conj(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_cmpyrwacc_PP_conj __builtin_HEXAGON_M7_dcmpyrwc_acc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rdd32=vdmpyw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vdmpyw_PP(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_vdmpyw_PP __builtin_HEXAGON_M7_vdmpy +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rxx32+=vdmpyw(Rss32,Rtt32) + C Intrinsic Prototype: Word64 Q6_P_vdmpywacc_PP(Word64 Rxx, Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_P_vdmpywacc_PP __builtin_HEXAGON_M7_vdmpy_acc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiw(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiw_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyiw_PP_s1_sat __builtin_HEXAGON_M7_wcmpyiw +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiw(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiw_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyiw_PP_s1_rnd_sat __builtin_HEXAGON_M7_wcmpyiw_rnd +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiw(Rss32,Rtt32*):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiw_PP_conj_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyiw_PP_conj_s1_sat __builtin_HEXAGON_M7_wcmpyiwc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyiw(Rss32,Rtt32*):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyiw_PP_conj_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyiw_PP_conj_s1_rnd_sat __builtin_HEXAGON_M7_wcmpyiwc_rnd +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrw(Rss32,Rtt32):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrw_PP_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyrw_PP_s1_sat __builtin_HEXAGON_M7_wcmpyrw +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrw(Rss32,Rtt32):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrw_PP_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyrw_PP_s1_rnd_sat __builtin_HEXAGON_M7_wcmpyrw_rnd +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrw(Rss32,Rtt32*):<<1:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrw_PP_conj_s1_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyrw_PP_conj_s1_sat __builtin_HEXAGON_M7_wcmpyrwc +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 67 && defined __HEXAGON_AUDIO__ +/* ========================================================================== + Assembly Syntax: Rd32=cmpyrw(Rss32,Rtt32*):<<1:rnd:sat + C Intrinsic Prototype: Word32 Q6_R_cmpyrw_PP_conj_s1_rnd_sat(Word64 Rss, Word64 Rtt) + Instruction Type: M + Execution Slots: SLOT3 + ========================================================================== */ + +#define Q6_R_cmpyrw_PP_conj_s1_rnd_sat __builtin_HEXAGON_M7_wcmpyrwc_rnd +#endif /* __HEXAGON_ARCH___ >= 67 && defined __HEXAGON_AUDIO__*/ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: dmlink(Rs32,Rt32) + C Intrinsic Prototype: void Q6_dmlink_AA(Address Rs, Address Rt) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dmlink_AA __builtin_HEXAGON_Y6_dmlink +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Rd32=dmpause + C Intrinsic Prototype: Word32 Q6_R_dmpause() + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_R_dmpause __builtin_HEXAGON_Y6_dmpause +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Rd32=dmpoll + C Intrinsic Prototype: Word32 Q6_R_dmpoll() + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_R_dmpoll __builtin_HEXAGON_Y6_dmpoll +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: dmresume(Rs32) + C Intrinsic Prototype: void Q6_dmresume_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dmresume_A __builtin_HEXAGON_Y6_dmresume +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: dmstart(Rs32) + C Intrinsic Prototype: void Q6_dmstart_A(Address Rs) + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_dmstart_A __builtin_HEXAGON_Y6_dmstart +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HEXAGON_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Rd32=dmwait + C Intrinsic Prototype: Word32 Q6_R_dmwait() + Instruction Type: ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_R_dmwait __builtin_HEXAGON_Y6_dmwait +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#include +#ifdef __HVX__ +#include +#endif /* __HVX__ */ +#endif diff --git a/clang/lib/Headers/hexagon_types.h b/clang/lib/Headers/hexagon_types.h new file mode 100644 index 0000000000000..6958809418d8f --- /dev/null +++ b/clang/lib/Headers/hexagon_types.h @@ -0,0 +1,2653 @@ +/******************************************************************************/ +/* (c) 2020 Qualcomm Innovation Center, Inc. All rights reserved. */ +/* */ +/******************************************************************************/ +#ifndef HEXAGON_TYPES_H +#define HEXAGON_TYPES_H + +#include + +/* Hexagon names */ +#define HEXAGON_Vect HEXAGON_Vect64 +#define HEXAGON_V_GET_D HEXAGON_V64_GET_D +#define HEXAGON_V_GET_UD HEXAGON_V64_GET_UD +#define HEXAGON_V_GET_W0 HEXAGON_V64_GET_W0 +#define HEXAGON_V_GET_W1 HEXAGON_V64_GET_W1 +#define HEXAGON_V_GET_UW0 HEXAGON_V64_GET_UW0 +#define HEXAGON_V_GET_UW1 HEXAGON_V64_GET_UW1 +#define HEXAGON_V_GET_H0 HEXAGON_V64_GET_H0 +#define HEXAGON_V_GET_H1 HEXAGON_V64_GET_H1 +#define HEXAGON_V_GET_H2 HEXAGON_V64_GET_H2 +#define HEXAGON_V_GET_H3 HEXAGON_V64_GET_H3 +#define HEXAGON_V_GET_UH0 HEXAGON_V64_GET_UH0 +#define HEXAGON_V_GET_UH1 HEXAGON_V64_GET_UH1 +#define HEXAGON_V_GET_UH2 HEXAGON_V64_GET_UH2 +#define HEXAGON_V_GET_UH3 HEXAGON_V64_GET_UH3 +#define HEXAGON_V_GET_B0 HEXAGON_V64_GET_B0 +#define HEXAGON_V_GET_B1 HEXAGON_V64_GET_B1 +#define HEXAGON_V_GET_B2 HEXAGON_V64_GET_B2 +#define HEXAGON_V_GET_B3 HEXAGON_V64_GET_B3 +#define HEXAGON_V_GET_B4 HEXAGON_V64_GET_B4 +#define HEXAGON_V_GET_B5 HEXAGON_V64_GET_B5 +#define HEXAGON_V_GET_B6 HEXAGON_V64_GET_B6 +#define HEXAGON_V_GET_B7 HEXAGON_V64_GET_B7 +#define HEXAGON_V_GET_UB0 HEXAGON_V64_GET_UB0 +#define HEXAGON_V_GET_UB1 HEXAGON_V64_GET_UB1 +#define HEXAGON_V_GET_UB2 HEXAGON_V64_GET_UB2 +#define HEXAGON_V_GET_UB3 HEXAGON_V64_GET_UB3 +#define HEXAGON_V_GET_UB4 HEXAGON_V64_GET_UB4 +#define HEXAGON_V_GET_UB5 HEXAGON_V64_GET_UB5 +#define HEXAGON_V_GET_UB6 HEXAGON_V64_GET_UB6 +#define HEXAGON_V_GET_UB7 HEXAGON_V64_GET_UB7 +#define HEXAGON_V_PUT_D HEXAGON_V64_PUT_D +#define HEXAGON_V_PUT_W0 HEXAGON_V64_PUT_W0 +#define HEXAGON_V_PUT_W1 HEXAGON_V64_PUT_W1 +#define HEXAGON_V_PUT_H0 HEXAGON_V64_PUT_H0 +#define HEXAGON_V_PUT_H1 HEXAGON_V64_PUT_H1 +#define HEXAGON_V_PUT_H2 HEXAGON_V64_PUT_H2 +#define HEXAGON_V_PUT_H3 HEXAGON_V64_PUT_H3 +#define HEXAGON_V_PUT_B0 HEXAGON_V64_PUT_B0 +#define HEXAGON_V_PUT_B1 HEXAGON_V64_PUT_B1 +#define HEXAGON_V_PUT_B2 HEXAGON_V64_PUT_B2 +#define HEXAGON_V_PUT_B3 HEXAGON_V64_PUT_B3 +#define HEXAGON_V_PUT_B4 HEXAGON_V64_PUT_B4 +#define HEXAGON_V_PUT_B5 HEXAGON_V64_PUT_B5 +#define HEXAGON_V_PUT_B6 HEXAGON_V64_PUT_B6 +#define HEXAGON_V_PUT_B7 HEXAGON_V64_PUT_B7 +#define HEXAGON_V_CREATE_D HEXAGON_V64_CREATE_D +#define HEXAGON_V_CREATE_W HEXAGON_V64_CREATE_W +#define HEXAGON_V_CREATE_H HEXAGON_V64_CREATE_H +#define HEXAGON_V_CREATE_B HEXAGON_V64_CREATE_B + +#ifdef __cplusplus +#define HEXAGON_VectC HEXAGON_Vect64C +#endif /* __cplusplus */ + +/* 64 Bit Vectors */ + +typedef long long __attribute__((__may_alias__)) HEXAGON_Vect64; + +/* Extract doubleword macros */ + +#define HEXAGON_V64_GET_D(v) (v) +#define HEXAGON_V64_GET_UD(v) ((unsigned long long)(v)) + +/* Extract word macros */ + +#define HEXAGON_V64_GET_W0(v) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.w[0]; \ + }) +#define HEXAGON_V64_GET_W1(v) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.w[1]; \ + }) +#define HEXAGON_V64_GET_UW0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned int uw[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uw[0]; \ + }) +#define HEXAGON_V64_GET_UW1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned int uw[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uw[1]; \ + }) + +/* Extract half word macros */ + +#define HEXAGON_V64_GET_H0(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[0]; \ + }) +#define HEXAGON_V64_GET_H1(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[1]; \ + }) +#define HEXAGON_V64_GET_H2(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[2]; \ + }) +#define HEXAGON_V64_GET_H3(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[3]; \ + }) +#define HEXAGON_V64_GET_UH0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uh[0]; \ + }) +#define HEXAGON_V64_GET_UH1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uh[1]; \ + }) +#define HEXAGON_V64_GET_UH2(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uh[2]; \ + }) +#define HEXAGON_V64_GET_UH3(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.uh[3]; \ + }) + +/* Extract byte macros */ + +#define HEXAGON_V64_GET_B0(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[0]; \ + }) +#define HEXAGON_V64_GET_B1(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[1]; \ + }) +#define HEXAGON_V64_GET_B2(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[2]; \ + }) +#define HEXAGON_V64_GET_B3(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[3]; \ + }) +#define HEXAGON_V64_GET_B4(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[4]; \ + }) +#define HEXAGON_V64_GET_B5(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[5]; \ + }) +#define HEXAGON_V64_GET_B6(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[6]; \ + }) +#define HEXAGON_V64_GET_B7(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[7]; \ + }) +#define HEXAGON_V64_GET_UB0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[0]; \ + }) +#define HEXAGON_V64_GET_UB1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[1]; \ + }) +#define HEXAGON_V64_GET_UB2(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[2]; \ + }) +#define HEXAGON_V64_GET_UB3(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[3]; \ + }) +#define HEXAGON_V64_GET_UB4(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[4]; \ + }) +#define HEXAGON_V64_GET_UB5(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[5]; \ + }) +#define HEXAGON_V64_GET_UB6(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[6]; \ + }) +#define HEXAGON_V64_GET_UB7(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.ub[7]; \ + }) + +/* NOTE: All set macros return a HEXAGON_Vect64 type */ + +/* Set doubleword macro */ + +#define HEXAGON_V64_PUT_D(v, new) (new) + +/* Set word macros */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_PUT_W0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.w[0] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_W1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.w[1] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_PUT_W0(v, new) \ + (((v) & 0xffffffff00000000LL) | ((HEXAGON_Vect64)((unsigned int)(new)))) +#define HEXAGON_V64_PUT_W1(v, new) \ + (((v) & 0x00000000ffffffffLL) | (((HEXAGON_Vect64)(new)) << 32LL)) + +#endif /* !__hexagon__ */ + +/* Set half word macros */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_PUT_H0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[0] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_H1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[1] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_H2(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[2] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_H3(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.h[3] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_PUT_H0(v, new) \ + (((v) & 0xffffffffffff0000LL) | ((HEXAGON_Vect64)((unsigned short)(new)))) +#define HEXAGON_V64_PUT_H1(v, new) \ + (((v) & 0xffffffff0000ffffLL) | (((HEXAGON_Vect64)((unsigned short)(new))) << 16LL)) +#define HEXAGON_V64_PUT_H2(v, new) \ + (((v) & 0xffff0000ffffffffLL) | (((HEXAGON_Vect64)((unsigned short)(new))) << 32LL)) +#define HEXAGON_V64_PUT_H3(v, new) \ + (((v) & 0x0000ffffffffffffLL) | (((HEXAGON_Vect64)(new)) << 48LL)) + +#endif /* !__hexagon__ */ + +/* Set byte macros */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_PUT_B0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[0] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[1] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B2(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[2] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B3(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[3] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B4(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[4] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B5(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[5] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B6(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[6] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) +#define HEXAGON_V64_PUT_B7(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.d = (v); \ + _HEXAGON_V64_internal_union.b[7] = (new); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_PUT_B0(v, new) \ + (((v) & 0xffffffffffffff00LL) | ((HEXAGON_Vect64)((unsigned char)(new)))) +#define HEXAGON_V64_PUT_B1(v, new) \ + (((v) & 0xffffffffffff00ffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 8LL)) +#define HEXAGON_V64_PUT_B2(v, new) \ + (((v) & 0xffffffffff00ffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 16LL)) +#define HEXAGON_V64_PUT_B3(v, new) \ + (((v) & 0xffffffff00ffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 24LL)) +#define HEXAGON_V64_PUT_B4(v, new) \ + (((v) & 0xffffff00ffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 32LL)) +#define HEXAGON_V64_PUT_B5(v, new) \ + (((v) & 0xffff00ffffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 40LL)) +#define HEXAGON_V64_PUT_B6(v, new) \ + (((v) & 0xff00ffffffffffffLL) | (((HEXAGON_Vect64)((unsigned char)(new))) << 48LL)) +#define HEXAGON_V64_PUT_B7(v, new) \ + (((v) & 0x00ffffffffffffffLL) | (((HEXAGON_Vect64)(new)) << 56LL)) + +#endif /* !__hexagon__ */ + +/* NOTE: All create macros return a HEXAGON_Vect64 type */ + +/* Create from a doubleword */ + +#define HEXAGON_V64_CREATE_D(d) (d) + +/* Create from words */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_CREATE_W(w1, w0) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.w[0] = (w0); \ + _HEXAGON_V64_internal_union.w[1] = (w1); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_CREATE_W(w1, w0) \ + ((((HEXAGON_Vect64)(w1)) << 32LL) | ((HEXAGON_Vect64)((w0) & 0xffffffff))) + +#endif /* !__hexagon__ */ + +/* Create from half words */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_CREATE_H(h3, h2, h1, h0) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.h[0] = (h0); \ + _HEXAGON_V64_internal_union.h[1] = (h1); \ + _HEXAGON_V64_internal_union.h[2] = (h2); \ + _HEXAGON_V64_internal_union.h[3] = (h3); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_CREATE_H(h3, h2, h1, h0) \ + ((((HEXAGON_Vect64)(h3)) << 48LL) | (((HEXAGON_Vect64)((h2) & 0xffff)) << 32LL) | \ + (((HEXAGON_Vect64)((h1) & 0xffff)) << 16LL) | ((HEXAGON_Vect64)((h0) & 0xffff))) + +#endif /* !__hexagon__ */ + +/* Create from bytes */ + +#ifdef __hexagon__ + +#define HEXAGON_V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _HEXAGON_V64_internal_union; \ + _HEXAGON_V64_internal_union.b[0] = (b0); \ + _HEXAGON_V64_internal_union.b[1] = (b1); \ + _HEXAGON_V64_internal_union.b[2] = (b2); \ + _HEXAGON_V64_internal_union.b[3] = (b3); \ + _HEXAGON_V64_internal_union.b[4] = (b4); \ + _HEXAGON_V64_internal_union.b[5] = (b5); \ + _HEXAGON_V64_internal_union.b[6] = (b6); \ + _HEXAGON_V64_internal_union.b[7] = (b7); \ + _HEXAGON_V64_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \ + ((((HEXAGON_Vect64)(b7)) << 56LL) | (((HEXAGON_Vect64)((b6) & 0xff)) << 48LL) | \ + (((HEXAGON_Vect64)((b5) & 0xff)) << 40LL) | (((HEXAGON_Vect64)((b4) & 0xff)) << 32LL) | \ + (((HEXAGON_Vect64)((b3) & 0xff)) << 24LL) | (((HEXAGON_Vect64)((b2) & 0xff)) << 16LL) | \ + (((HEXAGON_Vect64)((b1) & 0xff)) << 8LL) | ((HEXAGON_Vect64)((b0) & 0xff))) + +#endif /* !__hexagon__ */ + +#ifdef __cplusplus + +class HEXAGON_Vect64C { +public: + // Constructors + HEXAGON_Vect64C(long long d = 0) : data(d) {}; + HEXAGON_Vect64C(int w1, int w0) : data(HEXAGON_V64_CREATE_W(w1, w0)) {}; + HEXAGON_Vect64C(short h3, short h2, short h1, short h0) + : data(HEXAGON_V64_CREATE_H(h3, h2, h1, h0)) {}; + HEXAGON_Vect64C(signed char b7, signed char b6, signed char b5, signed char b4, + signed char b3, signed char b2, signed char b1, signed char b0) + : data(HEXAGON_V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0)) {}; + HEXAGON_Vect64C(const HEXAGON_Vect64C &v) : data(v.data) {}; + + HEXAGON_Vect64C &operator=(const HEXAGON_Vect64C &v) { + data = v.data; + return *this; + }; + + operator long long() { + return data; + }; + + // Extract doubleword methods + long long D(void) { + return HEXAGON_V64_GET_D(data); + }; + unsigned long long UD(void) { + return HEXAGON_V64_GET_UD(data); + }; + + // Extract word methods + int W0(void) { + return HEXAGON_V64_GET_W0(data); + }; + int W1(void) { + return HEXAGON_V64_GET_W1(data); + }; + unsigned int UW0(void) { + return HEXAGON_V64_GET_UW0(data); + }; + unsigned int UW1(void) { + return HEXAGON_V64_GET_UW1(data); + }; + + // Extract half word methods + short H0(void) { + return HEXAGON_V64_GET_H0(data); + }; + short H1(void) { + return HEXAGON_V64_GET_H1(data); + }; + short H2(void) { + return HEXAGON_V64_GET_H2(data); + }; + short H3(void) { + return HEXAGON_V64_GET_H3(data); + }; + unsigned short UH0(void) { + return HEXAGON_V64_GET_UH0(data); + }; + unsigned short UH1(void) { + return HEXAGON_V64_GET_UH1(data); + }; + unsigned short UH2(void) { + return HEXAGON_V64_GET_UH2(data); + }; + unsigned short UH3(void) { + return HEXAGON_V64_GET_UH3(data); + }; + + // Extract byte methods + signed char B0(void) { + return HEXAGON_V64_GET_B0(data); + }; + signed char B1(void) { + return HEXAGON_V64_GET_B1(data); + }; + signed char B2(void) { + return HEXAGON_V64_GET_B2(data); + }; + signed char B3(void) { + return HEXAGON_V64_GET_B3(data); + }; + signed char B4(void) { + return HEXAGON_V64_GET_B4(data); + }; + signed char B5(void) { + return HEXAGON_V64_GET_B5(data); + }; + signed char B6(void) { + return HEXAGON_V64_GET_B6(data); + }; + signed char B7(void) { + return HEXAGON_V64_GET_B7(data); + }; + unsigned char UB0(void) { + return HEXAGON_V64_GET_UB0(data); + }; + unsigned char UB1(void) { + return HEXAGON_V64_GET_UB1(data); + }; + unsigned char UB2(void) { + return HEXAGON_V64_GET_UB2(data); + }; + unsigned char UB3(void) { + return HEXAGON_V64_GET_UB3(data); + }; + unsigned char UB4(void) { + return HEXAGON_V64_GET_UB4(data); + }; + unsigned char UB5(void) { + return HEXAGON_V64_GET_UB5(data); + }; + unsigned char UB6(void) { + return HEXAGON_V64_GET_UB6(data); + }; + unsigned char UB7(void) { + return HEXAGON_V64_GET_UB7(data); + }; + + // NOTE: All set methods return a HEXAGON_Vect64C type + + // Set doubleword method + HEXAGON_Vect64C D(long long d) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_D(data, d)); + }; + + // Set word methods + HEXAGON_Vect64C W0(int w) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_W0(data, w)); + }; + HEXAGON_Vect64C W1(int w) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_W1(data, w)); + }; + + // Set half word methods + HEXAGON_Vect64C H0(short h) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_H0(data, h)); + }; + HEXAGON_Vect64C H1(short h) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_H1(data, h)); + }; + HEXAGON_Vect64C H2(short h) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_H2(data, h)); + }; + HEXAGON_Vect64C H3(short h) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_H3(data, h)); + }; + + // Set byte methods + HEXAGON_Vect64C B0(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B0(data, b)); + }; + HEXAGON_Vect64C B1(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B1(data, b)); + }; + HEXAGON_Vect64C B2(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B2(data, b)); + }; + HEXAGON_Vect64C B3(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B3(data, b)); + }; + HEXAGON_Vect64C B4(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B4(data, b)); + }; + HEXAGON_Vect64C B5(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B5(data, b)); + }; + HEXAGON_Vect64C B6(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B6(data, b)); + }; + HEXAGON_Vect64C B7(signed char b) { + return HEXAGON_Vect64C(HEXAGON_V64_PUT_B7(data, b)); + }; + +private: + long long data; +}; + +#endif /* __cplusplus */ + +/* 32 Bit Vectors */ + +typedef int HEXAGON_Vect32; + +/* Extract word macros */ + +#define HEXAGON_V32_GET_W(v) (v) +#define HEXAGON_V32_GET_UW(v) ((unsigned int)(v)) + +/* Extract half word macros */ + +#define HEXAGON_V32_GET_H0(v) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.h[0]; \ + }) +#define HEXAGON_V32_GET_H1(v) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.h[1]; \ + }) +#define HEXAGON_V32_GET_UH0(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned short uh[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.uh[0]; \ + }) +#define HEXAGON_V32_GET_UH1(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned short uh[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.uh[1]; \ + }) + +/* Extract byte macros */ + +#define HEXAGON_V32_GET_B0(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[0]; \ + }) +#define HEXAGON_V32_GET_B1(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[1]; \ + }) +#define HEXAGON_V32_GET_B2(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[2]; \ + }) +#define HEXAGON_V32_GET_B3(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[3]; \ + }) +#define HEXAGON_V32_GET_UB0(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.ub[0]; \ + }) +#define HEXAGON_V32_GET_UB1(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.ub[1]; \ + }) +#define HEXAGON_V32_GET_UB2(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.ub[2]; \ + }) +#define HEXAGON_V32_GET_UB3(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.ub[3]; \ + }) + +/* NOTE: All set macros return a HEXAGON_Vect32 type */ + +/* Set word macro */ + +#define HEXAGON_V32_PUT_W(v, new) (new) + +/* Set half word macros */ + +#ifdef __hexagon__ + +#define HEXAGON_V32_PUT_H0(v, new) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.h[0] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) +#define HEXAGON_V32_PUT_H1(v, new) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.h[1] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V32_PUT_H0(v, new) \ + (((v) & 0xffff0000) | ((HEXAGON_Vect32)((unsigned short)(new)))) +#define HEXAGON_V32_PUT_H1(v, new) (((v) & 0x0000ffff) | (((HEXAGON_Vect32)(new)) << 16)) + +#endif /* !__hexagon__ */ + +/* Set byte macros */ + +#ifdef __hexagon__ + +#define HEXAGON_V32_PUT_B0(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[0] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) +#define HEXAGON_V32_PUT_B1(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[1] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) +#define HEXAGON_V32_PUT_B2(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[2] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) +#define HEXAGON_V32_PUT_B3(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.w = (v); \ + _HEXAGON_V32_internal_union.b[3] = (new); \ + _HEXAGON_V32_internal_union.w; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V32_PUT_B0(v, new) \ + (((v) & 0xffffff00) | ((HEXAGON_Vect32)((unsigned char)(new)))) +#define HEXAGON_V32_PUT_B1(v, new) \ + (((v) & 0xffff00ff) | (((HEXAGON_Vect32)((unsigned char)(new))) << 8)) +#define HEXAGON_V32_PUT_B2(v, new) \ + (((v) & 0xff00ffff) | (((HEXAGON_Vect32)((unsigned char)(new))) << 16)) +#define HEXAGON_V32_PUT_B3(v, new) (((v) & 0x00ffffff) | (((HEXAGON_Vect32)(new)) << 24)) + +#endif /* !__hexagon__ */ + +/* NOTE: All create macros return a HEXAGON_Vect32 type */ + +/* Create from a word */ + +#define HEXAGON_V32_CREATE_W(w) (w) + +/* Create from half words */ + +#ifdef __hexagon__ + +#define HEXAGON_V32_CREATE_H(h1, h0) \ + __extension__({ \ + union { \ + long long d; \ + short h[2]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.h[0] = (h0); \ + _HEXAGON_V32_internal_union.h[1] = (h1); \ + _HEXAGON_V32_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V32_CREATE_H(h1, h0) \ + ((((HEXAGON_Vect32)(h1)) << 16) | ((HEXAGON_Vect32)((h0) & 0xffff))) + +#endif /* !__hexagon__ */ + +/* Create from bytes */ +#ifdef __hexagon__ + +#define HEXAGON_V32_CREATE_B(b3, b2, b1, b0) \ + __extension__({ \ + union { \ + long long d; \ + char b[4]; \ + } _HEXAGON_V32_internal_union; \ + _HEXAGON_V32_internal_union.b[0] = (b0); \ + _HEXAGON_V32_internal_union.b[1] = (b1); \ + _HEXAGON_V32_internal_union.b[2] = (b2); \ + _HEXAGON_V32_internal_union.b[3] = (b3); \ + _HEXAGON_V32_internal_union.d; \ + }) + +#else /* !__hexagon__ */ + +#define HEXAGON_V32_CREATE_B(b3, b2, b1, b0) \ + ((((HEXAGON_Vect32)(b3)) << 24) | (((HEXAGON_Vect32)((b2) & 0xff)) << 16) | \ + (((HEXAGON_Vect32)((b1) & 0xff)) << 8) | ((HEXAGON_Vect32)((b0) & 0xff))) + +#endif /* !__hexagon__ */ + +#ifdef __cplusplus + +class HEXAGON_Vect32C { +public: + // Constructors + HEXAGON_Vect32C(int w = 0) : data(w) {}; + HEXAGON_Vect32C(short h1, short h0) : data(HEXAGON_V32_CREATE_H(h1, h0)) {}; + HEXAGON_Vect32C(signed char b3, signed char b2, signed char b1, signed char b0) + : data(HEXAGON_V32_CREATE_B(b3, b2, b1, b0)) {}; + HEXAGON_Vect32C(const HEXAGON_Vect32C &v) : data(v.data) {}; + + HEXAGON_Vect32C &operator=(const HEXAGON_Vect32C &v) { + data = v.data; + return *this; + }; + + operator int() { + return data; + }; + + // Extract word methods + int W(void) { + return HEXAGON_V32_GET_W(data); + }; + unsigned int UW(void) { + return HEXAGON_V32_GET_UW(data); + }; + + // Extract half word methods + short H0(void) { + return HEXAGON_V32_GET_H0(data); + }; + short H1(void) { + return HEXAGON_V32_GET_H1(data); + }; + unsigned short UH0(void) { + return HEXAGON_V32_GET_UH0(data); + }; + unsigned short UH1(void) { + return HEXAGON_V32_GET_UH1(data); + }; + + // Extract byte methods + signed char B0(void) { + return HEXAGON_V32_GET_B0(data); + }; + signed char B1(void) { + return HEXAGON_V32_GET_B1(data); + }; + signed char B2(void) { + return HEXAGON_V32_GET_B2(data); + }; + signed char B3(void) { + return HEXAGON_V32_GET_B3(data); + }; + unsigned char UB0(void) { + return HEXAGON_V32_GET_UB0(data); + }; + unsigned char UB1(void) { + return HEXAGON_V32_GET_UB1(data); + }; + unsigned char UB2(void) { + return HEXAGON_V32_GET_UB2(data); + }; + unsigned char UB3(void) { + return HEXAGON_V32_GET_UB3(data); + }; + + // NOTE: All set methods return a HEXAGON_Vect32C type + + // Set word method + HEXAGON_Vect32C W(int w) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_W(data, w)); + }; + + // Set half word methods + HEXAGON_Vect32C H0(short h) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_H0(data, h)); + }; + HEXAGON_Vect32C H1(short h) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_H1(data, h)); + }; + + // Set byte methods + HEXAGON_Vect32C B0(signed char b) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_B0(data, b)); + }; + HEXAGON_Vect32C B1(signed char b) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_B1(data, b)); + }; + HEXAGON_Vect32C B2(signed char b) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_B2(data, b)); + }; + HEXAGON_Vect32C B3(signed char b) { + return HEXAGON_Vect32C(HEXAGON_V32_PUT_B3(data, b)); + }; + +private: + int data; +}; + +#endif /* __cplusplus */ + +// V65 Silver types +#if __Q6S_ARCH__ >= 65 + // Silver vector types are 128 bytes, and pairs are 256. The vector predicate + // types are 16 bytes and 32 bytes for pairs. + typedef long HEXAGON_VecPred128 __attribute__((__vector_size__(16))) + __attribute__((aligned(128))); + + typedef long HEXAGON_VecPred256 __attribute__((__vector_size__(32))) + __attribute__((aligned(128))); + + typedef long HEXAGON_Vect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + + typedef long HEXAGON_Vect2048 __attribute__((__vector_size__(256))) + __attribute__((aligned(256))); + + typedef long HEXAGON_UVect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(4))); + + typedef long HEXAGON_UVect2048 __attribute__((__vector_size__(256))) + __attribute__((aligned(4))); + + #define Q6S_VectorPredPair HEXAGON_VecPred256 + #define Q6S_VectorPred HEXAGON_VecPred128 + #define Q6S_Vector HEXAGON_Vect1024 + #define Q6S_VectorPair HEXAGON_Vect2048 + #define Q6S_UVector HEXAGON_UVect1024 + #define Q6S_UVectorPair HEXAGON_UVect2048 + +#else /* __Q6S_ARCH__ >= 65 */ + +// V65 Vector types +#if __HVX_ARCH__ >= 65 +#if defined __HVX__ && (__HVX_LENGTH__ == 128) + typedef long HEXAGON_VecPred128 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + + typedef long HEXAGON_Vect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + + typedef long HEXAGON_Vect2048 __attribute__((__vector_size__(256))) + __attribute__((aligned(256))); + + typedef long HEXAGON_UVect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(4))); + + typedef long HEXAGON_UVect2048 __attribute__((__vector_size__(256))) + __attribute__((aligned(4))); + + #define HVX_VectorPred HEXAGON_VecPred128 + #define HVX_Vector HEXAGON_Vect1024 + #define HVX_VectorPair HEXAGON_Vect2048 + #define HVX_UVector HEXAGON_UVect1024 + #define HVX_UVectorPair HEXAGON_UVect2048 +#else /* defined __HVX__ && (__HVX_LENGTH__ == 128) */ +#if defined __HVX__ && (__HVX_LENGTH__ == 64) + typedef long HEXAGON_VecPred64 __attribute__((__vector_size__(64))) + __attribute__((aligned(64))); + + typedef long HEXAGON_Vect512 __attribute__((__vector_size__(64))) + __attribute__((aligned(64))); + + typedef long HEXAGON_Vect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + + typedef long HEXAGON_UVect512 __attribute__((__vector_size__(64))) + __attribute__((aligned(4))); + + typedef long HEXAGON_UVect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(4))); + + #define HVX_VectorPred HEXAGON_VecPred64 + #define HVX_Vector HEXAGON_Vect512 + #define HVX_VectorPair HEXAGON_Vect1024 + #define HVX_UVector HEXAGON_UVect512 + #define HVX_UVectorPair HEXAGON_UVect1024 +#endif /* defined __HVX__ && (__HVX_LENGTH__ == 64) */ +#endif /* defined __HVX__ && (__HVX_LENGTH__ == 128) */ +#endif /* __HVX_ARCH__ >= 65 */ +#endif /* __Q6S_ARCH__ >= 65 */ + +/* Predicates */ + +typedef int HEXAGON_Pred; + +/*** + *** backward compatibility aliases + ***/ + +/* Old names */ +#define Q6Vect Q6Vect64 +#define Q6V_GET_D Q6V64_GET_D +#define Q6V_GET_UD Q6V64_GET_UD +#define Q6V_GET_W0 Q6V64_GET_W0 +#define Q6V_GET_W1 Q6V64_GET_W1 +#define Q6V_GET_UW0 Q6V64_GET_UW0 +#define Q6V_GET_UW1 Q6V64_GET_UW1 +#define Q6V_GET_H0 Q6V64_GET_H0 +#define Q6V_GET_H1 Q6V64_GET_H1 +#define Q6V_GET_H2 Q6V64_GET_H2 +#define Q6V_GET_H3 Q6V64_GET_H3 +#define Q6V_GET_UH0 Q6V64_GET_UH0 +#define Q6V_GET_UH1 Q6V64_GET_UH1 +#define Q6V_GET_UH2 Q6V64_GET_UH2 +#define Q6V_GET_UH3 Q6V64_GET_UH3 +#define Q6V_GET_B0 Q6V64_GET_B0 +#define Q6V_GET_B1 Q6V64_GET_B1 +#define Q6V_GET_B2 Q6V64_GET_B2 +#define Q6V_GET_B3 Q6V64_GET_B3 +#define Q6V_GET_B4 Q6V64_GET_B4 +#define Q6V_GET_B5 Q6V64_GET_B5 +#define Q6V_GET_B6 Q6V64_GET_B6 +#define Q6V_GET_B7 Q6V64_GET_B7 +#define Q6V_GET_UB0 Q6V64_GET_UB0 +#define Q6V_GET_UB1 Q6V64_GET_UB1 +#define Q6V_GET_UB2 Q6V64_GET_UB2 +#define Q6V_GET_UB3 Q6V64_GET_UB3 +#define Q6V_GET_UB4 Q6V64_GET_UB4 +#define Q6V_GET_UB5 Q6V64_GET_UB5 +#define Q6V_GET_UB6 Q6V64_GET_UB6 +#define Q6V_GET_UB7 Q6V64_GET_UB7 +#define Q6V_PUT_D Q6V64_PUT_D +#define Q6V_PUT_W0 Q6V64_PUT_W0 +#define Q6V_PUT_W1 Q6V64_PUT_W1 +#define Q6V_PUT_H0 Q6V64_PUT_H0 +#define Q6V_PUT_H1 Q6V64_PUT_H1 +#define Q6V_PUT_H2 Q6V64_PUT_H2 +#define Q6V_PUT_H3 Q6V64_PUT_H3 +#define Q6V_PUT_B0 Q6V64_PUT_B0 +#define Q6V_PUT_B1 Q6V64_PUT_B1 +#define Q6V_PUT_B2 Q6V64_PUT_B2 +#define Q6V_PUT_B3 Q6V64_PUT_B3 +#define Q6V_PUT_B4 Q6V64_PUT_B4 +#define Q6V_PUT_B5 Q6V64_PUT_B5 +#define Q6V_PUT_B6 Q6V64_PUT_B6 +#define Q6V_PUT_B7 Q6V64_PUT_B7 +#define Q6V_CREATE_D Q6V64_CREATE_D +#define Q6V_CREATE_W Q6V64_CREATE_W +#define Q6V_CREATE_H Q6V64_CREATE_H +#define Q6V_CREATE_B Q6V64_CREATE_B + +#ifdef __cplusplus +#define Q6VectC Q6Vect64C +#endif /* __cplusplus */ + +/* 64 Bit Vectors */ + +typedef long long __attribute__((__may_alias__)) Q6Vect64; + +/* Extract doubleword macros */ + +#define Q6V64_GET_D(v) (v) +#define Q6V64_GET_UD(v) ((unsigned long long)(v)) + +/* Extract word macros */ + +#define Q6V64_GET_W0(v) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.w[0]; \ + }) +#define Q6V64_GET_W1(v) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.w[1]; \ + }) +#define Q6V64_GET_UW0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned int uw[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uw[0]; \ + }) +#define Q6V64_GET_UW1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned int uw[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uw[1]; \ + }) + +/* Extract half word macros */ + +#define Q6V64_GET_H0(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[0]; \ + }) +#define Q6V64_GET_H1(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[1]; \ + }) +#define Q6V64_GET_H2(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[2]; \ + }) +#define Q6V64_GET_H3(v) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[3]; \ + }) +#define Q6V64_GET_UH0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uh[0]; \ + }) +#define Q6V64_GET_UH1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uh[1]; \ + }) +#define Q6V64_GET_UH2(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uh[2]; \ + }) +#define Q6V64_GET_UH3(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned short uh[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.uh[3]; \ + }) + +/* Extract byte macros */ + +#define Q6V64_GET_B0(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[0]; \ + }) +#define Q6V64_GET_B1(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[1]; \ + }) +#define Q6V64_GET_B2(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[2]; \ + }) +#define Q6V64_GET_B3(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[3]; \ + }) +#define Q6V64_GET_B4(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[4]; \ + }) +#define Q6V64_GET_B5(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[5]; \ + }) +#define Q6V64_GET_B6(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[6]; \ + }) +#define Q6V64_GET_B7(v) \ + __extension__({ \ + union { \ + long long d; \ + signed char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[7]; \ + }) +#define Q6V64_GET_UB0(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[0]; \ + }) +#define Q6V64_GET_UB1(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[1]; \ + }) +#define Q6V64_GET_UB2(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[2]; \ + }) +#define Q6V64_GET_UB3(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[3]; \ + }) +#define Q6V64_GET_UB4(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[4]; \ + }) +#define Q6V64_GET_UB5(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[5]; \ + }) +#define Q6V64_GET_UB6(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[6]; \ + }) +#define Q6V64_GET_UB7(v) \ + __extension__({ \ + union { \ + long long d; \ + unsigned char ub[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.ub[7]; \ + }) + +/* NOTE: All set macros return a Q6Vect64 type */ + +/* Set doubleword macro */ + +#define Q6V64_PUT_D(v, new) (new) + +/* Set word macros */ + +#ifdef __qdsp6__ + +#define Q6V64_PUT_W0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.w[0] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_W1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.w[1] = (new); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_PUT_W0(v, new) \ + (((v) & 0xffffffff00000000LL) | ((Q6Vect64)((unsigned int)(new)))) +#define Q6V64_PUT_W1(v, new) \ + (((v) & 0x00000000ffffffffLL) | (((Q6Vect64)(new)) << 32LL)) + +#endif /* !__qdsp6__ */ + +/* Set half word macros */ + +#ifdef __qdsp6__ + +#define Q6V64_PUT_H0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[0] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_H1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[1] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_H2(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[2] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_H3(v, new) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.h[3] = (new); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_PUT_H0(v, new) \ + (((v) & 0xffffffffffff0000LL) | ((Q6Vect64)((unsigned short)(new)))) +#define Q6V64_PUT_H1(v, new) \ + (((v) & 0xffffffff0000ffffLL) | (((Q6Vect64)((unsigned short)(new))) << 16LL)) +#define Q6V64_PUT_H2(v, new) \ + (((v) & 0xffff0000ffffffffLL) | (((Q6Vect64)((unsigned short)(new))) << 32LL)) +#define Q6V64_PUT_H3(v, new) \ + (((v) & 0x0000ffffffffffffLL) | (((Q6Vect64)(new)) << 48LL)) + +#endif /* !__qdsp6__ */ + +/* Set byte macros */ + +#ifdef __qdsp6__ + +#define Q6V64_PUT_B0(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[0] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B1(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[1] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B2(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[2] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B3(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[3] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B4(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[4] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B5(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[5] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B6(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[6] = (new); \ + _Q6V64_internal_union.d; \ + }) +#define Q6V64_PUT_B7(v, new) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.d = (v); \ + _Q6V64_internal_union.b[7] = (new); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_PUT_B0(v, new) \ + (((v) & 0xffffffffffffff00LL) | ((Q6Vect64)((unsigned char)(new)))) +#define Q6V64_PUT_B1(v, new) \ + (((v) & 0xffffffffffff00ffLL) | (((Q6Vect64)((unsigned char)(new))) << 8LL)) +#define Q6V64_PUT_B2(v, new) \ + (((v) & 0xffffffffff00ffffLL) | (((Q6Vect64)((unsigned char)(new))) << 16LL)) +#define Q6V64_PUT_B3(v, new) \ + (((v) & 0xffffffff00ffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 24LL)) +#define Q6V64_PUT_B4(v, new) \ + (((v) & 0xffffff00ffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 32LL)) +#define Q6V64_PUT_B5(v, new) \ + (((v) & 0xffff00ffffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 40LL)) +#define Q6V64_PUT_B6(v, new) \ + (((v) & 0xff00ffffffffffffLL) | (((Q6Vect64)((unsigned char)(new))) << 48LL)) +#define Q6V64_PUT_B7(v, new) \ + (((v) & 0x00ffffffffffffffLL) | (((Q6Vect64)(new)) << 56LL)) + +#endif /* !__qdsp6__ */ + +/* NOTE: All create macros return a Q6Vect64 type */ + +/* Create from a doubleword */ + +#define Q6V64_CREATE_D(d) (d) + +/* Create from words */ + +#ifdef __qdsp6__ + +#define Q6V64_CREATE_W(w1, w0) \ + __extension__({ \ + union { \ + long long d; \ + int w[2]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.w[0] = (w0); \ + _Q6V64_internal_union.w[1] = (w1); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_CREATE_W(w1, w0) \ + ((((Q6Vect64)(w1)) << 32LL) | ((Q6Vect64)((w0) & 0xffffffff))) + +#endif /* !__qdsp6__ */ + +/* Create from half words */ + +#ifdef __qdsp6__ + +#define Q6V64_CREATE_H(h3, h2, h1, h0) \ + __extension__({ \ + union { \ + long long d; \ + short h[4]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.h[0] = (h0); \ + _Q6V64_internal_union.h[1] = (h1); \ + _Q6V64_internal_union.h[2] = (h2); \ + _Q6V64_internal_union.h[3] = (h3); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_CREATE_H(h3, h2, h1, h0) \ + ((((Q6Vect64)(h3)) << 48LL) | (((Q6Vect64)((h2) & 0xffff)) << 32LL) | \ + (((Q6Vect64)((h1) & 0xffff)) << 16LL) | ((Q6Vect64)((h0) & 0xffff))) + +#endif /* !__qdsp6__ */ + +/* Create from bytes */ + +#ifdef __qdsp6__ + +#define Q6V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \ + __extension__({ \ + union { \ + long long d; \ + char b[8]; \ + } _Q6V64_internal_union; \ + _Q6V64_internal_union.b[0] = (b0); \ + _Q6V64_internal_union.b[1] = (b1); \ + _Q6V64_internal_union.b[2] = (b2); \ + _Q6V64_internal_union.b[3] = (b3); \ + _Q6V64_internal_union.b[4] = (b4); \ + _Q6V64_internal_union.b[5] = (b5); \ + _Q6V64_internal_union.b[6] = (b6); \ + _Q6V64_internal_union.b[7] = (b7); \ + _Q6V64_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0) \ + ((((Q6Vect64)(b7)) << 56LL) | (((Q6Vect64)((b6) & 0xff)) << 48LL) | \ + (((Q6Vect64)((b5) & 0xff)) << 40LL) | (((Q6Vect64)((b4) & 0xff)) << 32LL) | \ + (((Q6Vect64)((b3) & 0xff)) << 24LL) | (((Q6Vect64)((b2) & 0xff)) << 16LL) | \ + (((Q6Vect64)((b1) & 0xff)) << 8LL) | ((Q6Vect64)((b0) & 0xff))) + +#endif /* !__qdsp6__ */ + +#ifdef __cplusplus + +class Q6Vect64C { +public: + // Constructors + Q6Vect64C(long long d = 0) : data(d) {}; + Q6Vect64C(int w1, int w0) : data(Q6V64_CREATE_W(w1, w0)) {}; + Q6Vect64C(short h3, short h2, short h1, short h0) + : data(Q6V64_CREATE_H(h3, h2, h1, h0)) {}; + Q6Vect64C(signed char b7, signed char b6, signed char b5, signed char b4, + signed char b3, signed char b2, signed char b1, signed char b0) + : data(Q6V64_CREATE_B(b7, b6, b5, b4, b3, b2, b1, b0)) {}; + Q6Vect64C(const Q6Vect64C &v) : data(v.data) {}; + + Q6Vect64C &operator=(const Q6Vect64C &v) { + data = v.data; + return *this; + }; + + operator long long() { + return data; + }; + + // Extract doubleword methods + long long D(void) { + return Q6V64_GET_D(data); + }; + unsigned long long UD(void) { + return Q6V64_GET_UD(data); + }; + + // Extract word methods + int W0(void) { + return Q6V64_GET_W0(data); + }; + int W1(void) { + return Q6V64_GET_W1(data); + }; + unsigned int UW0(void) { + return Q6V64_GET_UW0(data); + }; + unsigned int UW1(void) { + return Q6V64_GET_UW1(data); + }; + + // Extract half word methods + short H0(void) { + return Q6V64_GET_H0(data); + }; + short H1(void) { + return Q6V64_GET_H1(data); + }; + short H2(void) { + return Q6V64_GET_H2(data); + }; + short H3(void) { + return Q6V64_GET_H3(data); + }; + unsigned short UH0(void) { + return Q6V64_GET_UH0(data); + }; + unsigned short UH1(void) { + return Q6V64_GET_UH1(data); + }; + unsigned short UH2(void) { + return Q6V64_GET_UH2(data); + }; + unsigned short UH3(void) { + return Q6V64_GET_UH3(data); + }; + + // Extract byte methods + signed char B0(void) { + return Q6V64_GET_B0(data); + }; + signed char B1(void) { + return Q6V64_GET_B1(data); + }; + signed char B2(void) { + return Q6V64_GET_B2(data); + }; + signed char B3(void) { + return Q6V64_GET_B3(data); + }; + signed char B4(void) { + return Q6V64_GET_B4(data); + }; + signed char B5(void) { + return Q6V64_GET_B5(data); + }; + signed char B6(void) { + return Q6V64_GET_B6(data); + }; + signed char B7(void) { + return Q6V64_GET_B7(data); + }; + unsigned char UB0(void) { + return Q6V64_GET_UB0(data); + }; + unsigned char UB1(void) { + return Q6V64_GET_UB1(data); + }; + unsigned char UB2(void) { + return Q6V64_GET_UB2(data); + }; + unsigned char UB3(void) { + return Q6V64_GET_UB3(data); + }; + unsigned char UB4(void) { + return Q6V64_GET_UB4(data); + }; + unsigned char UB5(void) { + return Q6V64_GET_UB5(data); + }; + unsigned char UB6(void) { + return Q6V64_GET_UB6(data); + }; + unsigned char UB7(void) { + return Q6V64_GET_UB7(data); + }; + + // NOTE: All set methods return a Q6Vect64C type + + // Set doubleword method + Q6Vect64C D(long long d) { + return Q6Vect64C(Q6V64_PUT_D(data, d)); + }; + + // Set word methods + Q6Vect64C W0(int w) { + return Q6Vect64C(Q6V64_PUT_W0(data, w)); + }; + Q6Vect64C W1(int w) { + return Q6Vect64C(Q6V64_PUT_W1(data, w)); + }; + + // Set half word methods + Q6Vect64C H0(short h) { + return Q6Vect64C(Q6V64_PUT_H0(data, h)); + }; + Q6Vect64C H1(short h) { + return Q6Vect64C(Q6V64_PUT_H1(data, h)); + }; + Q6Vect64C H2(short h) { + return Q6Vect64C(Q6V64_PUT_H2(data, h)); + }; + Q6Vect64C H3(short h) { + return Q6Vect64C(Q6V64_PUT_H3(data, h)); + }; + + // Set byte methods + Q6Vect64C B0(signed char b) { + return Q6Vect64C(Q6V64_PUT_B0(data, b)); + }; + Q6Vect64C B1(signed char b) { + return Q6Vect64C(Q6V64_PUT_B1(data, b)); + }; + Q6Vect64C B2(signed char b) { + return Q6Vect64C(Q6V64_PUT_B2(data, b)); + }; + Q6Vect64C B3(signed char b) { + return Q6Vect64C(Q6V64_PUT_B3(data, b)); + }; + Q6Vect64C B4(signed char b) { + return Q6Vect64C(Q6V64_PUT_B4(data, b)); + }; + Q6Vect64C B5(signed char b) { + return Q6Vect64C(Q6V64_PUT_B5(data, b)); + }; + Q6Vect64C B6(signed char b) { + return Q6Vect64C(Q6V64_PUT_B6(data, b)); + }; + Q6Vect64C B7(signed char b) { + return Q6Vect64C(Q6V64_PUT_B7(data, b)); + }; + +private: + long long data; +}; + +#endif /* __cplusplus */ + +/* 32 Bit Vectors */ + +typedef int Q6Vect32; + +/* Extract word macros */ + +#define Q6V32_GET_W(v) (v) +#define Q6V32_GET_UW(v) ((unsigned int)(v)) + +/* Extract half word macros */ + +#define Q6V32_GET_H0(v) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.h[0]; \ + }) +#define Q6V32_GET_H1(v) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.h[1]; \ + }) +#define Q6V32_GET_UH0(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned short uh[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.uh[0]; \ + }) +#define Q6V32_GET_UH1(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned short uh[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.uh[1]; \ + }) + +/* Extract byte macros */ + +#define Q6V32_GET_B0(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[0]; \ + }) +#define Q6V32_GET_B1(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[1]; \ + }) +#define Q6V32_GET_B2(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[2]; \ + }) +#define Q6V32_GET_B3(v) \ + __extension__({ \ + union { \ + int w; \ + signed char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[3]; \ + }) +#define Q6V32_GET_UB0(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.ub[0]; \ + }) +#define Q6V32_GET_UB1(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.ub[1]; \ + }) +#define Q6V32_GET_UB2(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.ub[2]; \ + }) +#define Q6V32_GET_UB3(v) \ + __extension__({ \ + union { \ + int w; \ + unsigned char ub[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.ub[3]; \ + }) + +/* NOTE: All set macros return a Q6Vect32 type */ + +/* Set word macro */ + +#define Q6V32_PUT_W(v, new) (new) + +/* Set half word macros */ + +#ifdef __qdsp6__ + +#define Q6V32_PUT_H0(v, new) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.h[0] = (new); \ + _Q6V32_internal_union.w; \ + }) +#define Q6V32_PUT_H1(v, new) \ + __extension__({ \ + union { \ + int w; \ + short h[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.h[1] = (new); \ + _Q6V32_internal_union.w; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V32_PUT_H0(v, new) \ + (((v) & 0xffff0000) | ((Q6Vect32)((unsigned short)(new)))) +#define Q6V32_PUT_H1(v, new) (((v) & 0x0000ffff) | (((Q6Vect32)(new)) << 16)) + +#endif /* !__qdsp6__ */ + +/* Set byte macros */ + +#ifdef __qdsp6__ + +#define Q6V32_PUT_B0(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[0] = (new); \ + _Q6V32_internal_union.w; \ + }) +#define Q6V32_PUT_B1(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[1] = (new); \ + _Q6V32_internal_union.w; \ + }) +#define Q6V32_PUT_B2(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[2] = (new); \ + _Q6V32_internal_union.w; \ + }) +#define Q6V32_PUT_B3(v, new) \ + __extension__({ \ + union { \ + int w; \ + char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.w = (v); \ + _Q6V32_internal_union.b[3] = (new); \ + _Q6V32_internal_union.w; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V32_PUT_B0(v, new) \ + (((v) & 0xffffff00) | ((Q6Vect32)((unsigned char)(new)))) +#define Q6V32_PUT_B1(v, new) \ + (((v) & 0xffff00ff) | (((Q6Vect32)((unsigned char)(new))) << 8)) +#define Q6V32_PUT_B2(v, new) \ + (((v) & 0xff00ffff) | (((Q6Vect32)((unsigned char)(new))) << 16)) +#define Q6V32_PUT_B3(v, new) (((v) & 0x00ffffff) | (((Q6Vect32)(new)) << 24)) + +#endif /* !__qdsp6__ */ + +/* NOTE: All create macros return a Q6Vect32 type */ + +/* Create from a word */ + +#define Q6V32_CREATE_W(w) (w) + +/* Create from half words */ + +#ifdef __qdsp6__ + +#define Q6V32_CREATE_H(h1, h0) \ + __extension__({ \ + union { \ + long long d; \ + short h[2]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.h[0] = (h0); \ + _Q6V32_internal_union.h[1] = (h1); \ + _Q6V32_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V32_CREATE_H(h1, h0) \ + ((((Q6Vect32)(h1)) << 16) | ((Q6Vect32)((h0) & 0xffff))) + +#endif /* !__qdsp6__ */ + +/* Create from bytes */ +#ifdef __qdsp6__ + +#define Q6V32_CREATE_B(b3, b2, b1, b0) \ + __extension__({ \ + union { \ + long long d; \ + char b[4]; \ + } _Q6V32_internal_union; \ + _Q6V32_internal_union.b[0] = (b0); \ + _Q6V32_internal_union.b[1] = (b1); \ + _Q6V32_internal_union.b[2] = (b2); \ + _Q6V32_internal_union.b[3] = (b3); \ + _Q6V32_internal_union.d; \ + }) + +#else /* !__qdsp6__ */ + +#define Q6V32_CREATE_B(b3, b2, b1, b0) \ + ((((Q6Vect32)(b3)) << 24) | (((Q6Vect32)((b2) & 0xff)) << 16) | \ + (((Q6Vect32)((b1) & 0xff)) << 8) | ((Q6Vect32)((b0) & 0xff))) + +#endif /* !__qdsp6__ */ + +#ifdef __cplusplus + +class Q6Vect32C { +public: + // Constructors + Q6Vect32C(int w = 0) : data(w) {}; + Q6Vect32C(short h1, short h0) : data(Q6V32_CREATE_H(h1, h0)) {}; + Q6Vect32C(signed char b3, signed char b2, signed char b1, signed char b0) + : data(Q6V32_CREATE_B(b3, b2, b1, b0)) {}; + Q6Vect32C(const Q6Vect32C &v) : data(v.data) {}; + + Q6Vect32C &operator=(const Q6Vect32C &v) { + data = v.data; + return *this; + }; + + operator int() { + return data; + }; + + // Extract word methods + int W(void) { + return Q6V32_GET_W(data); + }; + unsigned int UW(void) { + return Q6V32_GET_UW(data); + }; + + // Extract half word methods + short H0(void) { + return Q6V32_GET_H0(data); + }; + short H1(void) { + return Q6V32_GET_H1(data); + }; + unsigned short UH0(void) { + return Q6V32_GET_UH0(data); + }; + unsigned short UH1(void) { + return Q6V32_GET_UH1(data); + }; + + // Extract byte methods + signed char B0(void) { + return Q6V32_GET_B0(data); + }; + signed char B1(void) { + return Q6V32_GET_B1(data); + }; + signed char B2(void) { + return Q6V32_GET_B2(data); + }; + signed char B3(void) { + return Q6V32_GET_B3(data); + }; + unsigned char UB0(void) { + return Q6V32_GET_UB0(data); + }; + unsigned char UB1(void) { + return Q6V32_GET_UB1(data); + }; + unsigned char UB2(void) { + return Q6V32_GET_UB2(data); + }; + unsigned char UB3(void) { + return Q6V32_GET_UB3(data); + }; + + // NOTE: All set methods return a Q6Vect32C type + + // Set word method + Q6Vect32C W(int w) { + return Q6Vect32C(Q6V32_PUT_W(data, w)); + }; + + // Set half word methods + Q6Vect32C H0(short h) { + return Q6Vect32C(Q6V32_PUT_H0(data, h)); + }; + Q6Vect32C H1(short h) { + return Q6Vect32C(Q6V32_PUT_H1(data, h)); + }; + + // Set byte methods + Q6Vect32C B0(signed char b) { + return Q6Vect32C(Q6V32_PUT_B0(data, b)); + }; + Q6Vect32C B1(signed char b) { + return Q6Vect32C(Q6V32_PUT_B1(data, b)); + }; + Q6Vect32C B2(signed char b) { + return Q6Vect32C(Q6V32_PUT_B2(data, b)); + }; + Q6Vect32C B3(signed char b) { + return Q6Vect32C(Q6V32_PUT_B3(data, b)); + }; + +private: + int data; +}; + +#endif /* __cplusplus */ + +// V65 Vector types +#if __HVX_ARCH__ >= 65 +#if defined __HVX__ && (__HVX_LENGTH__ == 128) +typedef long Q6VecPred128 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + +typedef long Q6Vect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + +typedef long Q6Vect2048 __attribute__((__vector_size__(256))) + __attribute__((aligned(256))); + +#else /* defined __HVX__ && (__HVX_LENGTH__ == 128) */ +#if defined __HVX__ && (__HVX_LENGTH__ == 64) +typedef long Q6VecPred64 __attribute__((__vector_size__(64))) + __attribute__((aligned(64))); + +typedef long Q6Vect512 __attribute__((__vector_size__(64))) + __attribute__((aligned(64))); + +typedef long Q6Vect1024 __attribute__((__vector_size__(128))) + __attribute__((aligned(128))); + +#endif /* defined __HVX__ && (__HVX_LENGTH__ == 64) */ +#endif /* defined __HVX__ && (__HVX_LENGTH__ == 128) */ +#endif /* __HVX_ARCH__ >= 65 */ + +/* Predicates */ + +typedef int Q6Pred; + + +#ifdef __HVX__ + +// Extract HVX VectorPair macro. +#define HEXAGON_HVX_GET_W(v) (v) + +// Extract HVX Vector macros. +#define HEXAGON_HVX_GET_V0(v) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_Vector V[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.V[0]; \ + }) +#define HEXAGON_HVX_GET_V1(v) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_Vector V[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.V[1]; \ + }) +#define HEXAGON_HVX_GET_P(v) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_VectorPred P[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.P[0]; \ + }) + +// Set HVX VectorPair macro. +#define HEXAGON_HVX_PUT_W(v, new) (new) + +// Set HVX Vector macros. +#define HEXAGON_HVX_PUT_V0(v, new) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_Vector V[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.V[0] = (new); \ + _HEXAGON_HVX_internal_union.W; \ + }) + +#define HEXAGON_HVX_PUT_V1(v, new) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_Vector V[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.V[1] = (new); \ + _HEXAGON_HVX_internal_union.W; \ + }) + +#define HEXAGON_HVX_PUT_P(v, new) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_VectorPred P[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.W = (v); \ + _HEXAGON_HVX_internal_union.P[0] = (new); \ + _HEXAGON_HVX_internal_union.W; \ + }) + + +#define HEXAGON_HVX_CREATE_W(v1, v0) \ + __extension__({ \ + union { \ + HVX_VectorPair W; \ + HVX_Vector V[2]; \ + } _HEXAGON_HVX_internal_union; \ + _HEXAGON_HVX_internal_union.V[0] = (v0); \ + _HEXAGON_HVX_internal_union.V[1] = (v1); \ + _HEXAGON_HVX_internal_union.W; \ + }) + +#ifdef __cplusplus + +class HVX_Vect { +public: + // Constructors. + // Default. + HVX_Vect() : data(Q6_W_vcombine_VV(Q6_V_vzero(), Q6_V_vzero())){}; + + // Custom constructors. + HVX_Vect(HVX_VectorPair W) : data(W){}; + HVX_Vect(HVX_Vector v1, HVX_Vector v0) : data(HEXAGON_HVX_CREATE_W(v1, v0)){}; + + // Copy constructor. + HVX_Vect(const HVX_Vect &W) = default; + + // Move constructor. + HVX_Vect(HVX_Vect &&W) = default; + + // Assignment operator. + HVX_Vect &operator=(const HVX_Vect &W) = default; + + operator HVX_VectorPair() { return data; }; + + // Extract VectorPair method. + HVX_VectorPair W(void) { return HEXAGON_HVX_GET_W(data); }; + + // Extract Vector methods. + HVX_Vector V0(void) { return HEXAGON_HVX_GET_V0(data); }; + HVX_Vector V1(void) { return HEXAGON_HVX_GET_V1(data); }; + HVX_VectorPred P(void) { return HEXAGON_HVX_GET_P(data); }; + + // NOTE: All set methods return a HVX_Vect type. + // Set HVX VectorPair method. + HVX_Vect W(HVX_VectorPair w) { return HVX_Vect(HEXAGON_HVX_PUT_W(data, w)); }; + + // Set HVX Vector methods. + HVX_Vect V0(HVX_Vector v) { return HVX_Vect(HEXAGON_HVX_PUT_V0(data, v)); }; + HVX_Vect V1(HVX_Vector v) { return HVX_Vect(HEXAGON_HVX_PUT_V1(data, v)); }; + HVX_Vect P(HVX_VectorPred p) { return HVX_Vect(HEXAGON_HVX_PUT_P(data, p)); }; + +private: + HVX_VectorPair data; +}; + +#endif /* __cplusplus */ +#endif /* __HVX__ */ + +#define HEXAGON_UDMA_DM0_STATUS_IDLE 0x00000000 +#define HEXAGON_UDMA_DM0_STATUS_RUN 0x00000001 +#define HEXAGON_UDMA_DM0_STATUS_ERROR 0x00000002 +#define HEXAGON_UDMA_DESC_DSTATE_INCOMPLETE 0 +#define HEXAGON_UDMA_DESC_DSTATE_COMPLETE 1 +#define HEXAGON_UDMA_DESC_ORDER_NOORDER 0 +#define HEXAGON_UDMA_DESC_ORDER_ORDER 1 +#define HEXAGON_UDMA_DESC_BYPASS_OFF 0 +#define HEXAGON_UDMA_DESC_BYPASS_ON 1 +#define HEXAGON_UDMA_DESC_COMP_NONE 0 +#define HEXAGON_UDMA_DESC_COMP_DLBC 1 +#define HEXAGON_UDMA_DESC_DESCTYPE_TYPE0 0 +#define HEXAGON_UDMA_DESC_DESCTYPE_TYPE1 1 + +typedef struct hexagon_udma_descriptor_type0_s +{ + void *next; + unsigned int length:24; + unsigned int desctype:2; + unsigned int dstcomp:1; + unsigned int srccomp:1; + unsigned int dstbypass:1; + unsigned int srcbypass:1; + unsigned int order:1; + unsigned int dstate:1; + void *src; + void *dst; +} hexagon_udma_descriptor_type0_t; + +typedef struct hexagon_udma_descriptor_type1_s +{ + void *next; + unsigned int length:24; + unsigned int desctype:2; + unsigned int dstcomp:1; + unsigned int srccomp:1; + unsigned int dstbypass:1; + unsigned int srcbypass:1; + unsigned int order:1; + unsigned int dstate:1; + void *src; + void *dst; + unsigned int allocation:28; + unsigned int padding:4; + unsigned int roiwidth:16; + unsigned int roiheight:16; + unsigned int srcstride:16; + unsigned int dststride:16; + unsigned int srcwidthoffset:16; + unsigned int dstwidthoffset:16; +} hexagon_udma_descriptor_type1_t; + +#endif /* !HEXAGON_TYPES_H */ diff --git a/clang/lib/Headers/hvx_hexagon_protos.h b/clang/lib/Headers/hvx_hexagon_protos.h new file mode 100644 index 0000000000000..41ce7a6b93e93 --- /dev/null +++ b/clang/lib/Headers/hvx_hexagon_protos.h @@ -0,0 +1,4392 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// Automatically generated file, do not edit! +//===----------------------------------------------------------------------===// + + + +#ifndef _HVX_HEXAGON_PROTOS_H_ +#define _HVX_HEXAGON_PROTOS_H_ 1 + +#ifdef __HVX__ +#if __HVX_LENGTH__ == 128 +#define __BUILTIN_VECTOR_WRAP(a) a ## _128B +#else +#define __BUILTIN_VECTOR_WRAP(a) a +#endif + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Rd32=vextract(Vu32,Rs32) + C Intrinsic Prototype: Word32 Q6_R_vextract_VR(HVX_Vector Vu, Word32 Rs) + Instruction Type: LD + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_R_vextract_VR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_extractw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=hi(Vss32) + C Intrinsic Prototype: HVX_Vector Q6_V_hi_W(HVX_VectorPair Vss) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_hi_W __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_hi) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=lo(Vss32) + C Intrinsic Prototype: HVX_Vector Q6_V_lo_W(HVX_VectorPair Vss) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_lo_W __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lo) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vsplat(Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vsplat_R(Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_V_vsplat_R __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplatw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=and(Qs4,Qt4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_and_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_and_QQ __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_and) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=and(Qs4,!Qt4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_and_QQn(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_and_QQn __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_and_n) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=not(Qs4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_not_Q(HVX_VectorPred Qs) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_not_Q __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_not) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=or(Qs4,Qt4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_or_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_or_QQ __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_or) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=or(Qs4,!Qt4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_or_QQn(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_or_QQn __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_or_n) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vsetq(Rt32) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vsetq_R(Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vsetq_R __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_scalar2) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=xor(Qs4,Qt4) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_xor_QQ(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_xor_QQ __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_xor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) vmem(Rt32+#s4)=Vs32 + C Intrinsic Prototype: void Q6_vmem_QnRIV(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) + Instruction Type: CVI_VM_ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmem_QnRIV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nqpred_ai) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) vmem(Rt32+#s4):nt=Vs32 + C Intrinsic Prototype: void Q6_vmem_QnRIV_nt(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) + Instruction Type: CVI_VM_ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmem_QnRIV_nt __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) vmem(Rt32+#s4):nt=Vs32 + C Intrinsic Prototype: void Q6_vmem_QRIV_nt(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) + Instruction Type: CVI_VM_ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmem_QRIV_nt __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_nt_qpred_ai) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) vmem(Rt32+#s4)=Vs32 + C Intrinsic Prototype: void Q6_vmem_QRIV(HVX_VectorPred Qv, HVX_Vector* Rt, HVX_Vector Vs) + Instruction Type: CVI_VM_ST + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vmem_QRIV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vS32b_qpred_ai) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vabsdiff(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vabsdiff_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuh_vabsdiff_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vabsdiff(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vabsdiff_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vub_vabsdiff_VubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffub) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vabsdiff(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vabsdiff_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuh_vabsdiff_VuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffuh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vabsdiff(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vabsdiff_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vabsdiff_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsdiffw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vabs(Vu32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vabs_Vh(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vabs_Vh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vabs(Vu32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vabs_Vh_sat(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vabs_Vh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsh_sat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vabs(Vu32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vabs_Vw(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vabs_Vw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vabs(Vu32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vabs_Vw_sat(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vabs_Vw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsw_sat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vadd(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vadd_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vadd_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.b=vadd(Vuu32.b,Vvv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vadd_WbWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wb_vadd_WbWb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddb_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.b+=Vu32.b + C Intrinsic Prototype: HVX_Vector Q6_Vb_condacc_QnVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_condacc_QnVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbnq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.b+=Vu32.b + C Intrinsic Prototype: HVX_Vector Q6_Vb_condacc_QVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_condacc_QVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vadd(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vadd_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vadd(Vuu32.h,Vvv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_WhWh(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vadd_WhWh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddh_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.h+=Vu32.h + C Intrinsic Prototype: HVX_Vector Q6_Vh_condacc_QnVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_condacc_QnVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhnq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.h+=Vu32.h + C Intrinsic Prototype: HVX_Vector Q6_Vh_condacc_QVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_condacc_QVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vadd(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vadd_VhVh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vadd(Vuu32.h,Vvv32.h):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_WhWh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vadd_WhWh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhsat_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vadd(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vadd_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vadd(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vadd_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vadd_VubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vadd(Vu32.ub,Vv32.ub):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vadd_VubVub_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vadd_VubVub_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.ub=vadd(Vuu32.ub,Vvv32.ub):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wub_vadd_WubWub_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wub_vadd_WubWub_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubsat_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vadd(Vu32.uh,Vv32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vadd_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vadd_VuhVuh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vadd(Vuu32.uh,Vvv32.uh):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vadd_WuhWuh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuh_vadd_WuhWuh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhsat_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vadd(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vadd_VuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vadd_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vadd(Vuu32.w,Vvv32.w) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_WwWw(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vadd_WwWw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddw_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.w+=Vu32.w + C Intrinsic Prototype: HVX_Vector Q6_Vw_condacc_QnVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_condacc_QnVwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwnq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.w+=Vu32.w + C Intrinsic Prototype: HVX_Vector Q6_Vw_condacc_QVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_condacc_QVwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vadd_VwVw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vadd(Vuu32.w,Vvv32.w):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vadd_WwWw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vadd_WwWw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddwsat_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=valign(Vu32,Vv32,Rt8) + C Intrinsic Prototype: HVX_Vector Q6_V_valign_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_valign_VVR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valignb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=valign(Vu32,Vv32,#u3) + C Intrinsic Prototype: HVX_Vector Q6_V_valign_VVI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_valign_VVI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_valignbi) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vand(Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vand_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vand_VV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vand) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vand(Qu4,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vand_QR(HVX_VectorPred Qu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_V_vand_QR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32|=vand(Qu4,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vandor_VQR(HVX_Vector Vx, HVX_VectorPred Qu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_V_vandor_VQR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandqrt_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vand(Vu32,Rt32) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vand_VR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Q_vand_VR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vand(Vu32,Rt32) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vandor_QVR(HVX_VectorPred Qx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Q_vandor_QVR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvrt_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasl(Vu32.h,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasl_VhR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasl_VhR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasl(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasl_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasl_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslhv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vasl(Vu32.w,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vasl_VwR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vasl_VwR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vasl(Vu32.w,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vaslacc_VwVwR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vaslacc_VwVwR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslw_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vasl(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vasl_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vasl_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslwv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasr(Vu32.h,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VhR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasr_VhR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vasr_VhVhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vasr_VhVhR_rnd_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhbrndsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VhVhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vasr_VhVhR_rnd_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhubrndsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vasr(Vu32.h,Vv32.h,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VhVhR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vasr_VhVhR_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhubsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasr(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasr_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vasr(Vu32.w,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vasr_VwR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vasr_VwR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vasr(Vu32.w,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vasracc_VwVwR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vasracc_VwVwR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrw_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasr_VwVwR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasr_VwVwR_rnd_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwhrndsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vasr(Vu32.w,Vv32.w,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasr_VwVwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasr_VwVwR_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwhsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vasr(Vu32.w,Vv32.w,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_VwVwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vasr_VwVwR_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwuhsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vasr(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vasr_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vasr_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=Vu32 + C Intrinsic Prototype: HVX_Vector Q6_V_equals_V(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_equals_V __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassign) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32=Vuu32 + C Intrinsic Prototype: HVX_VectorPair Q6_W_equals_W(HVX_VectorPair Vuu) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_equals_W __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vassignp) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vavg(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vavg_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vavg_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vavg(Vu32.h,Vv32.h):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vh_vavg_VhVh_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vavg_VhVh_rnd __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavghrnd) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vavg(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vavg_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vavg_VubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgub) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vavg(Vu32.ub,Vv32.ub):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vub_vavg_VubVub_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vavg_VubVub_rnd __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgubrnd) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vavg(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vavg_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vavg_VuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vavg(Vu32.uh,Vv32.uh):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vavg_VuhVuh_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vavg_VuhVuh_rnd __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguhrnd) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vavg(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vavg_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vavg_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vavg(Vu32.w,Vv32.w):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vw_vavg_VwVw_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vavg_VwVw_rnd __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgwrnd) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vcl0(Vu32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vcl0_Vuh(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vcl0_Vuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcl0h) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vcl0(Vu32.uw) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vcl0_Vuw(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vcl0_Vuw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcl0w) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32=vcombine(Vu32,Vv32) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vcombine_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_vcombine_VV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vcombine) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=#0 + C Intrinsic Prototype: HVX_Vector Q6_V_vzero() + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vzero __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vd0) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vdeal(Vu32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vdeal_Vb(HVX_Vector Vu) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vdeal_Vb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vdeale(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vdeale_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vdeale_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealb4w) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vdeal(Vu32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vdeal_Vh(HVX_Vector Vu) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vdeal_Vh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32=vdeal(Vu32,Vv32,Rt8) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vdeal_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_vdeal_VVR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdealvdd) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vdelta(Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vdelta_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vdelta_VV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdelta) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vdmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vdmpy_VubRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vdmpy_VubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.h+=vdmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vdmpyacc_VhVubRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vdmpyacc_VhVubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vdmpy(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vdmpy_WubRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vdmpy_WubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vdmpy(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vdmpyacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vdmpyacc_WhWubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpybus_dv_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_VhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwVhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vdmpy(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vdmpy_WhRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vdmpy_WhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vdmpy(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vdmpyacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vdmpyacc_WwWhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhb_dv_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vuu32.h,Rt32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_WhRh_sat(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_WhRh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhisat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vuu32.h,Rt32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwWhRh_sat(HVX_Vector Vx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwWhRh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhisat_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRh_sat(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_VhRh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRh_sat(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwVhRh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsat_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vuu32.h,Rt32.uh,#1):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_WhRuh_sat(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_WhRuh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsuisat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vuu32.h,Rt32.uh,#1):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwWhRuh_sat(HVX_Vector Vx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwWhRuh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsuisat_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Rt32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhRuh_sat(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_VhRuh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsusat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Rt32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhRuh_sat(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwVhRuh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhsusat_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vdmpy(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpy_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpy_VhVh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhvsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vdmpy(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vdmpyacc_VwVhVh_sat(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vdmpyacc_VwVhVh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdmpyhvsat_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vdsad(Vuu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vdsad_WuhRuh(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vdsad_WuhRuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdsaduh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uw+=vdsad(Vuu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vdsadacc_WuwWuhRuh(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vdsadacc_WuwWuhRuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdsaduh_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.eq(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eq_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.eq(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqand_QVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_and) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.eq(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqor_QVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_or) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.eq(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqxacc_QVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqb_xor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.eq(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eq_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.eq(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqand_QVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_and) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.eq(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqor_QVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_or) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.eq(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqxacc_QVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqh_xor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.eq(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eq_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eq_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.eq(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqand_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqand_QVwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_and) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.eq(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqor_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqor_QVwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_or) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.eq(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_eqxacc_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_eqxacc_QVwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_veqw_xor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_and) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_or) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVbVb(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtb_xor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_and) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_or) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVhVh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgth_xor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_and) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_or) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVubVub(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtub_xor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_and) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_or) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVuhVuh(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuh_xor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VuwVuw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VuwVuw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVuwVuw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_and) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVuwVuw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_or) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVuwVuw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVuwVuw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtuw_xor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qd4=vcmp.gt(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gt_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gt_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4&=vcmp.gt(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtand_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtand_QVwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_and) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4|=vcmp.gt(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtor_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtor_QVwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_or) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Qx4^=vcmp.gt(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vcmp_gtxacc_QVwVw(HVX_VectorPred Qx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vcmp_gtxacc_QVwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgtw_xor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w=vinsert(Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vinsert_VwR(HVX_Vector Vx, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vinsert_VwR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vinsertwr) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vlalign(Vu32,Vv32,Rt8) + C Intrinsic Prototype: HVX_Vector Q6_V_vlalign_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vlalign_VVR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlalignb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vlalign(Vu32,Vv32,#u3) + C Intrinsic Prototype: HVX_Vector Q6_V_vlalign_VVI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vlalign_VVI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlalignbi) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vlsr(Vu32.uh,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vlsr_VuhR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vlsr_VuhR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vlsr(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vlsr_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vlsr_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrhv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vlsr(Vu32.uw,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vlsr_VuwR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vlsr_VuwR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vlsr(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vlsr_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vlsr_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrwv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vlut32(Vu32.b,Vv32.b,Rt8) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32_VbVbR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vlut32_VbVbR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.b|=vlut32(Vu32.b,Vv32.b,Rt8) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32or_VbVbVbR(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vlut32or_VbVbVbR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_oracc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vlut16(Vu32.b,Vv32.h,Rt8) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16_VbVhR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vlut16_VbVhR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h|=vlut16(Vu32.b,Vv32.h,Rt8) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16or_WhVbVhR(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vlut16or_WhVbVhR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_oracc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmax(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmax_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vmax_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vmax(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vmax_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vmax_VubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxub) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vmax(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vmax_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vmax_VuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxuh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmax(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmax_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vmax_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmin(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmin_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vmin_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vmin(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vmin_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vmin_VubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminub) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vmin(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vmin_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vmin_VuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminuh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmin(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmin_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vmin_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpa_WubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabus) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vmpa(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpaacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpaacc_WhWubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabus_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Vvv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpa_WubWb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabusv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Vvv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubWub(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpa_WubWub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuuv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vmpa(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpa_WhRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpa_WhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpa(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpaacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpaacc_WwWhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahb_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VubRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpy_VubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybus) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVubRb(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpyacc_WhVubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybus_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpy(Vu32.ub,Vv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VubVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpy_VubVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybusv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vmpy(Vu32.ub,Vv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVubVb(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpyacc_WhVubVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybusv_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpy(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpy_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpy_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vmpy(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpyacc_WhVbVb(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpyacc_WhVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpybv_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpye(Vu32.w,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpye_VwVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpye_VwVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyewuh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Rt32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhRh(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpy_VhRh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Rt32.h):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhRh_sat(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpyacc_WwVhRh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhsat_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhRh_s1_rnd_sat(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpy_VhRh_s1_rnd_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhsrs) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmpy(Vu32.h,Rt32.h):<<1:sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhRh_s1_sat(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpy_VhRh_s1_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhss) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpy_VhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhus) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpyacc_WwVhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhus_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vmpy(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpy_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpy_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhVh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpyacc_WwVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhv_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmpy(Vu32.h,Vv32.h):<<1:rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpy_VhVh_s1_rnd_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpy_VhVh_s1_rnd_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyhvsrs) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyieo(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieo_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyieo_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyieoh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyie(Vu32.w,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieacc_VwVwVh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyieacc_VwVwVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewh_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyie(Vu32.w,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyie_VwVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyie_VwVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewuh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyie(Vu32.w,Vv32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyieacc_VwVwVuh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyieacc_VwVwVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiewuh_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmpyi(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyi_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpyi_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyih) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.h+=vmpyi(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyiacc_VhVhVh(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpyiacc_VhVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyih_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vmpyi(Vu32.h,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyi_VhRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpyi_VhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyihb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.h+=vmpyi(Vu32.h,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpyiacc_VhVhRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vmpyiacc_VhVhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyihb_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyio(Vu32.w,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyio_VwVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyio_VwVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiowh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyi_VwRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyiacc_VwVwRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwb_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRh(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyi_VwRh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRh(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyiacc_VwVwRh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwh_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyo_VwVh_s1_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyo_VwVh_s1_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyo_VwVh_s1_rnd_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyo_VwVh_s1_rnd_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_rnd) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:rnd:sat:shift + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyoacc_VwVwVh_s1_rnd_sat_shift(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyoacc_VwVwVh_s1_rnd_sat_shift __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_rnd_sacc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyo(Vu32.w,Vv32.h):<<1:sat:shift + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyoacc_VwVwVh_s1_sat_shift(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyoacc_VwVwVh_s1_sat_shift __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_sacc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vmpy(Vu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpy_VubRub(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuh_vmpy_VubRub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyub) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uh+=vmpy(Vu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpyacc_WuhVubRub(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuh_vmpyacc_WuhVubRub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyub_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vmpy(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpy_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuh_vmpy_VubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyubv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uh+=vmpy(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vmpyacc_WuhVubVub(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuh_vmpyacc_WuhVubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyubv_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vmpy(Vu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpy_VuhRuh(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vmpy_VuhRuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uw+=vmpy(Vu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpyacc_WuwVuhRuh(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vmpyacc_WuwVuhRuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuh_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vmpy(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpy_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vmpy_VuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uw+=vmpy(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vmpyacc_WuwVuhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vmpyacc_WuwVuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhv_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vmux(Qt4,Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vmux_QVV(HVX_VectorPred Qt, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vmux_QVV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmux) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vnavg(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vnavg_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vnavg_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vnavg(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vnavg_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vnavg_VubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgub) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vnavg(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vnavg_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vnavg_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vnormamt(Vu32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vnormamt_Vh(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vnormamt_Vh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnormamth) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vnormamt(Vu32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vnormamt_Vw(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vnormamt_Vw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnormamtw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vnot(Vu32) + C Intrinsic Prototype: HVX_Vector Q6_V_vnot_V(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vnot_V __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnot) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vor(Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vor_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vor_VV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vpacke(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vpacke_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vpacke_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackeb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vpacke(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vpacke_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vpacke_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackeh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vpack(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vpack_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vpack_VhVh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackhb_sat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vpack(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vpack_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vpack_VhVh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackhub_sat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vpacko(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vpacko_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vpacko_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackob) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vpacko(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vpacko_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vpacko_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackoh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vpack(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vpack_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vpack_VwVw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackwh_sat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vpack(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vpack_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vpack_VwVw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpackwuh_sat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vpopcount(Vu32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vpopcount_Vh(HVX_Vector Vu) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vpopcount_Vh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vpopcounth) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vrdelta(Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vrdelta_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vrdelta_VV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrdelta) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vrmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VubRb(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpy_VubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybus) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vrmpy(Vu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVubRb(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpyacc_VwVubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybus_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vrmpy(Vuu32.ub,Rt32.b,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vrmpy_WubRbI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vrmpy_WubRbI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusi) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vrmpy(Vuu32.ub,Rt32.b,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vrmpyacc_WwWubRbI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vrmpyacc_WwWubRbI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusi_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vrmpy(Vu32.ub,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VubVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpy_VubVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vrmpy(Vu32.ub,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVubVb(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpyacc_VwVubVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybusv_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vrmpy(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpy_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpy_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vrmpy(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vrmpyacc_VwVbVb(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vrmpyacc_VwVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpybv_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vrmpy(Vu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpy_VubRub(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vrmpy_VubRub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyub) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.uw+=vrmpy(Vu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpyacc_VuwVubRub(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vrmpyacc_VuwVubRub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyub_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vrmpy(Vuu32.ub,Rt32.ub,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrmpy_WubRubI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vrmpy_WubRubI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubi) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uw+=vrmpy(Vuu32.ub,Rt32.ub,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrmpyacc_WuwWubRubI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vrmpyacc_WuwWubRubI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubi_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vrmpy(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpy_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vrmpy_VubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vx32.uw+=vrmpy(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrmpyacc_VuwVubVub(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vrmpyacc_VuwVubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrmpyubv_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vror(Vu32,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vror_VR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vror_VR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vror) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vround(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vround_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vround_VhVh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundhb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vround(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vround_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vround_VhVh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundhub) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vround(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vround_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vround_VwVw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundwh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vround(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vround_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vround_VwVw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vroundwuh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vrsad(Vuu32.ub,Rt32.ub,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrsad_WubRubI(HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vrsad_WubRubI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrsadubi) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.uw+=vrsad(Vuu32.ub,Rt32.ub,#u1) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vrsadacc_WuwWubRubI(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt, Word32 Iu1) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wuw_vrsadacc_WuwWubRubI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrsadubi_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vsat(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vsat_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vsat_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsathub) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vsat(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vsat_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vsat_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatwh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vsxt(Vu32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsxt_Vb(HVX_Vector Vu) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vsxt_Vb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vsxt(Vu32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsxt_Vh(HVX_Vector Vu) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vsxt_Vh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vshuffe(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuffe_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vshuffe_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufeh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vshuff(Vu32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuff_Vb(HVX_Vector Vu) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vshuff_Vb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vshuffe(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuffe_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vshuffe_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffeb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vshuff(Vu32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuff_Vh(HVX_Vector Vu) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vshuff_Vh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vshuffo(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vshuffo_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vshuffo_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffob) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32=vshuff(Vu32,Vv32,Rt8) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vshuff_VVR(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_vshuff_VVR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshuffvdd) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.b=vshuffoe(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vshuffoe_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wb_vshuffoe_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoeb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vshuffoe(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vshuffoe_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vshuffoe_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoeh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vshuffo(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vshuffo_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vshuffo_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vshufoh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.b=vsub(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vsub_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vsub_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.b=vsub(Vuu32.b,Vvv32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vsub_WbWb(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wb_vsub_WbWb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubb_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.b-=Vu32.b + C Intrinsic Prototype: HVX_Vector Q6_Vb_condnac_QnVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_condnac_QnVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbnq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.b-=Vu32.b + C Intrinsic Prototype: HVX_Vector Q6_Vb_condnac_QVbVb(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_condnac_QVbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vsub(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vsub_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vsub_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vsub(Vuu32.h,Vvv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_WhWh(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vsub_WhWh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubh_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.h-=Vu32.h + C Intrinsic Prototype: HVX_Vector Q6_Vh_condnac_QnVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_condnac_QnVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhnq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.h-=Vu32.h + C Intrinsic Prototype: HVX_Vector Q6_Vh_condnac_QVhVh(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_condnac_QVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.h=vsub(Vu32.h,Vv32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vsub_VhVh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vsub_VhVh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vsub(Vuu32.h,Vvv32.h):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_WhWh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vsub_WhWh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhsat_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vsub(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vsub_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubhw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vsub(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vsub_VubVub(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vsub_VubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vsub(Vu32.ub,Vv32.ub):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vsub_VubVub_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vsub_VubVub_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.ub=vsub(Vuu32.ub,Vvv32.ub):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wub_vsub_WubWub_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wub_vsub_WubWub_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsububsat_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vsub(Vu32.uh,Vv32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vsub_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vsub_VuhVuh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vsub(Vuu32.uh,Vvv32.uh):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vsub_WuhWuh_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuh_vsub_WuhWuh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhsat_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vsub(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_VuhVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vsub_VuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuhw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vsub_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubw) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vsub(Vuu32.w,Vvv32.w) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_WwWw(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vsub_WwWw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubw_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (!Qv4) Vx32.w-=Vu32.w + C Intrinsic Prototype: HVX_Vector Q6_Vw_condnac_QnVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_condnac_QnVwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwnq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: if (Qv4) Vx32.w-=Vu32.w + C Intrinsic Prototype: HVX_Vector Q6_Vw_condnac_QVwVw(HVX_VectorPred Qv, HVX_Vector Vx, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_condnac_QVwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwq) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w):sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vsub_VwVw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwsat) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vsub(Vuu32.w,Vvv32.w):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vsub_WwWw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vsub_WwWw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubwsat_dv) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32=vswap(Qt4,Vu32,Vv32) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vswap_QVV(HVX_VectorPred Qt, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_vswap_QVV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vswap) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vtmpy(Vuu32.b,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpy_WbRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vtmpy_WbRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vtmpy(Vuu32.b,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpyacc_WhWbRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vtmpyacc_WhWbRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyb_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vtmpy(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpy_WubRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vtmpy_WubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpybus) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vtmpy(Vuu32.ub,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vtmpyacc_WhWubRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vtmpyacc_WhWubRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpybus_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vtmpy(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vtmpy_WhRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vtmpy_WhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyhb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vtmpy(Vuu32.h,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vtmpyacc_WwWhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vtmpyacc_WwWhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vtmpyhb_acc) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vunpack(Vu32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vunpack_Vb(HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vunpack_Vb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vunpack(Vu32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vunpack_Vh(HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vunpack_Vh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.h|=vunpacko(Vu32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vunpackoor_WhVb(HVX_VectorPair Vxx, HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vunpackoor_WhVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackob) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vxx32.w|=vunpacko(Vu32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vunpackoor_WwVh(HVX_VectorPair Vxx, HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vunpackoor_WwVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackoh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vunpack(Vu32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vunpack_Vub(HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuh_vunpack_Vub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackub) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vunpack(Vu32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vunpack_Vuh(HVX_Vector Vu) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuw_vunpack_Vuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vunpackuh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vd32=vxor(Vu32,Vv32) + C Intrinsic Prototype: HVX_Vector Q6_V_vxor_VV(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vxor_VV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vxor) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uh=vzxt(Vu32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuh_vzxt_Vub(HVX_Vector Vu) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuh_vzxt_Vub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vzb) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 60 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vzxt(Vu32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vzxt_Vuh(HVX_Vector Vu) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuw_vzxt_Vuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vzh) +#endif /* __HEXAGON_ARCH___ >= 60 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vsplat(Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vsplat_R(Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vb_vsplat_R __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplatb) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.h=vsplat(Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vsplat_R(Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vh_vsplat_R __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_lvsplath) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Qd4=vsetq2(Rt32) + C Intrinsic Prototype: HVX_VectorPred Q6_Q_vsetq2_R(Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Q_vsetq2_R __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_pred_scalar2v2) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Qd4.b=vshuffe(Qs4.h,Qt4.h) + C Intrinsic Prototype: HVX_VectorPred Q6_Qb_vshuffe_QhQh(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Qb_vshuffe_QhQh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_shuffeqh) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Qd4.h=vshuffe(Qs4.w,Qt4.w) + C Intrinsic Prototype: HVX_VectorPred Q6_Qh_vshuffe_QwQw(HVX_VectorPred Qs, HVX_VectorPred Qt) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Qh_vshuffe_QwQw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_shuffeqw) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vadd(Vu32.b,Vv32.b):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vadd_VbVb_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vadd_VbVb_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbsat) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.b=vadd(Vuu32.b,Vvv32.b):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vadd_WbWb_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wb_vadd_WbWb_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddbsat_dv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w,Qx4):carry + C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVwQ_carry(HVX_Vector Vu, HVX_Vector Vv, HVX_VectorPred* Qx) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vadd_VwVwQ_carry __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddcarry) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.h=vadd(vclb(Vu32.h),Vv32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vadd_vclb_VhVh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vadd_vclb_VhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddclbh) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.w=vadd(vclb(Vu32.w),Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_vclb_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vadd_vclb_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddclbw) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vadd(Vu32.h,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vaddacc_WwVhVh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vaddacc_WwVhVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddhw_acc) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vadd(Vu32.ub,Vv32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vaddacc_WhVubVub(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vaddacc_WhVubVub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddubh_acc) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vadd(Vu32.ub,Vv32.b):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vadd_VubVb_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vadd_VubVb_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddububb_sat) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vadd(Vu32.uh,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vaddacc_WwVuhVuh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vaddacc_WwVuhVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduhw_acc) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vadd(Vu32.uw,Vv32.uw):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vadd_VuwVuw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vadd_VuwVuw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduwsat) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vadd(Vuu32.uw,Vvv32.uw):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vadd_WuwWuw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuw_vadd_WuwWuw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vadduwsat_dv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32=vand(!Qu4,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vand_QnR(HVX_VectorPred Qu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_V_vand_QnR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandnqrt) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vx32|=vand(!Qu4,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_V_vandor_VQnR(HVX_Vector Vx, HVX_VectorPred Qu, Word32 Rt) + Instruction Type: CVI_VX_LATE + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_V_vandor_VQnR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandnqrt_acc) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32=vand(!Qv4,Vu32) + C Intrinsic Prototype: HVX_Vector Q6_V_vand_QnV(HVX_VectorPred Qv, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vand_QnV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvnqv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32=vand(Qv4,Vu32) + C Intrinsic Prototype: HVX_Vector Q6_V_vand_QV(HVX_VectorPred Qv, HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_V_vand_QV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vandvqv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vasr(Vu32.h,Vv32.h,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vasr_VhVhR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vasr_VhVhR_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrhbsat) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vasr(Vu32.uw,Vv32.uw,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_VuwVuwR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vasr_VuwVuwR_rnd_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruwuhrndsat) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vasr(Vu32.w,Vv32.w,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_VwVwR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vasr_VwVwR_rnd_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrwuhrndsat) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vlsr(Vu32.ub,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vub_vlsr_VubR(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vlsr_VubR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlsrb) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vlut32(Vu32.b,Vv32.b,Rt8):nomatch + C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32_VbVbR_nomatch(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vlut32_VbVbR_nomatch __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_nm) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vx32.b|=vlut32(Vu32.b,Vv32.b,#u3) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32or_VbVbVbI(HVX_Vector Vx, HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vlut32or_VbVbVbI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvb_oracci) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vlut32(Vu32.b,Vv32.b,#u3) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vlut32_VbVbI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vlut32_VbVbI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvvbi) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vlut16(Vu32.b,Vv32.h,Rt8):nomatch + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16_VbVhR_nomatch(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vlut16_VbVhR_nomatch __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_nm) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32.h|=vlut16(Vu32.b,Vv32.h,#u3) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16or_WhVbVhI(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vlut16or_WhVbVhI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwh_oracci) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vlut16(Vu32.b,Vv32.h,#u3) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vlut16_VbVhI(HVX_Vector Vu, HVX_Vector Vv, Word32 Iu3) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wh_vlut16_VbVhI __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlutvwhi) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vmax(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vmax_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vmax_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmaxb) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vmin(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vmin_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vmin_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vminb) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.w=vmpa(Vuu32.uh,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpa_WuhRb(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpa_WuhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhb) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpa(Vuu32.uh,Rt32.b) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpaacc_WwWuhRb(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpaacc_WwWuhRb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhb_acc) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32=vmpye(Vu32.w,Vv32.uh) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vmpye_VwVuh(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_W_vmpye_VwVuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyewuh_64) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.w=vmpyi(Vu32.w,Rt32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyi_VwRub(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyi_VwRub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwub) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vx32.w+=vmpyi(Vu32.w,Rt32.ub) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vmpyiacc_VwVwRub(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vw_vmpyiacc_VwVwRub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyiwub_acc) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vxx32+=vmpyo(Vu32.w,Vv32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_W_vmpyoacc_WVwVh(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_W_vmpyoacc_WVwVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyowh_64_acc) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vround(Vu32.uh,Vv32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vround_VuhVuh_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vround_VuhVuh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrounduhub) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vround(Vu32.uw,Vv32.uw):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vround_VuwVuw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vround_VuwVuw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrounduwuh) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vsat(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vsat_VuwVuw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vsat_VuwVuw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatuwuh) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.b=vsub(Vu32.b,Vv32.b):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vsub_VbVb_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vsub_VbVb_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbsat) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.b=vsub(Vuu32.b,Vvv32.b):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wb_vsub_WbWb_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wb_vsub_WbWb_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubbsat_dv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.w=vsub(Vu32.w,Vv32.w,Qx4):carry + C Intrinsic Prototype: HVX_Vector Q6_Vw_vsub_VwVwQ_carry(HVX_Vector Vu, HVX_Vector Vv, HVX_VectorPred* Qx) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vsub_VwVwQ_carry __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubcarry) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vsub(Vu32.ub,Vv32.b):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vsub_VubVb_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vsub_VubVb_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubububb_sat) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vsub(Vu32.uw,Vv32.uw):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vsub_VuwVuw_sat(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vsub_VuwVuw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuwsat) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 62 +/* ========================================================================== + Assembly Syntax: Vdd32.uw=vsub(Vuu32.uw,Vvv32.uw):sat + C Intrinsic Prototype: HVX_VectorPair Q6_Wuw_vsub_WuwWuw_sat(HVX_VectorPair Vuu, HVX_VectorPair Vvv) + Instruction Type: CVI_VA_DV + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Wuw_vsub_WuwWuw_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsubuwsat_dv) +#endif /* __HEXAGON_ARCH___ >= 62 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=vabs(Vu32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vabs_Vb(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vabs_Vb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsb) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=vabs(Vu32.b):sat + C Intrinsic Prototype: HVX_Vector Q6_Vb_vabs_Vb_sat(HVX_Vector Vu) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vabs_Vb_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vabsb_sat) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.h+=vasl(Vu32.h,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vaslacc_VhVhR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vaslacc_VhVhR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaslh_acc) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.h+=vasr(Vu32.h,Rt32) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vasracc_VhVhR(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_vasracc_VhVhR __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasrh_acc) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vasr(Vu32.uh,Vv32.uh,Rt8):rnd:sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VuhVuhR_rnd_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vasr_VuhVuhR_rnd_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruhubrndsat) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.ub=vasr(Vu32.uh,Vv32.uh,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vub_vasr_VuhVuhR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vub_vasr_VuhVuhR_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruhubsat) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.uh=vasr(Vu32.uw,Vv32.uw,Rt8):sat + C Intrinsic Prototype: HVX_Vector Q6_Vuh_vasr_VuwVuwR_sat(HVX_Vector Vu, HVX_Vector Vv, Word32 Rt) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuh_vasr_VuwVuwR_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasruwuhsat) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=vavg(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vavg_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vavg_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgb) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=vavg(Vu32.b,Vv32.b):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vb_vavg_VbVb_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vavg_VbVb_rnd __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavgbrnd) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vavg(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vavg_VuwVuw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vavg_VuwVuw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vavg(Vu32.uw,Vv32.uw):rnd + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vavg_VuwVuw_rnd(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vavg_VuwVuw_rnd __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vavguwrnd) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vdd32=#0 + C Intrinsic Prototype: HVX_VectorPair Q6_W_vzero() + Instruction Type: MAPPING + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_W_vzero __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vdd0) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vtmp.h=vgather(Rt32,Mu2,Vv32.h).h + C Intrinsic Prototype: void Q6_vgather_ARMVh(HVX_Vector* Rs, Word32 Rt, Word32 Mu, HVX_Vector Vv) + Instruction Type: CVI_GATHER + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_ARMVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermh) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vtmp.h=vgather(Rt32,Mu2,Vv32.h).h + C Intrinsic Prototype: void Q6_vgather_AQRMVh(HVX_Vector* Rs, HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_Vector Vv) + Instruction Type: CVI_GATHER + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_AQRMVh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhq) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vtmp.h=vgather(Rt32,Mu2,Vvv32.w).h + C Intrinsic Prototype: void Q6_vgather_ARMWw(HVX_Vector* Rs, Word32 Rt, Word32 Mu, HVX_VectorPair Vvv) + Instruction Type: CVI_GATHER_DV + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_ARMWw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vtmp.h=vgather(Rt32,Mu2,Vvv32.w).h + C Intrinsic Prototype: void Q6_vgather_AQRMWw(HVX_Vector* Rs, HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_VectorPair Vvv) + Instruction Type: CVI_GATHER_DV + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_AQRMWw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermhwq) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vtmp.w=vgather(Rt32,Mu2,Vv32.w).w + C Intrinsic Prototype: void Q6_vgather_ARMVw(HVX_Vector* Rs, Word32 Rt, Word32 Mu, HVX_Vector Vv) + Instruction Type: CVI_GATHER + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_ARMVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vtmp.w=vgather(Rt32,Mu2,Vv32.w).w + C Intrinsic Prototype: void Q6_vgather_AQRMVw(HVX_Vector* Rs, HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_Vector Vv) + Instruction Type: CVI_GATHER + Execution Slots: SLOT01 + ========================================================================== */ + +#define Q6_vgather_AQRMVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vgathermwq) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.h=vlut4(Vu32.uh,Rtt32.h) + C Intrinsic Prototype: HVX_Vector Q6_Vh_vlut4_VuhPh(HVX_Vector Vu, Word64 Rtt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT2 + ========================================================================== */ + +#define Q6_Vh_vlut4_VuhPh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vlut4) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vdd32.h=vmpa(Vuu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpa_WubRub(HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpa_WubRub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuu) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vxx32.h+=vmpa(Vuu32.ub,Rt32.ub) + C Intrinsic Prototype: HVX_VectorPair Q6_Wh_vmpaacc_WhWubRub(HVX_VectorPair Vxx, HVX_VectorPair Vuu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Wh_vmpaacc_WhWubRub __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpabuu_acc) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.h=vmpa(Vx32.h,Vu32.h,Rtt32.h):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpa_VhVhVhPh_sat(HVX_Vector Vx, HVX_Vector Vu, Word64 Rtt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT2 + ========================================================================== */ + +#define Q6_Vh_vmpa_VhVhVhPh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpahhsat) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.h=vmpa(Vx32.h,Vu32.uh,Rtt32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmpa_VhVhVuhPuh_sat(HVX_Vector Vx, HVX_Vector Vu, Word64 Rtt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT2 + ========================================================================== */ + +#define Q6_Vh_vmpa_VhVhVuhPuh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpauhuhsat) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.h=vmps(Vx32.h,Vu32.uh,Rtt32.uh):sat + C Intrinsic Prototype: HVX_Vector Q6_Vh_vmps_VhVhVuhPuh_sat(HVX_Vector Vx, HVX_Vector Vu, Word64 Rtt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT2 + ========================================================================== */ + +#define Q6_Vh_vmps_VhVhVuhPuh_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpsuhuhsat) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=vmpy(Vu32.h,Rt32.h) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vmpyacc_WwVhRh(HVX_VectorPair Vxx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_vmpyacc_WwVhRh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyh_acc) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vmpye(Vu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vmpye_VuhRuh(HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vmpye_VuhRuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhe) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vx32.uw+=vmpye(Vu32.uh,Rt32.uh) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vmpyeacc_VuwVuhRuh(HVX_Vector Vx, HVX_Vector Vu, Word32 Rt) + Instruction Type: CVI_VX + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Vuw_vmpyeacc_VuwVuhRuh __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vmpyuhe_acc) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=vnavg(Vu32.b,Vv32.b) + C Intrinsic Prototype: HVX_Vector Q6_Vb_vnavg_VbVb(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_vnavg_VbVb __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vnavgb) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.b=prefixsum(Qv4) + C Intrinsic Prototype: HVX_Vector Q6_Vb_prefixsum_Q(HVX_VectorPred Qv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vb_prefixsum_Q __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqb) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.h=prefixsum(Qv4) + C Intrinsic Prototype: HVX_Vector Q6_Vh_prefixsum_Q(HVX_VectorPred Qv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vh_prefixsum_Q __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqh) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: Vd32.w=prefixsum(Qv4) + C Intrinsic Prototype: HVX_Vector Q6_Vw_prefixsum_Q(HVX_VectorPred Qv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_prefixsum_Q __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vprefixqw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vv32.h).h=Vw32 + C Intrinsic Prototype: void Q6_vscatter_RMVhV(Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_RMVhV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermh) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vv32.h).h+=Vw32 + C Intrinsic Prototype: void Q6_vscatteracc_RMVhV(Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatteracc_RMVhV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermh_add) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vscatter(Rt32,Mu2,Vv32.h).h=Vw32 + C Intrinsic Prototype: void Q6_vscatter_QRMVhV(HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_QRMVhV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhq) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vvv32.w).h=Vw32 + C Intrinsic Prototype: void Q6_vscatter_RMWwV(Word32 Rt, Word32 Mu, HVX_VectorPair Vvv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER_DV + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_RMWwV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vvv32.w).h+=Vw32 + C Intrinsic Prototype: void Q6_vscatteracc_RMWwV(Word32 Rt, Word32 Mu, HVX_VectorPair Vvv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER_DV + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatteracc_RMWwV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhw_add) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vscatter(Rt32,Mu2,Vvv32.w).h=Vw32 + C Intrinsic Prototype: void Q6_vscatter_QRMWwV(HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_VectorPair Vvv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER_DV + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_QRMWwV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermhwq) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vv32.w).w=Vw32 + C Intrinsic Prototype: void Q6_vscatter_RMVwV(Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_RMVwV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermw) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: vscatter(Rt32,Mu2,Vv32.w).w+=Vw32 + C Intrinsic Prototype: void Q6_vscatteracc_RMVwV(Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatteracc_RMVwV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermw_add) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 65 +/* ========================================================================== + Assembly Syntax: if (Qs4) vscatter(Rt32,Mu2,Vv32.w).w=Vw32 + C Intrinsic Prototype: void Q6_vscatter_QRMVwV(HVX_VectorPred Qs, Word32 Rt, Word32 Mu, HVX_Vector Vv, HVX_Vector Vw) + Instruction Type: CVI_SCATTER + Execution Slots: SLOT0 + ========================================================================== */ + +#define Q6_vscatter_QRMVwV __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vscattermwq) +#endif /* __HEXAGON_ARCH___ >= 65 */ + +#if __HVX_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Vd32.w=vadd(Vu32.w,Vv32.w,Qs4):carry:sat + C Intrinsic Prototype: HVX_Vector Q6_Vw_vadd_VwVwQ_carry_sat(HVX_Vector Vu, HVX_Vector Vv, HVX_VectorPred Qs) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vadd_VwVwQ_carry_sat __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vaddcarrysat) +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HVX_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Vxx32.w=vasrinto(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_vasrinto_WwVwVw(HVX_VectorPair Vxx, HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VP_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Ww_vasrinto_WwVwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vasr_into) +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HVX_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Vd32.uw=vrotr(Vu32.uw,Vv32.uw) + C Intrinsic Prototype: HVX_Vector Q6_Vuw_vrotr_VuwVuw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VS + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vuw_vrotr_VuwVuw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vrotr) +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HVX_ARCH__ >= 66 +/* ========================================================================== + Assembly Syntax: Vd32.w=vsatdw(Vu32.w,Vv32.w) + C Intrinsic Prototype: HVX_Vector Q6_Vw_vsatdw_VwVw(HVX_Vector Vu, HVX_Vector Vv) + Instruction Type: CVI_VA + Execution Slots: SLOT0123 + ========================================================================== */ + +#define Q6_Vw_vsatdw_VwVw __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_vsatdw) +#endif /* __HEXAGON_ARCH___ >= 66 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.w=v6mpy(Vuu32.ub,Vvv32.b,#u2):h + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_v6mpy_WubWbI_h(HVX_VectorPair Vuu, HVX_VectorPair Vvv, Word32 Iu2) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_v6mpy_WubWbI_h __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyhubs10) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=v6mpy(Vuu32.ub,Vvv32.b,#u2):h + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_v6mpyacc_WwWubWbI_h(HVX_VectorPair Vxx, HVX_VectorPair Vuu, HVX_VectorPair Vvv, Word32 Iu2) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_v6mpyacc_WwWubWbI_h __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyhubs10_vxx) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vdd32.w=v6mpy(Vuu32.ub,Vvv32.b,#u2):v + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_v6mpy_WubWbI_v(HVX_VectorPair Vuu, HVX_VectorPair Vvv, Word32 Iu2) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_v6mpy_WubWbI_v __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyvubs10) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#if __HVX_ARCH__ >= 68 +/* ========================================================================== + Assembly Syntax: Vxx32.w+=v6mpy(Vuu32.ub,Vvv32.b,#u2):v + C Intrinsic Prototype: HVX_VectorPair Q6_Ww_v6mpyacc_WwWubWbI_v(HVX_VectorPair Vxx, HVX_VectorPair Vuu, HVX_VectorPair Vvv, Word32 Iu2) + Instruction Type: CVI_VX_DV + Execution Slots: SLOT23 + ========================================================================== */ + +#define Q6_Ww_v6mpyacc_WwWubWbI_v __BUILTIN_VECTOR_WRAP(__builtin_HEXAGON_V6_v6mpyvubs10_vxx) +#endif /* __HEXAGON_ARCH___ >= 68 */ + +#endif /* __HVX__ */ + +#endif diff --git a/clang/lib/Headers/keylockerintrin.h b/clang/lib/Headers/keylockerintrin.h index c15d39c8e3928..68b0a5689618a 100644 --- a/clang/lib/Headers/keylockerintrin.h +++ b/clang/lib/Headers/keylockerintrin.h @@ -230,10 +230,12 @@ _mm_aesenc128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { /// HandleKeyType (Handle[511:0]) != HANDLE_KEY_TYPE_AES256 ) /// IF (IllegalHandle) /// ZF := 1 +/// MEM[__odata+127:__odata] := 0 /// ELSE /// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate512 (Handle[511:0], IWKey) /// IF (Authentic == 0) /// ZF := 1 +/// MEM[__odata+127:__odata] := 0 /// ELSE /// MEM[__odata+127:__odata] := AES256Encrypt (__idata[127:0], UnwrappedKey) /// ZF := 0 @@ -267,10 +269,12 @@ _mm_aesenc256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { /// HandleKeyType (Handle[383:0]) != HANDLE_KEY_TYPE_AES128) /// IF (IllegalHandle) /// ZF := 1 +/// MEM[__odata+127:__odata] := 0 /// ELSE /// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate384 (Handle[383:0], IWKey) /// IF (Authentic == 0) /// ZF := 1 +/// MEM[__odata+127:__odata] := 0 /// ELSE /// MEM[__odata+127:__odata] := AES128Decrypt (__idata[127:0], UnwrappedKey) /// ZF := 0 @@ -304,10 +308,12 @@ _mm_aesdec128kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { /// HandleKeyType (Handle[511:0]) != HANDLE_KEY_TYPE_AES256) /// IF (IllegalHandle) /// ZF := 1 +/// MEM[__odata+127:__odata] := 0 /// ELSE /// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate512 (Handle[511:0], IWKey) /// IF (Authentic == 0) /// ZF := 1 +/// MEM[__odata+127:__odata] := 0 /// ELSE /// MEM[__odata+127:__odata] := AES256Decrypt (__idata[127:0], UnwrappedKey) /// ZF := 0 @@ -354,10 +360,16 @@ _mm_aesdec256kl_u8(__m128i* __odata, __m128i __idata, const void *__h) { /// HandleKeyType (Handle[383:0]) != HANDLE_KEY_TYPE_AES128 ) /// IF (IllegalHandle) /// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR /// ELSE /// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate384 (Handle[383:0], IWKey) /// IF Authentic == 0 /// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR /// ELSE /// FOR i := 0 to 7 /// __odata[i] := AES128Encrypt (__idata[i], UnwrappedKey) @@ -394,10 +406,16 @@ _mm_aesencwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* /// HandleKeyType (Handle[511:0]) != HANDLE_KEY_TYPE_AES512 ) /// IF (IllegalHandle) /// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR /// ELSE /// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate512 (Handle[511:0], IWKey) /// IF Authentic == 0 /// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR /// ELSE /// FOR i := 0 to 7 /// __odata[i] := AES256Encrypt (__idata[i], UnwrappedKey) @@ -434,10 +452,16 @@ _mm_aesencwide256kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* /// HandleKeyType (Handle) != HANDLE_KEY_TYPE_AES128 ) /// IF (IllegalHandle) /// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR /// ELSE /// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate384 (Handle[383:0], IWKey) /// IF Authentic == 0 /// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR /// ELSE /// FOR i := 0 to 7 /// __odata[i] := AES128Decrypt (__idata[i], UnwrappedKey) @@ -474,10 +498,16 @@ _mm_aesdecwide128kl_u8(__m128i __odata[8], const __m128i __idata[8], const void* /// HandleKeyType (Handle) != HANDLE_KEY_TYPE_AES512 ) /// If (IllegalHandle) /// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR /// ELSE /// (UnwrappedKey, Authentic) := UnwrapKeyAndAuthenticate512 (Handle[511:0], IWKey) /// IF Authentic == 0 /// ZF := 1 +/// FOR i := 0 to 7 +/// __odata[i] := 0 +/// ENDFOR /// ELSE /// FOR i := 0 to 7 /// __odata[i] := AES256Decrypt (__idata[i], UnwrappedKey) diff --git a/clang/lib/Interpreter/Interpreter.cpp b/clang/lib/Interpreter/Interpreter.cpp index 711a5e9ff0168..768847f9f0352 100644 --- a/clang/lib/Interpreter/Interpreter.cpp +++ b/clang/lib/Interpreter/Interpreter.cpp @@ -110,7 +110,7 @@ CreateCI(const llvm::opt::ArgStringList &Argv) { "Initialization failed. " "Target is missing"); - Clang->getTarget().adjust(Clang->getLangOpts()); + Clang->getTarget().adjust(Clang->getDiagnostics(), Clang->getLangOpts()); return std::move(Clang); } diff --git a/clang/lib/Lex/Pragma.cpp b/clang/lib/Lex/Pragma.cpp index 081b92ac21d9a..c89061ba6d02e 100644 --- a/clang/lib/Lex/Pragma.cpp +++ b/clang/lib/Lex/Pragma.cpp @@ -412,9 +412,13 @@ void Preprocessor::HandlePragmaOnce(Token &OnceTok) { HeaderInfo.MarkFileIncludeOnce(getCurrentFileLexer()->getFileEntry()); } -void Preprocessor::HandlePragmaMark() { +void Preprocessor::HandlePragmaMark(Token &MarkTok) { assert(CurPPLexer && "No current lexer?"); - CurLexer->ReadToEndOfLine(); + + SmallString<64> Buffer; + CurLexer->ReadToEndOfLine(&Buffer); + if (Callbacks) + Callbacks->PragmaMark(MarkTok.getLocation(), Buffer); } /// HandlePragmaPoison - Handle \#pragma GCC poison. PoisonTok is the 'poison'. @@ -992,7 +996,7 @@ struct PragmaMarkHandler : public PragmaHandler { void HandlePragma(Preprocessor &PP, PragmaIntroducer Introducer, Token &MarkTok) override { - PP.HandlePragmaMark(); + PP.HandlePragmaMark(MarkTok); } }; diff --git a/clang/lib/Parse/Parser.cpp b/clang/lib/Parse/Parser.cpp index c0b83db69ce9f..55b25d20db51c 100644 --- a/clang/lib/Parse/Parser.cpp +++ b/clang/lib/Parse/Parser.cpp @@ -1214,7 +1214,7 @@ Decl *Parser::ParseFunctionDefinition(ParsingDeclarator &D, // a definition. Late parsed attributes are checked at the end. if (Tok.isNot(tok::equal)) { for (const ParsedAttr &AL : D.getAttributes()) - if (AL.isKnownToGCC() && !AL.isCXX11Attribute()) + if (AL.isKnownToGCC() && !AL.isStandardAttributeSyntax()) Diag(AL.getLoc(), diag::warn_attribute_on_function_definition) << AL; } diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp index 5fb96aa97f111..518fd6e198bb0 100644 --- a/clang/lib/Sema/SemaChecking.cpp +++ b/clang/lib/Sema/SemaChecking.cpp @@ -1554,6 +1554,10 @@ Sema::CheckBuiltinFunctionCall(FunctionDecl *FDecl, unsigned BuiltinID, Diag(TheCall->getBeginLoc(), diag::warn_alloca) << TheCall->getDirectCallee(); break; + case Builtin::BI__arithmetic_fence: + if (SemaBuiltinArithmeticFence(TheCall)) + return ExprError(); + break; case Builtin::BI__assume: case Builtin::BI__builtin_assume: if (SemaBuiltinAssume(TheCall)) @@ -6688,6 +6692,29 @@ bool Sema::SemaBuiltinPrefetch(CallExpr *TheCall) { return false; } +/// SemaBuiltinArithmeticFence - Handle __arithmetic_fence. +bool Sema::SemaBuiltinArithmeticFence(CallExpr *TheCall) { + if (!Context.getTargetInfo().checkArithmeticFenceSupported()) + return Diag(TheCall->getBeginLoc(), diag::err_builtin_target_unsupported) + << SourceRange(TheCall->getBeginLoc(), TheCall->getEndLoc()); + if (checkArgCount(*this, TheCall, 1)) + return true; + Expr *Arg = TheCall->getArg(0); + if (Arg->isInstantiationDependent()) + return false; + + QualType ArgTy = Arg->getType(); + if (!ArgTy->hasFloatingRepresentation()) + return Diag(TheCall->getEndLoc(), diag::err_typecheck_expect_flt_or_vector) + << ArgTy; + if (Arg->isLValue()) { + ExprResult FirstArg = DefaultLvalueConversion(Arg); + TheCall->setArg(0, FirstArg.get()); + } + TheCall->setType(TheCall->getArg(0)->getType()); + return false; +} + /// SemaBuiltinAssume - Handle __assume (MS Extension). // __assume does not evaluate its arguments, and should warn if its argument // has side effects. diff --git a/clang/lib/Sema/SemaConcept.cpp b/clang/lib/Sema/SemaConcept.cpp index 552534824588e..f2c70d0a56efb 100644 --- a/clang/lib/Sema/SemaConcept.cpp +++ b/clang/lib/Sema/SemaConcept.cpp @@ -43,9 +43,12 @@ class LogicalBinOp { LHS = BO->getLHS(); RHS = BO->getRHS(); } else if (auto *OO = dyn_cast(E)) { - Op = OO->getOperator(); - LHS = OO->getArg(0); - RHS = OO->getArg(1); + // If OO is not || or && it might not have exactly 2 arguments. + if (OO->getNumArgs() == 2) { + Op = OO->getOperator(); + LHS = OO->getArg(0); + RHS = OO->getArg(1); + } } } diff --git a/clang/lib/Sema/SemaCoroutine.cpp b/clang/lib/Sema/SemaCoroutine.cpp index cec80436d575e..31a4092b5b604 100644 --- a/clang/lib/Sema/SemaCoroutine.cpp +++ b/clang/lib/Sema/SemaCoroutine.cpp @@ -291,26 +291,6 @@ static ExprResult buildOperatorCoawaitCall(Sema &SemaRef, Scope *S, cast(R.get())); } -static Expr *buildBuiltinCall(Sema &S, SourceLocation Loc, Builtin::ID Id, - MultiExprArg CallArgs) { - StringRef Name = S.Context.BuiltinInfo.getName(Id); - LookupResult R(S, &S.Context.Idents.get(Name), Loc, Sema::LookupOrdinaryName); - S.LookupName(R, S.TUScope, /*AllowBuiltinCreation=*/true); - - auto *BuiltInDecl = R.getAsSingle(); - assert(BuiltInDecl && "failed to find builtin declaration"); - - ExprResult DeclRef = - S.BuildDeclRefExpr(BuiltInDecl, BuiltInDecl->getType(), VK_LValue, Loc); - assert(DeclRef.isUsable() && "Builtin reference cannot fail"); - - ExprResult Call = - S.BuildCallExpr(/*Scope=*/nullptr, DeclRef.get(), Loc, CallArgs, Loc); - - assert(!Call.isInvalid() && "Call to builtin cannot fail!"); - return Call.get(); -} - static ExprResult buildCoroutineHandle(Sema &S, QualType PromiseType, SourceLocation Loc) { QualType CoroHandleType = lookupCoroutineHandleType(S, PromiseType, Loc); @@ -327,7 +307,7 @@ static ExprResult buildCoroutineHandle(Sema &S, QualType PromiseType, } Expr *FramePtr = - buildBuiltinCall(S, Loc, Builtin::BI__builtin_coro_frame, {}); + S.BuildBuiltinCallExpr(Loc, Builtin::BI__builtin_coro_frame, {}); CXXScopeSpec SS; ExprResult FromAddr = @@ -404,8 +384,8 @@ static Expr *maybeTailCall(Sema &S, QualType RetType, Expr *E, // the resume call and return instruction, which would interfere with the // musttail call contract. JustAddress = S.MaybeCreateExprWithCleanups(JustAddress); - return buildBuiltinCall(S, Loc, Builtin::BI__builtin_coro_resume, - JustAddress); + return S.BuildBuiltinCallExpr(Loc, Builtin::BI__builtin_coro_resume, + JustAddress); } /// Build calls to await_ready, await_suspend, and await_resume for a co_await @@ -1357,10 +1337,10 @@ bool CoroutineStmtBuilder::makeNewAndDeleteExpr() { return false; Expr *FramePtr = - buildBuiltinCall(S, Loc, Builtin::BI__builtin_coro_frame, {}); + S.BuildBuiltinCallExpr(Loc, Builtin::BI__builtin_coro_frame, {}); Expr *FrameSize = - buildBuiltinCall(S, Loc, Builtin::BI__builtin_coro_size, {}); + S.BuildBuiltinCallExpr(Loc, Builtin::BI__builtin_coro_size, {}); // Make new call. @@ -1389,7 +1369,7 @@ bool CoroutineStmtBuilder::makeNewAndDeleteExpr() { return false; Expr *CoroFree = - buildBuiltinCall(S, Loc, Builtin::BI__builtin_coro_free, {FramePtr}); + S.BuildBuiltinCallExpr(Loc, Builtin::BI__builtin_coro_free, {FramePtr}); SmallVector DeleteArgs{CoroFree}; diff --git a/clang/lib/Sema/SemaDeclAttr.cpp b/clang/lib/Sema/SemaDeclAttr.cpp index 3b0b7d9500edb..2bc11c6e14f61 100644 --- a/clang/lib/Sema/SemaDeclAttr.cpp +++ b/clang/lib/Sema/SemaDeclAttr.cpp @@ -2189,7 +2189,7 @@ static void handleAnalyzerNoReturnAttr(Sema &S, Decl *D, const ParsedAttr &AL) { ValueDecl *VD = dyn_cast(D); if (!VD || (!VD->getType()->isBlockPointerType() && !VD->getType()->isFunctionPointerType())) { - S.Diag(AL.getLoc(), AL.isCXX11Attribute() + S.Diag(AL.getLoc(), AL.isStandardAttributeSyntax() ? diag::err_attribute_wrong_decl_type : diag::warn_attribute_wrong_decl_type) << AL << ExpectedFunctionMethodOrBlock; @@ -2959,7 +2959,7 @@ static void handleWarnUnusedResult(Sema &S, Decl *D, const ParsedAttr &AL) { } StringRef Str; - if ((AL.isCXX11Attribute() || AL.isC2xAttribute()) && !AL.getScopeName()) { + if (AL.isStandardAttributeSyntax() && !AL.getScopeName()) { // The standard attribute cannot be applied to variable declarations such // as a function pointer. if (isa(D)) @@ -8915,8 +8915,8 @@ static void handleDeprecatedAttr(Sema &S, Decl *D, const ParsedAttr &AL) { !S.checkStringLiteralArgumentAttr(AL, 0, Str)) return; - // Only support a single optional message for Declspec and CXX11. - if (AL.isDeclspecAttribute() || AL.isCXX11Attribute()) + // Support a single optional message only for Declspec and [[]] spellings. + if (AL.isDeclspecAttribute() || AL.isStandardAttributeSyntax()) AL.checkAtMostNumArgs(S, 1); else if (AL.isArgExpr(1) && AL.getArgAsExpr(1) && !S.checkStringLiteralArgumentAttr(AL, 1, Replacement)) @@ -8983,7 +8983,7 @@ static void handleNoSanitizeSpecificAttr(Sema &S, Decl *D, // getSpelling() or prettyPrint() on the resulting semantic attribute object // without failing assertions. unsigned TranslatedSpellingIndex = 0; - if (AL.isC2xAttribute() || AL.isCXX11Attribute()) + if (AL.isStandardAttributeSyntax()) TranslatedSpellingIndex = 1; AttributeCommonInfo Info = AL; diff --git a/clang/lib/Sema/SemaExpr.cpp b/clang/lib/Sema/SemaExpr.cpp index b4eef01e14cef..249993c992e48 100644 --- a/clang/lib/Sema/SemaExpr.cpp +++ b/clang/lib/Sema/SemaExpr.cpp @@ -4137,6 +4137,10 @@ ExprResult Sema::ActOnNumericConstant(const Token &Tok, Scope *UDLScope) { ExprResult Sema::ActOnParenExpr(SourceLocation L, SourceLocation R, Expr *E) { assert(E && "ActOnParenExpr() missing expr"); + QualType ExprTy = E->getType(); + if (getLangOpts().ProtectParens && CurFPFeatures.getAllowFPReassociate() && + !E->isLValue() && ExprTy->hasFloatingRepresentation()) + return BuildBuiltinCallExpr(R, Builtin::BI__arithmetic_fence, E); return new (Context) ParenExpr(L, R, E); } @@ -6007,6 +6011,7 @@ Sema::ConvertArgumentsForCall(CallExpr *Call, Expr *Fn, for (unsigned i = 0; i < TotalNumArgs; ++i) Call->setArg(i, AllArgs[i]); + Call->computeDependence(); return false; } @@ -6648,6 +6653,29 @@ ExprResult Sema::BuildCallExpr(Scope *Scope, Expr *Fn, SourceLocation LParenLoc, ExecConfig, IsExecConfig); } +/// BuildBuiltinCallExpr - Create a call to a builtin function specified by Id +// with the specified CallArgs +Expr *Sema::BuildBuiltinCallExpr(SourceLocation Loc, Builtin::ID Id, + MultiExprArg CallArgs) { + StringRef Name = Context.BuiltinInfo.getName(Id); + LookupResult R(*this, &Context.Idents.get(Name), Loc, + Sema::LookupOrdinaryName); + LookupName(R, TUScope, /*AllowBuiltinCreation=*/true); + + auto *BuiltInDecl = R.getAsSingle(); + assert(BuiltInDecl && "failed to find builtin declaration"); + + ExprResult DeclRef = + BuildDeclRefExpr(BuiltInDecl, BuiltInDecl->getType(), VK_LValue, Loc); + assert(DeclRef.isUsable() && "Builtin reference cannot fail"); + + ExprResult Call = + BuildCallExpr(/*Scope=*/nullptr, DeclRef.get(), Loc, CallArgs, Loc); + + assert(!Call.isInvalid() && "Call to builtin cannot fail!"); + return Call.get(); +} + /// Parse a __builtin_astype expression. /// /// __builtin_astype( value, dst type ) @@ -6924,6 +6952,7 @@ ExprResult Sema::BuildResolvedCallExpr(Expr *Fn, NamedDecl *NDecl, TheCall->setArg(i, Arg); } + TheCall->computeDependence(); } if (CXXMethodDecl *Method = dyn_cast_or_null(FDecl)) @@ -12312,11 +12341,30 @@ QualType Sema::CheckVectorCompareOperands(ExprResult &LHS, ExprResult &RHS, QualType LHSType = LHS.get()->getType(); - // If AltiVec, the comparison results in a numeric type, i.e. - // bool for C++, int for C - if (getLangOpts().AltiVec && - vType->castAs()->getVectorKind() == VectorType::AltiVecVector) - return Context.getLogicalOperationType(); + // Determine the return type of a vector compare. By default clang will return + // a scalar for all vector compares except vector bool and vector pixel. + // With the gcc compiler we will always return a vector type and with the xl + // compiler we will always return a scalar type. This switch allows choosing + // which behavior is prefered. + if (getLangOpts().AltiVec) { + switch (getLangOpts().getAltivecSrcCompat()) { + case LangOptions::AltivecSrcCompatKind::Mixed: + // If AltiVec, the comparison results in a numeric type, i.e. + // bool for C++, int for C + if (vType->castAs()->getVectorKind() == + VectorType::AltiVecVector) + return Context.getLogicalOperationType(); + else + Diag(Loc, diag::warn_deprecated_altivec_src_compat); + break; + case LangOptions::AltivecSrcCompatKind::GCC: + // For GCC we always return the vector type. + break; + case LangOptions::AltivecSrcCompatKind::XL: + return Context.getLogicalOperationType(); + break; + } + } // For non-floating point types, check for self-comparisons of the form // x == x, x != x, x < x, etc. These always evaluate to a constant, and @@ -16810,8 +16858,10 @@ void Sema::PopExpressionEvaluationContext() { if (!Rec.Lambdas.empty()) { using ExpressionKind = ExpressionEvaluationContextRecord::ExpressionKind; - if (Rec.ExprContext == ExpressionKind::EK_TemplateArgument || Rec.isUnevaluated() || - (Rec.isConstantEvaluated() && !getLangOpts().CPlusPlus17)) { + if (!getLangOpts().CPlusPlus20 && + (Rec.ExprContext == ExpressionKind::EK_TemplateArgument || + Rec.isUnevaluated() || + (Rec.isConstantEvaluated() && !getLangOpts().CPlusPlus17))) { unsigned D; if (Rec.isUnevaluated()) { // C++11 [expr.prim.lambda]p2: diff --git a/clang/lib/Sema/SemaInit.cpp b/clang/lib/Sema/SemaInit.cpp index f61de44f2b8e1..741a0c98916aa 100644 --- a/clang/lib/Sema/SemaInit.cpp +++ b/clang/lib/Sema/SemaInit.cpp @@ -5066,9 +5066,9 @@ static void TryReferenceInitializationCore(Sema &S, // than, cv2; otherwise, the program is ill-formed. unsigned T1CVRQuals = T1Quals.getCVRQualifiers(); unsigned T2CVRQuals = T2Quals.getCVRQualifiers(); - if ((RefRelationship == Sema::Ref_Related && - (T1CVRQuals | T2CVRQuals) != T1CVRQuals) || - !T1Quals.isAddressSpaceSupersetOf(T2Quals)) { + if (RefRelationship == Sema::Ref_Related && + ((T1CVRQuals | T2CVRQuals) != T1CVRQuals || + !T1Quals.isAddressSpaceSupersetOf(T2Quals))) { Sequence.SetFailed(InitializationSequence::FK_ReferenceInitDropsQualifiers); return; } diff --git a/clang/lib/Sema/SemaOpenMP.cpp b/clang/lib/Sema/SemaOpenMP.cpp index 316d734126154..f92b34dc8e97c 100644 --- a/clang/lib/Sema/SemaOpenMP.cpp +++ b/clang/lib/Sema/SemaOpenMP.cpp @@ -9403,11 +9403,21 @@ checkOpenMPLoop(OpenMPDirectiveKind DKind, Expr *CollapseLoopCountExpr, // Build expression: UB = min(UB, prevUB) for #for in composite or combined // construct + ExprResult NewPrevUB = PrevUB; SourceLocation DistEUBLoc = AStmt->getBeginLoc(); - ExprResult IsUBGreater = - SemaRef.BuildBinOp(CurScope, DistEUBLoc, BO_GT, UB.get(), PrevUB.get()); + if (!SemaRef.Context.hasSameType(UB.get()->getType(), + PrevUB.get()->getType())) { + NewPrevUB = SemaRef.BuildCStyleCastExpr( + DistEUBLoc, + SemaRef.Context.getTrivialTypeSourceInfo(UB.get()->getType()), + DistEUBLoc, NewPrevUB.get()); + if (!NewPrevUB.isUsable()) + return 0; + } + ExprResult IsUBGreater = SemaRef.BuildBinOp(CurScope, DistEUBLoc, BO_GT, + UB.get(), NewPrevUB.get()); ExprResult CondOp = SemaRef.ActOnConditionalOp( - DistEUBLoc, DistEUBLoc, IsUBGreater.get(), PrevUB.get(), UB.get()); + DistEUBLoc, DistEUBLoc, IsUBGreater.get(), NewPrevUB.get(), UB.get()); PrevEUB = SemaRef.BuildBinOp(CurScope, DistIncLoc, BO_Assign, UB.get(), CondOp.get()); PrevEUB = @@ -17071,7 +17081,6 @@ static bool actOnOMPReductionKindClause( auto *DRDRef = DeclareReductionRef.getAs(); auto *DRD = cast(DRDRef->getDecl()); if (DRD->getInitializer()) { - S.ActOnUninitializedDecl(PrivateVD); Init = DRDRef; RHSVD->setInit(DRDRef); RHSVD->setInitStyle(VarDecl::CallInit); diff --git a/clang/lib/Sema/SemaStmt.cpp b/clang/lib/Sema/SemaStmt.cpp index e1896b4389c38..78ed882129fda 100644 --- a/clang/lib/Sema/SemaStmt.cpp +++ b/clang/lib/Sema/SemaStmt.cpp @@ -3332,7 +3332,7 @@ Sema::NamedReturnInfo Sema::getNamedReturnInfo(Expr *&E, bool ForceCXX2b) { const auto *VD = dyn_cast(DR->getDecl()); if (!VD) return NamedReturnInfo(); - NamedReturnInfo Res = getNamedReturnInfo(VD, /*ForceCXX20=*/ForceCXX2b); + NamedReturnInfo Res = getNamedReturnInfo(VD); if (Res.Candidate && !E->isXValue() && (ForceCXX2b || getLangOpts().CPlusPlus2b)) { E = ImplicitCastExpr::Create(Context, VD->getType().getNonReferenceType(), @@ -3342,46 +3342,28 @@ Sema::NamedReturnInfo Sema::getNamedReturnInfo(Expr *&E, bool ForceCXX2b) { return Res; } -/// Updates the status in the given NamedReturnInfo object to disallow -/// copy elision, and optionally also implicit move. -/// -/// \param Info The NamedReturnInfo object to update. -/// -/// \param CanMove If true, disallow only copy elision. -/// If false, also disallow implcit move. -static void disallowNRVO(Sema::NamedReturnInfo &Info, bool CanMove) { - Info.S = std::min(Info.S, CanMove ? Sema::NamedReturnInfo::MoveEligible - : Sema::NamedReturnInfo::None); -} - /// Determine whether the given NRVO candidate variable is move-eligible or /// copy-elidable, without considering function return type. /// /// \param VD The NRVO candidate variable. /// -/// \param ForceCXX20 Overrides detection of current language mode -/// and uses the rules for C++20. -/// /// \returns An aggregate which contains the Candidate and isMoveEligible /// and isCopyElidable methods. If Candidate is non-null, it means /// isMoveEligible() would be true under the most permissive language standard. -Sema::NamedReturnInfo Sema::getNamedReturnInfo(const VarDecl *VD, - bool ForceCXX20) { - bool hasCXX11 = getLangOpts().CPlusPlus11 || ForceCXX20; - bool hasCXX20 = getLangOpts().CPlusPlus20 || ForceCXX20; +Sema::NamedReturnInfo Sema::getNamedReturnInfo(const VarDecl *VD) { NamedReturnInfo Info{VD, NamedReturnInfo::MoveEligibleAndCopyElidable}; // C++20 [class.copy.elision]p3: // - in a return statement in a function with ... // (other than a function ... parameter) if (VD->getKind() == Decl::ParmVar) - disallowNRVO(Info, hasCXX11); + Info.S = NamedReturnInfo::MoveEligible; else if (VD->getKind() != Decl::Var) return NamedReturnInfo(); // (other than ... a catch-clause parameter) if (VD->isExceptionVariable()) - disallowNRVO(Info, hasCXX20); + Info.S = NamedReturnInfo::MoveEligible; // ...automatic... if (!VD->hasLocalStorage()) @@ -3406,7 +3388,7 @@ Sema::NamedReturnInfo Sema::getNamedReturnInfo(const VarDecl *VD, if (VDReferencedType.isVolatileQualified() || !VDReferencedType->isObjectType()) return NamedReturnInfo(); - disallowNRVO(Info, hasCXX20); + Info.S = NamedReturnInfo::MoveEligible; } else { return NamedReturnInfo(); } @@ -3415,7 +3397,7 @@ Sema::NamedReturnInfo Sema::getNamedReturnInfo(const VarDecl *VD, // alignment cannot use NRVO. if (!VDType->isDependentType() && VD->hasAttr() && Context.getDeclAlign(VD) > Context.getTypeAlignInChars(VDType)) - disallowNRVO(Info, hasCXX11); + Info.S = NamedReturnInfo::MoveEligible; return Info; } @@ -3459,110 +3441,11 @@ const VarDecl *Sema::getCopyElisionCandidate(NamedReturnInfo &Info, // When considering moving this expression out, allow dissimilar types. if (!VDType->isDependentType() && !Context.hasSameUnqualifiedType(ReturnType, VDType)) - disallowNRVO(Info, getLangOpts().CPlusPlus11); + Info.S = NamedReturnInfo::MoveEligible; } return Info.isCopyElidable() ? Info.Candidate : nullptr; } -/// Try to perform the initialization of a potentially-movable value, -/// which is the operand to a return or throw statement. -/// -/// This routine implements C++20 [class.copy.elision]p3, which attempts to -/// treat returned lvalues as rvalues in certain cases (to prefer move -/// construction), then falls back to treating them as lvalues if that failed. -/// -/// \param ConvertingConstructorsOnly If true, follow [class.copy.elision]p3 and -/// reject resolutions that find non-constructors, such as derived-to-base -/// conversions or `operator T()&&` member functions. If false, do consider such -/// conversion sequences. -/// -/// \param Res We will fill this in if move-initialization was possible. -/// If move-initialization is not possible, such that we must fall back to -/// treating the operand as an lvalue, we will leave Res in its original -/// invalid state. -/// -/// \returns Whether we need to do the second overload resolution. If the first -/// overload resolution fails, or if the first overload resolution succeeds but -/// the selected constructor/operator doesn't match the additional criteria, we -/// need to do the second overload resolution. -static bool TryMoveInitialization(Sema &S, const InitializedEntity &Entity, - const VarDecl *NRVOCandidate, Expr *&Value, - bool ConvertingConstructorsOnly, - bool IsDiagnosticsCheck, ExprResult &Res) { - ImplicitCastExpr AsRvalue(ImplicitCastExpr::OnStack, Value->getType(), - CK_NoOp, Value, VK_XValue, FPOptionsOverride()); - - Expr *InitExpr = &AsRvalue; - - InitializationKind Kind = InitializationKind::CreateCopy( - Value->getBeginLoc(), Value->getBeginLoc()); - - InitializationSequence Seq(S, Entity, Kind, InitExpr); - - bool NeedSecondOverloadResolution = true; - if (!Seq && - (IsDiagnosticsCheck || Seq.getFailedOverloadResult() != OR_Deleted)) { - return NeedSecondOverloadResolution; - } - - for (const InitializationSequence::Step &Step : Seq.steps()) { - if (Step.Kind != InitializationSequence::SK_ConstructorInitialization && - Step.Kind != InitializationSequence::SK_UserConversion) - continue; - - FunctionDecl *FD = Step.Function.Function; - if (ConvertingConstructorsOnly) { - if (isa(FD)) { - // C++11 [class.copy]p32: - // C++14 [class.copy]p32: - // C++17 [class.copy.elision]p3: - // [...] if the type of the first parameter of the selected constructor - // is not an rvalue reference to the object's type (possibly - // cv-qualified), overload resolution is performed again, considering - // the object as an lvalue. - const RValueReferenceType *RRefType = - FD->getParamDecl(0)->getType()->getAs(); - if (!RRefType) - break; - if (!S.Context.hasSameUnqualifiedType(RRefType->getPointeeType(), - NRVOCandidate->getType())) - break; - } else { - continue; - } - } else { - if (isa(FD)) { - // Check that overload resolution selected a constructor taking an - // rvalue reference. If it selected an lvalue reference, then we - // didn't need to cast this thing to an rvalue in the first place. - if (IsDiagnosticsCheck && - !isa(FD->getParamDecl(0)->getType())) - break; - } else if (isa(FD)) { - // Check that overload resolution selected a conversion operator - // taking an rvalue reference. - if (cast(FD)->getRefQualifier() != RQ_RValue) - break; - } else { - continue; - } - } - - NeedSecondOverloadResolution = false; - // Promote "AsRvalue" to the heap, since we now need this - // expression node to persist. - Value = - ImplicitCastExpr::Create(S.Context, Value->getType(), CK_NoOp, Value, - nullptr, VK_XValue, FPOptionsOverride()); - - // Complete type-checking the initialization of the return type - // using the constructor we found. - Res = Seq.Perform(S, Entity, Kind, Value); - } - - return NeedSecondOverloadResolution; -} - /// Perform the initialization of a potentially-movable value, which /// is the result of return value. /// @@ -3573,42 +3456,26 @@ ExprResult Sema::PerformMoveOrCopyInitialization(const InitializedEntity &Entity, const NamedReturnInfo &NRInfo, Expr *Value) { - - if (NRInfo.Candidate && !getLangOpts().CPlusPlus2b) { - if (NRInfo.isMoveEligible()) { - ExprResult Res; - if (!TryMoveInitialization(*this, Entity, NRInfo.Candidate, Value, - !getLangOpts().CPlusPlus20, false, Res)) - return Res; - } - if (!getDiagnostics().isIgnored(diag::warn_return_std_move, - Value->getExprLoc())) { - QualType QT = NRInfo.Candidate->getType(); - if (QT.getNonReferenceType().getUnqualifiedType().isTriviallyCopyableType( - Context)) { - // Adding 'std::move' around a trivially copyable variable is probably - // pointless. Don't suggest it. - } else { - ExprResult FakeRes = ExprError(); - Expr *FakeValue = Value; - TryMoveInitialization(*this, Entity, NRInfo.Candidate, FakeValue, false, - true, FakeRes); - if (!FakeRes.isInvalid()) { - bool IsThrow = (Entity.getKind() == InitializedEntity::EK_Exception); - SmallString<32> Str; - Str += "std::move("; - Str += NRInfo.Candidate->getDeclName().getAsString(); - Str += ")"; - Diag(Value->getExprLoc(), diag::warn_return_std_move) - << Value->getSourceRange() << NRInfo.Candidate->getDeclName() - << IsThrow; - Diag(Value->getExprLoc(), diag::note_add_std_move) - << FixItHint::CreateReplacement(Value->getSourceRange(), Str); - } - } + if (getLangOpts().CPlusPlus11 && !getLangOpts().CPlusPlus2b && + NRInfo.isMoveEligible()) { + ImplicitCastExpr AsRvalue(ImplicitCastExpr::OnStack, Value->getType(), + CK_NoOp, Value, VK_XValue, FPOptionsOverride()); + Expr *InitExpr = &AsRvalue; + auto Kind = InitializationKind::CreateCopy(Value->getBeginLoc(), + Value->getBeginLoc()); + InitializationSequence Seq(*this, Entity, Kind, InitExpr); + auto Res = Seq.getFailedOverloadResult(); + if (Res == OR_Success || Res == OR_Deleted) { + // Promote "AsRvalue" to the heap, since we now need this + // expression node to persist. + Value = + ImplicitCastExpr::Create(Context, Value->getType(), CK_NoOp, Value, + nullptr, VK_XValue, FPOptionsOverride()); + // Complete type-checking the initialization of the return type + // using the constructor we found. + return Seq.Perform(*this, Entity, Kind, Value); } } - // Either we didn't meet the criteria for treating an lvalue as an rvalue, // above, or overload resolution failed. Either way, we need to try // (again) now with the return value expression as written. diff --git a/clang/lib/Sema/SemaType.cpp b/clang/lib/Sema/SemaType.cpp index f81e9948e66d1..303d8a7a9cd71 100644 --- a/clang/lib/Sema/SemaType.cpp +++ b/clang/lib/Sema/SemaType.cpp @@ -639,7 +639,7 @@ static void distributeFunctionTypeAttrFromDeclSpec(TypeProcessingState &state, // C++11 attributes before the decl specifiers actually appertain to // the declarators. Move them straight there. We don't support the // 'put them wherever you like' semantics we allow for GNU attributes. - if (attr.isCXX11Attribute()) { + if (attr.isStandardAttributeSyntax()) { moveAttrFromListToList(attr, state.getCurrentAttributes(), state.getDeclarator().getAttributes()); return; @@ -692,9 +692,9 @@ static void distributeTypeAttrsFromDeclarator(TypeProcessingState &state, // non-owning copy and iterate over that. ParsedAttributesView AttrsCopy{state.getDeclarator().getAttributes()}; for (ParsedAttr &attr : AttrsCopy) { - // Do not distribute C++11 attributes. They have strict rules for what + // Do not distribute [[]] attributes. They have strict rules for what // they appertain to. - if (attr.isCXX11Attribute()) + if (attr.isStandardAttributeSyntax()) continue; switch (attr.getKind()) { @@ -8141,7 +8141,7 @@ static void processTypeAttrs(TypeProcessingState &state, QualType &type, if (attr.isInvalid()) continue; - if (attr.isCXX11Attribute()) { + if (attr.isStandardAttributeSyntax()) { // [[gnu::...]] attributes are treated as declaration attributes, so may // not appertain to a DeclaratorChunk. If we handle them as type // attributes, accept them in that position and diagnose the GCC @@ -8170,8 +8170,8 @@ static void processTypeAttrs(TypeProcessingState &state, QualType &type, // otherwise, add it to the FnAttrs list for rechaining. switch (attr.getKind()) { default: - // A C++11 attribute on a declarator chunk must appertain to a type. - if (attr.isCXX11Attribute() && TAL == TAL_DeclChunk && + // A [[]] attribute on a declarator chunk must appertain to a type. + if (attr.isStandardAttributeSyntax() && TAL == TAL_DeclChunk && (!state.isProcessingLambdaExpr() || !attr.supportsNonconformingLambdaSyntax())) { state.getSema().Diag(attr.getLoc(), diag::err_attribute_not_type_attr) @@ -8181,7 +8181,7 @@ static void processTypeAttrs(TypeProcessingState &state, QualType &type, break; case ParsedAttr::UnknownAttribute: - if (attr.isCXX11Attribute() && TAL == TAL_DeclChunk) + if (attr.isStandardAttributeSyntax() && TAL == TAL_DeclChunk) state.getSema().Diag(attr.getLoc(), diag::warn_unknown_attribute_ignored) << attr << attr.getRange(); diff --git a/clang/lib/Sema/TreeTransform.h b/clang/lib/Sema/TreeTransform.h index 3f3284d76cd85..57864093e83d4 100644 --- a/clang/lib/Sema/TreeTransform.h +++ b/clang/lib/Sema/TreeTransform.h @@ -4352,10 +4352,10 @@ void TreeTransform::InventTemplateArgumentLoc( Arg, QualType(), getDerived().getBaseLocation()); } -template +template bool TreeTransform::TransformTemplateArgument( - const TemplateArgumentLoc &Input, - TemplateArgumentLoc &Output, bool Uneval) { + const TemplateArgumentLoc &Input, TemplateArgumentLoc &Output, + bool Uneval) { const TemplateArgument &Arg = Input.getArgument(); switch (Arg.getKind()) { case TemplateArgument::Null: @@ -4404,7 +4404,8 @@ bool TreeTransform::TransformTemplateArgument( DI = InventTypeSourceInfo(Input.getArgument().getAsType()); DI = getDerived().TransformType(DI); - if (!DI) return true; + if (!DI) + return true; Output = TemplateArgumentLoc(TemplateArgument(DI->getType()), DI); return false; @@ -4420,9 +4421,8 @@ bool TreeTransform::TransformTemplateArgument( CXXScopeSpec SS; SS.Adopt(QualifierLoc); - TemplateName Template - = getDerived().TransformTemplateName(SS, Arg.getAsTemplate(), - Input.getTemplateNameLoc()); + TemplateName Template = getDerived().TransformTemplateName( + SS, Arg.getAsTemplate(), Input.getTemplateNameLoc()); if (Template.isNull()) return true; @@ -4444,11 +4444,13 @@ bool TreeTransform::TransformTemplateArgument( Sema::ExpressionEvaluationContextRecord::EK_TemplateArgument); Expr *InputExpr = Input.getSourceExpression(); - if (!InputExpr) InputExpr = Input.getArgument().getAsExpr(); + if (!InputExpr) + InputExpr = Input.getArgument().getAsExpr(); ExprResult E = getDerived().TransformExpr(InputExpr); E = SemaRef.ActOnConstantExpression(E); - if (E.isInvalid()) return true; + if (E.isInvalid()) + return true; Output = TemplateArgumentLoc(TemplateArgument(E.get()), E.get()); return false; } diff --git a/clang/lib/Serialization/ASTReaderDecl.cpp b/clang/lib/Serialization/ASTReaderDecl.cpp index 1d9bae5d3129c..ff79f91e5db1b 100644 --- a/clang/lib/Serialization/ASTReaderDecl.cpp +++ b/clang/lib/Serialization/ASTReaderDecl.cpp @@ -3067,7 +3067,7 @@ static bool hasSameOverloadableAttrs(const FunctionDecl *A, return true; } -/// Determine whether the two declarations refer to the same entity.pr +/// Determine whether the two declarations refer to the same entity. static bool isSameEntity(NamedDecl *X, NamedDecl *Y) { assert(X->getDeclName() == Y->getDeclName() && "Declaration name mismatch!"); @@ -3261,10 +3261,19 @@ static bool isSameEntity(NamedDecl *X, NamedDecl *Y) { return isSameQualifier(UX->getQualifier(), UY->getQualifier()) && UX->isAccessDeclaration() == UY->isAccessDeclaration(); } - if (const auto *UX = dyn_cast(X)) + if (const auto *UX = dyn_cast(X)) { return isSameQualifier( UX->getQualifier(), cast(Y)->getQualifier()); + } + + // Using-pack declarations are only created by instantiation, and match if + // they're instantiated from matching UnresolvedUsing...Decls. + if (const auto *UX = dyn_cast(X)) { + return declaresSameEntity( + UX->getInstantiatedFromUsingDecl(), + cast(Y)->getInstantiatedFromUsingDecl()); + } // Namespace alias definitions with the same target match. if (const auto *NAX = dyn_cast(X)) { diff --git a/clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp index 96f0d9bb3c3de..40472ccfe7e66 100644 --- a/clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/PaddingChecker.cpp @@ -193,6 +193,11 @@ class PaddingChecker : public Checker> { CharUnits PaddingSum; CharUnits Offset = ASTContext.toCharUnitsFromBits(RL.getFieldOffset(0)); for (const FieldDecl *FD : RD->fields()) { + // Skip field that is a subobject of zero size, marked with + // [[no_unique_address]] or an empty bitfield, because its address can be + // set the same as the other fields addresses. + if (FD->isZeroSize(ASTContext)) + continue; // This checker only cares about the padded size of the // field, and not the data size. If the field is a record // with tail padding, then we won't put that number in our @@ -249,7 +254,7 @@ class PaddingChecker : public Checker> { RetVal.Field = FD; auto &Ctx = FD->getASTContext(); auto Info = Ctx.getTypeInfoInChars(FD->getType()); - RetVal.Size = Info.Width; + RetVal.Size = FD->isZeroSize(Ctx) ? CharUnits::Zero() : Info.Width; RetVal.Align = Info.Align; assert(llvm::isPowerOf2_64(RetVal.Align.getQuantity())); if (auto Max = FD->getMaxAlignment()) diff --git a/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp b/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp index 86cecf6524f03..e09399a83589e 100644 --- a/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp +++ b/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp @@ -33,21 +33,20 @@ using namespace clang; using namespace ento; bool CheckerManager::hasPathSensitiveCheckers() const { - return !StmtCheckers.empty() || - !PreObjCMessageCheckers.empty() || - !PostObjCMessageCheckers.empty() || - !PreCallCheckers.empty() || - !PostCallCheckers.empty() || - !LocationCheckers.empty() || - !BindCheckers.empty() || - !EndAnalysisCheckers.empty() || - !EndFunctionCheckers.empty() || - !BranchConditionCheckers.empty() || - !LiveSymbolsCheckers.empty() || - !DeadSymbolsCheckers.empty() || - !RegionChangesCheckers.empty() || - !EvalAssumeCheckers.empty() || - !EvalCallCheckers.empty(); + const auto IfAnyAreNonEmpty = [](const auto &... Callbacks) -> bool { + bool Result = false; + // FIXME: Use fold expressions in C++17. + LLVM_ATTRIBUTE_UNUSED int Unused[]{0, (Result |= !Callbacks.empty())...}; + return Result; + }; + return IfAnyAreNonEmpty( + StmtCheckers, PreObjCMessageCheckers, ObjCMessageNilCheckers, + PostObjCMessageCheckers, PreCallCheckers, PostCallCheckers, + LocationCheckers, BindCheckers, EndAnalysisCheckers, + BeginFunctionCheckers, EndFunctionCheckers, BranchConditionCheckers, + NewAllocatorCheckers, LiveSymbolsCheckers, DeadSymbolsCheckers, + RegionChangesCheckers, PointerEscapeCheckers, EvalAssumeCheckers, + EvalCallCheckers, EndOfTranslationUnitCheckers); } void CheckerManager::finishedCheckerRegistration() { diff --git a/clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp b/clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp index a1c8128f1650a..7ad3dca831ac4 100644 --- a/clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp +++ b/clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp @@ -282,29 +282,14 @@ ProgramStateRef ExprEngine::handleLValueBitCast( return state; } -ProgramStateRef ExprEngine::handleLVectorSplat( - ProgramStateRef state, const LocationContext* LCtx, const CastExpr* CastE, - StmtNodeBuilder &Bldr, ExplodedNode* Pred) { - // Recover some path sensitivity by conjuring a new value. - QualType resultType = CastE->getType(); - if (CastE->isGLValue()) - resultType = getContext().getPointerType(resultType); - SVal result = svalBuilder.conjureSymbolVal(nullptr, CastE, LCtx, - resultType, - currBldrCtx->blockCount()); - state = state->BindExpr(CastE, LCtx, result); - Bldr.generateNode(CastE, Pred, state); - - return state; -} - void ExprEngine::VisitCast(const CastExpr *CastE, const Expr *Ex, ExplodedNode *Pred, ExplodedNodeSet &Dst) { ExplodedNodeSet dstPreStmt; getCheckerManager().runCheckersForPreStmt(dstPreStmt, Pred, CastE, *this); - if (CastE->getCastKind() == CK_LValueToRValue) { + if (CastE->getCastKind() == CK_LValueToRValue || + CastE->getCastKind() == CK_LValueToRValueBitCast) { for (ExplodedNodeSet::iterator I = dstPreStmt.begin(), E = dstPreStmt.end(); I!=E; ++I) { ExplodedNode *subExprNode = *I; @@ -332,6 +317,7 @@ void ExprEngine::VisitCast(const CastExpr *CastE, const Expr *Ex, switch (CastE->getCastKind()) { case CK_LValueToRValue: + case CK_LValueToRValueBitCast: llvm_unreachable("LValueToRValue casts handled earlier."); case CK_ToVoid: continue; @@ -380,7 +366,6 @@ void ExprEngine::VisitCast(const CastExpr *CastE, const Expr *Ex, case CK_Dependent: case CK_ArrayToPointerDecay: case CK_BitCast: - case CK_LValueToRValueBitCast: case CK_AddressSpaceConversion: case CK_BooleanToSignedIntegral: case CK_IntegralToPointer: @@ -534,17 +519,20 @@ void ExprEngine::VisitCast(const CastExpr *CastE, const Expr *Ex, continue; } // Explicitly proceed with default handler for this case cascade. - state = handleLVectorSplat(state, LCtx, CastE, Bldr, Pred); - continue; } + LLVM_FALLTHROUGH; // Various C++ casts that are not handled yet. case CK_ToUnion: + case CK_MatrixCast: case CK_VectorSplat: { - state = handleLVectorSplat(state, LCtx, CastE, Bldr, Pred); - continue; - } - case CK_MatrixCast: { - // TODO: Handle MatrixCast here. + QualType resultType = CastE->getType(); + if (CastE->isGLValue()) + resultType = getContext().getPointerType(resultType); + SVal result = svalBuilder.conjureSymbolVal( + /*symbolTag=*/nullptr, CastE, LCtx, resultType, + currBldrCtx->blockCount()); + state = state->BindExpr(CastE, LCtx, result); + Bldr.generateNode(CastE, Pred, state); continue; } } diff --git a/clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp b/clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp index 6d17bcb8b87f0..0e57a1a5040fc 100644 --- a/clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp +++ b/clang/lib/StaticAnalyzer/Core/RangeConstraintManager.cpp @@ -549,14 +549,13 @@ class EquivalenceClass : public llvm::FoldingSetNode { SymbolRef Sym); /// Merge classes for the given symbols and return a new state. - LLVM_NODISCARD static inline ProgramStateRef - merge(BasicValueFactory &BV, RangeSet::Factory &F, ProgramStateRef State, - SymbolRef First, SymbolRef Second); + LLVM_NODISCARD static inline ProgramStateRef merge(RangeSet::Factory &F, + ProgramStateRef State, + SymbolRef First, + SymbolRef Second); // Merge this class with the given class and return a new state. - LLVM_NODISCARD inline ProgramStateRef merge(BasicValueFactory &BV, - RangeSet::Factory &F, - ProgramStateRef State, - EquivalenceClass Other); + LLVM_NODISCARD inline ProgramStateRef + merge(RangeSet::Factory &F, ProgramStateRef State, EquivalenceClass Other); /// Return a set of class members for the given state. LLVM_NODISCARD inline SymbolSet getClassMembers(ProgramStateRef State) const; @@ -567,15 +566,14 @@ class EquivalenceClass : public llvm::FoldingSetNode { SymbolReaper &Reaper) const; LLVM_NODISCARD static inline ProgramStateRef - markDisequal(BasicValueFactory &BV, RangeSet::Factory &F, - ProgramStateRef State, SymbolRef First, SymbolRef Second); + markDisequal(RangeSet::Factory &F, ProgramStateRef State, SymbolRef First, + SymbolRef Second); LLVM_NODISCARD static inline ProgramStateRef - markDisequal(BasicValueFactory &BV, RangeSet::Factory &F, - ProgramStateRef State, EquivalenceClass First, - EquivalenceClass Second); + markDisequal(RangeSet::Factory &F, ProgramStateRef State, + EquivalenceClass First, EquivalenceClass Second); LLVM_NODISCARD inline ProgramStateRef - markDisequal(BasicValueFactory &BV, RangeSet::Factory &F, - ProgramStateRef State, EquivalenceClass Other) const; + markDisequal(RangeSet::Factory &F, ProgramStateRef State, + EquivalenceClass Other) const; LLVM_NODISCARD static inline ClassSet getDisequalClasses(ProgramStateRef State, SymbolRef Sym); LLVM_NODISCARD inline ClassSet @@ -636,15 +634,13 @@ class EquivalenceClass : public llvm::FoldingSetNode { } static inline SymbolSet::Factory &getMembersFactory(ProgramStateRef State); - inline ProgramStateRef mergeImpl(BasicValueFactory &BV, RangeSet::Factory &F, - ProgramStateRef State, SymbolSet Members, - EquivalenceClass Other, + inline ProgramStateRef mergeImpl(RangeSet::Factory &F, ProgramStateRef State, + SymbolSet Members, EquivalenceClass Other, SymbolSet OtherMembers); static inline bool addToDisequalityInfo(DisequalityMapTy &Info, ConstraintRangeTy &Constraints, - BasicValueFactory &BV, RangeSet::Factory &F, - ProgramStateRef State, EquivalenceClass First, - EquivalenceClass Second); + RangeSet::Factory &F, ProgramStateRef State, + EquivalenceClass First, EquivalenceClass Second); /// This is a unique identifier of the class. uintptr_t ID; @@ -735,8 +731,7 @@ struct EqualityInfo { //===----------------------------------------------------------------------===// template -LLVM_NODISCARD inline RangeSet intersect(BasicValueFactory &BV, - RangeSet::Factory &F, RangeSet Head, +LLVM_NODISCARD inline RangeSet intersect(RangeSet::Factory &F, RangeSet Head, SecondTy Second, RestTy... Tail); template struct IntersectionTraits; @@ -759,15 +754,14 @@ struct IntersectionTraits { }; template -LLVM_NODISCARD inline EndTy intersect(BasicValueFactory &BV, - RangeSet::Factory &F, EndTy End) { +LLVM_NODISCARD inline EndTy intersect(RangeSet::Factory &F, EndTy End) { // If the list contains only RangeSet or Optional, simply return // that range set. return End; } LLVM_NODISCARD LLVM_ATTRIBUTE_UNUSED inline Optional -intersect(BasicValueFactory &BV, RangeSet::Factory &F, const RangeSet *End) { +intersect(RangeSet::Factory &F, const RangeSet *End) { // This is an extraneous conversion from a raw pointer into Optional if (End) { return *End; @@ -776,25 +770,23 @@ intersect(BasicValueFactory &BV, RangeSet::Factory &F, const RangeSet *End) { } template -LLVM_NODISCARD inline RangeSet intersect(BasicValueFactory &BV, - RangeSet::Factory &F, RangeSet Head, +LLVM_NODISCARD inline RangeSet intersect(RangeSet::Factory &F, RangeSet Head, RangeSet Second, RestTy... Tail) { // Here we call either the or version // of the function and can be sure that the result is RangeSet. - return intersect(BV, F, F.intersect(Head, Second), Tail...); + return intersect(F, F.intersect(Head, Second), Tail...); } template -LLVM_NODISCARD inline RangeSet intersect(BasicValueFactory &BV, - RangeSet::Factory &F, RangeSet Head, +LLVM_NODISCARD inline RangeSet intersect(RangeSet::Factory &F, RangeSet Head, SecondTy Second, RestTy... Tail) { if (Second) { // Here we call the version of the function... - return intersect(BV, F, Head, *Second, Tail...); + return intersect(F, Head, *Second, Tail...); } // ...and here it is either or , which // means that the result is definitely RangeSet. - return intersect(BV, F, Head, Tail...); + return intersect(F, Head, Tail...); } /// Main generic intersect function. @@ -819,12 +811,12 @@ LLVM_NODISCARD inline RangeSet intersect(BasicValueFactory &BV, template LLVM_NODISCARD inline typename IntersectionTraits::Type - intersect(BasicValueFactory &BV, RangeSet::Factory &F, HeadTy Head, - SecondTy Second, RestTy... Tail) { + intersect(RangeSet::Factory &F, HeadTy Head, SecondTy Second, + RestTy... Tail) { if (Head) { - return intersect(BV, F, *Head, Second, Tail...); + return intersect(F, *Head, Second, Tail...); } - return intersect(BV, F, Second, Tail...); + return intersect(F, Second, Tail...); } //===----------------------------------------------------------------------===// @@ -840,9 +832,9 @@ class SymbolicRangeInferrer : public SymExprVisitor { public: template - static RangeSet inferRange(BasicValueFactory &BV, RangeSet::Factory &F, - ProgramStateRef State, SourceType Origin) { - SymbolicRangeInferrer Inferrer(BV, F, State); + static RangeSet inferRange(RangeSet::Factory &F, ProgramStateRef State, + SourceType Origin) { + SymbolicRangeInferrer Inferrer(F, State); return Inferrer.infer(Origin); } @@ -867,9 +859,8 @@ class SymbolicRangeInferrer } private: - SymbolicRangeInferrer(BasicValueFactory &BV, RangeSet::Factory &F, - ProgramStateRef S) - : ValueFactory(BV), RangeFactory(F), State(S) {} + SymbolicRangeInferrer(RangeSet::Factory &F, ProgramStateRef S) + : ValueFactory(F.getValueFactory()), RangeFactory(F), State(S) {} /// Infer range information from the given integer constant. /// @@ -894,7 +885,7 @@ class SymbolicRangeInferrer RangeSet infer(SymbolRef Sym) { if (Optional ConstraintBasedRange = intersect( - ValueFactory, RangeFactory, getConstraint(State, Sym), + RangeFactory, getConstraint(State, Sym), // If Sym is a difference of symbols A - B, then maybe we have range // set stored for B - A. // @@ -1520,12 +1511,12 @@ class RangeConstraintManager : public RangedConstraintManager { ProgramStateRef trackDisequality(ProgramStateRef State, SymbolRef LHS, SymbolRef RHS) { - return EquivalenceClass::markDisequal(getBasicVals(), F, State, LHS, RHS); + return EquivalenceClass::markDisequal(F, State, LHS, RHS); } ProgramStateRef trackEquality(ProgramStateRef State, SymbolRef LHS, SymbolRef RHS) { - return EquivalenceClass::merge(getBasicVals(), F, State, LHS, RHS); + return EquivalenceClass::merge(F, State, LHS, RHS); } LLVM_NODISCARD ProgramStateRef setConstraint(ProgramStateRef State, @@ -1649,19 +1640,17 @@ inline EquivalenceClass EquivalenceClass::find(ProgramStateRef State, return Sym; } -inline ProgramStateRef EquivalenceClass::merge(BasicValueFactory &BV, - RangeSet::Factory &F, +inline ProgramStateRef EquivalenceClass::merge(RangeSet::Factory &F, ProgramStateRef State, SymbolRef First, SymbolRef Second) { EquivalenceClass FirstClass = find(State, First); EquivalenceClass SecondClass = find(State, Second); - return FirstClass.merge(BV, F, State, SecondClass); + return FirstClass.merge(F, State, SecondClass); } -inline ProgramStateRef EquivalenceClass::merge(BasicValueFactory &BV, - RangeSet::Factory &F, +inline ProgramStateRef EquivalenceClass::merge(RangeSet::Factory &F, ProgramStateRef State, EquivalenceClass Other) { // It is already the same class. @@ -1689,15 +1678,14 @@ inline ProgramStateRef EquivalenceClass::merge(BasicValueFactory &BV, // its members. Merging is not a trivial operation, so it's easier to // merge the smaller class into the bigger one. if (Members.getHeight() >= OtherMembers.getHeight()) { - return mergeImpl(BV, F, State, Members, Other, OtherMembers); + return mergeImpl(F, State, Members, Other, OtherMembers); } else { - return Other.mergeImpl(BV, F, State, OtherMembers, *this, Members); + return Other.mergeImpl(F, State, OtherMembers, *this, Members); } } inline ProgramStateRef -EquivalenceClass::mergeImpl(BasicValueFactory &ValueFactory, - RangeSet::Factory &RangeFactory, +EquivalenceClass::mergeImpl(RangeSet::Factory &RangeFactory, ProgramStateRef State, SymbolSet MyMembers, EquivalenceClass Other, SymbolSet OtherMembers) { // Essentially what we try to recreate here is some kind of union-find @@ -1720,7 +1708,7 @@ EquivalenceClass::mergeImpl(BasicValueFactory &ValueFactory, // Intersection here makes perfect sense because both of these constraints // must hold for the whole new class. if (Optional NewClassConstraint = - intersect(ValueFactory, RangeFactory, getConstraint(State, *this), + intersect(RangeFactory, getConstraint(State, *this), getConstraint(State, Other))) { // NOTE: Essentially, NewClassConstraint should NEVER be infeasible because // range inferrer shouldn't generate ranges incompatible with @@ -1833,25 +1821,22 @@ bool EquivalenceClass::isTriviallyDead(ProgramStateRef State, return isTrivial(State) && Reaper.isDead(getRepresentativeSymbol()); } -inline ProgramStateRef EquivalenceClass::markDisequal(BasicValueFactory &VF, - RangeSet::Factory &RF, +inline ProgramStateRef EquivalenceClass::markDisequal(RangeSet::Factory &RF, ProgramStateRef State, SymbolRef First, SymbolRef Second) { - return markDisequal(VF, RF, State, find(State, First), find(State, Second)); + return markDisequal(RF, State, find(State, First), find(State, Second)); } -inline ProgramStateRef EquivalenceClass::markDisequal(BasicValueFactory &VF, - RangeSet::Factory &RF, +inline ProgramStateRef EquivalenceClass::markDisequal(RangeSet::Factory &RF, ProgramStateRef State, EquivalenceClass First, EquivalenceClass Second) { - return First.markDisequal(VF, RF, State, Second); + return First.markDisequal(RF, State, Second); } inline ProgramStateRef -EquivalenceClass::markDisequal(BasicValueFactory &VF, RangeSet::Factory &RF, - ProgramStateRef State, +EquivalenceClass::markDisequal(RangeSet::Factory &RF, ProgramStateRef State, EquivalenceClass Other) const { // If we know that two classes are equal, we can only produce an infeasible // state. @@ -1864,9 +1849,9 @@ EquivalenceClass::markDisequal(BasicValueFactory &VF, RangeSet::Factory &RF, // Disequality is a symmetric relation, so if we mark A as disequal to B, // we should also mark B as disequalt to A. - if (!addToDisequalityInfo(DisequalityInfo, Constraints, VF, RF, State, *this, + if (!addToDisequalityInfo(DisequalityInfo, Constraints, RF, State, *this, Other) || - !addToDisequalityInfo(DisequalityInfo, Constraints, VF, RF, State, Other, + !addToDisequalityInfo(DisequalityInfo, Constraints, RF, State, Other, *this)) return nullptr; @@ -1881,8 +1866,8 @@ EquivalenceClass::markDisequal(BasicValueFactory &VF, RangeSet::Factory &RF, inline bool EquivalenceClass::addToDisequalityInfo( DisequalityMapTy &Info, ConstraintRangeTy &Constraints, - BasicValueFactory &VF, RangeSet::Factory &RF, ProgramStateRef State, - EquivalenceClass First, EquivalenceClass Second) { + RangeSet::Factory &RF, ProgramStateRef State, EquivalenceClass First, + EquivalenceClass Second) { // 1. Get all of the required factories. DisequalityMapTy::Factory &F = State->get_context(); @@ -1905,7 +1890,7 @@ inline bool EquivalenceClass::addToDisequalityInfo( if (const llvm::APSInt *Point = SecondConstraint->getConcreteValue()) { RangeSet FirstConstraint = SymbolicRangeInferrer::inferRange( - VF, RF, State, First.getRepresentativeSymbol()); + RF, State, First.getRepresentativeSymbol()); FirstConstraint = RF.deletePoint(FirstConstraint, *Point); @@ -1960,7 +1945,7 @@ LLVM_NODISCARD ProgramStateRef EquivalenceClass::simplify( // The simplified symbol should be the member of the original Class, // however, it might be in another existing class at the moment. We // have to merge these classes. - State = merge(SVB.getBasicValueFactory(), F, State, ClassOfSimplifiedSym); + State = merge(F, State, ClassOfSimplifiedSym); if (!State) return nullptr; } @@ -2249,12 +2234,12 @@ RangeConstraintManager::removeDeadBindings(ProgramStateRef State, RangeSet RangeConstraintManager::getRange(ProgramStateRef State, SymbolRef Sym) { - return SymbolicRangeInferrer::inferRange(getBasicVals(), F, State, Sym); + return SymbolicRangeInferrer::inferRange(F, State, Sym); } RangeSet RangeConstraintManager::getRange(ProgramStateRef State, EquivalenceClass Class) { - return SymbolicRangeInferrer::inferRange(getBasicVals(), F, State, Class); + return SymbolicRangeInferrer::inferRange(F, State, Class); } //===------------------------------------------------------------------------=== diff --git a/clang/lib/StaticAnalyzer/Core/SVals.cpp b/clang/lib/StaticAnalyzer/Core/SVals.cpp index 252596887e4f1..117546e43b1a1 100644 --- a/clang/lib/StaticAnalyzer/Core/SVals.cpp +++ b/clang/lib/StaticAnalyzer/Core/SVals.cpp @@ -12,6 +12,7 @@ //===----------------------------------------------------------------------===// #include "clang/StaticAnalyzer/Core/PathSensitive/SVals.h" +#include "clang/AST/ASTContext.h" #include "clang/AST/Decl.h" #include "clang/AST/DeclCXX.h" #include "clang/AST/Expr.h" @@ -21,6 +22,7 @@ #include "clang/StaticAnalyzer/Core/PathSensitive/BasicValueFactory.h" #include "clang/StaticAnalyzer/Core/PathSensitive/MemRegion.h" #include "clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h" +#include "clang/StaticAnalyzer/Core/PathSensitive/SValVisitor.h" #include "clang/StaticAnalyzer/Core/PathSensitive/SymExpr.h" #include "clang/StaticAnalyzer/Core/PathSensitive/SymbolManager.h" #include "llvm/ADT/Optional.h" @@ -136,6 +138,63 @@ const MemRegion *SVal::getAsRegion() const { return nullptr; } +namespace { +class TypeRetrievingVisitor + : public FullSValVisitor { +private: + const ASTContext &Context; + +public: + TypeRetrievingVisitor(const ASTContext &Context) : Context(Context) {} + + QualType VisitLocMemRegionVal(loc::MemRegionVal MRV) { + return Visit(MRV.getRegion()); + } + QualType VisitLocGotoLabel(loc::GotoLabel GL) { + return QualType{Context.VoidPtrTy}; + } + template QualType VisitConcreteInt(ConcreteInt CI) { + const llvm::APSInt &Value = CI.getValue(); + return Context.getIntTypeForBitwidth(Value.getBitWidth(), Value.isSigned()); + } + QualType VisitLocConcreteInt(loc::ConcreteInt CI) { + return VisitConcreteInt(CI); + } + QualType VisitNonLocConcreteInt(nonloc::ConcreteInt CI) { + return VisitConcreteInt(CI); + } + QualType VisitNonLocLocAsInteger(nonloc::LocAsInteger LI) { + QualType NestedType = Visit(LI.getLoc()); + if (NestedType.isNull()) + return NestedType; + + return Context.getIntTypeForBitwidth(LI.getNumBits(), + NestedType->isSignedIntegerType()); + } + QualType VisitNonLocCompoundVal(nonloc::CompoundVal CV) { + return CV.getValue()->getType(); + } + QualType VisitNonLocLazyCompoundVal(nonloc::LazyCompoundVal LCV) { + return LCV.getRegion()->getValueType(); + } + QualType VisitNonLocSymbolVal(nonloc::SymbolVal SV) { + return Visit(SV.getSymbol()); + } + QualType VisitSymbolicRegion(const SymbolicRegion *SR) { + return Visit(SR->getSymbol()); + } + QualType VisitTypedRegion(const TypedRegion *TR) { + return TR->getLocationType(); + } + QualType VisitSymExpr(const SymExpr *SE) { return SE->getType(); } +}; +} // end anonymous namespace + +QualType SVal::getType(const ASTContext &Context) const { + TypeRetrievingVisitor TRV{Context}; + return TRV.Visit(*this); +} + const MemRegion *loc::MemRegionVal::stripCasts(bool StripBaseCasts) const { const MemRegion *R = getRegion(); return R ? R->StripCasts(StripBaseCasts) : nullptr; diff --git a/clang/lib/Tooling/ExpandResponseFilesCompilationDatabase.cpp b/clang/lib/Tooling/ExpandResponseFilesCompilationDatabase.cpp index a825370afcf56..29787b8a88942 100644 --- a/clang/lib/Tooling/ExpandResponseFilesCompilationDatabase.cpp +++ b/clang/lib/Tooling/ExpandResponseFilesCompilationDatabase.cpp @@ -54,7 +54,8 @@ class ExpandResponseFilesDatabase : public CompilationDatabase { Argv.reserve(Cmd.CommandLine.size()); for (auto &Arg : Cmd.CommandLine) { Argv.push_back(Arg.c_str()); - SeenRSPFile |= Arg.front() == '@'; + if (!Arg.empty()) + SeenRSPFile |= Arg.front() == '@'; } if (!SeenRSPFile) continue; diff --git a/clang/test/AST/arithmetic-fence-builtin.c b/clang/test/AST/arithmetic-fence-builtin.c new file mode 100644 index 0000000000000..46666b3c8bed5 --- /dev/null +++ b/clang/test/AST/arithmetic-fence-builtin.c @@ -0,0 +1,46 @@ +// Tests without serialization: +// RUN: %clang_cc1 -ast-dump -triple i386-pc-linux-gnu %s \ +// RUN: | FileCheck %s --strict-whitespace --check-prefixes=CHECK,CHECK1 +// +// RUN: %clang_cc1 -ast-dump -triple i386-pc-linux-gnu -DFAST -mreassociate %s \ +// RUN: | FileCheck %s --strict-whitespace --check-prefixes=CHECK,CHECK1 +// +// RUN: %clang_cc1 -ast-dump -triple i386-pc-linux-gnu -DFAST -mreassociate %s \ +// RUN: -fprotect-parens \ +// RUN: | FileCheck %s --strict-whitespace --check-prefixes=CHECK,CHECK2 +// +// Tests with serialization: +// RUN: %clang_cc1 -ast-dump -triple i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -triple i386-pc-linux-gnu -include-pch %t -ast-dump-all /dev/null \ +// RUN: | FileCheck %s --strict-whitespace +// +// RUN: %clang_cc1 -ast-dump -triple i386-pc-linux-gnu -DFAST -mreassociate %s \ +// RUN: -emit-pch -o %t +// RUN: %clang_cc1 -triple i386-pc-linux-gnu -include-pch %t -ast-dump-all /dev/null \ +// RUN: | FileCheck %s --strict-whitespace --check-prefixes=CHECK,CHECK1 +// +// RUN: %clang_cc1 -ast-dump -triple i386-pc-linux-gnu -DFAST -mreassociate %s \ +// RUN: -fprotect-parens \ +// RUN: -emit-pch -o %t +// RUN: %clang_cc1 -triple i386-pc-linux-gnu -include-pch %t -ast-dump-all /dev/null -fprotect-parens\ +// RUN: | FileCheck %s --strict-whitespace --check-prefixes=CHECK,CHECK2 + +// +int v; +int addit(float a, float b) { + + v = __arithmetic_fence(a + b); + + v = (a + b); + + return 0; +} +//CHECK:| `-CompoundStmt {{.*}} +//CHECK-NEXT:| |-BinaryOperator {{.*}} 'int' '=' +//CHECK-NEXT:| | |-DeclRefExpr {{.*}} 'int' lvalue Var {{.*}} 'v' 'int' +//CHECK-NEXT:| | `-ImplicitCastExpr {{.*}} +//CHECK-NEXT:| | `-CallExpr {{.*}} 'float' +//CHECK-NEXT:| | |-ImplicitCastExpr {{.*}} +//CHECK-NEXT:| | | `-DeclRefExpr {{.*}}' Function {{.*}} '__arithmetic_fence'{{.*}} +//CHECK1-NOT:| | | `-DeclRefExpr {{.*}}' Function{{.*}} '__arithmetic_fence' 'void ()' +//CHECK2:| | | `-DeclRefExpr {{.*}} Function{{.*}} '__arithmetic_fence' 'void ()' diff --git a/clang/test/AST/ast-dump-c-attr.c b/clang/test/AST/ast-dump-c-attr.c index 7d18f0cdc9f13..1f28501f1bb02 100644 --- a/clang/test/AST/ast-dump-c-attr.c +++ b/clang/test/AST/ast-dump-c-attr.c @@ -52,8 +52,3 @@ struct [[deprecated]] Test8; void Test11 [[deprecated]](void); // CHECK: FunctionDecl{{.*}}Test11 // CHECK-NEXT: DeprecatedAttr 0x{{[^ ]*}} "" "" - -void Test12(void) [[deprecated]] {} -// CHECK: FunctionDecl{{.*}}Test12 -// CHECK-NEXT: CompoundStmt -// CHECK-NEXT: DeprecatedAttr 0x{{[^ ]*}} "" "" diff --git a/clang/test/Analysis/builtin_bitcast.cpp b/clang/test/Analysis/builtin_bitcast.cpp new file mode 100644 index 0000000000000..396e7caa45f6a --- /dev/null +++ b/clang/test/Analysis/builtin_bitcast.cpp @@ -0,0 +1,32 @@ +// RUN: %clang_analyze_cc1 -triple x86_64-unknown-unknown -verify %s \ +// RUN: -analyzer-checker=core,debug.ExprInspection + +template void clang_analyzer_dump(T); + +__attribute__((always_inline)) static inline constexpr unsigned int _castf32_u32(float __A) { + return __builtin_bit_cast(unsigned int, __A); // no-warning +} + +void test(int i) { + _castf32_u32(42); + + float f = 42; + + // Loading from a floating point value results in unknown, + // which later materializes as a conjured value. + auto g = __builtin_bit_cast(unsigned int, f); + clang_analyzer_dump(g); + // expected-warning-re@-1 {{{{^conj_\$[0-9]+{unsigned int,}}}} + + auto g2 = __builtin_bit_cast(unsigned int, 42.0f); + clang_analyzer_dump(g2); + // expected-warning-re@-1 {{{{^conj_\$[0-9]+{unsigned int,}}}} + + auto g3 = __builtin_bit_cast(unsigned int, i); + clang_analyzer_dump(g3); + // expected-warning-re@-1 {{{{^reg_\$[0-9]+}}}} + + auto g4 = __builtin_bit_cast(unsigned long, &i); + clang_analyzer_dump(g4); + // expected-warning@-1 {{&i [as 64 bit integer]}} +} diff --git a/clang/test/Analysis/casts.c b/clang/test/Analysis/casts.c index 6b9108ac6bb03..ce195297874b1 100644 --- a/clang/test/Analysis/casts.c +++ b/clang/test/Analysis/casts.c @@ -1,7 +1,7 @@ -// RUN: %clang_analyze_cc1 -triple x86_64-apple-darwin9 -analyzer-checker=core,alpha.core,debug.ExprInspection -analyzer-store=region -Wno-pointer-to-int-cast -verify -analyzer-config eagerly-assume=false %s -// RUN: %clang_analyze_cc1 -triple i386-apple-darwin9 -analyzer-checker=core,alpha.core,debug.ExprInspection -analyzer-store=region -Wno-pointer-to-int-cast -verify -analyzer-config eagerly-assume=false %s -// RUN: %clang_analyze_cc1 -triple x86_64-apple-darwin9 -analyzer-checker=core,alpha.core,debug.ExprInspection -Wno-pointer-to-int-cast -verify -DEAGERLY_ASSUME=1 -w %s -// RUN: %clang_analyze_cc1 -triple i386-apple-darwin9 -analyzer-checker=core,alpha.core,debug.ExprInspection -Wno-pointer-to-int-cast -verify -DEAGERLY_ASSUME=1 -DBIT32=1 -w %s +// RUN: %clang_analyze_cc1 -triple x86_64-apple-darwin9 -fenable-matrix -analyzer-checker=core,alpha.core,debug.ExprInspection -analyzer-store=region -Wno-pointer-to-int-cast -verify -analyzer-config eagerly-assume=false %s +// RUN: %clang_analyze_cc1 -triple i386-apple-darwin9 -fenable-matrix -analyzer-checker=core,alpha.core,debug.ExprInspection -analyzer-store=region -Wno-pointer-to-int-cast -verify -analyzer-config eagerly-assume=false %s +// RUN: %clang_analyze_cc1 -triple x86_64-apple-darwin9 -fenable-matrix -analyzer-checker=core,alpha.core,debug.ExprInspection -Wno-pointer-to-int-cast -verify -DEAGERLY_ASSUME=1 -w %s +// RUN: %clang_analyze_cc1 -triple i386-apple-darwin9 -fenable-matrix -analyzer-checker=core,alpha.core,debug.ExprInspection -Wno-pointer-to-int-cast -verify -DEAGERLY_ASSUME=1 -DBIT32=1 -w %s extern void clang_analyzer_eval(_Bool); @@ -193,6 +193,27 @@ void testSwitchWithSizeofs() { } } +void test_ToUnion_cast(unsigned long long x) { + union Key { + unsigned long long data; + }; + void clang_analyzer_dump_union(union Key); + clang_analyzer_dump_union((union Key)x); // expected-warning {{Unknown}} +} + +typedef char cx5x5 __attribute__((matrix_type(5, 5))); +typedef int ix5x5 __attribute__((matrix_type(5, 5))); +void test_MatrixCast_cast(cx5x5 c) { + void clang_analyzer_dump_ix5x5(ix5x5); + clang_analyzer_dump_ix5x5((ix5x5)c); // expected-warning {{Unknown}} +} + +void test_VectorSplat_cast(long x) { + typedef int __attribute__((ext_vector_type(2))) V; + void clang_analyzer_dump_V(V); + clang_analyzer_dump_V((V)x); // expected-warning {{Unknown}} +} + #endif #ifdef EAGERLY_ASSUME diff --git a/clang/test/Analysis/padding_no_unique_address.cpp b/clang/test/Analysis/padding_no_unique_address.cpp new file mode 100644 index 0000000000000..4f26922c9450d --- /dev/null +++ b/clang/test/Analysis/padding_no_unique_address.cpp @@ -0,0 +1,30 @@ +// RUN: %clang_analyze_cc1 -std=c++14 -triple x86_64-linux-gnu -analyzer-checker=optin.performance -analyzer-config optin.performance.Padding:AllowedPad=2 -verify %s + +class Empty {}; // no-warning + +// expected-warning@+1{{Excessive padding in 'struct NoUniqueAddressWarn1' (6 padding}} +struct NoUniqueAddressWarn1 { + char c1; + [[no_unique_address]] Empty empty; + int i; + char c2; +}; + +// expected-warning@+1{{Excessive padding in 'struct NoUniqueAddressWarn2' (6 padding}} +struct NoUniqueAddressWarn2 { + char c1; + [[no_unique_address]] Empty e1, e2; + int i; + char c2; +}; + +struct NoUniqueAddressNoWarn1 { + char c1; + [[no_unique_address]] Empty empty; + char c2; +}; + +struct NoUniqueAddressNoWarn2 { + char c1; + [[no_unique_address]] Empty e1, e2; +}; diff --git a/clang/test/CXX/class/class.init/class.copy.elision/p3.cpp b/clang/test/CXX/class/class.init/class.copy.elision/p3.cpp index bf79ac9e0b85c..ed6bec97e0bf2 100644 --- a/clang/test/CXX/class/class.init/class.copy.elision/p3.cpp +++ b/clang/test/CXX/class/class.init/class.copy.elision/p3.cpp @@ -1,18 +1,17 @@ -// RUN: %clang_cc1 -std=c++2b -fsyntax-only -fcxx-exceptions -verify=expected,cxx20_2b,cxx2b %s -// RUN: %clang_cc1 -std=c++20 -fsyntax-only -fcxx-exceptions -verify=expected,cxx11_20,cxx20_2b %s -// RUN: %clang_cc1 -std=c++17 -fsyntax-only -fcxx-exceptions -verify=expected,cxx11_17,cxx11_20 %s -// RUN: %clang_cc1 -std=c++14 -fsyntax-only -fcxx-exceptions -verify=expected,cxx11_17,cxx11_20 %s -// RUN: %clang_cc1 -std=c++11 -fsyntax-only -fcxx-exceptions -verify=expected,cxx11_17,cxx11_20 %s +// RUN: %clang_cc1 -std=c++2b -fsyntax-only -fcxx-exceptions -verify=expected,cxx11_2b,cxx2b %s +// RUN: %clang_cc1 -std=c++20 -fsyntax-only -fcxx-exceptions -verify=expected,cxx98_20,cxx11_2b,cxx11_20 %s +// RUN: %clang_cc1 -std=c++11 -fsyntax-only -fcxx-exceptions -verify=expected,cxx98_20,cxx11_2b,cxx11_20 %s +// RUN: %clang_cc1 -std=c++98 -fsyntax-only -fcxx-exceptions -Wno-c++11-extensions -verify=expected,cxx98_20,cxx98 %s namespace test_delete_function { struct A1 { A1(); A1(const A1 &); - A1(A1 &&) = delete; // expected-note {{'A1' has been explicitly marked deleted here}} + A1(A1 &&) = delete; // cxx11_2b-note {{'A1' has been explicitly marked deleted here}} }; A1 test1() { A1 a; - return a; // expected-error {{call to deleted constructor of 'test_delete_function::A1'}} + return a; // cxx11_2b-error {{call to deleted constructor of 'test_delete_function::A1'}} } struct A2 { @@ -20,91 +19,90 @@ struct A2 { A2(const A2 &); private: - A2(A2 &&); // expected-note {{declared private here}} + A2(A2 &&); // cxx11_2b-note {{declared private here}} }; A2 test2() { A2 a; - return a; // expected-error {{calling a private constructor of class 'test_delete_function::A2'}} + return a; // cxx11_2b-error {{calling a private constructor of class 'test_delete_function::A2'}} } struct C {}; struct B1 { B1(C &); - B1(C &&) = delete; // expected-note {{'B1' has been explicitly marked deleted here}} + B1(C &&) = delete; // cxx11_2b-note {{'B1' has been explicitly marked deleted here}} }; B1 test3() { C c; - return c; // expected-error {{conversion function from 'test_delete_function::C' to 'test_delete_function::B1' invokes a deleted function}} + return c; // cxx11_2b-error {{conversion function from 'test_delete_function::C' to 'test_delete_function::B1' invokes a deleted function}} } struct B2 { B2(C &); private: - B2(C &&); // expected-note {{declared private here}} + B2(C &&); // cxx11_2b-note {{declared private here}} }; B2 test4() { C c; - return c; // expected-error {{calling a private constructor of class 'test_delete_function::B2'}} + return c; // cxx11_2b-error {{calling a private constructor of class 'test_delete_function::B2'}} } } // namespace test_delete_function -// In C++20, implicitly movable entity can be rvalue reference to non-volatile +// Implicitly movable entity can be rvalue reference to non-volatile // automatic object. namespace test_implicitly_movable_rvalue_ref { struct A1 { A1(A1 &&); - A1(const A1 &) = delete; // cxx11_17-note {{'A1' has been explicitly marked deleted here}} + A1(const A1 &) = delete; // cxx98-note {{marked deleted here}} }; A1 test1(A1 &&a) { - return a; // cxx11_17-error {{call to deleted constructor of 'test_implicitly_movable_rvalue_ref::A1'}} + return a; // cxx98-error {{call to deleted constructor}} } struct A2 { A2(A2 &&); private: - A2(const A2 &); // cxx11_17-note {{declared private here}} + A2(const A2 &); // cxx98-note {{declared private here}} }; A2 test2(A2 &&a) { - return a; // cxx11_17-error {{calling a private constructor of class 'test_implicitly_movable_rvalue_ref::A2'}} + return a; // cxx98-error {{calling a private constructor}} } struct B1 { B1(const B1 &); - B1(B1 &&) = delete; // cxx20_2b-note {{'B1' has been explicitly marked deleted here}} + B1(B1 &&) = delete; // cxx11_2b-note {{'B1' has been explicitly marked deleted here}} }; B1 test3(B1 &&b) { - return b; // cxx20_2b-error {{call to deleted constructor of 'test_implicitly_movable_rvalue_ref::B1'}} + return b; // cxx11_2b-error {{call to deleted constructor of 'test_implicitly_movable_rvalue_ref::B1'}} } struct B2 { B2(const B2 &); private: - B2(B2 &&); // cxx20_2b-note {{declared private here}} + B2(B2 &&); // cxx11_2b-note {{declared private here}} }; B2 test4(B2 &&b) { - return b; // cxx20_2b-error {{calling a private constructor of class 'test_implicitly_movable_rvalue_ref::B2'}} + return b; // cxx11_2b-error {{calling a private constructor of class 'test_implicitly_movable_rvalue_ref::B2'}} } } // namespace test_implicitly_movable_rvalue_ref -// In C++20, operand of throw-expression can be function parameter or +// Operand of throw-expression can be function parameter or // catch-clause parameter. namespace test_throw_parameter { void func(); struct A1 { A1(const A1 &); - A1(A1 &&) = delete; // cxx20_2b-note {{'A1' has been explicitly marked deleted here}} - // expected-note@-1 {{'A1' has been explicitly marked deleted here}} + A1(A1 &&) = delete; // cxx11_2b-note 2{{'A1' has been explicitly marked deleted here}} }; void test1() { try { func(); } catch (A1 a) { - throw a; // cxx20_2b-error {{call to deleted constructor of 'test_throw_parameter::A1'}} + throw a; // cxx11_2b-error {{call to deleted constructor of 'test_throw_parameter::A1'}} } } @@ -112,70 +110,70 @@ struct A2 { A2(const A2 &); private: - A2(A2 &&); // cxx20_2b-note {{declared private here}} + A2(A2 &&); // cxx11_2b-note {{declared private here}} }; void test2() { try { func(); } catch (A2 a) { - throw a; // cxx20_2b-error {{calling a private constructor of class 'test_throw_parameter::A2'}} + throw a; // cxx11_2b-error {{calling a private constructor of class 'test_throw_parameter::A2'}} } } void test3(A1 a) try { func(); } catch (...) { - throw a; // expected-error {{call to deleted constructor of 'test_throw_parameter::A1'}} + throw a; // cxx11_2b-error {{call to deleted constructor of 'test_throw_parameter::A1'}} } } // namespace test_throw_parameter -// In C++20, during the first overload resolution, the selected function no +// During the first overload resolution, the selected function no // need to be a constructor. namespace test_non_ctor_conversion { class C {}; struct A1 { operator C() &&; - operator C() const & = delete; // cxx11_17-note {{'operator C' has been explicitly marked deleted here}} + operator C() const & = delete; // cxx98-note {{marked deleted here}} }; C test1() { A1 a; - return a; // cxx11_17-error {{conversion function from 'test_non_ctor_conversion::A1' to 'test_non_ctor_conversion::C' invokes a deleted function}} + return a; // cxx98-error {{invokes a deleted function}} } struct A2 { operator C() &&; private: - operator C() const &; // cxx11_17-note {{declared private here}} + operator C() const &; // cxx98-note {{declared private here}} }; C test2() { A2 a; - return a; // cxx11_17-error {{'operator C' is a private member of 'test_non_ctor_conversion::A2'}} + return a; // cxx98-error {{'operator C' is a private member}} } struct B1 { operator C() const &; - operator C() && = delete; // cxx20_2b-note {{'operator C' has been explicitly marked deleted here}} + operator C() && = delete; // cxx11_2b-note {{'operator C' has been explicitly marked deleted here}} }; C test3() { B1 b; - return b; // cxx20_2b-error {{conversion function from 'test_non_ctor_conversion::B1' to 'test_non_ctor_conversion::C' invokes a deleted function}} + return b; // cxx11_2b-error {{conversion function from 'test_non_ctor_conversion::B1' to 'test_non_ctor_conversion::C' invokes a deleted function}} } struct B2 { operator C() const &; private: - operator C() &&; // cxx20_2b-note {{declared private here}} + operator C() &&; // cxx11_2b-note {{declared private here}} }; C test4() { B2 b; - return b; // cxx20_2b-error {{'operator C' is a private member of 'test_non_ctor_conversion::B2'}} + return b; // cxx11_2b-error {{'operator C' is a private member of 'test_non_ctor_conversion::B2'}} } } // namespace test_non_ctor_conversion -// In C++20, during the first overload resolution, the first parameter of the +// During the first overload resolution, the first parameter of the // selected function no need to be an rvalue reference to the object's type. namespace test_ctor_param_rvalue_ref { struct A1; @@ -190,35 +188,35 @@ struct NeedRvalueRef { NeedRvalueRef(B2 &&); }; struct NeedValue { - NeedValue(A1); // cxx11_17-note 2 {{passing argument to parameter here}} + NeedValue(A1); // cxx98-note 2 {{passing argument to parameter here}} NeedValue(A2); - NeedValue(B1); // cxx20_2b-note 2 {{passing argument to parameter here}} + NeedValue(B1); // cxx11_2b-note 2 {{passing argument to parameter here}} NeedValue(B2); }; struct A1 { A1(); A1(A1 &&); - A1(const A1 &) = delete; // cxx11_17-note 3 {{'A1' has been explicitly marked deleted here}} + A1(const A1 &) = delete; // cxx98-note 3{{marked deleted here}} }; NeedValue test_1_1() { // not rvalue reference // same type A1 a; - return a; // cxx11_17-error {{call to deleted constructor of 'test_ctor_param_rvalue_ref::A1'}} + return a; // cxx98-error {{call to deleted constructor}} } class DerivedA1 : public A1 {}; A1 test_1_2() { // rvalue reference // not same type DerivedA1 a; - return a; // cxx11_17-error {{call to deleted constructor of 'test_ctor_param_rvalue_ref::A1'}} + return a; // cxx98-error {{call to deleted constructor}} } NeedValue test_1_3() { // not rvalue reference // not same type DerivedA1 a; - return a; // cxx11_17-error {{call to deleted constructor of 'test_ctor_param_rvalue_ref::A1'}} + return a; // cxx98-error {{call to deleted constructor}} } struct A2 { @@ -226,51 +224,51 @@ struct A2 { A2(A2 &&); private: - A2(const A2 &); // cxx11_17-note 3 {{declared private here}} + A2(const A2 &); // cxx98-note 3{{declared private here}} }; NeedValue test_2_1() { // not rvalue reference // same type A2 a; - return a; // cxx11_17-error {{calling a private constructor of class 'test_ctor_param_rvalue_ref::A2'}} + return a; // cxx98-error {{calling a private constructor}} } class DerivedA2 : public A2 {}; A2 test_2_2() { // rvalue reference // not same type DerivedA2 a; - return a; // cxx11_17-error {{calling a private constructor of class 'test_ctor_param_rvalue_ref::A2'}} + return a; // cxx98-error {{calling a private constructor}} } NeedValue test_2_3() { // not rvalue reference // not same type DerivedA2 a; - return a; // cxx11_17-error {{calling a private constructor of class 'test_ctor_param_rvalue_ref::A2'}} + return a; // cxx98-error {{calling a private constructor}} } struct B1 { B1(); B1(const B1 &); - B1(B1 &&) = delete; // cxx20_2b-note 3 {{'B1' has been explicitly marked deleted here}} + B1(B1 &&) = delete; // cxx11_2b-note 3 {{'B1' has been explicitly marked deleted here}} }; NeedValue test_3_1() { // not rvalue reference // same type B1 b; - return b; // cxx20_2b-error {{call to deleted constructor of 'test_ctor_param_rvalue_ref::B1'}} + return b; // cxx11_2b-error {{call to deleted constructor of 'test_ctor_param_rvalue_ref::B1'}} } class DerivedB1 : public B1 {}; B1 test_3_2() { // rvalue reference // not same type DerivedB1 b; - return b; // cxx20_2b-error {{call to deleted constructor of 'test_ctor_param_rvalue_ref::B1'}} + return b; // cxx11_2b-error {{call to deleted constructor of 'test_ctor_param_rvalue_ref::B1'}} } NeedValue test_3_3() { // not rvalue reference // not same type DerivedB1 b; - return b; // cxx20_2b-error {{call to deleted constructor of 'test_ctor_param_rvalue_ref::B1'}} + return b; // cxx11_2b-error {{call to deleted constructor of 'test_ctor_param_rvalue_ref::B1'}} } struct B2 { @@ -278,49 +276,46 @@ struct B2 { B2(const B2 &); private: - B2(B2 &&); // cxx20_2b-note 3 {{declared private here}} + B2(B2 &&); // cxx11_2b-note 3 {{declared private here}} }; NeedValue test_4_1() { // not rvalue reference // same type B2 b; - return b; // cxx20_2b-error {{calling a private constructor of class 'test_ctor_param_rvalue_ref::B2'}} + return b; // cxx11_2b-error {{calling a private constructor of class 'test_ctor_param_rvalue_ref::B2'}} } class DerivedB2 : public B2 {}; B2 test_4_2() { // rvalue reference // not same type DerivedB2 b; - return b; // cxx20_2b-error {{calling a private constructor of class 'test_ctor_param_rvalue_ref::B2'}} + return b; // cxx11_2b-error {{calling a private constructor of class 'test_ctor_param_rvalue_ref::B2'}} } NeedValue test_4_3() { // not rvalue reference // not same type DerivedB2 b; - return b; // cxx20_2b-error {{calling a private constructor of class 'test_ctor_param_rvalue_ref::B2'}} + return b; // cxx11_2b-error {{calling a private constructor of class 'test_ctor_param_rvalue_ref::B2'}} } } // namespace test_ctor_param_rvalue_ref namespace test_lvalue_ref_is_not_moved_from { struct Target {}; - // expected-note@-1 {{candidate constructor (the implicit copy constructor) not viable}} - // expected-note@-2 {{candidate constructor (the implicit move constructor) not viable}} - // cxx11_17-note@-3 {{candidate constructor (the implicit copy constructor) not viable}} - // cxx11_17-note@-4 {{candidate constructor (the implicit move constructor) not viable}} +// cxx11_2b-note@-1 {{candidate constructor (the implicit copy constructor) not viable}} +// cxx98-note@-2 2{{candidate constructor (the implicit copy constructor) not viable}} +// cxx11_2b-note@-3 {{candidate constructor (the implicit move constructor) not viable}} struct CopyOnly { - CopyOnly(CopyOnly&&) = delete; // cxx20_2b-note {{has been explicitly marked deleted here}} + CopyOnly(CopyOnly &&) = delete; // cxx11_2b-note {{has been explicitly marked deleted here}} CopyOnly(CopyOnly&); - operator Target() && = delete; // cxx20_2b-note {{has been explicitly marked deleted here}} + operator Target() && = delete; // cxx11_2b-note {{has been explicitly marked deleted here}} operator Target() &; }; struct MoveOnly { - MoveOnly(MoveOnly&&); // expected-note {{copy constructor is implicitly deleted because}} - // cxx11_17-note@-1 {{copy constructor is implicitly deleted because}} - operator Target() &&; // expected-note {{candidate function not viable}} - // cxx11_17-note@-1 {{candidate function not viable}} + MoveOnly(MoveOnly &&); // cxx11_2b-note {{copy constructor is implicitly deleted because}} + operator Target() &&; // expected-note {{candidate function not viable}} cxx98-note {{candidate function not viable}} }; extern CopyOnly copyonly; @@ -333,17 +328,17 @@ CopyOnly t1() { CopyOnly t2() { CopyOnly&& r = static_cast(copyonly); - return r; // cxx20_2b-error {{call to deleted constructor}} + return r; // cxx11_2b-error {{call to deleted constructor}} } MoveOnly t3() { MoveOnly& r = moveonly; - return r; // expected-error {{call to implicitly-deleted copy constructor}} + return r; // cxx11_2b-error {{call to implicitly-deleted copy constructor}} } MoveOnly t4() { MoveOnly&& r = static_cast(moveonly); - return r; // cxx11_17-error {{call to implicitly-deleted copy constructor}} + return r; } Target t5() { @@ -353,7 +348,7 @@ Target t5() { Target t6() { CopyOnly&& r = static_cast(copyonly); - return r; // cxx20_2b-error {{invokes a deleted function}} + return r; // cxx11_2b-error {{invokes a deleted function}} } Target t7() { @@ -363,7 +358,7 @@ Target t7() { Target t8() { MoveOnly&& r = static_cast(moveonly); - return r; // cxx11_17-error {{no viable conversion}} + return r; // cxx98-error {{no viable conversion}} } } // namespace test_lvalue_ref_is_not_moved_from @@ -376,8 +371,7 @@ struct MoveOnly {}; struct Target { Target(CopyOnly (&)()); Target(CopyOnly (&&)()) = delete; - Target(MoveOnly (&)()) = delete; // expected-note {{has been explicitly marked deleted here}} - // expected-note@-1 {{has been explicitly marked deleted here}} + Target(MoveOnly (&)()) = delete; // expected-note 2{{has been explicitly marked deleted here}} Target(MoveOnly (&&)()); }; @@ -406,6 +400,49 @@ Target t4() { } // namespace test_rvalue_ref_to_nonobject +namespace test_constandnonconstcopy { +struct ConstCopyOnly { + ConstCopyOnly(); + ConstCopyOnly(ConstCopyOnly &) = delete; // cxx98-note {{marked deleted here}} + ConstCopyOnly(const ConstCopyOnly &); +}; +ConstCopyOnly t1() { + ConstCopyOnly x; + return x; // cxx98-error {{call to deleted constructor}} +} + +struct NonConstCopyOnly { + NonConstCopyOnly(); + NonConstCopyOnly(NonConstCopyOnly &); + NonConstCopyOnly(const NonConstCopyOnly &) = delete; // cxx11_2b-note {{marked deleted here}} +}; +NonConstCopyOnly t2() { + NonConstCopyOnly x; + return x; // cxx11_2b-error {{call to deleted constructor}} +} + +} // namespace test_constandnonconstcopy + +namespace test_conversion { + +struct B; +struct A { + A(B &) = delete; // cxx98-note {{has been explicitly deleted}} +}; +struct B { + operator A(); // cxx98-note {{candidate function}} +}; +A test1(B x) { return x; } // cxx98-error-re {{conversion {{.*}} is ambiguous}} + +struct C {}; +struct D { + operator C() &; + operator C() const & = delete; // cxx11_2b-note {{marked deleted here}} +}; +C test2(D x) { return x; } // cxx11_2b-error {{invokes a deleted function}} + +} // namespace test_conversion + namespace test_simpler_implicit_move { struct CopyOnly { @@ -421,7 +458,7 @@ struct MoveOnly { MoveOnly &&rref(); MoveOnly &&test1(MoveOnly &&w) { - return w; // cxx11_20-error {{cannot bind to lvalue of type}} + return w; // cxx98_20-error {{cannot bind to lvalue of type}} } CopyOnly test2(bool b) { @@ -434,13 +471,13 @@ CopyOnly test2(bool b) { } } -template T &&test3(T &&x) { return x; } // cxx11_20-error {{cannot bind to lvalue of type}} +template T &&test3(T &&x) { return x; } // cxx98_20-error {{cannot bind to lvalue of type}} template MoveOnly& test3(MoveOnly&); -template MoveOnly &&test3(MoveOnly &&); // cxx11_20-note {{in instantiation of function template specialization}} +template MoveOnly &&test3(MoveOnly &&); // cxx98_20-note {{in instantiation of function template specialization}} MoveOnly &&test4() { MoveOnly &&x = rref(); - return x; // cxx11_20-error {{cannot bind to lvalue of type}} + return x; // cxx98_20-error {{cannot bind to lvalue of type}} } void test5() try { diff --git a/clang/test/CodeGen/X86/keylocker.c b/clang/test/CodeGen/X86/keylocker.c index b87fe22d77617..ded6e57bfb8b6 100644 --- a/clang/test/CodeGen/X86/keylocker.c +++ b/clang/test/CodeGen/X86/keylocker.c @@ -1,292 +1,1339 @@ -// RUN: %clang_cc1 %s -ffreestanding -triple=x86_64-unknown-unknown -target-feature +kl -target-feature +widekl -emit-llvm -o - -Wall -Werror | FileCheck %s -// RUN: %clang_cc1 %s -ffreestanding -triple=i386-unknown-unknown -target-feature +kl -target-feature +widekl -emit-llvm -o - -Wall -Werror | FileCheck %s -// RUN: %clang_cc1 %s -ffreestanding -triple=x86_64-unknown-unknown -target-feature +widekl -emit-llvm -o - -Wall -Werror | FileCheck %s -// RUN: %clang_cc1 %s -ffreestanding -triple=i386-unknown-unknown -target-feature +widekl -emit-llvm -o - -Wall -Werror | FileCheck %s +// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py +// RUN: %clang_cc1 %s -O0 -ffreestanding -triple=x86_64-unknown-unknown -target-feature +kl -target-feature +widekl -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=CHECK64 +// RUN: %clang_cc1 %s -O0 -ffreestanding -triple=i386-unknown-unknown -target-feature +kl -target-feature +widekl -emit-llvm -o - -Wall -Werror | FileCheck %s -check-prefix=CHECK32 #include +// CHECK64-LABEL: @test_loadiwkey( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[__CTL_ADDR_I:%.*]] = alloca i32, align 4 +// CHECK64-NEXT: [[__INTKEY_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[__ENKEY_LO_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[__ENKEY_HI_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[CTL_ADDR:%.*]] = alloca i32, align 4 +// CHECK64-NEXT: [[INTKEY_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[ENKEY_LO_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[ENKEY_HI_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: store i32 [[CTL:%.*]], i32* [[CTL_ADDR]], align 4 +// CHECK64-NEXT: store <2 x i64> [[INTKEY:%.*]], <2 x i64>* [[INTKEY_ADDR]], align 16 +// CHECK64-NEXT: store <2 x i64> [[ENKEY_LO:%.*]], <2 x i64>* [[ENKEY_LO_ADDR]], align 16 +// CHECK64-NEXT: store <2 x i64> [[ENKEY_HI:%.*]], <2 x i64>* [[ENKEY_HI_ADDR]], align 16 +// CHECK64-NEXT: [[TMP0:%.*]] = load i32, i32* [[CTL_ADDR]], align 4 +// CHECK64-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[INTKEY_ADDR]], align 16 +// CHECK64-NEXT: [[TMP2:%.*]] = load <2 x i64>, <2 x i64>* [[ENKEY_LO_ADDR]], align 16 +// CHECK64-NEXT: [[TMP3:%.*]] = load <2 x i64>, <2 x i64>* [[ENKEY_HI_ADDR]], align 16 +// CHECK64-NEXT: store i32 [[TMP0]], i32* [[__CTL_ADDR_I]], align 4 +// CHECK64-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__INTKEY_ADDR_I]], align 16 +// CHECK64-NEXT: store <2 x i64> [[TMP2]], <2 x i64>* [[__ENKEY_LO_ADDR_I]], align 16 +// CHECK64-NEXT: store <2 x i64> [[TMP3]], <2 x i64>* [[__ENKEY_HI_ADDR_I]], align 16 +// CHECK64-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__INTKEY_ADDR_I]], align 16 +// CHECK64-NEXT: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[__ENKEY_LO_ADDR_I]], align 16 +// CHECK64-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[__ENKEY_HI_ADDR_I]], align 16 +// CHECK64-NEXT: [[TMP7:%.*]] = load i32, i32* [[__CTL_ADDR_I]], align 4 +// CHECK64-NEXT: call void @llvm.x86.loadiwkey(<2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]], i32 [[TMP7]]) #[[ATTR1:[0-9]+]] +// CHECK64-NEXT: ret void +// +// CHECK32-LABEL: @test_loadiwkey( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[__CTL_ADDR_I:%.*]] = alloca i32, align 4 +// CHECK32-NEXT: [[__INTKEY_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[__ENKEY_LO_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[__ENKEY_HI_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[CTL_ADDR:%.*]] = alloca i32, align 4 +// CHECK32-NEXT: [[INTKEY_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[ENKEY_LO_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[ENKEY_HI_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: store i32 [[CTL:%.*]], i32* [[CTL_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64> [[INTKEY:%.*]], <2 x i64>* [[INTKEY_ADDR]], align 16 +// CHECK32-NEXT: store <2 x i64> [[ENKEY_LO:%.*]], <2 x i64>* [[ENKEY_LO_ADDR]], align 16 +// CHECK32-NEXT: store <2 x i64> [[ENKEY_HI:%.*]], <2 x i64>* [[ENKEY_HI_ADDR]], align 16 +// CHECK32-NEXT: [[TMP0:%.*]] = load i32, i32* [[CTL_ADDR]], align 4 +// CHECK32-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[INTKEY_ADDR]], align 16 +// CHECK32-NEXT: [[TMP2:%.*]] = load <2 x i64>, <2 x i64>* [[ENKEY_LO_ADDR]], align 16 +// CHECK32-NEXT: [[TMP3:%.*]] = load <2 x i64>, <2 x i64>* [[ENKEY_HI_ADDR]], align 16 +// CHECK32-NEXT: store i32 [[TMP0]], i32* [[__CTL_ADDR_I]], align 4 +// CHECK32-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__INTKEY_ADDR_I]], align 16 +// CHECK32-NEXT: store <2 x i64> [[TMP2]], <2 x i64>* [[__ENKEY_LO_ADDR_I]], align 16 +// CHECK32-NEXT: store <2 x i64> [[TMP3]], <2 x i64>* [[__ENKEY_HI_ADDR_I]], align 16 +// CHECK32-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__INTKEY_ADDR_I]], align 16 +// CHECK32-NEXT: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[__ENKEY_LO_ADDR_I]], align 16 +// CHECK32-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[__ENKEY_HI_ADDR_I]], align 16 +// CHECK32-NEXT: [[TMP7:%.*]] = load i32, i32* [[__CTL_ADDR_I]], align 4 +// CHECK32-NEXT: call void @llvm.x86.loadiwkey(<2 x i64> [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]], i32 [[TMP7]]) #[[ATTR1:[0-9]+]] +// CHECK32-NEXT: ret void +// void test_loadiwkey(unsigned int ctl, __m128i intkey, __m128i enkey_lo, __m128i enkey_hi) { - //CHECK-LABEL: @test_loadiwkey - //CHECK: @llvm.x86.loadiwkey _mm_loadiwkey(ctl, intkey, enkey_lo, enkey_hi); } +// CHECK64-LABEL: @test_encodekey128_u32( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[__HTYPE_ADDR_I:%.*]] = alloca i32, align 4 +// CHECK64-NEXT: [[__KEY_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: [[HTYPE_ADDR:%.*]] = alloca i32, align 4 +// CHECK64-NEXT: [[KEY_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: store i32 [[HTYPE:%.*]], i32* [[HTYPE_ADDR]], align 4 +// CHECK64-NEXT: store <2 x i64> [[KEY:%.*]], <2 x i64>* [[KEY_ADDR]], align 16 +// CHECK64-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: [[TMP0:%.*]] = load i32, i32* [[HTYPE_ADDR]], align 4 +// CHECK64-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[KEY_ADDR]], align 16 +// CHECK64-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: store i32 [[TMP0]], i32* [[__HTYPE_ADDR_I]], align 4 +// CHECK64-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__KEY_ADDR_I]], align 16 +// CHECK64-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP3:%.*]] = load i32, i32* [[__HTYPE_ADDR_I]], align 4 +// CHECK64-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__KEY_ADDR_I]], align 16 +// CHECK64-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP6:%.*]] = call { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.encodekey128(i32 [[TMP3]], <2 x i64> [[TMP4]]) #[[ATTR1]] +// CHECK64-NEXT: [[TMP7:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 1 +// CHECK64-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP5]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP7]], <2 x i64>* [[TMP8]], align 1 +// CHECK64-NEXT: [[TMP9:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 2 +// CHECK64-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[TMP5]], i32 16 +// CHECK64-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP11]], align 1 +// CHECK64-NEXT: [[TMP12:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 3 +// CHECK64-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[TMP5]], i32 32 +// CHECK64-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP12]], <2 x i64>* [[TMP14]], align 1 +// CHECK64-NEXT: [[TMP15:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 4 +// CHECK64-NEXT: [[TMP16:%.*]] = getelementptr i8, i8* [[TMP5]], i32 48 +// CHECK64-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP15]], <2 x i64>* [[TMP17]], align 1 +// CHECK64-NEXT: [[TMP18:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 5 +// CHECK64-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[TMP5]], i32 64 +// CHECK64-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP18]], <2 x i64>* [[TMP20]], align 1 +// CHECK64-NEXT: [[TMP21:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 6 +// CHECK64-NEXT: [[TMP22:%.*]] = getelementptr i8, i8* [[TMP5]], i32 80 +// CHECK64-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP21]], <2 x i64>* [[TMP23]], align 1 +// CHECK64-NEXT: [[TMP24:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 0 +// CHECK64-NEXT: ret i32 [[TMP24]] +// +// CHECK32-LABEL: @test_encodekey128_u32( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[__HTYPE_ADDR_I:%.*]] = alloca i32, align 4 +// CHECK32-NEXT: [[__KEY_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: [[HTYPE_ADDR:%.*]] = alloca i32, align 4 +// CHECK32-NEXT: [[KEY_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: store i32 [[HTYPE:%.*]], i32* [[HTYPE_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64> [[KEY:%.*]], <2 x i64>* [[KEY_ADDR]], align 16 +// CHECK32-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: [[TMP0:%.*]] = load i32, i32* [[HTYPE_ADDR]], align 4 +// CHECK32-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[KEY_ADDR]], align 16 +// CHECK32-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: store i32 [[TMP0]], i32* [[__HTYPE_ADDR_I]], align 4 +// CHECK32-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__KEY_ADDR_I]], align 16 +// CHECK32-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP3:%.*]] = load i32, i32* [[__HTYPE_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__KEY_ADDR_I]], align 16 +// CHECK32-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP6:%.*]] = call { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.encodekey128(i32 [[TMP3]], <2 x i64> [[TMP4]]) #[[ATTR1]] +// CHECK32-NEXT: [[TMP7:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 1 +// CHECK32-NEXT: [[TMP8:%.*]] = bitcast i8* [[TMP5]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP7]], <2 x i64>* [[TMP8]], align 1 +// CHECK32-NEXT: [[TMP9:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 2 +// CHECK32-NEXT: [[TMP10:%.*]] = getelementptr i8, i8* [[TMP5]], i32 16 +// CHECK32-NEXT: [[TMP11:%.*]] = bitcast i8* [[TMP10]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP11]], align 1 +// CHECK32-NEXT: [[TMP12:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 3 +// CHECK32-NEXT: [[TMP13:%.*]] = getelementptr i8, i8* [[TMP5]], i32 32 +// CHECK32-NEXT: [[TMP14:%.*]] = bitcast i8* [[TMP13]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP12]], <2 x i64>* [[TMP14]], align 1 +// CHECK32-NEXT: [[TMP15:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 4 +// CHECK32-NEXT: [[TMP16:%.*]] = getelementptr i8, i8* [[TMP5]], i32 48 +// CHECK32-NEXT: [[TMP17:%.*]] = bitcast i8* [[TMP16]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP15]], <2 x i64>* [[TMP17]], align 1 +// CHECK32-NEXT: [[TMP18:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 5 +// CHECK32-NEXT: [[TMP19:%.*]] = getelementptr i8, i8* [[TMP5]], i32 64 +// CHECK32-NEXT: [[TMP20:%.*]] = bitcast i8* [[TMP19]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP18]], <2 x i64>* [[TMP20]], align 1 +// CHECK32-NEXT: [[TMP21:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 6 +// CHECK32-NEXT: [[TMP22:%.*]] = getelementptr i8, i8* [[TMP5]], i32 80 +// CHECK32-NEXT: [[TMP23:%.*]] = bitcast i8* [[TMP22]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP21]], <2 x i64>* [[TMP23]], align 1 +// CHECK32-NEXT: [[TMP24:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP6]], 0 +// CHECK32-NEXT: ret i32 [[TMP24]] +// unsigned int test_encodekey128_u32(unsigned int htype, __m128i key, void *h) { - //CHECK-LABEL: @test_encodekey128_u32 - //CHECK: call { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.encodekey128(i32 %{{.*}}, <2 x i64> %{{.*}}) - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 1 - //CHECK: itcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 2 - //CHECK: getelementptr i8, i8* %{{.*}}, i32 16 - //CHECK: bitcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 3 - //CHECK: getelementptr i8, i8* %{{.*}}, i32 32 - //CHECK: bitcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 4 - //CHECK: getelementptr i8, i8* %{{.*}}, i32 48 - //CHECK: bitcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 5 - //CHECK: getelementptr i8, i8* %{{.*}}, i32 64 - //CHECK: bitcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 6 - //CHECK: getelementptr i8, i8* %{{.*}}, i32 80 - //CHECK: bitcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 0 return _mm_encodekey128_u32(htype, key, h); } +// CHECK64-LABEL: @test_encodekey256_u32( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[__HTYPE_ADDR_I:%.*]] = alloca i32, align 4 +// CHECK64-NEXT: [[__KEY_LO_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[__KEY_HI_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: [[HTYPE_ADDR:%.*]] = alloca i32, align 4 +// CHECK64-NEXT: [[KEY_LO_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[KEY_HI_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: store i32 [[HTYPE:%.*]], i32* [[HTYPE_ADDR]], align 4 +// CHECK64-NEXT: store <2 x i64> [[KEY_LO:%.*]], <2 x i64>* [[KEY_LO_ADDR]], align 16 +// CHECK64-NEXT: store <2 x i64> [[KEY_HI:%.*]], <2 x i64>* [[KEY_HI_ADDR]], align 16 +// CHECK64-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: [[TMP0:%.*]] = load i32, i32* [[HTYPE_ADDR]], align 4 +// CHECK64-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[KEY_LO_ADDR]], align 16 +// CHECK64-NEXT: [[TMP2:%.*]] = load <2 x i64>, <2 x i64>* [[KEY_HI_ADDR]], align 16 +// CHECK64-NEXT: [[TMP3:%.*]] = load i8*, i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: store i32 [[TMP0]], i32* [[__HTYPE_ADDR_I]], align 4 +// CHECK64-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__KEY_LO_ADDR_I]], align 16 +// CHECK64-NEXT: store <2 x i64> [[TMP2]], <2 x i64>* [[__KEY_HI_ADDR_I]], align 16 +// CHECK64-NEXT: store i8* [[TMP3]], i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP4:%.*]] = load i32, i32* [[__HTYPE_ADDR_I]], align 4 +// CHECK64-NEXT: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[__KEY_LO_ADDR_I]], align 16 +// CHECK64-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[__KEY_HI_ADDR_I]], align 16 +// CHECK64-NEXT: [[TMP7:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP8:%.*]] = call { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.encodekey256(i32 [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]]) #[[ATTR1]] +// CHECK64-NEXT: [[TMP9:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 1 +// CHECK64-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP7]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP10]], align 1 +// CHECK64-NEXT: [[TMP11:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 2 +// CHECK64-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[TMP7]], i32 16 +// CHECK64-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP12]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP11]], <2 x i64>* [[TMP13]], align 1 +// CHECK64-NEXT: [[TMP14:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 3 +// CHECK64-NEXT: [[TMP15:%.*]] = getelementptr i8, i8* [[TMP7]], i32 32 +// CHECK64-NEXT: [[TMP16:%.*]] = bitcast i8* [[TMP15]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP14]], <2 x i64>* [[TMP16]], align 1 +// CHECK64-NEXT: [[TMP17:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 4 +// CHECK64-NEXT: [[TMP18:%.*]] = getelementptr i8, i8* [[TMP7]], i32 48 +// CHECK64-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP17]], <2 x i64>* [[TMP19]], align 1 +// CHECK64-NEXT: [[TMP20:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 5 +// CHECK64-NEXT: [[TMP21:%.*]] = getelementptr i8, i8* [[TMP7]], i32 64 +// CHECK64-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP20]], <2 x i64>* [[TMP22]], align 1 +// CHECK64-NEXT: [[TMP23:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 6 +// CHECK64-NEXT: [[TMP24:%.*]] = getelementptr i8, i8* [[TMP7]], i32 80 +// CHECK64-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP24]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP23]], <2 x i64>* [[TMP25]], align 1 +// CHECK64-NEXT: [[TMP26:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 7 +// CHECK64-NEXT: [[TMP27:%.*]] = getelementptr i8, i8* [[TMP7]], i32 96 +// CHECK64-NEXT: [[TMP28:%.*]] = bitcast i8* [[TMP27]] to <2 x i64>* +// CHECK64-NEXT: store <2 x i64> [[TMP26]], <2 x i64>* [[TMP28]], align 1 +// CHECK64-NEXT: [[TMP29:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 0 +// CHECK64-NEXT: ret i32 [[TMP29]] +// +// CHECK32-LABEL: @test_encodekey256_u32( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[__HTYPE_ADDR_I:%.*]] = alloca i32, align 4 +// CHECK32-NEXT: [[__KEY_LO_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[__KEY_HI_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: [[HTYPE_ADDR:%.*]] = alloca i32, align 4 +// CHECK32-NEXT: [[KEY_LO_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[KEY_HI_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: store i32 [[HTYPE:%.*]], i32* [[HTYPE_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64> [[KEY_LO:%.*]], <2 x i64>* [[KEY_LO_ADDR]], align 16 +// CHECK32-NEXT: store <2 x i64> [[KEY_HI:%.*]], <2 x i64>* [[KEY_HI_ADDR]], align 16 +// CHECK32-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: [[TMP0:%.*]] = load i32, i32* [[HTYPE_ADDR]], align 4 +// CHECK32-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[KEY_LO_ADDR]], align 16 +// CHECK32-NEXT: [[TMP2:%.*]] = load <2 x i64>, <2 x i64>* [[KEY_HI_ADDR]], align 16 +// CHECK32-NEXT: [[TMP3:%.*]] = load i8*, i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: store i32 [[TMP0]], i32* [[__HTYPE_ADDR_I]], align 4 +// CHECK32-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__KEY_LO_ADDR_I]], align 16 +// CHECK32-NEXT: store <2 x i64> [[TMP2]], <2 x i64>* [[__KEY_HI_ADDR_I]], align 16 +// CHECK32-NEXT: store i8* [[TMP3]], i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP4:%.*]] = load i32, i32* [[__HTYPE_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[__KEY_LO_ADDR_I]], align 16 +// CHECK32-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[__KEY_HI_ADDR_I]], align 16 +// CHECK32-NEXT: [[TMP7:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP8:%.*]] = call { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.encodekey256(i32 [[TMP4]], <2 x i64> [[TMP5]], <2 x i64> [[TMP6]]) #[[ATTR1]] +// CHECK32-NEXT: [[TMP9:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 1 +// CHECK32-NEXT: [[TMP10:%.*]] = bitcast i8* [[TMP7]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP10]], align 1 +// CHECK32-NEXT: [[TMP11:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 2 +// CHECK32-NEXT: [[TMP12:%.*]] = getelementptr i8, i8* [[TMP7]], i32 16 +// CHECK32-NEXT: [[TMP13:%.*]] = bitcast i8* [[TMP12]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP11]], <2 x i64>* [[TMP13]], align 1 +// CHECK32-NEXT: [[TMP14:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 3 +// CHECK32-NEXT: [[TMP15:%.*]] = getelementptr i8, i8* [[TMP7]], i32 32 +// CHECK32-NEXT: [[TMP16:%.*]] = bitcast i8* [[TMP15]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP14]], <2 x i64>* [[TMP16]], align 1 +// CHECK32-NEXT: [[TMP17:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 4 +// CHECK32-NEXT: [[TMP18:%.*]] = getelementptr i8, i8* [[TMP7]], i32 48 +// CHECK32-NEXT: [[TMP19:%.*]] = bitcast i8* [[TMP18]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP17]], <2 x i64>* [[TMP19]], align 1 +// CHECK32-NEXT: [[TMP20:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 5 +// CHECK32-NEXT: [[TMP21:%.*]] = getelementptr i8, i8* [[TMP7]], i32 64 +// CHECK32-NEXT: [[TMP22:%.*]] = bitcast i8* [[TMP21]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP20]], <2 x i64>* [[TMP22]], align 1 +// CHECK32-NEXT: [[TMP23:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 6 +// CHECK32-NEXT: [[TMP24:%.*]] = getelementptr i8, i8* [[TMP7]], i32 80 +// CHECK32-NEXT: [[TMP25:%.*]] = bitcast i8* [[TMP24]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP23]], <2 x i64>* [[TMP25]], align 1 +// CHECK32-NEXT: [[TMP26:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 7 +// CHECK32-NEXT: [[TMP27:%.*]] = getelementptr i8, i8* [[TMP7]], i32 96 +// CHECK32-NEXT: [[TMP28:%.*]] = bitcast i8* [[TMP27]] to <2 x i64>* +// CHECK32-NEXT: store <2 x i64> [[TMP26]], <2 x i64>* [[TMP28]], align 1 +// CHECK32-NEXT: [[TMP29:%.*]] = extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP8]], 0 +// CHECK32-NEXT: ret i32 [[TMP29]] +// unsigned int test_encodekey256_u32(unsigned int htype, __m128i key_lo, __m128i key_hi, void *h) { - //CHECK-LABEL: @test_encodekey256_u32 - //CHECK: call { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.encodekey256(i32 %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}) - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 1 - //CHECK: itcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 2 - //CHECK: getelementptr i8, i8* %{{.*}}, i32 16 - //CHECK: bitcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 3 - //CHECK: getelementptr i8, i8* %{{.*}}, i32 32 - //CHECK: bitcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 4 - //CHECK: getelementptr i8, i8* %{{.*}}, i32 48 - //CHECK: bitcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 5 - //CHECK: getelementptr i8, i8* %{{.*}}, i32 64 - //CHECK: bitcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 6 - //CHECK: getelementptr i8, i8* %{{.*}}, i32 80 - //CHECK: bitcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 7 - //CHECK: getelementptr i8, i8* %{{.*}}, i32 96 - //CHECK: bitcast i8* %{{.*}} to <2 x i64>* - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 1{{$}} - //CHECK: extractvalue { i32, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 0 return _mm_encodekey256_u32(htype, key_lo, key_hi, h); } +// CHECK64-LABEL: @test_mm_aesenc256kl_u8( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64> [[IDATA:%.*]], <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK64-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK64-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK64-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK64-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesenc256kl(<2 x i64> [[TMP4]], i8* [[TMP5]]) #[[ATTR1]] +// CHECK64-NEXT: [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK64-NEXT: [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1 +// CHECK64-NEXT: [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1 +// CHECK64-NEXT: br i1 [[TMP8]], label [[AESENC256KL_NO_ERROR_I:%.*]], label [[AESENC256KL_ERROR_I:%.*]] +// CHECK64: aesenc256kl_no_error.i: +// CHECK64-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: br label [[_MM_AESENC256KL_U8_EXIT:%.*]] +// CHECK64: aesenc256kl_error.i: +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: br label [[_MM_AESENC256KL_U8_EXIT]] +// CHECK64: _mm_aesenc256kl_u8.exit: +// CHECK64-NEXT: [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK64-NEXT: ret i8 [[TMP10]] +// +// CHECK32-LABEL: @test_mm_aesenc256kl_u8( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64> [[IDATA:%.*]], <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK32-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK32-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK32-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK32-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesenc256kl(<2 x i64> [[TMP4]], i8* [[TMP5]]) #[[ATTR1]] +// CHECK32-NEXT: [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK32-NEXT: [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1 +// CHECK32-NEXT: [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1 +// CHECK32-NEXT: br i1 [[TMP8]], label [[AESENC256KL_NO_ERROR_I:%.*]], label [[AESENC256KL_ERROR_I:%.*]] +// CHECK32: aesenc256kl_no_error.i: +// CHECK32-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: br label [[_MM_AESENC256KL_U8_EXIT:%.*]] +// CHECK32: aesenc256kl_error.i: +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: br label [[_MM_AESENC256KL_U8_EXIT]] +// CHECK32: _mm_aesenc256kl_u8.exit: +// CHECK32-NEXT: [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK32-NEXT: ret i8 [[TMP10]] +// unsigned char test_mm_aesenc256kl_u8(__m128i *odata, __m128i idata, const void *h) { - //CHECK-LABEL: @test_mm_aesenc256kl_u8 - //CHECK: call { i8, <2 x i64> } @llvm.x86.aesenc256kl(<2 x i64> %{{.*}}, i8* %{{.*}}) - //CHECK: extractvalue { i8, <2 x i64> } %{{.*}}, 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64> } %{{.*}}, 0 return _mm_aesenc256kl_u8(odata, idata, h); } +// CHECK64-LABEL: @test_mm_aesdec256kl_u8( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64> [[IDATA:%.*]], <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK64-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK64-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK64-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK64-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesdec256kl(<2 x i64> [[TMP4]], i8* [[TMP5]]) #[[ATTR1]] +// CHECK64-NEXT: [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK64-NEXT: [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1 +// CHECK64-NEXT: [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1 +// CHECK64-NEXT: br i1 [[TMP8]], label [[AESDEC256KL_NO_ERROR_I:%.*]], label [[AESDEC256KL_ERROR_I:%.*]] +// CHECK64: aesdec256kl_no_error.i: +// CHECK64-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: br label [[_MM_AESDEC256KL_U8_EXIT:%.*]] +// CHECK64: aesdec256kl_error.i: +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: br label [[_MM_AESDEC256KL_U8_EXIT]] +// CHECK64: _mm_aesdec256kl_u8.exit: +// CHECK64-NEXT: [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK64-NEXT: ret i8 [[TMP10]] +// +// CHECK32-LABEL: @test_mm_aesdec256kl_u8( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64> [[IDATA:%.*]], <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK32-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK32-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK32-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK32-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesdec256kl(<2 x i64> [[TMP4]], i8* [[TMP5]]) #[[ATTR1]] +// CHECK32-NEXT: [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK32-NEXT: [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1 +// CHECK32-NEXT: [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1 +// CHECK32-NEXT: br i1 [[TMP8]], label [[AESDEC256KL_NO_ERROR_I:%.*]], label [[AESDEC256KL_ERROR_I:%.*]] +// CHECK32: aesdec256kl_no_error.i: +// CHECK32-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: br label [[_MM_AESDEC256KL_U8_EXIT:%.*]] +// CHECK32: aesdec256kl_error.i: +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: br label [[_MM_AESDEC256KL_U8_EXIT]] +// CHECK32: _mm_aesdec256kl_u8.exit: +// CHECK32-NEXT: [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK32-NEXT: ret i8 [[TMP10]] +// unsigned char test_mm_aesdec256kl_u8(__m128i *odata, __m128i idata, const void *h) { - //CHECK-LABEL: @test_mm_aesdec256kl_u8 - //CHECK: call { i8, <2 x i64> } @llvm.x86.aesdec256kl(<2 x i64> %{{.*}}, i8* %{{.*}}) - //CHECK: extractvalue { i8, <2 x i64> } %{{.*}}, 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64> } %{{.*}}, 0 return _mm_aesdec256kl_u8(odata, idata, h); } +// CHECK64-LABEL: @test_mm_aesenc128kl_u8( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64> [[IDATA:%.*]], <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK64-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK64-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK64-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK64-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesenc128kl(<2 x i64> [[TMP4]], i8* [[TMP5]]) #[[ATTR1]] +// CHECK64-NEXT: [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK64-NEXT: [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1 +// CHECK64-NEXT: [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1 +// CHECK64-NEXT: br i1 [[TMP8]], label [[AESENC128KL_NO_ERROR_I:%.*]], label [[AESENC128KL_ERROR_I:%.*]] +// CHECK64: aesenc128kl_no_error.i: +// CHECK64-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: br label [[_MM_AESENC128KL_U8_EXIT:%.*]] +// CHECK64: aesenc128kl_error.i: +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: br label [[_MM_AESENC128KL_U8_EXIT]] +// CHECK64: _mm_aesenc128kl_u8.exit: +// CHECK64-NEXT: [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK64-NEXT: ret i8 [[TMP10]] +// +// CHECK32-LABEL: @test_mm_aesenc128kl_u8( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64> [[IDATA:%.*]], <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK32-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK32-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK32-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK32-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesenc128kl(<2 x i64> [[TMP4]], i8* [[TMP5]]) #[[ATTR1]] +// CHECK32-NEXT: [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK32-NEXT: [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1 +// CHECK32-NEXT: [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1 +// CHECK32-NEXT: br i1 [[TMP8]], label [[AESENC128KL_NO_ERROR_I:%.*]], label [[AESENC128KL_ERROR_I:%.*]] +// CHECK32: aesenc128kl_no_error.i: +// CHECK32-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: br label [[_MM_AESENC128KL_U8_EXIT:%.*]] +// CHECK32: aesenc128kl_error.i: +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: br label [[_MM_AESENC128KL_U8_EXIT]] +// CHECK32: _mm_aesenc128kl_u8.exit: +// CHECK32-NEXT: [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK32-NEXT: ret i8 [[TMP10]] +// unsigned char test_mm_aesenc128kl_u8(__m128i *odata, __m128i idata, const void *h) { - //CHECK-LABEL: @test_mm_aesenc128kl_u8 - //CHECK: call { i8, <2 x i64> } @llvm.x86.aesenc128kl(<2 x i64> %{{.*}}, i8* %{{.*}}) - //CHECK: extractvalue { i8, <2 x i64> } %{{.*}}, 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64> } %{{.*}}, 0 return _mm_aesenc128kl_u8(odata, idata, h); } +// CHECK64-LABEL: @test_mm_aesdec128kl_u8( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK64-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64> [[IDATA:%.*]], <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK64-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK64-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK64-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK64-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesdec128kl(<2 x i64> [[TMP4]], i8* [[TMP5]]) #[[ATTR1]] +// CHECK64-NEXT: [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK64-NEXT: [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1 +// CHECK64-NEXT: [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1 +// CHECK64-NEXT: br i1 [[TMP8]], label [[AESDEC128KL_NO_ERROR_I:%.*]], label [[AESDEC128KL_ERROR_I:%.*]] +// CHECK64: aesdec128kl_no_error.i: +// CHECK64-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: br label [[_MM_AESDEC128KL_U8_EXIT:%.*]] +// CHECK64: aesdec128kl_error.i: +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: br label [[_MM_AESDEC128KL_U8_EXIT]] +// CHECK64: _mm_aesdec128kl_u8.exit: +// CHECK64-NEXT: [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK64-NEXT: ret i8 [[TMP10]] +// +// CHECK32-LABEL: @test_mm_aesdec128kl_u8( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK32-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64> [[IDATA:%.*]], <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK32-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[IDATA_ADDR]], align 16 +// CHECK32-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: store <2 x i64> [[TMP1]], <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK32-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[__IDATA_ADDR_I]], align 16 +// CHECK32-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP6:%.*]] = call { i8, <2 x i64> } @llvm.x86.aesdec128kl(<2 x i64> [[TMP4]], i8* [[TMP5]]) #[[ATTR1]] +// CHECK32-NEXT: [[TMP7:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK32-NEXT: [[TMP8:%.*]] = trunc i8 [[TMP7]] to i1 +// CHECK32-NEXT: [[TMP9:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 1 +// CHECK32-NEXT: br i1 [[TMP8]], label [[AESDEC128KL_NO_ERROR_I:%.*]], label [[AESDEC128KL_ERROR_I:%.*]] +// CHECK32: aesdec128kl_no_error.i: +// CHECK32-NEXT: store <2 x i64> [[TMP9]], <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: br label [[_MM_AESDEC128KL_U8_EXIT:%.*]] +// CHECK32: aesdec128kl_error.i: +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: br label [[_MM_AESDEC128KL_U8_EXIT]] +// CHECK32: _mm_aesdec128kl_u8.exit: +// CHECK32-NEXT: [[TMP10:%.*]] = extractvalue { i8, <2 x i64> } [[TMP6]], 0 +// CHECK32-NEXT: ret i8 [[TMP10]] +// unsigned char test_mm_aesdec128kl_u8(__m128i *odata, __m128i idata, const void *h) { - //CHECK-LABEL: @test_mm_aesdec128kl_u8 - //CHECK: call { i8, <2 x i64> } @llvm.x86.aesdec128kl(<2 x i64> %{{.*}}, i8* %{{.*}}) - //CHECK: extractvalue { i8, <2 x i64> } %{{.*}}, 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64> } %{{.*}}, 0 return _mm_aesdec128kl_u8(odata, idata, h); } +// CHECK64-LABEL: @test__mm_aesencwide128kl_u8( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[IDATA:%.*]], <2 x i64>** [[IDATA_ADDR]], align 8 +// CHECK64-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP1:%.*]] = load <2 x i64>*, <2 x i64>** [[IDATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP1]], <2 x i64>** [[__IDATA_ADDR_I]], align 8 +// CHECK64-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP4:%.*]] = load <2 x i64>*, <2 x i64>** [[__IDATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[TMP4]], align 16 +// CHECK64-NEXT: [[TMP7:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 1 +// CHECK64-NEXT: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[TMP7]], align 16 +// CHECK64-NEXT: [[TMP9:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 2 +// CHECK64-NEXT: [[TMP10:%.*]] = load <2 x i64>, <2 x i64>* [[TMP9]], align 16 +// CHECK64-NEXT: [[TMP11:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 3 +// CHECK64-NEXT: [[TMP12:%.*]] = load <2 x i64>, <2 x i64>* [[TMP11]], align 16 +// CHECK64-NEXT: [[TMP13:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 4 +// CHECK64-NEXT: [[TMP14:%.*]] = load <2 x i64>, <2 x i64>* [[TMP13]], align 16 +// CHECK64-NEXT: [[TMP15:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 5 +// CHECK64-NEXT: [[TMP16:%.*]] = load <2 x i64>, <2 x i64>* [[TMP15]], align 16 +// CHECK64-NEXT: [[TMP17:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 6 +// CHECK64-NEXT: [[TMP18:%.*]] = load <2 x i64>, <2 x i64>* [[TMP17]], align 16 +// CHECK64-NEXT: [[TMP19:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 7 +// CHECK64-NEXT: [[TMP20:%.*]] = load <2 x i64>, <2 x i64>* [[TMP19]], align 16 +// CHECK64-NEXT: [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesencwide128kl(i8* [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]]) #[[ATTR1]] +// CHECK64-NEXT: [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK64-NEXT: [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1 +// CHECK64-NEXT: br i1 [[TMP23]], label [[AESENCWIDE128KL_NO_ERROR_I:%.*]], label [[AESENCWIDE128KL_ERROR_I:%.*]] +// CHECK64: aesencwide128kl_no_error.i: +// CHECK64-NEXT: [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK64-NEXT: store <2 x i64> [[TMP24]], <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK64-NEXT: [[TMP26:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK64-NEXT: store <2 x i64> [[TMP25]], <2 x i64>* [[TMP26]], align 16 +// CHECK64-NEXT: [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK64-NEXT: [[TMP28:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK64-NEXT: store <2 x i64> [[TMP27]], <2 x i64>* [[TMP28]], align 16 +// CHECK64-NEXT: [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK64-NEXT: [[TMP30:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK64-NEXT: store <2 x i64> [[TMP29]], <2 x i64>* [[TMP30]], align 16 +// CHECK64-NEXT: [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK64-NEXT: [[TMP32:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK64-NEXT: store <2 x i64> [[TMP31]], <2 x i64>* [[TMP32]], align 16 +// CHECK64-NEXT: [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK64-NEXT: [[TMP34:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK64-NEXT: store <2 x i64> [[TMP33]], <2 x i64>* [[TMP34]], align 16 +// CHECK64-NEXT: [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK64-NEXT: [[TMP36:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK64-NEXT: store <2 x i64> [[TMP35]], <2 x i64>* [[TMP36]], align 16 +// CHECK64-NEXT: [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK64-NEXT: [[TMP38:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK64-NEXT: store <2 x i64> [[TMP37]], <2 x i64>* [[TMP38]], align 16 +// CHECK64-NEXT: br label [[_MM_AESENCWIDE128KL_U8_EXIT:%.*]] +// CHECK64: aesencwide128kl_error.i: +// CHECK64-NEXT: [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK64-NEXT: [[TMP41:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP41]], align 16 +// CHECK64-NEXT: [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK64-NEXT: [[TMP43:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP43]], align 16 +// CHECK64-NEXT: [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK64-NEXT: [[TMP45:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP45]], align 16 +// CHECK64-NEXT: [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK64-NEXT: [[TMP47:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP47]], align 16 +// CHECK64-NEXT: [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK64-NEXT: [[TMP49:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP49]], align 16 +// CHECK64-NEXT: [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK64-NEXT: [[TMP51:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP51]], align 16 +// CHECK64-NEXT: [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK64-NEXT: [[TMP53:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP53]], align 16 +// CHECK64-NEXT: br label [[_MM_AESENCWIDE128KL_U8_EXIT]] +// CHECK64: _mm_aesencwide128kl_u8.exit: +// CHECK64-NEXT: [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK64-NEXT: ret i8 [[TMP54]] +// +// CHECK32-LABEL: @test__mm_aesencwide128kl_u8( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[IDATA:%.*]], <2 x i64>** [[IDATA_ADDR]], align 4 +// CHECK32-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP1:%.*]] = load <2 x i64>*, <2 x i64>** [[IDATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP1]], <2 x i64>** [[__IDATA_ADDR_I]], align 4 +// CHECK32-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP4:%.*]] = load <2 x i64>*, <2 x i64>** [[__IDATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[TMP4]], align 16 +// CHECK32-NEXT: [[TMP7:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 1 +// CHECK32-NEXT: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[TMP7]], align 16 +// CHECK32-NEXT: [[TMP9:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 2 +// CHECK32-NEXT: [[TMP10:%.*]] = load <2 x i64>, <2 x i64>* [[TMP9]], align 16 +// CHECK32-NEXT: [[TMP11:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 3 +// CHECK32-NEXT: [[TMP12:%.*]] = load <2 x i64>, <2 x i64>* [[TMP11]], align 16 +// CHECK32-NEXT: [[TMP13:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 4 +// CHECK32-NEXT: [[TMP14:%.*]] = load <2 x i64>, <2 x i64>* [[TMP13]], align 16 +// CHECK32-NEXT: [[TMP15:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 5 +// CHECK32-NEXT: [[TMP16:%.*]] = load <2 x i64>, <2 x i64>* [[TMP15]], align 16 +// CHECK32-NEXT: [[TMP17:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 6 +// CHECK32-NEXT: [[TMP18:%.*]] = load <2 x i64>, <2 x i64>* [[TMP17]], align 16 +// CHECK32-NEXT: [[TMP19:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 7 +// CHECK32-NEXT: [[TMP20:%.*]] = load <2 x i64>, <2 x i64>* [[TMP19]], align 16 +// CHECK32-NEXT: [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesencwide128kl(i8* [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]]) #[[ATTR1]] +// CHECK32-NEXT: [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK32-NEXT: [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1 +// CHECK32-NEXT: br i1 [[TMP23]], label [[AESENCWIDE128KL_NO_ERROR_I:%.*]], label [[AESENCWIDE128KL_ERROR_I:%.*]] +// CHECK32: aesencwide128kl_no_error.i: +// CHECK32-NEXT: [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK32-NEXT: store <2 x i64> [[TMP24]], <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK32-NEXT: [[TMP26:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK32-NEXT: store <2 x i64> [[TMP25]], <2 x i64>* [[TMP26]], align 16 +// CHECK32-NEXT: [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK32-NEXT: [[TMP28:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK32-NEXT: store <2 x i64> [[TMP27]], <2 x i64>* [[TMP28]], align 16 +// CHECK32-NEXT: [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK32-NEXT: [[TMP30:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK32-NEXT: store <2 x i64> [[TMP29]], <2 x i64>* [[TMP30]], align 16 +// CHECK32-NEXT: [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK32-NEXT: [[TMP32:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK32-NEXT: store <2 x i64> [[TMP31]], <2 x i64>* [[TMP32]], align 16 +// CHECK32-NEXT: [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK32-NEXT: [[TMP34:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK32-NEXT: store <2 x i64> [[TMP33]], <2 x i64>* [[TMP34]], align 16 +// CHECK32-NEXT: [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK32-NEXT: [[TMP36:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK32-NEXT: store <2 x i64> [[TMP35]], <2 x i64>* [[TMP36]], align 16 +// CHECK32-NEXT: [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK32-NEXT: [[TMP38:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK32-NEXT: store <2 x i64> [[TMP37]], <2 x i64>* [[TMP38]], align 16 +// CHECK32-NEXT: br label [[_MM_AESENCWIDE128KL_U8_EXIT:%.*]] +// CHECK32: aesencwide128kl_error.i: +// CHECK32-NEXT: [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK32-NEXT: [[TMP41:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP41]], align 16 +// CHECK32-NEXT: [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK32-NEXT: [[TMP43:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP43]], align 16 +// CHECK32-NEXT: [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK32-NEXT: [[TMP45:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP45]], align 16 +// CHECK32-NEXT: [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK32-NEXT: [[TMP47:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP47]], align 16 +// CHECK32-NEXT: [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK32-NEXT: [[TMP49:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP49]], align 16 +// CHECK32-NEXT: [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK32-NEXT: [[TMP51:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP51]], align 16 +// CHECK32-NEXT: [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK32-NEXT: [[TMP53:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP53]], align 16 +// CHECK32-NEXT: br label [[_MM_AESENCWIDE128KL_U8_EXIT]] +// CHECK32: _mm_aesencwide128kl_u8.exit: +// CHECK32-NEXT: [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK32-NEXT: ret i8 [[TMP54]] +// unsigned char test__mm_aesencwide128kl_u8(__m128i odata[8], const __m128i idata[8], const void* h) { - //CHECK-LABEL: @test__mm_aesencwide128kl - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 1 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 2 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 3 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 4 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 5 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 6 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 7 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesencwide128kl(i8* %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}) - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 2 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 3 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 2 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 4 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 3 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 5 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 4 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 6 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 5 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 7 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 6 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 8 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 7 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 0 return _mm_aesencwide128kl_u8(odata, idata, h); } +// CHECK64-LABEL: @test__mm_aesdecwide128kl_u8( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[IDATA:%.*]], <2 x i64>** [[IDATA_ADDR]], align 8 +// CHECK64-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP1:%.*]] = load <2 x i64>*, <2 x i64>** [[IDATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP1]], <2 x i64>** [[__IDATA_ADDR_I]], align 8 +// CHECK64-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP4:%.*]] = load <2 x i64>*, <2 x i64>** [[__IDATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[TMP4]], align 16 +// CHECK64-NEXT: [[TMP7:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 1 +// CHECK64-NEXT: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[TMP7]], align 16 +// CHECK64-NEXT: [[TMP9:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 2 +// CHECK64-NEXT: [[TMP10:%.*]] = load <2 x i64>, <2 x i64>* [[TMP9]], align 16 +// CHECK64-NEXT: [[TMP11:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 3 +// CHECK64-NEXT: [[TMP12:%.*]] = load <2 x i64>, <2 x i64>* [[TMP11]], align 16 +// CHECK64-NEXT: [[TMP13:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 4 +// CHECK64-NEXT: [[TMP14:%.*]] = load <2 x i64>, <2 x i64>* [[TMP13]], align 16 +// CHECK64-NEXT: [[TMP15:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 5 +// CHECK64-NEXT: [[TMP16:%.*]] = load <2 x i64>, <2 x i64>* [[TMP15]], align 16 +// CHECK64-NEXT: [[TMP17:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 6 +// CHECK64-NEXT: [[TMP18:%.*]] = load <2 x i64>, <2 x i64>* [[TMP17]], align 16 +// CHECK64-NEXT: [[TMP19:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 7 +// CHECK64-NEXT: [[TMP20:%.*]] = load <2 x i64>, <2 x i64>* [[TMP19]], align 16 +// CHECK64-NEXT: [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesdecwide128kl(i8* [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]]) #[[ATTR1]] +// CHECK64-NEXT: [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK64-NEXT: [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1 +// CHECK64-NEXT: br i1 [[TMP23]], label [[AESDECWIDE128KL_NO_ERROR_I:%.*]], label [[AESDECWIDE128KL_ERROR_I:%.*]] +// CHECK64: aesdecwide128kl_no_error.i: +// CHECK64-NEXT: [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK64-NEXT: store <2 x i64> [[TMP24]], <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK64-NEXT: [[TMP26:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK64-NEXT: store <2 x i64> [[TMP25]], <2 x i64>* [[TMP26]], align 16 +// CHECK64-NEXT: [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK64-NEXT: [[TMP28:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK64-NEXT: store <2 x i64> [[TMP27]], <2 x i64>* [[TMP28]], align 16 +// CHECK64-NEXT: [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK64-NEXT: [[TMP30:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK64-NEXT: store <2 x i64> [[TMP29]], <2 x i64>* [[TMP30]], align 16 +// CHECK64-NEXT: [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK64-NEXT: [[TMP32:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK64-NEXT: store <2 x i64> [[TMP31]], <2 x i64>* [[TMP32]], align 16 +// CHECK64-NEXT: [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK64-NEXT: [[TMP34:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK64-NEXT: store <2 x i64> [[TMP33]], <2 x i64>* [[TMP34]], align 16 +// CHECK64-NEXT: [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK64-NEXT: [[TMP36:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK64-NEXT: store <2 x i64> [[TMP35]], <2 x i64>* [[TMP36]], align 16 +// CHECK64-NEXT: [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK64-NEXT: [[TMP38:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK64-NEXT: store <2 x i64> [[TMP37]], <2 x i64>* [[TMP38]], align 16 +// CHECK64-NEXT: br label [[_MM_AESDECWIDE128KL_U8_EXIT:%.*]] +// CHECK64: aesdecwide128kl_error.i: +// CHECK64-NEXT: [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK64-NEXT: [[TMP41:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP41]], align 16 +// CHECK64-NEXT: [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK64-NEXT: [[TMP43:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP43]], align 16 +// CHECK64-NEXT: [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK64-NEXT: [[TMP45:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP45]], align 16 +// CHECK64-NEXT: [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK64-NEXT: [[TMP47:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP47]], align 16 +// CHECK64-NEXT: [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK64-NEXT: [[TMP49:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP49]], align 16 +// CHECK64-NEXT: [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK64-NEXT: [[TMP51:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP51]], align 16 +// CHECK64-NEXT: [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK64-NEXT: [[TMP53:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP53]], align 16 +// CHECK64-NEXT: br label [[_MM_AESDECWIDE128KL_U8_EXIT]] +// CHECK64: _mm_aesdecwide128kl_u8.exit: +// CHECK64-NEXT: [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK64-NEXT: ret i8 [[TMP54]] +// +// CHECK32-LABEL: @test__mm_aesdecwide128kl_u8( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[IDATA:%.*]], <2 x i64>** [[IDATA_ADDR]], align 4 +// CHECK32-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP1:%.*]] = load <2 x i64>*, <2 x i64>** [[IDATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP1]], <2 x i64>** [[__IDATA_ADDR_I]], align 4 +// CHECK32-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP4:%.*]] = load <2 x i64>*, <2 x i64>** [[__IDATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[TMP4]], align 16 +// CHECK32-NEXT: [[TMP7:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 1 +// CHECK32-NEXT: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[TMP7]], align 16 +// CHECK32-NEXT: [[TMP9:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 2 +// CHECK32-NEXT: [[TMP10:%.*]] = load <2 x i64>, <2 x i64>* [[TMP9]], align 16 +// CHECK32-NEXT: [[TMP11:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 3 +// CHECK32-NEXT: [[TMP12:%.*]] = load <2 x i64>, <2 x i64>* [[TMP11]], align 16 +// CHECK32-NEXT: [[TMP13:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 4 +// CHECK32-NEXT: [[TMP14:%.*]] = load <2 x i64>, <2 x i64>* [[TMP13]], align 16 +// CHECK32-NEXT: [[TMP15:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 5 +// CHECK32-NEXT: [[TMP16:%.*]] = load <2 x i64>, <2 x i64>* [[TMP15]], align 16 +// CHECK32-NEXT: [[TMP17:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 6 +// CHECK32-NEXT: [[TMP18:%.*]] = load <2 x i64>, <2 x i64>* [[TMP17]], align 16 +// CHECK32-NEXT: [[TMP19:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 7 +// CHECK32-NEXT: [[TMP20:%.*]] = load <2 x i64>, <2 x i64>* [[TMP19]], align 16 +// CHECK32-NEXT: [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesdecwide128kl(i8* [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]]) #[[ATTR1]] +// CHECK32-NEXT: [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK32-NEXT: [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1 +// CHECK32-NEXT: br i1 [[TMP23]], label [[AESDECWIDE128KL_NO_ERROR_I:%.*]], label [[AESDECWIDE128KL_ERROR_I:%.*]] +// CHECK32: aesdecwide128kl_no_error.i: +// CHECK32-NEXT: [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK32-NEXT: store <2 x i64> [[TMP24]], <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK32-NEXT: [[TMP26:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK32-NEXT: store <2 x i64> [[TMP25]], <2 x i64>* [[TMP26]], align 16 +// CHECK32-NEXT: [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK32-NEXT: [[TMP28:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK32-NEXT: store <2 x i64> [[TMP27]], <2 x i64>* [[TMP28]], align 16 +// CHECK32-NEXT: [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK32-NEXT: [[TMP30:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK32-NEXT: store <2 x i64> [[TMP29]], <2 x i64>* [[TMP30]], align 16 +// CHECK32-NEXT: [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK32-NEXT: [[TMP32:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK32-NEXT: store <2 x i64> [[TMP31]], <2 x i64>* [[TMP32]], align 16 +// CHECK32-NEXT: [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK32-NEXT: [[TMP34:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK32-NEXT: store <2 x i64> [[TMP33]], <2 x i64>* [[TMP34]], align 16 +// CHECK32-NEXT: [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK32-NEXT: [[TMP36:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK32-NEXT: store <2 x i64> [[TMP35]], <2 x i64>* [[TMP36]], align 16 +// CHECK32-NEXT: [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK32-NEXT: [[TMP38:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK32-NEXT: store <2 x i64> [[TMP37]], <2 x i64>* [[TMP38]], align 16 +// CHECK32-NEXT: br label [[_MM_AESDECWIDE128KL_U8_EXIT:%.*]] +// CHECK32: aesdecwide128kl_error.i: +// CHECK32-NEXT: [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK32-NEXT: [[TMP41:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP41]], align 16 +// CHECK32-NEXT: [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK32-NEXT: [[TMP43:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP43]], align 16 +// CHECK32-NEXT: [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK32-NEXT: [[TMP45:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP45]], align 16 +// CHECK32-NEXT: [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK32-NEXT: [[TMP47:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP47]], align 16 +// CHECK32-NEXT: [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK32-NEXT: [[TMP49:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP49]], align 16 +// CHECK32-NEXT: [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK32-NEXT: [[TMP51:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP51]], align 16 +// CHECK32-NEXT: [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK32-NEXT: [[TMP53:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP53]], align 16 +// CHECK32-NEXT: br label [[_MM_AESDECWIDE128KL_U8_EXIT]] +// CHECK32: _mm_aesdecwide128kl_u8.exit: +// CHECK32-NEXT: [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK32-NEXT: ret i8 [[TMP54]] +// unsigned char test__mm_aesdecwide128kl_u8(__m128i odata[8], const __m128i idata[8], const void* h) { - //CHECK-LABEL: @test__mm_aesdecwide128kl - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 1 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 2 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 3 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 4 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 5 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 6 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 7 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesdecwide128kl(i8* %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}) - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 2 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 3 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 2 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 4 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 3 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 5 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 4 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 6 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 5 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 7 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 6 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 8 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 7 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 0 return _mm_aesdecwide128kl_u8(odata, idata, h); } +// CHECK64-LABEL: @test__mm_aesencwide256kl_u8( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[IDATA:%.*]], <2 x i64>** [[IDATA_ADDR]], align 8 +// CHECK64-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP1:%.*]] = load <2 x i64>*, <2 x i64>** [[IDATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP1]], <2 x i64>** [[__IDATA_ADDR_I]], align 8 +// CHECK64-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP4:%.*]] = load <2 x i64>*, <2 x i64>** [[__IDATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[TMP4]], align 16 +// CHECK64-NEXT: [[TMP7:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 1 +// CHECK64-NEXT: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[TMP7]], align 16 +// CHECK64-NEXT: [[TMP9:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 2 +// CHECK64-NEXT: [[TMP10:%.*]] = load <2 x i64>, <2 x i64>* [[TMP9]], align 16 +// CHECK64-NEXT: [[TMP11:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 3 +// CHECK64-NEXT: [[TMP12:%.*]] = load <2 x i64>, <2 x i64>* [[TMP11]], align 16 +// CHECK64-NEXT: [[TMP13:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 4 +// CHECK64-NEXT: [[TMP14:%.*]] = load <2 x i64>, <2 x i64>* [[TMP13]], align 16 +// CHECK64-NEXT: [[TMP15:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 5 +// CHECK64-NEXT: [[TMP16:%.*]] = load <2 x i64>, <2 x i64>* [[TMP15]], align 16 +// CHECK64-NEXT: [[TMP17:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 6 +// CHECK64-NEXT: [[TMP18:%.*]] = load <2 x i64>, <2 x i64>* [[TMP17]], align 16 +// CHECK64-NEXT: [[TMP19:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 7 +// CHECK64-NEXT: [[TMP20:%.*]] = load <2 x i64>, <2 x i64>* [[TMP19]], align 16 +// CHECK64-NEXT: [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesencwide256kl(i8* [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]]) #[[ATTR1]] +// CHECK64-NEXT: [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK64-NEXT: [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1 +// CHECK64-NEXT: br i1 [[TMP23]], label [[AESENCWIDE256KL_NO_ERROR_I:%.*]], label [[AESENCWIDE256KL_ERROR_I:%.*]] +// CHECK64: aesencwide256kl_no_error.i: +// CHECK64-NEXT: [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK64-NEXT: store <2 x i64> [[TMP24]], <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK64-NEXT: [[TMP26:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK64-NEXT: store <2 x i64> [[TMP25]], <2 x i64>* [[TMP26]], align 16 +// CHECK64-NEXT: [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK64-NEXT: [[TMP28:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK64-NEXT: store <2 x i64> [[TMP27]], <2 x i64>* [[TMP28]], align 16 +// CHECK64-NEXT: [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK64-NEXT: [[TMP30:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK64-NEXT: store <2 x i64> [[TMP29]], <2 x i64>* [[TMP30]], align 16 +// CHECK64-NEXT: [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK64-NEXT: [[TMP32:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK64-NEXT: store <2 x i64> [[TMP31]], <2 x i64>* [[TMP32]], align 16 +// CHECK64-NEXT: [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK64-NEXT: [[TMP34:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK64-NEXT: store <2 x i64> [[TMP33]], <2 x i64>* [[TMP34]], align 16 +// CHECK64-NEXT: [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK64-NEXT: [[TMP36:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK64-NEXT: store <2 x i64> [[TMP35]], <2 x i64>* [[TMP36]], align 16 +// CHECK64-NEXT: [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK64-NEXT: [[TMP38:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK64-NEXT: store <2 x i64> [[TMP37]], <2 x i64>* [[TMP38]], align 16 +// CHECK64-NEXT: br label [[_MM_AESENCWIDE256KL_U8_EXIT:%.*]] +// CHECK64: aesencwide256kl_error.i: +// CHECK64-NEXT: [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK64-NEXT: [[TMP41:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP41]], align 16 +// CHECK64-NEXT: [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK64-NEXT: [[TMP43:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP43]], align 16 +// CHECK64-NEXT: [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK64-NEXT: [[TMP45:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP45]], align 16 +// CHECK64-NEXT: [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK64-NEXT: [[TMP47:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP47]], align 16 +// CHECK64-NEXT: [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK64-NEXT: [[TMP49:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP49]], align 16 +// CHECK64-NEXT: [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK64-NEXT: [[TMP51:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP51]], align 16 +// CHECK64-NEXT: [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK64-NEXT: [[TMP53:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP53]], align 16 +// CHECK64-NEXT: br label [[_MM_AESENCWIDE256KL_U8_EXIT]] +// CHECK64: _mm_aesencwide256kl_u8.exit: +// CHECK64-NEXT: [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK64-NEXT: ret i8 [[TMP54]] +// +// CHECK32-LABEL: @test__mm_aesencwide256kl_u8( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[IDATA:%.*]], <2 x i64>** [[IDATA_ADDR]], align 4 +// CHECK32-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP1:%.*]] = load <2 x i64>*, <2 x i64>** [[IDATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP1]], <2 x i64>** [[__IDATA_ADDR_I]], align 4 +// CHECK32-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP4:%.*]] = load <2 x i64>*, <2 x i64>** [[__IDATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[TMP4]], align 16 +// CHECK32-NEXT: [[TMP7:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 1 +// CHECK32-NEXT: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[TMP7]], align 16 +// CHECK32-NEXT: [[TMP9:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 2 +// CHECK32-NEXT: [[TMP10:%.*]] = load <2 x i64>, <2 x i64>* [[TMP9]], align 16 +// CHECK32-NEXT: [[TMP11:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 3 +// CHECK32-NEXT: [[TMP12:%.*]] = load <2 x i64>, <2 x i64>* [[TMP11]], align 16 +// CHECK32-NEXT: [[TMP13:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 4 +// CHECK32-NEXT: [[TMP14:%.*]] = load <2 x i64>, <2 x i64>* [[TMP13]], align 16 +// CHECK32-NEXT: [[TMP15:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 5 +// CHECK32-NEXT: [[TMP16:%.*]] = load <2 x i64>, <2 x i64>* [[TMP15]], align 16 +// CHECK32-NEXT: [[TMP17:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 6 +// CHECK32-NEXT: [[TMP18:%.*]] = load <2 x i64>, <2 x i64>* [[TMP17]], align 16 +// CHECK32-NEXT: [[TMP19:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 7 +// CHECK32-NEXT: [[TMP20:%.*]] = load <2 x i64>, <2 x i64>* [[TMP19]], align 16 +// CHECK32-NEXT: [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesencwide256kl(i8* [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]]) #[[ATTR1]] +// CHECK32-NEXT: [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK32-NEXT: [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1 +// CHECK32-NEXT: br i1 [[TMP23]], label [[AESENCWIDE256KL_NO_ERROR_I:%.*]], label [[AESENCWIDE256KL_ERROR_I:%.*]] +// CHECK32: aesencwide256kl_no_error.i: +// CHECK32-NEXT: [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK32-NEXT: store <2 x i64> [[TMP24]], <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK32-NEXT: [[TMP26:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK32-NEXT: store <2 x i64> [[TMP25]], <2 x i64>* [[TMP26]], align 16 +// CHECK32-NEXT: [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK32-NEXT: [[TMP28:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK32-NEXT: store <2 x i64> [[TMP27]], <2 x i64>* [[TMP28]], align 16 +// CHECK32-NEXT: [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK32-NEXT: [[TMP30:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK32-NEXT: store <2 x i64> [[TMP29]], <2 x i64>* [[TMP30]], align 16 +// CHECK32-NEXT: [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK32-NEXT: [[TMP32:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK32-NEXT: store <2 x i64> [[TMP31]], <2 x i64>* [[TMP32]], align 16 +// CHECK32-NEXT: [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK32-NEXT: [[TMP34:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK32-NEXT: store <2 x i64> [[TMP33]], <2 x i64>* [[TMP34]], align 16 +// CHECK32-NEXT: [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK32-NEXT: [[TMP36:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK32-NEXT: store <2 x i64> [[TMP35]], <2 x i64>* [[TMP36]], align 16 +// CHECK32-NEXT: [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK32-NEXT: [[TMP38:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK32-NEXT: store <2 x i64> [[TMP37]], <2 x i64>* [[TMP38]], align 16 +// CHECK32-NEXT: br label [[_MM_AESENCWIDE256KL_U8_EXIT:%.*]] +// CHECK32: aesencwide256kl_error.i: +// CHECK32-NEXT: [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK32-NEXT: [[TMP41:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP41]], align 16 +// CHECK32-NEXT: [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK32-NEXT: [[TMP43:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP43]], align 16 +// CHECK32-NEXT: [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK32-NEXT: [[TMP45:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP45]], align 16 +// CHECK32-NEXT: [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK32-NEXT: [[TMP47:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP47]], align 16 +// CHECK32-NEXT: [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK32-NEXT: [[TMP49:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP49]], align 16 +// CHECK32-NEXT: [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK32-NEXT: [[TMP51:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP51]], align 16 +// CHECK32-NEXT: [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK32-NEXT: [[TMP53:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP53]], align 16 +// CHECK32-NEXT: br label [[_MM_AESENCWIDE256KL_U8_EXIT]] +// CHECK32: _mm_aesencwide256kl_u8.exit: +// CHECK32-NEXT: [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK32-NEXT: ret i8 [[TMP54]] +// unsigned char test__mm_aesencwide256kl_u8(__m128i odata[8], const __m128i idata[8], const void* h) { - //CHECK-LABEL: @test__mm_aesencwide256kl - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 1 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 2 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 3 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 4 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 5 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 6 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 7 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesencwide256kl(i8* %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}) - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 2 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 3 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 2 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 4 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 3 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 5 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 4 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 6 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 5 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 7 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 6 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 8 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 7 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 0 return _mm_aesencwide256kl_u8(odata, idata, h); } +// CHECK64-LABEL: @test__mm_aesdecwide256kl_u8( +// CHECK64-NEXT: entry: +// CHECK64-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>*, align 8 +// CHECK64-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 8 +// CHECK64-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[IDATA:%.*]], <2 x i64>** [[IDATA_ADDR]], align 8 +// CHECK64-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP1:%.*]] = load <2 x i64>*, <2 x i64>** [[IDATA_ADDR]], align 8 +// CHECK64-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: store <2 x i64>* [[TMP1]], <2 x i64>** [[__IDATA_ADDR_I]], align 8 +// CHECK64-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP4:%.*]] = load <2 x i64>*, <2 x i64>** [[__IDATA_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 8 +// CHECK64-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[TMP4]], align 16 +// CHECK64-NEXT: [[TMP7:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 1 +// CHECK64-NEXT: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[TMP7]], align 16 +// CHECK64-NEXT: [[TMP9:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 2 +// CHECK64-NEXT: [[TMP10:%.*]] = load <2 x i64>, <2 x i64>* [[TMP9]], align 16 +// CHECK64-NEXT: [[TMP11:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 3 +// CHECK64-NEXT: [[TMP12:%.*]] = load <2 x i64>, <2 x i64>* [[TMP11]], align 16 +// CHECK64-NEXT: [[TMP13:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 4 +// CHECK64-NEXT: [[TMP14:%.*]] = load <2 x i64>, <2 x i64>* [[TMP13]], align 16 +// CHECK64-NEXT: [[TMP15:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 5 +// CHECK64-NEXT: [[TMP16:%.*]] = load <2 x i64>, <2 x i64>* [[TMP15]], align 16 +// CHECK64-NEXT: [[TMP17:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 6 +// CHECK64-NEXT: [[TMP18:%.*]] = load <2 x i64>, <2 x i64>* [[TMP17]], align 16 +// CHECK64-NEXT: [[TMP19:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 7 +// CHECK64-NEXT: [[TMP20:%.*]] = load <2 x i64>, <2 x i64>* [[TMP19]], align 16 +// CHECK64-NEXT: [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesdecwide256kl(i8* [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]]) #[[ATTR1]] +// CHECK64-NEXT: [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK64-NEXT: [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1 +// CHECK64-NEXT: br i1 [[TMP23]], label [[AESDECWIDE256KL_NO_ERROR_I:%.*]], label [[AESDECWIDE256KL_ERROR_I:%.*]] +// CHECK64: aesdecwide256kl_no_error.i: +// CHECK64-NEXT: [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK64-NEXT: store <2 x i64> [[TMP24]], <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK64-NEXT: [[TMP26:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK64-NEXT: store <2 x i64> [[TMP25]], <2 x i64>* [[TMP26]], align 16 +// CHECK64-NEXT: [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK64-NEXT: [[TMP28:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK64-NEXT: store <2 x i64> [[TMP27]], <2 x i64>* [[TMP28]], align 16 +// CHECK64-NEXT: [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK64-NEXT: [[TMP30:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK64-NEXT: store <2 x i64> [[TMP29]], <2 x i64>* [[TMP30]], align 16 +// CHECK64-NEXT: [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK64-NEXT: [[TMP32:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK64-NEXT: store <2 x i64> [[TMP31]], <2 x i64>* [[TMP32]], align 16 +// CHECK64-NEXT: [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK64-NEXT: [[TMP34:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK64-NEXT: store <2 x i64> [[TMP33]], <2 x i64>* [[TMP34]], align 16 +// CHECK64-NEXT: [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK64-NEXT: [[TMP36:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK64-NEXT: store <2 x i64> [[TMP35]], <2 x i64>* [[TMP36]], align 16 +// CHECK64-NEXT: [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK64-NEXT: [[TMP38:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK64-NEXT: store <2 x i64> [[TMP37]], <2 x i64>* [[TMP38]], align 16 +// CHECK64-NEXT: br label [[_MM_AESDECWIDE256KL_U8_EXIT:%.*]] +// CHECK64: aesdecwide256kl_error.i: +// CHECK64-NEXT: [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK64-NEXT: [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK64-NEXT: [[TMP41:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP41]], align 16 +// CHECK64-NEXT: [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK64-NEXT: [[TMP43:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP43]], align 16 +// CHECK64-NEXT: [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK64-NEXT: [[TMP45:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP45]], align 16 +// CHECK64-NEXT: [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK64-NEXT: [[TMP47:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP47]], align 16 +// CHECK64-NEXT: [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK64-NEXT: [[TMP49:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP49]], align 16 +// CHECK64-NEXT: [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK64-NEXT: [[TMP51:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP51]], align 16 +// CHECK64-NEXT: [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK64-NEXT: [[TMP53:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK64-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP53]], align 16 +// CHECK64-NEXT: br label [[_MM_AESDECWIDE256KL_U8_EXIT]] +// CHECK64: _mm_aesdecwide256kl_u8.exit: +// CHECK64-NEXT: [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK64-NEXT: ret i8 [[TMP54]] +// +// CHECK32-LABEL: @test__mm_aesdecwide256kl_u8( +// CHECK32-NEXT: entry: +// CHECK32-NEXT: [[__ODATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__IDATA_ADDR_I:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[__H_ADDR_I:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: [[ODATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[IDATA_ADDR:%.*]] = alloca <2 x i64>*, align 4 +// CHECK32-NEXT: [[H_ADDR:%.*]] = alloca i8*, align 4 +// CHECK32-NEXT: store <2 x i64>* [[ODATA:%.*]], <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[IDATA:%.*]], <2 x i64>** [[IDATA_ADDR]], align 4 +// CHECK32-NEXT: store i8* [[H:%.*]], i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: [[TMP0:%.*]] = load <2 x i64>*, <2 x i64>** [[ODATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP1:%.*]] = load <2 x i64>*, <2 x i64>** [[IDATA_ADDR]], align 4 +// CHECK32-NEXT: [[TMP2:%.*]] = load i8*, i8** [[H_ADDR]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP0]], <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: store <2 x i64>* [[TMP1]], <2 x i64>** [[__IDATA_ADDR_I]], align 4 +// CHECK32-NEXT: store i8* [[TMP2]], i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP3:%.*]] = load <2 x i64>*, <2 x i64>** [[__ODATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP4:%.*]] = load <2 x i64>*, <2 x i64>** [[__IDATA_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP5:%.*]] = load i8*, i8** [[__H_ADDR_I]], align 4 +// CHECK32-NEXT: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[TMP4]], align 16 +// CHECK32-NEXT: [[TMP7:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 1 +// CHECK32-NEXT: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[TMP7]], align 16 +// CHECK32-NEXT: [[TMP9:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 2 +// CHECK32-NEXT: [[TMP10:%.*]] = load <2 x i64>, <2 x i64>* [[TMP9]], align 16 +// CHECK32-NEXT: [[TMP11:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 3 +// CHECK32-NEXT: [[TMP12:%.*]] = load <2 x i64>, <2 x i64>* [[TMP11]], align 16 +// CHECK32-NEXT: [[TMP13:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 4 +// CHECK32-NEXT: [[TMP14:%.*]] = load <2 x i64>, <2 x i64>* [[TMP13]], align 16 +// CHECK32-NEXT: [[TMP15:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 5 +// CHECK32-NEXT: [[TMP16:%.*]] = load <2 x i64>, <2 x i64>* [[TMP15]], align 16 +// CHECK32-NEXT: [[TMP17:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 6 +// CHECK32-NEXT: [[TMP18:%.*]] = load <2 x i64>, <2 x i64>* [[TMP17]], align 16 +// CHECK32-NEXT: [[TMP19:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP4]], i32 7 +// CHECK32-NEXT: [[TMP20:%.*]] = load <2 x i64>, <2 x i64>* [[TMP19]], align 16 +// CHECK32-NEXT: [[TMP21:%.*]] = call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesdecwide256kl(i8* [[TMP5]], <2 x i64> [[TMP6]], <2 x i64> [[TMP8]], <2 x i64> [[TMP10]], <2 x i64> [[TMP12]], <2 x i64> [[TMP14]], <2 x i64> [[TMP16]], <2 x i64> [[TMP18]], <2 x i64> [[TMP20]]) #[[ATTR1]] +// CHECK32-NEXT: [[TMP22:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK32-NEXT: [[TMP23:%.*]] = trunc i8 [[TMP22]] to i1 +// CHECK32-NEXT: br i1 [[TMP23]], label [[AESDECWIDE256KL_NO_ERROR_I:%.*]], label [[AESDECWIDE256KL_ERROR_I:%.*]] +// CHECK32: aesdecwide256kl_no_error.i: +// CHECK32-NEXT: [[TMP24:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK32-NEXT: store <2 x i64> [[TMP24]], <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: [[TMP25:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK32-NEXT: [[TMP26:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK32-NEXT: store <2 x i64> [[TMP25]], <2 x i64>* [[TMP26]], align 16 +// CHECK32-NEXT: [[TMP27:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK32-NEXT: [[TMP28:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK32-NEXT: store <2 x i64> [[TMP27]], <2 x i64>* [[TMP28]], align 16 +// CHECK32-NEXT: [[TMP29:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK32-NEXT: [[TMP30:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK32-NEXT: store <2 x i64> [[TMP29]], <2 x i64>* [[TMP30]], align 16 +// CHECK32-NEXT: [[TMP31:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK32-NEXT: [[TMP32:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK32-NEXT: store <2 x i64> [[TMP31]], <2 x i64>* [[TMP32]], align 16 +// CHECK32-NEXT: [[TMP33:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK32-NEXT: [[TMP34:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK32-NEXT: store <2 x i64> [[TMP33]], <2 x i64>* [[TMP34]], align 16 +// CHECK32-NEXT: [[TMP35:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK32-NEXT: [[TMP36:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK32-NEXT: store <2 x i64> [[TMP35]], <2 x i64>* [[TMP36]], align 16 +// CHECK32-NEXT: [[TMP37:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK32-NEXT: [[TMP38:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK32-NEXT: store <2 x i64> [[TMP37]], <2 x i64>* [[TMP38]], align 16 +// CHECK32-NEXT: br label [[_MM_AESDECWIDE256KL_U8_EXIT:%.*]] +// CHECK32: aesdecwide256kl_error.i: +// CHECK32-NEXT: [[TMP39:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 1 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP3]], align 16 +// CHECK32-NEXT: [[TMP40:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 2 +// CHECK32-NEXT: [[TMP41:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 1 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP41]], align 16 +// CHECK32-NEXT: [[TMP42:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 3 +// CHECK32-NEXT: [[TMP43:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 2 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP43]], align 16 +// CHECK32-NEXT: [[TMP44:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 4 +// CHECK32-NEXT: [[TMP45:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 3 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP45]], align 16 +// CHECK32-NEXT: [[TMP46:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 5 +// CHECK32-NEXT: [[TMP47:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 4 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP47]], align 16 +// CHECK32-NEXT: [[TMP48:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 6 +// CHECK32-NEXT: [[TMP49:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 5 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP49]], align 16 +// CHECK32-NEXT: [[TMP50:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 7 +// CHECK32-NEXT: [[TMP51:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 6 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP51]], align 16 +// CHECK32-NEXT: [[TMP52:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 8 +// CHECK32-NEXT: [[TMP53:%.*]] = getelementptr <2 x i64>, <2 x i64>* [[TMP3]], i32 7 +// CHECK32-NEXT: store <2 x i64> zeroinitializer, <2 x i64>* [[TMP53]], align 16 +// CHECK32-NEXT: br label [[_MM_AESDECWIDE256KL_U8_EXIT]] +// CHECK32: _mm_aesdecwide256kl_u8.exit: +// CHECK32-NEXT: [[TMP54:%.*]] = extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[TMP21]], 0 +// CHECK32-NEXT: ret i8 [[TMP54]] +// unsigned char test__mm_aesdecwide256kl_u8(__m128i odata[8], const __m128i idata[8], const void* h) { - //CHECK-LABEL: @test__mm_aesdecwide256kl - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 1 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 2 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 3 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 4 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 5 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 6 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 7 - //CHECK: load <2 x i64>, <2 x i64>* %{{.*}}, align 16 - //CHECK: call { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.x86.aesdecwide256kl(i8* %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}}) - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 2 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 1 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 3 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 2 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 4 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 3 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 5 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 4 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 6 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 5 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 7 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 6 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 8 - //CHECK: getelementptr <2 x i64>, <2 x i64>* %{{.*}}, i32 7 - //CHECK: store <2 x i64> %{{.*}}, <2 x i64>* %{{.*}}, align 16 - //CHECK: extractvalue { i8, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } %{{.*}}, 0 return _mm_aesdecwide256kl_u8(odata, idata, h); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c index 22fb8a2e39f1a..9e4326e312c54 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c @@ -7,8 +7,9 @@ uint64_t test_svcntb() { // CHECK-LABEL: test_svcntb - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 31) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 4 + // CHECK: ret i64 %[[RET]] return svcntb(); } @@ -23,72 +24,63 @@ uint64_t test_svcntb_pat() uint64_t test_svcntb_pat_1() { // CHECK-LABEL: test_svcntb_pat_1 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 1) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 1 return svcntb_pat(SV_VL1); } uint64_t test_svcntb_pat_2() { // CHECK-LABEL: test_svcntb_pat_2 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 2) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 2 return svcntb_pat(SV_VL2); } uint64_t test_svcntb_pat_3() { // CHECK-LABEL: test_svcntb_pat_3 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 3) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 3 return svcntb_pat(SV_VL3); } uint64_t test_svcntb_pat_4() { // CHECK-LABEL: test_svcntb_pat_4 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 4) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 4 return svcntb_pat(SV_VL4); } uint64_t test_svcntb_pat_5() { // CHECK-LABEL: test_svcntb_pat_5 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 5) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 5 return svcntb_pat(SV_VL5); } uint64_t test_svcntb_pat_6() { // CHECK-LABEL: test_svcntb_pat_6 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 6) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 6 return svcntb_pat(SV_VL6); } uint64_t test_svcntb_pat_7() { // CHECK-LABEL: test_svcntb_pat_7 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 7) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 7 return svcntb_pat(SV_VL7); } uint64_t test_svcntb_pat_8() { // CHECK-LABEL: test_svcntb_pat_8 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 8) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 8 return svcntb_pat(SV_VL8); } uint64_t test_svcntb_pat_9() { // CHECK-LABEL: test_svcntb_pat_9 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 9) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 16 return svcntb_pat(SV_VL16); } @@ -143,7 +135,8 @@ uint64_t test_svcntb_pat_15() uint64_t test_svcntb_pat_16() { // CHECK-LABEL: test_svcntb_pat_16 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 31) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 4 + // CHECK: ret i64 %[[RET]] return svcntb_pat(SV_ALL); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c index 86108629d94ab..9880968bae9b0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c @@ -7,8 +7,9 @@ uint64_t test_svcntd() { // CHECK-LABEL: test_svcntd - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 31) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 1 + // CHECK: ret i64 %[[RET]] return svcntd(); } @@ -23,16 +24,14 @@ uint64_t test_svcntd_pat() uint64_t test_svcntd_pat_1() { // CHECK-LABEL: test_svcntd_pat_1 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 1) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 1 return svcntd_pat(SV_VL1); } uint64_t test_svcntd_pat_2() { // CHECK-LABEL: test_svcntd_pat_2 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 2) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 2 return svcntd_pat(SV_VL2); } @@ -143,7 +142,8 @@ uint64_t test_svcntd_pat_15() uint64_t test_svcntd_pat_16() { // CHECK-LABEL: test_svcntd_pat_16 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 31) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 1 + // CHECK: ret i64 %[[RET]] return svcntd_pat(SV_ALL); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c index 20bee22dd2c5a..4c3c03d2ca302 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c @@ -7,8 +7,9 @@ uint64_t test_svcnth() { // CHECK-LABEL: test_svcnth - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 31) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 3 + // CHECK: ret i64 %[[RET]] return svcnth(); } @@ -23,64 +24,56 @@ uint64_t test_svcnth_pat() uint64_t test_svcnth_pat_1() { // CHECK-LABEL: test_svcnth_pat_1 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 1) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 1 return svcnth_pat(SV_VL1); } uint64_t test_svcnth_pat_2() { // CHECK-LABEL: test_svcnth_pat_2 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 2) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 2 return svcnth_pat(SV_VL2); } uint64_t test_svcnth_pat_3() { // CHECK-LABEL: test_svcnth_pat_3 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 3) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 3 return svcnth_pat(SV_VL3); } uint64_t test_svcnth_pat_4() { // CHECK-LABEL: test_svcnth_pat_4 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 4) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 4 return svcnth_pat(SV_VL4); } uint64_t test_svcnth_pat_5() { // CHECK-LABEL: test_svcnth_pat_5 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 5) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 5 return svcnth_pat(SV_VL5); } uint64_t test_svcnth_pat_6() { // CHECK-LABEL: test_svcnth_pat_6 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 6) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 6 return svcnth_pat(SV_VL6); } uint64_t test_svcnth_pat_7() { // CHECK-LABEL: test_svcnth_pat_7 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 7) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 7 return svcnth_pat(SV_VL7); } uint64_t test_svcnth_pat_8() { // CHECK-LABEL: test_svcnth_pat_8 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 8) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 8 return svcnth_pat(SV_VL8); } @@ -143,7 +136,8 @@ uint64_t test_svcnth_pat_15() uint64_t test_svcnth_pat_16() { // CHECK-LABEL: test_svcnth_pat_16 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 31) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 3 + // CHECK: ret i64 %[[RET]] return svcnth_pat(SV_ALL); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c index b298a371f84e2..a57c5d2bdb151 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c @@ -7,8 +7,9 @@ uint64_t test_svcntw() { // CHECK-LABEL: test_svcntw - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 31) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 2 + // CHECK: ret i64 %[[RET]] return svcntw(); } @@ -23,32 +24,28 @@ uint64_t test_svcntw_pat() uint64_t test_svcntw_pat_1() { // CHECK-LABEL: test_svcntw_pat_1 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 1) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 1 return svcntw_pat(SV_VL1); } uint64_t test_svcntw_pat_2() { // CHECK-LABEL: test_svcntw_pat_2 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 2) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 2 return svcntw_pat(SV_VL2); } uint64_t test_svcntw_pat_3() { // CHECK-LABEL: test_svcntw_pat_3 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 3) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 3 return svcntw_pat(SV_VL3); } uint64_t test_svcntw_pat_4() { // CHECK-LABEL: test_svcntw_pat_4 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 4) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: ret i64 4 return svcntw_pat(SV_VL4); } @@ -143,7 +140,8 @@ uint64_t test_svcntw_pat_15() uint64_t test_svcntw_pat_16() { // CHECK-LABEL: test_svcntw_pat_16 - // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 31) - // CHECK: ret i64 %[[INTRINSIC]] + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 2 + // CHECK: ret i64 %[[RET]] return svcntw_pat(SV_ALL); } diff --git a/clang/test/CodeGen/arithmetic-fence-builtin.c b/clang/test/CodeGen/arithmetic-fence-builtin.c new file mode 100644 index 0000000000000..6b5b5b4b9cefa --- /dev/null +++ b/clang/test/CodeGen/arithmetic-fence-builtin.c @@ -0,0 +1,74 @@ +// Test with fast math +// RUN: %clang_cc1 -triple i386-pc-linux-gnu -emit-llvm -DFAST \ +// RUN: -mreassociate \ +// RUN: -o - %s | FileCheck --check-prefixes CHECK,CHECKFAST,CHECKNP %s +// +// Test with fast math and fprotect-parens +// RUN: %clang_cc1 -triple i386-pc-linux-gnu -emit-llvm -DFAST \ +// RUN: -mreassociate -fprotect-parens -ffp-contract=on\ +// RUN: -o - %s | FileCheck --check-prefixes CHECK,CHECKFAST,CHECKPP %s +// +// Test without fast math: llvm intrinsic not created +// RUN: %clang_cc1 -triple i386-pc-linux-gnu -emit-llvm -fprotect-parens\ +// RUN: -o - %s | FileCheck --implicit-check-not="llvm.arithmetic.fence" %s +// +int v; +int addit(float a, float b) { + // CHECK: define {{.*}}@addit(float %a, float %b) #0 { + _Complex double cd, cd1; + cd = __arithmetic_fence(cd1); + // CHECKFAST: call{{.*}} double @llvm.arithmetic.fence.f64({{.*}}real) + // CHECKFAST: call{{.*}} double @llvm.arithmetic.fence.f64({{.*}}imag) + // Vector should be supported. + typedef float __v2f32 __attribute__((__vector_size__(8))); + __v2f32 vec1, vec2; + vec1 = __arithmetic_fence(vec2); + // CHECKFAST: call{{.*}} <2 x float> @llvm.arithmetic.fence.v2f32 + vec2 = (vec2 + vec1); + // CHECKPP: call{{.*}} <2 x float> @llvm.arithmetic.fence.v2f32 + + v = __arithmetic_fence(a + b); + // CHECKFAST: call{{.*}} float @llvm.arithmetic.fence.f32(float %add{{.*}}) + + v = (a + b); + // CHECKPP: call{{.*}} float @llvm.arithmetic.fence.f32(float %add{{.*}}) + v = a + (b*b); + // CHECKPP: fmul reassoc + // CHECKPP-NEXT: call{{.*}} float @llvm.arithmetic.fence.f32(float %mul) + // CHECKNP: fmul + // CHECKNP: fadd + v = b + a*a; + // CHECKPP: call{{.*}} float @llvm.fmuladd.f32 + // CHECKNP: fmul + // CHECKNP: fadd + v = b + __arithmetic_fence(a*a); // Fence blocks recognition of FMA + // CHECKPP: fmul + // CHECKNP: fmul + + b = (a); + (a) = b; + // CHECK-NEXT fptosi + // CHECK-NEXT store i32 + // CHECK-NEXT load float + // CHECK-NEXT store float + // CHECK-NEXT load float + // CHECK-NEXT store float + return 0; + // CHECK-NEXT ret i32 0 +} +int addit1(int a, int b) { + // CHECK: define {{.*}}@addit1(i32 %a, i32 %b{{.*}} + v = (a + b); + // CHECK-NOT: call{{.*}} float @llvm.arithmetic.fence.int(float %add) + return 0; +} +#ifdef FAST +#pragma float_control(precise, on) +int subit(float a, float b, float *fp) { + // CHECKFAST: define {{.*}}@subit(float %a, float %b{{.*}} + *fp = __arithmetic_fence(a - b); + *fp = (a + b); + // CHECK-NOT: call{{.*}} float @llvm.arithmetic.fence.f32(float %add) + return 0; +} +#endif diff --git a/clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c b/clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c index 73ac3f49cf3bd..278cc930610bd 100644 --- a/clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c +++ b/clang/test/CodeGen/attr-arm-sve-vector-bits-bitcast.c @@ -30,21 +30,21 @@ DEFINE_STRUCT(bool) // CHECK-128-LABEL: @read_int64( // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16, [[TBAA6:!tbaa !.*]] +// CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6:![0-9]+]] // CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP0]], i64 0) // CHECK-128-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-256-LABEL: @read_int64( // CHECK-256-NEXT: entry: // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-256-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* [[ARRAYIDX]], align 16, [[TBAA6:!tbaa !.*]] +// CHECK-256-NEXT: [[TMP0:%.*]] = load <4 x i64>, <4 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6:![0-9]+]] // CHECK-256-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v4i64( undef, <4 x i64> [[TMP0]], i64 0) // CHECK-256-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-512-LABEL: @read_int64( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[ARRAYIDX]], align 16, [[TBAA6:!tbaa !.*]] +// CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6:![0-9]+]] // CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v8i64( undef, <8 x i64> [[TMP0]], i64 0) // CHECK-512-NEXT: ret [[CASTSCALABLESVE]] // @@ -56,21 +56,21 @@ svint64_t read_int64(struct struct_int64 *s) { // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <2 x i64> @llvm.experimental.vector.extract.v2i64.nxv2i64( [[X:%.*]], i64 0) // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-128-NEXT: store <2 x i64> [[CASTFIXEDSVE]], <2 x i64>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-128-NEXT: store <2 x i64> [[CASTFIXEDSVE]], <2 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret void // // CHECK-256-LABEL: @write_int64( // CHECK-256-NEXT: entry: // CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = call <4 x i64> @llvm.experimental.vector.extract.v4i64.nxv2i64( [[X:%.*]], i64 0) // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-256-NEXT: store <4 x i64> [[CASTFIXEDSVE]], <4 x i64>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-256-NEXT: store <4 x i64> [[CASTFIXEDSVE]], <4 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-256-NEXT: ret void // // CHECK-512-LABEL: @write_int64( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x i64> @llvm.experimental.vector.extract.v8i64.nxv2i64( [[X:%.*]], i64 0) // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_INT64:%.*]], %struct.struct_int64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-512-NEXT: store <8 x i64> [[CASTFIXEDSVE]], <8 x i64>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-512-NEXT: store <8 x i64> [[CASTFIXEDSVE]], <8 x i64>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void // void write_int64(struct struct_int64 *s, svint64_t x) { @@ -84,21 +84,21 @@ void write_int64(struct struct_int64 *s, svint64_t x) { // CHECK-128-LABEL: @read_float64( // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP0]], i64 0) // CHECK-128-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-256-LABEL: @read_float64( // CHECK-256-NEXT: entry: // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-256-NEXT: [[TMP0:%.*]] = load <4 x double>, <4 x double>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-256-NEXT: [[TMP0:%.*]] = load <4 x double>, <4 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-256-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv2f64.v4f64( undef, <4 x double> [[TMP0]], i64 0) // CHECK-256-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-512-LABEL: @read_float64( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x double>, <8 x double>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x double>, <8 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv2f64.v8f64( undef, <8 x double> [[TMP0]], i64 0) // CHECK-512-NEXT: ret [[CASTSCALABLESVE]] // @@ -110,21 +110,21 @@ svfloat64_t read_float64(struct struct_float64 *s) { // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <2 x double> @llvm.experimental.vector.extract.v2f64.nxv2f64( [[X:%.*]], i64 0) // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-128-NEXT: store <2 x double> [[CASTFIXEDSVE]], <2 x double>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-128-NEXT: store <2 x double> [[CASTFIXEDSVE]], <2 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret void // // CHECK-256-LABEL: @write_float64( // CHECK-256-NEXT: entry: // CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = call <4 x double> @llvm.experimental.vector.extract.v4f64.nxv2f64( [[X:%.*]], i64 0) // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-256-NEXT: store <4 x double> [[CASTFIXEDSVE]], <4 x double>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-256-NEXT: store <4 x double> [[CASTFIXEDSVE]], <4 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-256-NEXT: ret void // // CHECK-512-LABEL: @write_float64( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x double> @llvm.experimental.vector.extract.v8f64.nxv2f64( [[X:%.*]], i64 0) // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_FLOAT64:%.*]], %struct.struct_float64* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-512-NEXT: store <8 x double> [[CASTFIXEDSVE]], <8 x double>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-512-NEXT: store <8 x double> [[CASTFIXEDSVE]], <8 x double>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void // void write_float64(struct struct_float64 *s, svfloat64_t x) { @@ -138,21 +138,21 @@ void write_float64(struct struct_float64 *s, svfloat64_t x) { // CHECK-128-LABEL: @read_bfloat16( // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-128-NEXT: [[TMP0:%.*]] = load <8 x bfloat>, <8 x bfloat>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-128-NEXT: [[TMP0:%.*]] = load <8 x bfloat>, <8 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP0]], i64 0) // CHECK-128-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-256-LABEL: @read_bfloat16( // CHECK-256-NEXT: entry: // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-256-NEXT: [[TMP0:%.*]] = load <16 x bfloat>, <16 x bfloat>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-256-NEXT: [[TMP0:%.*]] = load <16 x bfloat>, <16 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-256-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv8bf16.v16bf16( undef, <16 x bfloat> [[TMP0]], i64 0) // CHECK-256-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-512-LABEL: @read_bfloat16( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-512-NEXT: [[TMP0:%.*]] = load <32 x bfloat>, <32 x bfloat>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-512-NEXT: [[TMP0:%.*]] = load <32 x bfloat>, <32 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv8bf16.v32bf16( undef, <32 x bfloat> [[TMP0]], i64 0) // CHECK-512-NEXT: ret [[CASTSCALABLESVE]] // @@ -164,21 +164,21 @@ svbfloat16_t read_bfloat16(struct struct_bfloat16 *s) { // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x bfloat> @llvm.experimental.vector.extract.v8bf16.nxv8bf16( [[X:%.*]], i64 0) // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-128-NEXT: store <8 x bfloat> [[CASTFIXEDSVE]], <8 x bfloat>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-128-NEXT: store <8 x bfloat> [[CASTFIXEDSVE]], <8 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret void // // CHECK-256-LABEL: @write_bfloat16( // CHECK-256-NEXT: entry: // CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = call <16 x bfloat> @llvm.experimental.vector.extract.v16bf16.nxv8bf16( [[X:%.*]], i64 0) // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-256-NEXT: store <16 x bfloat> [[CASTFIXEDSVE]], <16 x bfloat>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-256-NEXT: store <16 x bfloat> [[CASTFIXEDSVE]], <16 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-256-NEXT: ret void // // CHECK-512-LABEL: @write_bfloat16( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <32 x bfloat> @llvm.experimental.vector.extract.v32bf16.nxv8bf16( [[X:%.*]], i64 0) // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BFLOAT16:%.*]], %struct.struct_bfloat16* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-512-NEXT: store <32 x bfloat> [[CASTFIXEDSVE]], <32 x bfloat>* [[ARRAYIDX]], align 16, [[TBAA6]] +// CHECK-512-NEXT: store <32 x bfloat> [[CASTFIXEDSVE]], <32 x bfloat>* [[ARRAYIDX]], align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void // void write_bfloat16(struct struct_bfloat16 *s, svbfloat16_t x) { @@ -191,23 +191,32 @@ void write_bfloat16(struct struct_bfloat16 *s, svbfloat16_t x) { // CHECK-128-LABEL: @read_bool( // CHECK-128-NEXT: entry: +// CHECK-128-NEXT: [[SAVED_VALUE:%.*]] = alloca <2 x i8>, align 16 // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-128-NEXT: [[TMP0:%.*]] = bitcast <2 x i8>* [[ARRAYIDX]] to * -// CHECK-128-NEXT: [[TMP1:%.*]] = load , * [[TMP0]], align 2, [[TBAA6]] +// CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i8>, <2 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] +// CHECK-128-NEXT: store <2 x i8> [[TMP0]], <2 x i8>* [[SAVED_VALUE]], align 16, !tbaa [[TBAA6]] +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast <2 x i8>* [[SAVED_VALUE]] to * +// CHECK-128-NEXT: [[TMP1:%.*]] = load , * [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret [[TMP1]] // // CHECK-256-LABEL: @read_bool( // CHECK-256-NEXT: entry: +// CHECK-256-NEXT: [[SAVED_VALUE:%.*]] = alloca <4 x i8>, align 16 // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-256-NEXT: [[TMP0:%.*]] = bitcast <4 x i8>* [[ARRAYIDX]] to * -// CHECK-256-NEXT: [[TMP1:%.*]] = load , * [[TMP0]], align 2, [[TBAA6]] +// CHECK-256-NEXT: [[TMP0:%.*]] = load <4 x i8>, <4 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] +// CHECK-256-NEXT: store <4 x i8> [[TMP0]], <4 x i8>* [[SAVED_VALUE]], align 16, !tbaa [[TBAA6]] +// CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast <4 x i8>* [[SAVED_VALUE]] to * +// CHECK-256-NEXT: [[TMP1:%.*]] = load , * [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] // CHECK-256-NEXT: ret [[TMP1]] // // CHECK-512-LABEL: @read_bool( // CHECK-512-NEXT: entry: +// CHECK-512-NEXT: [[SAVED_VALUE:%.*]] = alloca <8 x i8>, align 16 // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-512-NEXT: [[TMP0:%.*]] = bitcast <8 x i8>* [[ARRAYIDX]] to * -// CHECK-512-NEXT: [[TMP1:%.*]] = load , * [[TMP0]], align 2, [[TBAA6]] +// CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] +// CHECK-512-NEXT: store <8 x i8> [[TMP0]], <8 x i8>* [[SAVED_VALUE]], align 16, !tbaa [[TBAA6]] +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast <8 x i8>* [[SAVED_VALUE]] to * +// CHECK-512-NEXT: [[TMP1:%.*]] = load , * [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret [[TMP1]] // svbool_t read_bool(struct struct_bool *s) { @@ -216,32 +225,32 @@ svbool_t read_bool(struct struct_bool *s) { // CHECK-128-LABEL: @write_bool( // CHECK-128-NEXT: entry: -// CHECK-128-NEXT: [[X_ADDR:%.*]] = alloca , align 16 -// CHECK-128-NEXT: store [[X:%.*]], * [[X_ADDR]], align 16, [[TBAA9:!tbaa !.*]] -// CHECK-128-NEXT: [[TMP0:%.*]] = bitcast * [[X_ADDR]] to <2 x i8>* -// CHECK-128-NEXT: [[TMP1:%.*]] = load <2 x i8>, <2 x i8>* [[TMP0]], align 16, [[TBAA6]] +// CHECK-128-NEXT: [[SAVED_VALUE:%.*]] = alloca , align 16 +// CHECK-128-NEXT: store [[X:%.*]], * [[SAVED_VALUE]], align 16, !tbaa [[TBAA9:![0-9]+]] +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast * [[SAVED_VALUE]] to <2 x i8>* +// CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i8>, <2 x i8>* [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-128-NEXT: store <2 x i8> [[TMP1]], <2 x i8>* [[ARRAYIDX]], align 2, [[TBAA6]] +// CHECK-128-NEXT: store <2 x i8> [[TMP0]], <2 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret void // // CHECK-256-LABEL: @write_bool( // CHECK-256-NEXT: entry: -// CHECK-256-NEXT: [[X_ADDR:%.*]] = alloca , align 16 -// CHECK-256-NEXT: store [[X:%.*]], * [[X_ADDR]], align 16, [[TBAA9:!tbaa !.*]] -// CHECK-256-NEXT: [[TMP0:%.*]] = bitcast * [[X_ADDR]] to <4 x i8>* -// CHECK-256-NEXT: [[TMP1:%.*]] = load <4 x i8>, <4 x i8>* [[TMP0]], align 16, [[TBAA6]] +// CHECK-256-NEXT: [[SAVED_VALUE:%.*]] = alloca , align 16 +// CHECK-256-NEXT: store [[X:%.*]], * [[SAVED_VALUE]], align 16, !tbaa [[TBAA9:![0-9]+]] +// CHECK-256-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast * [[SAVED_VALUE]] to <4 x i8>* +// CHECK-256-NEXT: [[TMP0:%.*]] = load <4 x i8>, <4 x i8>* [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] // CHECK-256-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-256-NEXT: store <4 x i8> [[TMP1]], <4 x i8>* [[ARRAYIDX]], align 2, [[TBAA6]] +// CHECK-256-NEXT: store <4 x i8> [[TMP0]], <4 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] // CHECK-256-NEXT: ret void // // CHECK-512-LABEL: @write_bool( // CHECK-512-NEXT: entry: -// CHECK-512-NEXT: [[X_ADDR:%.*]] = alloca , align 16 -// CHECK-512-NEXT: store [[X:%.*]], * [[X_ADDR]], align 16, [[TBAA9:!tbaa !.*]] -// CHECK-512-NEXT: [[TMP0:%.*]] = bitcast * [[X_ADDR]] to <8 x i8>* -// CHECK-512-NEXT: [[TMP1:%.*]] = load <8 x i8>, <8 x i8>* [[TMP0]], align 16, [[TBAA6]] +// CHECK-512-NEXT: [[SAVED_VALUE:%.*]] = alloca , align 16 +// CHECK-512-NEXT: store [[X:%.*]], * [[SAVED_VALUE]], align 16, !tbaa [[TBAA9:![0-9]+]] +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast * [[SAVED_VALUE]] to <8 x i8>* +// CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i8>, <8 x i8>* [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_STRUCT_BOOL:%.*]], %struct.struct_bool* [[S:%.*]], i64 0, i32 1, i64 0 -// CHECK-512-NEXT: store <8 x i8> [[TMP1]], <8 x i8>* [[ARRAYIDX]], align 2, [[TBAA6]] +// CHECK-512-NEXT: store <8 x i8> [[TMP0]], <8 x i8>* [[ARRAYIDX]], align 2, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void // void write_bool(struct struct_bool *s, svbool_t x) { diff --git a/clang/test/CodeGen/attr-arm-sve-vector-bits-call.c b/clang/test/CodeGen/attr-arm-sve-vector-bits-call.c index edc307745a2aa..136647cada3ad 100644 --- a/clang/test/CodeGen/attr-arm-sve-vector-bits-call.c +++ b/clang/test/CodeGen/attr-arm-sve-vector-bits-call.c @@ -79,9 +79,9 @@ fixed_float64_t call_float64_ff(svbool_t pg, fixed_float64_t op1, fixed_float64_ // CHECK-NEXT: entry: // CHECK-NEXT: [[OP1:%.*]] = alloca <8 x i8>, align 16 // CHECK-NEXT: [[OP2:%.*]] = alloca <8 x i8>, align 16 -// CHECK-NEXT: [[OP1_ADDR:%.*]] = alloca <8 x i8>, align 16 -// CHECK-NEXT: [[OP2_ADDR:%.*]] = alloca <8 x i8>, align 16 -// CHECK-NEXT: [[SAVED_CALL_RVALUE:%.*]] = alloca , align 16 +// CHECK-NEXT: [[SAVED_VALUE:%.*]] = alloca <8 x i8>, align 16 +// CHECK-NEXT: [[SAVED_VALUE3:%.*]] = alloca <8 x i8>, align 16 +// CHECK-NEXT: [[SAVED_VALUE5:%.*]] = alloca , align 16 // CHECK-NEXT: [[RETVAL_COERCE:%.*]] = alloca , align 16 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i8>* [[OP1]] to * // CHECK-NEXT: store [[OP1_COERCE:%.*]], * [[TMP0]], align 16 @@ -89,20 +89,20 @@ fixed_float64_t call_float64_ff(svbool_t pg, fixed_float64_t op1, fixed_float64_ // CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8>* [[OP2]] to * // CHECK-NEXT: store [[OP2_COERCE:%.*]], * [[TMP1]], align 16 // CHECK-NEXT: [[OP22:%.*]] = load <8 x i8>, <8 x i8>* [[OP2]], align 16, !tbaa [[TBAA6]] -// CHECK-NEXT: store <8 x i8> [[OP11]], <8 x i8>* [[OP1_ADDR]], align 16, !tbaa [[TBAA6]] -// CHECK-NEXT: store <8 x i8> [[OP22]], <8 x i8>* [[OP2_ADDR]], align 16, !tbaa [[TBAA6]] -// CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i8>* [[OP1_ADDR]] to * -// CHECK-NEXT: [[TMP3:%.*]] = load , * [[TMP2]], align 16, !tbaa [[TBAA6]] -// CHECK-NEXT: [[TMP4:%.*]] = bitcast <8 x i8>* [[OP2_ADDR]] to * -// CHECK-NEXT: [[TMP5:%.*]] = load , * [[TMP4]], align 16, !tbaa [[TBAA6]] -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.sel.nxv16i1( [[PG:%.*]], [[TMP3]], [[TMP5]]) -// CHECK-NEXT: store [[TMP6]], * [[SAVED_CALL_RVALUE]], align 16, !tbaa [[TBAA9:![0-9]+]] -// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast * [[SAVED_CALL_RVALUE]] to <8 x i8>* -// CHECK-NEXT: [[TMP7:%.*]] = load <8 x i8>, <8 x i8>* [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] +// CHECK-NEXT: store <8 x i8> [[OP11]], <8 x i8>* [[SAVED_VALUE]], align 16, !tbaa [[TBAA6]] +// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast <8 x i8>* [[SAVED_VALUE]] to * +// CHECK-NEXT: [[TMP2:%.*]] = load , * [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] +// CHECK-NEXT: store <8 x i8> [[OP22]], <8 x i8>* [[SAVED_VALUE3]], align 16, !tbaa [[TBAA6]] +// CHECK-NEXT: [[CASTFIXEDSVE4:%.*]] = bitcast <8 x i8>* [[SAVED_VALUE3]] to * +// CHECK-NEXT: [[TMP3:%.*]] = load , * [[CASTFIXEDSVE4]], align 16, !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.sel.nxv16i1( [[PG:%.*]], [[TMP2]], [[TMP3]]) +// CHECK-NEXT: store [[TMP4]], * [[SAVED_VALUE5]], align 16, !tbaa [[TBAA9:![0-9]+]] +// CHECK-NEXT: [[CASTFIXEDSVE6:%.*]] = bitcast * [[SAVED_VALUE5]] to <8 x i8>* +// CHECK-NEXT: [[TMP5:%.*]] = load <8 x i8>, <8 x i8>* [[CASTFIXEDSVE6]], align 16, !tbaa [[TBAA6]] // CHECK-NEXT: [[RETVAL_0__SROA_CAST:%.*]] = bitcast * [[RETVAL_COERCE]] to <8 x i8>* -// CHECK-NEXT: store <8 x i8> [[TMP7]], <8 x i8>* [[RETVAL_0__SROA_CAST]], align 16 -// CHECK-NEXT: [[TMP8:%.*]] = load , * [[RETVAL_COERCE]], align 16 -// CHECK-NEXT: ret [[TMP8]] +// CHECK-NEXT: store <8 x i8> [[TMP5]], <8 x i8>* [[RETVAL_0__SROA_CAST]], align 16 +// CHECK-NEXT: [[TMP6:%.*]] = load , * [[RETVAL_COERCE]], align 16 +// CHECK-NEXT: ret [[TMP6]] // fixed_bool_t call_bool_ff(svbool_t pg, fixed_bool_t op1, fixed_bool_t op2) { return svsel(pg, op1, op2); @@ -135,23 +135,23 @@ fixed_float64_t call_float64_fs(svbool_t pg, fixed_float64_t op1, svfloat64_t op // CHECK-LABEL: @call_bool_fs( // CHECK-NEXT: entry: // CHECK-NEXT: [[OP1:%.*]] = alloca <8 x i8>, align 16 -// CHECK-NEXT: [[OP1_ADDR:%.*]] = alloca <8 x i8>, align 16 -// CHECK-NEXT: [[SAVED_CALL_RVALUE:%.*]] = alloca , align 16 +// CHECK-NEXT: [[SAVED_VALUE:%.*]] = alloca <8 x i8>, align 16 +// CHECK-NEXT: [[SAVED_VALUE2:%.*]] = alloca , align 16 // CHECK-NEXT: [[RETVAL_COERCE:%.*]] = alloca , align 16 // CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i8>* [[OP1]] to * // CHECK-NEXT: store [[OP1_COERCE:%.*]], * [[TMP0]], align 16 // CHECK-NEXT: [[OP11:%.*]] = load <8 x i8>, <8 x i8>* [[OP1]], align 16, !tbaa [[TBAA6]] -// CHECK-NEXT: store <8 x i8> [[OP11]], <8 x i8>* [[OP1_ADDR]], align 16, !tbaa [[TBAA6]] -// CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i8>* [[OP1_ADDR]] to * -// CHECK-NEXT: [[TMP2:%.*]] = load , * [[TMP1]], align 16, !tbaa [[TBAA6]] -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sel.nxv16i1( [[PG:%.*]], [[TMP2]], [[OP2:%.*]]) -// CHECK-NEXT: store [[TMP3]], * [[SAVED_CALL_RVALUE]], align 16, !tbaa [[TBAA9]] -// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast * [[SAVED_CALL_RVALUE]] to <8 x i8>* -// CHECK-NEXT: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] +// CHECK-NEXT: store <8 x i8> [[OP11]], <8 x i8>* [[SAVED_VALUE]], align 16, !tbaa [[TBAA6]] +// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast <8 x i8>* [[SAVED_VALUE]] to * +// CHECK-NEXT: [[TMP1:%.*]] = load , * [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] +// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv16i1( [[PG:%.*]], [[TMP1]], [[OP2:%.*]]) +// CHECK-NEXT: store [[TMP2]], * [[SAVED_VALUE2]], align 16, !tbaa [[TBAA9]] +// CHECK-NEXT: [[CASTFIXEDSVE3:%.*]] = bitcast * [[SAVED_VALUE2]] to <8 x i8>* +// CHECK-NEXT: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[CASTFIXEDSVE3]], align 16, !tbaa [[TBAA6]] // CHECK-NEXT: [[RETVAL_0__SROA_CAST:%.*]] = bitcast * [[RETVAL_COERCE]] to <8 x i8>* -// CHECK-NEXT: store <8 x i8> [[TMP4]], <8 x i8>* [[RETVAL_0__SROA_CAST]], align 16 -// CHECK-NEXT: [[TMP5:%.*]] = load , * [[RETVAL_COERCE]], align 16 -// CHECK-NEXT: ret [[TMP5]] +// CHECK-NEXT: store <8 x i8> [[TMP3]], <8 x i8>* [[RETVAL_0__SROA_CAST]], align 16 +// CHECK-NEXT: [[TMP4:%.*]] = load , * [[RETVAL_COERCE]], align 16 +// CHECK-NEXT: ret [[TMP4]] // fixed_bool_t call_bool_fs(svbool_t pg, fixed_bool_t op1, svbool_t op2) { return svsel(pg, op1, op2); @@ -183,11 +183,11 @@ fixed_float64_t call_float64_ss(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { // CHECK-LABEL: @call_bool_ss( // CHECK-NEXT: entry: -// CHECK-NEXT: [[SAVED_CALL_RVALUE:%.*]] = alloca , align 16 +// CHECK-NEXT: [[SAVED_VALUE:%.*]] = alloca , align 16 // CHECK-NEXT: [[RETVAL_COERCE:%.*]] = alloca , align 16 // CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: store [[TMP0]], * [[SAVED_CALL_RVALUE]], align 16, !tbaa [[TBAA9]] -// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast * [[SAVED_CALL_RVALUE]] to <8 x i8>* +// CHECK-NEXT: store [[TMP0]], * [[SAVED_VALUE]], align 16, !tbaa [[TBAA9]] +// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast * [[SAVED_VALUE]] to <8 x i8>* // CHECK-NEXT: [[TMP1:%.*]] = load <8 x i8>, <8 x i8>* [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] // CHECK-NEXT: [[RETVAL_0__SROA_CAST:%.*]] = bitcast * [[RETVAL_COERCE]] to <8 x i8>* // CHECK-NEXT: store <8 x i8> [[TMP1]], <8 x i8>* [[RETVAL_0__SROA_CAST]], align 16 diff --git a/clang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c b/clang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c index e9b9c1f9c385b..a7f275bd1f0b4 100644 --- a/clang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c +++ b/clang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c @@ -17,13 +17,19 @@ fixed_int32_t global_vec; // CHECK-NEXT: [[PRED_ADDR:%.*]] = alloca , align 2 // CHECK-NEXT: [[VEC_ADDR:%.*]] = alloca , align 16 // CHECK-NEXT: [[PG:%.*]] = alloca , align 2 +// CHECK-NEXT: [[SAVED_VALUE:%.*]] = alloca <8 x i8>, align 8 +// CHECK-NEXT: [[SAVED_VALUE1:%.*]] = alloca <8 x i8>, align 8 // CHECK-NEXT: store [[PRED:%.*]], * [[PRED_ADDR]], align 2 // CHECK-NEXT: store [[VEC:%.*]], * [[VEC_ADDR]], align 16 // CHECK-NEXT: [[TMP0:%.*]] = load , * [[PRED_ADDR]], align 2 // CHECK-NEXT: [[TMP1:%.*]] = load <8 x i8>, <8 x i8>* @global_pred, align 2 -// CHECK-NEXT: [[TMP2:%.*]] = load , * bitcast (<8 x i8>* @global_pred to *), align 2 +// CHECK-NEXT: store <8 x i8> [[TMP1]], <8 x i8>* [[SAVED_VALUE]], align 8 +// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast <8 x i8>* [[SAVED_VALUE]] to * +// CHECK-NEXT: [[TMP2:%.*]] = load , * [[CASTFIXEDSVE]], align 8 // CHECK-NEXT: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* @global_pred, align 2 -// CHECK-NEXT: [[TMP4:%.*]] = load , * bitcast (<8 x i8>* @global_pred to *), align 2 +// CHECK-NEXT: store <8 x i8> [[TMP3]], <8 x i8>* [[SAVED_VALUE1]], align 8 +// CHECK-NEXT: [[CASTFIXEDSVE2:%.*]] = bitcast <8 x i8>* [[SAVED_VALUE1]] to * +// CHECK-NEXT: [[TMP4:%.*]] = load , * [[CASTFIXEDSVE2]], align 8 // CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[TMP0]], [[TMP2]], [[TMP4]]) // CHECK-NEXT: store [[TMP5]], * [[PG]], align 2 // CHECK-NEXT: [[TMP6:%.*]] = load , * [[PG]], align 2 @@ -32,11 +38,11 @@ fixed_int32_t global_vec; // CHECK-NEXT: [[TMP8:%.*]] = load , * [[VEC_ADDR]], align 16 // CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[TMP6]]) // CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP9]], [[CASTSCALABLESVE]], [[TMP8]]) -// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = call <16 x i32> @llvm.experimental.vector.extract.v16i32.nxv4i32( [[TMP10]], i64 0) -// CHECK-NEXT: store <16 x i32> [[CASTFIXEDSVE]], <16 x i32>* [[RETVAL]], align 16 +// CHECK-NEXT: [[CASTFIXEDSVE3:%.*]] = call <16 x i32> @llvm.experimental.vector.extract.v16i32.nxv4i32( [[TMP10]], i64 0) +// CHECK-NEXT: store <16 x i32> [[CASTFIXEDSVE3]], <16 x i32>* [[RETVAL]], align 16 // CHECK-NEXT: [[TMP11:%.*]] = load <16 x i32>, <16 x i32>* [[RETVAL]], align 16 -// CHECK-NEXT: [[CASTSCALABLESVE1:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v16i32( undef, <16 x i32> [[TMP11]], i64 0) -// CHECK-NEXT: ret [[CASTSCALABLESVE1]] +// CHECK-NEXT: [[CASTSCALABLESVE4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v16i32( undef, <16 x i32> [[TMP11]], i64 0) +// CHECK-NEXT: ret [[CASTSCALABLESVE4]] // fixed_int32_t foo(svbool_t pred, svint32_t vec) { svbool_t pg = svand_z(pred, global_pred, global_pred); @@ -103,3 +109,49 @@ fixed_bool_t address_of_array_idx() { parr = &arr[0]; return *parr; } + +// CHECK-LABEL: @test_cast( +// CHECK-NEXT: entry: +// CHECK-NEXT: [[RETVAL:%.*]] = alloca <16 x i32>, align 16 +// CHECK-NEXT: [[PRED_ADDR:%.*]] = alloca , align 2 +// CHECK-NEXT: [[VEC_ADDR:%.*]] = alloca , align 16 +// CHECK-NEXT: [[XX:%.*]] = alloca <16 x i32>, align 16 +// CHECK-NEXT: [[YY:%.*]] = alloca <16 x i32>, align 16 +// CHECK-NEXT: [[PG:%.*]] = alloca , align 2 +// CHECK-NEXT: [[SAVED_VALUE:%.*]] = alloca <8 x i8>, align 8 +// CHECK-NEXT: [[SAVED_VALUE1:%.*]] = alloca <16 x i32>, align 64 +// CHECK-NEXT: store [[PRED:%.*]], * [[PRED_ADDR]], align 2 +// CHECK-NEXT: store [[VEC:%.*]], * [[VEC_ADDR]], align 16 +// CHECK-NEXT: store <16 x i32> , <16 x i32>* [[XX]], align 16 +// CHECK-NEXT: store <16 x i32> , <16 x i32>* [[YY]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load , * [[PRED_ADDR]], align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i8>, <8 x i8>* @global_pred, align 2 +// CHECK-NEXT: store <8 x i8> [[TMP1]], <8 x i8>* [[SAVED_VALUE]], align 8 +// CHECK-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast <8 x i8>* [[SAVED_VALUE]] to * +// CHECK-NEXT: [[TMP2:%.*]] = load , * [[CASTFIXEDSVE]], align 8 +// CHECK-NEXT: [[TMP3:%.*]] = load <16 x i32>, <16 x i32>* [[XX]], align 16 +// CHECK-NEXT: [[TMP4:%.*]] = load <16 x i32>, <16 x i32>* [[YY]], align 16 +// CHECK-NEXT: [[ADD:%.*]] = add <16 x i32> [[TMP3]], [[TMP4]] +// CHECK-NEXT: store <16 x i32> [[ADD]], <16 x i32>* [[SAVED_VALUE1]], align 64 +// CHECK-NEXT: [[CASTFIXEDSVE2:%.*]] = bitcast <16 x i32>* [[SAVED_VALUE1]] to * +// CHECK-NEXT: [[TMP5:%.*]] = load , * [[CASTFIXEDSVE2]], align 64 +// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[TMP0]], [[TMP2]], [[TMP5]]) +// CHECK-NEXT: store [[TMP6]], * [[PG]], align 2 +// CHECK-NEXT: [[TMP7:%.*]] = load , * [[PG]], align 2 +// CHECK-NEXT: [[TMP8:%.*]] = load <16 x i32>, <16 x i32>* @global_vec, align 16 +// CHECK-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v16i32( undef, <16 x i32> [[TMP8]], i64 0) +// CHECK-NEXT: [[TMP9:%.*]] = load , * [[VEC_ADDR]], align 16 +// CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[TMP7]]) +// CHECK-NEXT: [[TMP11:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP10]], [[CASTSCALABLESVE]], [[TMP9]]) +// CHECK-NEXT: [[CASTFIXEDSVE3:%.*]] = call <16 x i32> @llvm.experimental.vector.extract.v16i32.nxv4i32( [[TMP11]], i64 0) +// CHECK-NEXT: store <16 x i32> [[CASTFIXEDSVE3]], <16 x i32>* [[RETVAL]], align 16 +// CHECK-NEXT: [[TMP12:%.*]] = load <16 x i32>, <16 x i32>* [[RETVAL]], align 16 +// CHECK-NEXT: [[CASTSCALABLESVE4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v16i32( undef, <16 x i32> [[TMP12]], i64 0) +// CHECK-NEXT: ret [[CASTSCALABLESVE4]] +// +fixed_int32_t test_cast(svbool_t pred, svint32_t vec) { + fixed_int32_t xx = {1, 2, 3, 4}; + fixed_int32_t yy = {2, 5, 4, 6}; + svbool_t pg = svand_z(pred, global_pred, xx + yy); + return svadd_m(pg, global_vec, vec); +} diff --git a/clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c b/clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c index d81cd3627b2b0..0171c763ef512 100644 --- a/clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c +++ b/clang/test/CodeGen/attr-arm-sve-vector-bits-globals.c @@ -22,13 +22,13 @@ fixed_bool_t global_bool; // CHECK-128-LABEL: @write_global_i64( // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <2 x i64> @llvm.experimental.vector.extract.v2i64.nxv2i64( [[V:%.*]], i64 0) -// CHECK-128-NEXT: store <2 x i64> [[CASTFIXEDSVE]], <2 x i64>* @global_i64, align 16, [[TBAA6:!tbaa !.*]] +// CHECK-128-NEXT: store <2 x i64> [[CASTFIXEDSVE]], <2 x i64>* @global_i64, align 16, !tbaa [[TBAA6:![0-9]+]] // CHECK-128-NEXT: ret void // // CHECK-512-LABEL: @write_global_i64( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x i64> @llvm.experimental.vector.extract.v8i64.nxv2i64( [[V:%.*]], i64 0) -// CHECK-512-NEXT: store <8 x i64> [[CASTFIXEDSVE]], <8 x i64>* @global_i64, align 16, [[TBAA6:!tbaa !.*]] +// CHECK-512-NEXT: store <8 x i64> [[CASTFIXEDSVE]], <8 x i64>* @global_i64, align 16, !tbaa [[TBAA6:![0-9]+]] // CHECK-512-NEXT: ret void // void write_global_i64(svint64_t v) { global_i64 = v; } @@ -36,33 +36,33 @@ void write_global_i64(svint64_t v) { global_i64 = v; } // CHECK-128-LABEL: @write_global_bf16( // CHECK-128-NEXT: entry: // CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = call <8 x bfloat> @llvm.experimental.vector.extract.v8bf16.nxv8bf16( [[V:%.*]], i64 0) -// CHECK-128-NEXT: store <8 x bfloat> [[CASTFIXEDSVE]], <8 x bfloat>* @global_bf16, align 16, [[TBAA6]] +// CHECK-128-NEXT: store <8 x bfloat> [[CASTFIXEDSVE]], <8 x bfloat>* @global_bf16, align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret void // // CHECK-512-LABEL: @write_global_bf16( // CHECK-512-NEXT: entry: // CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = call <32 x bfloat> @llvm.experimental.vector.extract.v32bf16.nxv8bf16( [[V:%.*]], i64 0) -// CHECK-512-NEXT: store <32 x bfloat> [[CASTFIXEDSVE]], <32 x bfloat>* @global_bf16, align 16, [[TBAA6]] +// CHECK-512-NEXT: store <32 x bfloat> [[CASTFIXEDSVE]], <32 x bfloat>* @global_bf16, align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void // void write_global_bf16(svbfloat16_t v) { global_bf16 = v; } // CHECK-128-LABEL: @write_global_bool( // CHECK-128-NEXT: entry: -// CHECK-128-NEXT: [[V_ADDR:%.*]] = alloca , align 16 -// CHECK-128-NEXT: store [[V:%.*]], * [[V_ADDR]], align 16, [[TBAA9:!tbaa !.*]] -// CHECK-128-NEXT: [[TMP0:%.*]] = bitcast * [[V_ADDR]] to <2 x i8>* -// CHECK-128-NEXT: [[TMP1:%.*]] = load <2 x i8>, <2 x i8>* [[TMP0]], align 16, [[TBAA6]] -// CHECK-128-NEXT: store <2 x i8> [[TMP1]], <2 x i8>* @global_bool, align 2, [[TBAA6]] +// CHECK-128-NEXT: [[SAVED_VALUE:%.*]] = alloca , align 16 +// CHECK-128-NEXT: store [[V:%.*]], * [[SAVED_VALUE]], align 16, !tbaa [[TBAA9:![0-9]+]] +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast * [[SAVED_VALUE]] to <2 x i8>* +// CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i8>, <2 x i8>* [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] +// CHECK-128-NEXT: store <2 x i8> [[TMP0]], <2 x i8>* @global_bool, align 2, !tbaa [[TBAA6]] // CHECK-128-NEXT: ret void // // CHECK-512-LABEL: @write_global_bool( // CHECK-512-NEXT: entry: -// CHECK-512-NEXT: [[V_ADDR:%.*]] = alloca , align 16 -// CHECK-512-NEXT: store [[V:%.*]], * [[V_ADDR]], align 16, [[TBAA9:!tbaa !.*]] -// CHECK-512-NEXT: [[TMP0:%.*]] = bitcast * [[V_ADDR]] to <8 x i8>* -// CHECK-512-NEXT: [[TMP1:%.*]] = load <8 x i8>, <8 x i8>* [[TMP0]], align 16, [[TBAA6]] -// CHECK-512-NEXT: store <8 x i8> [[TMP1]], <8 x i8>* @global_bool, align 2, [[TBAA6]] +// CHECK-512-NEXT: [[SAVED_VALUE:%.*]] = alloca , align 16 +// CHECK-512-NEXT: store [[V:%.*]], * [[SAVED_VALUE]], align 16, !tbaa [[TBAA9:![0-9]+]] +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast * [[SAVED_VALUE]] to <8 x i8>* +// CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i8>, <8 x i8>* [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] +// CHECK-512-NEXT: store <8 x i8> [[TMP0]], <8 x i8>* @global_bool, align 2, !tbaa [[TBAA6]] // CHECK-512-NEXT: ret void // void write_global_bool(svbool_t v) { global_bool = v; } @@ -73,13 +73,13 @@ void write_global_bool(svbool_t v) { global_bool = v; } // CHECK-128-LABEL: @read_global_i64( // CHECK-128-NEXT: entry: -// CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* @global_i64, align 16, [[TBAA6]] +// CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* @global_i64, align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP0]], i64 0) // CHECK-128-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-512-LABEL: @read_global_i64( // CHECK-512-NEXT: entry: -// CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* @global_i64, align 16, [[TBAA6]] +// CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i64>, <8 x i64>* @global_i64, align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v8i64( undef, <8 x i64> [[TMP0]], i64 0) // CHECK-512-NEXT: ret [[CASTSCALABLESVE]] // @@ -87,13 +87,13 @@ svint64_t read_global_i64() { return global_i64; } // CHECK-128-LABEL: @read_global_bf16( // CHECK-128-NEXT: entry: -// CHECK-128-NEXT: [[TMP0:%.*]] = load <8 x bfloat>, <8 x bfloat>* @global_bf16, align 16, [[TBAA6]] +// CHECK-128-NEXT: [[TMP0:%.*]] = load <8 x bfloat>, <8 x bfloat>* @global_bf16, align 16, !tbaa [[TBAA6]] // CHECK-128-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP0]], i64 0) // CHECK-128-NEXT: ret [[CASTSCALABLESVE]] // // CHECK-512-LABEL: @read_global_bf16( // CHECK-512-NEXT: entry: -// CHECK-512-NEXT: [[TMP0:%.*]] = load <32 x bfloat>, <32 x bfloat>* @global_bf16, align 16, [[TBAA6]] +// CHECK-512-NEXT: [[TMP0:%.*]] = load <32 x bfloat>, <32 x bfloat>* @global_bf16, align 16, !tbaa [[TBAA6]] // CHECK-512-NEXT: [[CASTSCALABLESVE:%.*]] = call @llvm.experimental.vector.insert.nxv8bf16.v32bf16( undef, <32 x bfloat> [[TMP0]], i64 0) // CHECK-512-NEXT: ret [[CASTSCALABLESVE]] // @@ -101,12 +101,20 @@ svbfloat16_t read_global_bf16() { return global_bf16; } // CHECK-128-LABEL: @read_global_bool( // CHECK-128-NEXT: entry: -// CHECK-128-NEXT: [[TMP0:%.*]] = load , * bitcast (<2 x i8>* @global_bool to *), align 2, [[TBAA6]] -// CHECK-128-NEXT: ret [[TMP0]] +// CHECK-128-NEXT: [[SAVED_VALUE:%.*]] = alloca <2 x i8>, align 16 +// CHECK-128-NEXT: [[TMP0:%.*]] = load <2 x i8>, <2 x i8>* @global_bool, align 2, !tbaa [[TBAA6]] +// CHECK-128-NEXT: store <2 x i8> [[TMP0]], <2 x i8>* [[SAVED_VALUE]], align 16, !tbaa [[TBAA6]] +// CHECK-128-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast <2 x i8>* [[SAVED_VALUE]] to * +// CHECK-128-NEXT: [[TMP1:%.*]] = load , * [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] +// CHECK-128-NEXT: ret [[TMP1]] // // CHECK-512-LABEL: @read_global_bool( // CHECK-512-NEXT: entry: -// CHECK-512-NEXT: [[TMP0:%.*]] = load , * bitcast (<8 x i8>* @global_bool to *), align 2, [[TBAA6]] -// CHECK-512-NEXT: ret [[TMP0]] +// CHECK-512-NEXT: [[SAVED_VALUE:%.*]] = alloca <8 x i8>, align 16 +// CHECK-512-NEXT: [[TMP0:%.*]] = load <8 x i8>, <8 x i8>* @global_bool, align 2, !tbaa [[TBAA6]] +// CHECK-512-NEXT: store <8 x i8> [[TMP0]], <8 x i8>* [[SAVED_VALUE]], align 16, !tbaa [[TBAA6]] +// CHECK-512-NEXT: [[CASTFIXEDSVE:%.*]] = bitcast <8 x i8>* [[SAVED_VALUE]] to * +// CHECK-512-NEXT: [[TMP1:%.*]] = load , * [[CASTFIXEDSVE]], align 16, !tbaa [[TBAA6]] +// CHECK-512-NEXT: ret [[TMP1]] // svbool_t read_global_bool() { return global_bool; } diff --git a/clang/test/CodeGen/attr-nodebug2.c b/clang/test/CodeGen/attr-nodebug2.c new file mode 100644 index 0000000000000..fd6eca1f74323 --- /dev/null +++ b/clang/test/CodeGen/attr-nodebug2.c @@ -0,0 +1,34 @@ +// RUN: %clang_cc1 -x c -debug-info-kind=limited -debugger-tuning=gdb -dwarf-version=4 -O -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -x c++ -debug-info-kind=limited -debugger-tuning=gdb -dwarf-version=4 -O -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s + +#ifdef __cplusplus +extern "C" { +#endif + +void t1(); + +void use() { t1(); } + +__attribute__((nodebug)) void t1() { + int a = 10; + a++; +} + +#ifdef __cplusplus +} +#endif + +// CHECK-LABEL: define{{.*}} void @use() +// CHECK-SAME: !dbg +// CHECK-SAME: { +// CHECK: !dbg +// CHECK: } + +// PR50767 Function __attribute__((nodebug)) inconsistency causes crash +// illegal (non-distinct) !dbg metadata was being added to _Z2t1v definition + +// CHECK-LABEL: define{{.*}} void @t1() +// CHECK-NOT: !dbg +// CHECK-SAME: { +// CHECK-NOT: !dbg +// CHECK: } diff --git a/clang/test/CodeGen/attr-target-general-regs-only-x86.c b/clang/test/CodeGen/attr-target-general-regs-only-x86.c new file mode 100644 index 0000000000000..f7fbd0bb27bf7 --- /dev/null +++ b/clang/test/CodeGen/attr-target-general-regs-only-x86.c @@ -0,0 +1,14 @@ +// Test general-regs-only target attribute on x86 + +// RUN: %clang_cc1 -triple i386-unknown-linux-gnu -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm %s -o - | FileCheck %s + +// CHECK: define{{.*}} void @f() [[GPR_ATTRS:#[0-9]+]] +void __attribute__((target("general-regs-only"))) f() { } +// CHECK: define{{.*}} void @f_before() [[GPR_ATTRS:#[0-9]+]] +void __attribute__((target("avx2,general-regs-only"))) f_before() { } +// CHECK: define{{.*}} void @f_after() [[AVX2_ATTRS:#[0-9]+]] +void __attribute__((target("general-regs-only,avx2"))) f_after() { } + +// CHECK: attributes [[GPR_ATTRS]] = { {{.*}} "target-features"="{{.*}}-avx{{.*}}-avx2{{.*}}-avx512f{{.*}}-sse{{.*}}-sse2{{.*}}-ssse3{{.*}}-x87{{.*}}" +// CHECK: attributes [[AVX2_ATTRS]] = { {{.*}} "target-features"="{{.*}}+avx{{.*}}+avx2{{.*}}+sse{{.*}}+sse2{{.*}}+ssse3{{.*}}-avx512f{{.*}}-x87{{.*}}" diff --git a/clang/test/CodeGen/avr/struct.c b/clang/test/CodeGen/avr/struct.c new file mode 100644 index 0000000000000..cb4e84522df63 --- /dev/null +++ b/clang/test/CodeGen/avr/struct.c @@ -0,0 +1,26 @@ +// RUN: %clang_cc1 -triple avr -emit-llvm %s -o - | FileCheck %s + +// Structure that is more than 8 bytes. +struct s10 { + int a, b, c, d, e; +}; + +// Structure that is less than 8 bytes. +struct s06 { + int a, b, c; +}; + +struct s10 foo10(int a, int b, int c) { + struct s10 a0; + return a0; +} + +struct s06 foo06(int a, int b, int c) { + struct s06 a0; + return a0; +} + +// CHECK: %struct.s10 = type { i16, i16, i16, i16, i16 } +// CHECK: %struct.s06 = type { i16, i16, i16 } +// CHECK: define{{.*}} void @foo10(%struct.s10* {{.*}}, i16 %a, i16 %b, i16 %c) +// CHECK: define{{.*}} %struct.s06 @foo06(i16 %a, i16 %b, i16 %c) diff --git a/clang/test/CodeGen/builtins-nvptx-mma.cu b/clang/test/CodeGen/builtins-nvptx-mma.cu index cc31f6f4779a5..7e9bac86792d2 100644 --- a/clang/test/CodeGen/builtins-nvptx-mma.cu +++ b/clang/test/CodeGen/builtins-nvptx-mma.cu @@ -3,21 +3,20 @@ // *** DO NOT EDIT *** // // This test has been automatically generated by -// builtins-nvtx-mma.py --ptx=63 --gpu-arch=75 +// builtins-nvtx-mma.py --ptx=70 --gpu-arch=80 // -// Make sure we can handle all builtins available on sm_75 with PTX63 -// RUN: %clang_cc1 -triple nvptx64-unknown-unknown -target-cpu sm_75 \ -// RUN: -fcuda-is-device -target-feature +ptx63 \ -// RUN: -DPTX=63 -DSM=75 \ +// Make sure we can handle all builtins available on sm_80 with PTX70 +// RUN: %clang_cc1 -triple nvptx64-unknown-unknown -target-cpu sm_80 \ +// RUN: -fcuda-is-device -target-feature +ptx70 \ +// RUN: -DPTX=70 -DSM=80 \ // RUN: -S -emit-llvm -o - -x cuda %s \ -// RUN: | FileCheck -check-prefixes=CHECK_PTX61_SM70,CHECK_PTX63_SM75,CHECK_PTX63_SM72,CHECK_PTX60_SM70 %s +// RUN: | FileCheck -check-prefixes=CHECK_PTX70_SM80,CHECK_PTX60_SM70,CHECK_PTX63_SM72,CHECK_PTX61_SM70,CHECK_PTX63_SM75 %s // Verify that all builtins have correct constraints. // RUN: %clang_cc1 -triple nvptx-unknown-unknown \ // RUN: -target-cpu sm_60 -target-feature +ptx42 \ -// RUN: -DPTX=63 -DSM=75 -fcuda-is-device -S -o /dev/null -x cuda \ +// RUN: -DPTX=70 -DSM=80 -fcuda-is-device -S -o /dev/null -x cuda \ // RUN: -verify %s - #if !defined(CUDA_VERSION) #define __device__ __attribute__((device)) #define __global__ __attribute__((global)) @@ -29,8 +28,8 @@ typedef unsigned long long uint64_t; // CHECK-LABEL: test_wmma_buitins __device__ void test_wmma_buitins(int *src, int *dst, - float *fsrc, float *fdst, int ldm) { - + float *fsrc, float *fdst, + double *dsrc, double *ddst, int ldm) { #if (PTX >= 60) && (SM >= 70) @@ -751,5 +750,153 @@ __device__ void test_wmma_buitins(int *src, int *dst, // CHECK_PTX63_SM75: call {{.*}} @llvm.nvvm.wmma.m8n8k32.mma.row.col.u4.satfinite // expected-error-re@+1 {{'__imma_m8n8k32_mma_u4' needs target feature (sm_75{{.*}},(ptx63{{.*}}}} __imma_m8n8k32_mma_u4(dst, src, src, src, 1, 1); -#endif // (PTX >= 63) && (SM >= 75) +#endif // (PTX >= 63) && (SM >= 75) + +#if (PTX >= 70) && (SM >= 80) + + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k16.load.a.col.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m16n16k16_ld_a' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m16n16k16_ld_a(dst, src, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k16.load.a.row.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m16n16k16_ld_a' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m16n16k16_ld_a(dst, src, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k16.load.b.col.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m16n16k16_ld_b' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m16n16k16_ld_b(dst, src, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k16.load.b.row.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m16n16k16_ld_b' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m16n16k16_ld_b(dst, src, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.load.a.col.stride.tf32 + // expected-error-re@+1 {{'__mma_tf32_m16n16k8_ld_a' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_tf32_m16n16k8_ld_a(dst, src, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.load.a.row.stride.tf32 + // expected-error-re@+1 {{'__mma_tf32_m16n16k8_ld_a' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_tf32_m16n16k8_ld_a(dst, src, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.load.b.col.stride.tf32 + // expected-error-re@+1 {{'__mma_tf32_m16n16k8_ld_b' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_tf32_m16n16k8_ld_b(dst, src, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.load.b.row.stride.tf32 + // expected-error-re@+1 {{'__mma_tf32_m16n16k8_ld_b' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_tf32_m16n16k8_ld_b(dst, src, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.load.c.col.stride.f32 + // expected-error-re@+1 {{'__mma_tf32_m16n16k8_ld_c' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_tf32_m16n16k8_ld_c(fdst, fsrc, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.load.c.row.stride.f32 + // expected-error-re@+1 {{'__mma_tf32_m16n16k8_ld_c' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_tf32_m16n16k8_ld_c(fdst, fsrc, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.store.d.col.stride.f32 + // expected-error-re@+1 {{'__mma_m16n16k8_st_c_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_m16n16k8_st_c_f32(fdst, fsrc, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.store.d.row.stride.f32 + // expected-error-re@+1 {{'__mma_m16n16k8_st_c_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_m16n16k8_st_c_f32(fdst, fsrc, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m32n8k16.load.a.col.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m32n8k16_ld_a' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m32n8k16_ld_a(dst, src, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m32n8k16.load.a.row.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m32n8k16_ld_a' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m32n8k16_ld_a(dst, src, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m32n8k16.load.b.col.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m32n8k16_ld_b' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m32n8k16_ld_b(dst, src, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m32n8k16.load.b.row.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m32n8k16_ld_b' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m32n8k16_ld_b(dst, src, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n32k16.load.a.col.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m8n32k16_ld_a' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m8n32k16_ld_a(dst, src, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n32k16.load.a.row.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m8n32k16_ld_a' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m8n32k16_ld_a(dst, src, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n32k16.load.b.col.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m8n32k16_ld_b' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m8n32k16_ld_b(dst, src, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n32k16.load.b.row.stride.bf16 + // expected-error-re@+1 {{'__mma_bf16_m8n32k16_ld_b' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m8n32k16_ld_b(dst, src, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.load.a.col.stride.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_ld_a' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_ld_a(ddst, dsrc, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.load.a.row.stride.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_ld_a' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_ld_a(ddst, dsrc, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.load.b.col.stride.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_ld_b' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_ld_b(ddst, dsrc, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.load.b.row.stride.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_ld_b' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_ld_b(ddst, dsrc, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.load.c.col.stride.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_ld_c' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_ld_c(ddst, dsrc, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.load.c.row.stride.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_ld_c' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_ld_c(ddst, dsrc, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.store.d.col.stride.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_st_c_f64' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_st_c_f64(ddst, dsrc, ldm, 1); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.store.d.row.stride.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_st_c_f64' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_st_c_f64(ddst, dsrc, ldm, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k16.mma.col.col.bf16 + // expected-error-re@+1 {{'__mma_bf16_m16n16k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m16n16k16_mma_f32(fdst, src, src, fsrc, 3, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k16.mma.col.row.bf16 + // expected-error-re@+1 {{'__mma_bf16_m16n16k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m16n16k16_mma_f32(fdst, src, src, fsrc, 2, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k16.mma.row.col.bf16 + // expected-error-re@+1 {{'__mma_bf16_m16n16k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m16n16k16_mma_f32(fdst, src, src, fsrc, 1, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k16.mma.row.row.bf16 + // expected-error-re@+1 {{'__mma_bf16_m16n16k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m16n16k16_mma_f32(fdst, src, src, fsrc, 0, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.mma.col.col.tf32 + // expected-error-re@+1 {{'__mma_tf32_m16n16k8_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_tf32_m16n16k8_mma_f32(fdst, src, src, fsrc, 3, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.mma.col.row.tf32 + // expected-error-re@+1 {{'__mma_tf32_m16n16k8_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_tf32_m16n16k8_mma_f32(fdst, src, src, fsrc, 2, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.mma.row.col.tf32 + // expected-error-re@+1 {{'__mma_tf32_m16n16k8_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_tf32_m16n16k8_mma_f32(fdst, src, src, fsrc, 1, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m16n16k8.mma.row.row.tf32 + // expected-error-re@+1 {{'__mma_tf32_m16n16k8_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_tf32_m16n16k8_mma_f32(fdst, src, src, fsrc, 0, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m32n8k16.mma.col.col.bf16 + // expected-error-re@+1 {{'__mma_bf16_m32n8k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m32n8k16_mma_f32(fdst, src, src, fsrc, 3, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m32n8k16.mma.col.row.bf16 + // expected-error-re@+1 {{'__mma_bf16_m32n8k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m32n8k16_mma_f32(fdst, src, src, fsrc, 2, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m32n8k16.mma.row.col.bf16 + // expected-error-re@+1 {{'__mma_bf16_m32n8k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m32n8k16_mma_f32(fdst, src, src, fsrc, 1, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m32n8k16.mma.row.row.bf16 + // expected-error-re@+1 {{'__mma_bf16_m32n8k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m32n8k16_mma_f32(fdst, src, src, fsrc, 0, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n32k16.mma.col.col.bf16 + // expected-error-re@+1 {{'__mma_bf16_m8n32k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m8n32k16_mma_f32(fdst, src, src, fsrc, 3, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n32k16.mma.col.row.bf16 + // expected-error-re@+1 {{'__mma_bf16_m8n32k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m8n32k16_mma_f32(fdst, src, src, fsrc, 2, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n32k16.mma.row.col.bf16 + // expected-error-re@+1 {{'__mma_bf16_m8n32k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m8n32k16_mma_f32(fdst, src, src, fsrc, 1, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n32k16.mma.row.row.bf16 + // expected-error-re@+1 {{'__mma_bf16_m8n32k16_mma_f32' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __mma_bf16_m8n32k16_mma_f32(fdst, src, src, fsrc, 0, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.mma.col.col.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_mma_f64' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_mma_f64(ddst, dsrc, dsrc, dsrc, 3, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.mma.col.row.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_mma_f64' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_mma_f64(ddst, dsrc, dsrc, dsrc, 2, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.mma.row.col.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_mma_f64' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_mma_f64(ddst, dsrc, dsrc, dsrc, 1, 0); + // CHECK_PTX70_SM80: call {{.*}} @llvm.nvvm.wmma.m8n8k4.mma.row.row.f64 + // expected-error-re@+1 {{'__dmma_m8n8k4_mma_f64' needs target feature (sm_80{{.*}},(ptx70{{.*}}}} + __dmma_m8n8k4_mma_f64(ddst, dsrc, dsrc, dsrc, 0, 0); +#endif // (PTX >= 70) && (SM >= 80) } diff --git a/clang/test/CodeGen/builtins-nvptx-mma.py b/clang/test/CodeGen/builtins-nvptx-mma.py index 1b395fc4f33b1..2ffc21b12fb06 100644 --- a/clang/test/CodeGen/builtins-nvptx-mma.py +++ b/clang/test/CodeGen/builtins-nvptx-mma.py @@ -47,7 +47,13 @@ def make_ldst_ops(geoms, frags, types): in product(geoms, frags, types)] def get_mma_ops(): - return (make_mma_ops(["m16n16k16", "m32n8k16", "m8n32k16"], + return (make_mma_ops(["m16n16k8"], + ["tf32"], [], ["f32"], []) + + make_mma_ops(["m16n16k16", "m32n8k16", "m8n32k16"], + ["bf16"], [], ["f32"], []) + + make_mma_ops(["m8n8k4"], + ["f64"], [], ["f64"], []) + + make_mma_ops(["m16n16k16", "m32n8k16", "m8n32k16"], ["f16"], [], ["f16", "f32"], ["f16", "f32"]) + make_mma_ops(["m16n16k16", "m32n8k16", "m8n32k16"], ["s8", "u8"], [], ["s32"], []) + @@ -55,14 +61,18 @@ def get_mma_ops(): ["s4", "u4"], [], ["s32"], []) + make_mma_ops(["m8n8k128"], ["b1"], [], ["s32"], [])) + def get_ldst_ops(): return (make_ldst_ops(["m16n16k16", "m32n8k16", "m8n32k16"], - ["a", "b"], ["f16", "u8", "s8"]) + + ["a", "b"], ["f16", "u8", "s8", "bf16"]) + make_ldst_ops(["m16n16k16", "m32n8k16", "m8n32k16"], ["c", "d"], ["f16", "f32", "s32"]) + make_ldst_ops(["m8n8k32"], ["a", "b"], ["s4","u4"]) + make_ldst_ops(["m8n8k128"], ["a", "b"], ["b1"]) + - make_ldst_ops(["m8n8k32", "m8n8k128"], ["c", "d"], ["s32"])) + make_ldst_ops(["m8n8k32", "m8n8k128"], ["c", "d"], ["s32"]) + + make_ldst_ops(["m8n8k4"], ["a", "b", "c", "d"], ["f64"]) + + make_ldst_ops(["m16n16k8"], ["a", "b"], ["tf32"]) + + make_ldst_ops(["m16n16k8"], ["c", "d"], ["f32"])) def is_geom_supported(geom): # geometries for FP and ints. @@ -73,6 +83,8 @@ def is_geom_supported(geom): return ptx_version >= 63 and gpu_arch >= 75 if geom == "m16n16k16": return ptx_version >= 60 + if geom in ["m16n16k8", "m8n8k4"]: + return ptx_version >= 70 and gpu_arch >= 80 assert(False) # Unexpected geometry. def is_type_supported(ptx_type): @@ -80,16 +92,24 @@ def is_type_supported(ptx_type): return ptx_version >= 63 and gpu_arch >= 72 if ptx_type in ["s4", "u4", "b1"]: return ptx_version >= 63 and gpu_arch >= 75 + if ptx_type in ["bf16", "tf32", "f64"]: + return ptx_version >= 70 and gpu_arch >= 80 return ptx_version >= 60 and gpu_arch >= 70 +def is_rnd_supported(op): + # rnd is only supported for FP64 WMMA + return op.a.ptx_type == "f64" + def is_mma_variant_supported(op, layout_a, layout_b, satf): if not (is_type_supported(op.a.ptx_type) and is_geom_supported(op.a.geom)): return False - # sub-integer require row/col layout, and no satf. + + if satf and not op.a.ptx_type in ["f16", "s8", "u8", "s4", "u4"]: + return False + + # sub-integer types require row/col layout. if op.a.ptx_type in ["s4", "u4", "b1"]: - if op.a.ptx_type == "b1" and satf: - return False return layout_a == "row" and layout_b == "col" return True @@ -98,7 +118,7 @@ def is_ldst_variant_supported(frag, layout): and is_geom_supported(frag.geom)): return False if frag.ptx_type in ["s4", "u4", "b1"]: - # sub-integer require sm_75 and ptx63, row/col layout for a/b. + # sub-integer types require sm_75 and ptx63, row/col layout for a/b. return ((frag.frag == "a" and layout == "row") or (frag.frag == "b" and layout == "col") or frag.frag in ["c", "d"]) @@ -109,12 +129,21 @@ def get_builtin_prefix(frag): if frag.geom in ["m16n16k16", "m32n8k16", "m8n32k16"]: if frag.ptx_type in ["f16", "f32"]: prefix = "__hmma" + elif frag.ptx_type == "bf16": + prefix = "__mma_bf16" else: prefix = "__imma" elif frag.geom == "m8n8k32": prefix = "__imma" # sub-integers elif frag.geom == "m8n8k128": prefix = "__bmma" + elif frag.geom == "m8n8k4": + prefix = "__dmma" + elif frag.geom == "m16n16k8": + if frag.ptx_type == "f32": + prefix = "__mma" + else: + prefix = "__mma_tf32" assert prefix return prefix @@ -123,10 +152,13 @@ def get_ldst_builtin_name(frag): if prefix == "__hmma": suffix = "" if frag.frag in ["a","b"] else frag.ptx_type - elif prefix in ["__imma", "__bmma"]: - suffix = "" if frag.frag in ["c"] else frag.ptx_type + elif prefix in ["__dmma", "__mma_bf16", "__mma_tf32"]: + suffix = "" if frag.frag in ["a","b","c"] else frag.ptx_type + else: + suffix = "" if frag.frag == "c" else frag.ptx_type if suffix == "s32": suffix = "i32" + if frag.frag == "d": ifrag = "c" op = "st" @@ -143,6 +175,8 @@ def get_mma_builtin_name(op): if prefix == "__hmma": suffix = op.d.ptx_type + op.c.ptx_type + elif prefix in ["__mma_bf16", "__mma_tf32"]: + suffix = op.d.ptx_type else: suffix = op.a.ptx_type @@ -151,8 +185,9 @@ def get_mma_builtin_name(op): suffix) return name - def get_required_sm(frag): + if frag.ptx_type in ["f64", "bf16", "tf32"]: + return 80 if frag.ptx_type in ["u4", "s4", "b1"]: return 75 if frag.ptx_type in ["s8", "u8"]: @@ -163,18 +198,34 @@ def get_required_sm(frag): else: # s8/u8 return 72 if frag.ptx_type in ["f16", "f32"]: - return 70 + if frag.geom == "m16n16k8": + return 80 + else: + return 70 assert(False) def get_required_ptx(frag): + if frag.ptx_type in ["f64", "bf16", "tf32"]: + return 70 if frag.ptx_type in ["f16", "f32"]: - return 60 if frag.geom == "m16n16k16" else 61 + if frag.geom == "m16n16k16": + return 60 + if frag.geom == "m16n16k8": + return 70 + return 61 return 63 +def get_src_dst_prefix(ptx_type): + if ptx_type == "f32": + return "f" + if ptx_type == "f64": + return "d" + return "" + def gen_wmma_ldst_tests(results): load_template = """ // CHECK${check_suffix}: call {{.*}} @${intrinsic} - // expected-error-re@+1 {{'${builtin}' needs target feature sm_${min_sm}{{.*}},ptx${min_ptx}{{.*}}}} + // expected-error-re@+1 {{'${builtin}' needs target feature (sm_${min_sm}{{.*}},(ptx${min_ptx}{{.*}}}} ${builtin}(${dst}, ${src}, ldm, ${blayout}); """.rstrip() intrinsic_template = "llvm.nvvm.wmma.${geom}.${op}.${frag}.${ilayout}.stride.${itype}" @@ -184,7 +235,7 @@ def gen_wmma_ldst_tests(results): if not is_ldst_variant_supported(frag, layout): continue - is_fp = frag.ptx_type == "f32" + src_dst_prefix = get_src_dst_prefix(frag.ptx_type) min_sm = get_required_sm(frag) min_ptx = get_required_ptx(frag) params = { @@ -192,8 +243,8 @@ def gen_wmma_ldst_tests(results): "builtin" : get_ldst_builtin_name(frag), "min_ptx" : min_ptx, "min_sm" : min_sm, - "dst": "fdst" if is_fp else "dst", - "src": "fsrc" if is_fp else "src", + "dst": src_dst_prefix + "dst", + "src": src_dst_prefix + "src", "blayout" : 0 if layout == "row" else 1, "intrinsic" : Template(intrinsic_template).substitute({ "frag" : frag.frag, @@ -208,12 +259,12 @@ def gen_wmma_ldst_tests(results): return results def mma_signature(op): - if op.a.ptx_type in ["s8", "u8", "s4", "u4", "b1"]: - # int and sub-int ops are identified by input type. - return op.a.ptx_type - else: - # the rest are FP ops identified by accumulator & result type. + if op.a.ptx_type == "f16": + # FP16 ops identified by accumulator & result type. return "%s.%s" % (op.d.ptx_type, op.c.ptx_type) + else: + # other ops are identified by input type. + return op.a.ptx_type # Get numeric value for rowcol parameter of the builtin # AFAICT it uses the encoding accepted by NVVM intrinsics: @@ -229,8 +280,8 @@ def get_ilayout(a, b): def gen_wmma_mma_tests(results): mma_template = """ // CHECK${check_suffix}: call {{.*}} @${intrinsic} - // expected-error-re@+1 {{'${builtin}' needs target feature sm_${min_sm}{{.*}},ptx${min_ptx}{{.*}}}} - ${builtin}(${dst}, ${asrc}, ${asrc}, ${csrc}, ${ilayout}${maybe_isatf}); + // expected-error-re@+1 {{'${builtin}' needs target feature (sm_${min_sm}{{.*}},(ptx${min_ptx}{{.*}}}} + ${builtin}(${dst}, ${asrc}, ${asrc}, ${csrc}, ${ilayout}${maybe_satf}); """.rstrip() intrinsic_template = "llvm.nvvm.wmma.${geom}.mma.${alayout}.${blayout}.${intrinsic_signature}${satf}" @@ -243,9 +294,9 @@ def gen_wmma_mma_tests(results): if not is_mma_variant_supported(op, alayout, blayout, satf): continue - a_is_fp = op.a.ptx_type == "f32" - c_is_fp = op.c.ptx_type == "f32" - d_is_fp = op.d.ptx_type == "f32" + asrc_prefix = get_src_dst_prefix(op.a.ptx_type) + csrc_prefix = get_src_dst_prefix(op.c.ptx_type) + ddst_prefix = get_src_dst_prefix(op.d.ptx_type) min_sm = get_required_sm(op.a) min_ptx = get_required_ptx(op.a) if op.a.ptx_type == "b1": # .b1 MMA has no satf argument. @@ -257,11 +308,11 @@ def gen_wmma_mma_tests(results): "builtin" : get_mma_builtin_name(op), "min_ptx" : min_ptx, "min_sm" : min_sm, - "dst": "fdst" if d_is_fp else "dst", - "asrc": "fsrc" if a_is_fp else "src", - "csrc": "fsrc" if c_is_fp else "src", + "dst": ddst_prefix + "dst", + "asrc": asrc_prefix + "src", + "csrc": csrc_prefix + "src", "ilayout" : get_ilayout(alayout, blayout), - "maybe_isatf" : isatf_arg, + "maybe_satf" : isatf_arg, "intrinsic" : Template(intrinsic_template).substitute({ "geom" : op.a.geom, "alayout" : alayout, @@ -322,7 +373,8 @@ def supported_variants(ptx, sm, results): // CHECK-LABEL: test_wmma_buitins __device__ void test_wmma_buitins(int *src, int *dst, - float *fsrc, float *fdst, int ldm) { + float *fsrc, float *fdst, + double *dsrc, double *ddst, int ldm) { """); for (ptx, sm), tests in sorted(results.items()): diff --git a/clang/test/CodeGen/constructor-attribute.c b/clang/test/CodeGen/constructor-attribute.c index e58143a2165a1..f7c9c202f4978 100644 --- a/clang/test/CodeGen/constructor-attribute.c +++ b/clang/test/CodeGen/constructor-attribute.c @@ -1,5 +1,5 @@ // RUN: %clang_cc1 -triple x86_64-apple-darwin -emit-llvm -o - %s | FileCheck --check-prefix=CHECK --check-prefix=WITHOUTATEXIT %s -// RUN: %clang_cc1 -triple x86_64-apple-darwin -fregister-global-dtors-with-atexit -emit-llvm -o - %s | FileCheck --check-prefix=CHECK --check-prefix=CXAATEXIT --check-prefix=WITHATEXIT %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin -fregister-global-dtors-with-atexit -debug-info-kind=line-tables-only -emit-llvm -o - %s | FileCheck --check-prefix=CHECK --check-prefix=CXAATEXIT --check-prefix=WITHATEXIT %s // RUN: %clang_cc1 -triple x86_64-apple-darwin -fno-use-cxa-atexit -fregister-global-dtors-with-atexit -emit-llvm -o - %s | FileCheck --check-prefix=CHECK --check-prefix=ATEXIT --check-prefix=WITHATEXIT %s // WITHOUTATEXIT: global_ctors{{.*}}@A{{.*}}@C @@ -19,8 +19,9 @@ // CHECK: define internal i32 @foo() // WITHOUTATEXIT-NOT: define -// WITHATEXIT: define internal void @__GLOBAL_init_123(){{.*}}section "__TEXT,__StaticInit,regular,pure_instructions" -// CXAATEXIT: call i32 @__cxa_atexit(void (i8*)* bitcast (void ()* @E to void (i8*)*), i8* null, i8* @__dso_handle) +// CXAATEXIT: define internal void @__GLOBAL_init_123(){{.*}}section "__TEXT,__StaticInit,regular,pure_instructions" !dbg ![[GLOBAL_INIT_SP:.*]] { +// ATEXIT: define internal void @__GLOBAL_init_123(){{.*}}section "__TEXT,__StaticInit,regular,pure_instructions" +// CXAATEXIT: call i32 @__cxa_atexit(void (i8*)* bitcast (void ()* @E to void (i8*)*), i8* null, i8* @__dso_handle) {{.*}}, !dbg ![[GLOBAL_INIT_LOC:.*]] // CXAATEXIT: call i32 @__cxa_atexit(void (i8*)* bitcast (void ()* @G to void (i8*)*), i8* null, i8* @__dso_handle) // ATEXIT: call i32 @atexit(void ()* @E) // ATEXIT: call i32 @atexit(void ()* @G) @@ -82,3 +83,6 @@ static void D() { int main() { return 0; } + +// CXAATEXIT: ![[GLOBAL_INIT_SP]] = distinct !DISubprogram(linkageName: "__GLOBAL_init_123", +// CXAATEXIT: ![[GLOBAL_INIT_LOC]] = !DILocation(line: 0, scope: ![[GLOBAL_INIT_SP]]) diff --git a/clang/test/CodeGen/convergent-functions.cpp b/clang/test/CodeGen/convergent-functions.cpp index 7ddb8d3f94501..cb8682474f931 100644 --- a/clang/test/CodeGen/convergent-functions.cpp +++ b/clang/test/CodeGen/convergent-functions.cpp @@ -1,8 +1,10 @@ -// RUN: %clang_cc1 -triple i386-pc-win32 -emit-llvm -fconvergent-functions -o - < %s | FileCheck -check-prefix=CONVFUNC %s -// RUN: %clang_cc1 -triple i386-pc-win32 -emit-llvm -o - < %s | FileCheck -check-prefix=NOCONVFUNC %s +// RUN: %clang_cc1 -triple i386-pc-win32 -emit-llvm -fconvergent-functions -o - < %s | FileCheck -check-prefixes=CHECK,CONVFUNC %s +// RUN: %clang_cc1 -triple i386-pc-win32 -emit-llvm -o - < %s | FileCheck -check-prefixes=CHECK,NOCONVFUNC %s // Test that the -fconvergent-functions flag works -// CONVFUNC: attributes #0 = { convergent {{.*}} } +// CHECK: attributes #0 = { // NOCONVFUNC-NOT: convergent +// CONVFUNC-SAME: convergent +// CHECK-SAME: } void func() { } diff --git a/clang/test/CodeGen/debug-info-oslog.c b/clang/test/CodeGen/debug-info-oslog.c index 11a1cd64dedff..49c361ae9d5aa 100644 --- a/clang/test/CodeGen/debug-info-oslog.c +++ b/clang/test/CodeGen/debug-info-oslog.c @@ -10,6 +10,6 @@ void test_builtin_os_log(void *buf, int i, const char *data) { // This helper is going to be uniqued, so it should not have a line // number between file and type. -// CHECK: distinct !DISubprogram(name: "__os_log_helper_1_0_1_4_0", +// CHECK: distinct !DISubprogram(linkageName: "__os_log_helper_1_0_1_4_0", // CHECK-SAME: file: !{{.*}}, type // CHECK-SAME: flags: DIFlagArtificial diff --git a/clang/test/CodeGen/sanitize-coverage-old-pm.c b/clang/test/CodeGen/sanitize-coverage-old-pm.c index ff37eda464a85..9b4f8991864d6 100644 --- a/clang/test/CodeGen/sanitize-coverage-old-pm.c +++ b/clang/test/CodeGen/sanitize-coverage-old-pm.c @@ -6,7 +6,7 @@ // RUN: %clang %s -target x86_64-unknown-linux-gnu -emit-llvm -S -fsanitize=undefined -fsanitize-coverage=trace-pc,trace-cmp -o - -flegacy-pass-manager | FileCheck %s --check-prefixes=CHECK,UBSAN // // Host armv7 is currently unsupported: https://bugs.llvm.org/show_bug.cgi?id=46117 -// UNSUPPORTED: armv7, thumbv7, armv8l +// UNSUPPORTED: armv7, armv7l, thumbv7, armv8l // The same issue also occurs on a riscv32 host. // XFAIL: riscv32 diff --git a/clang/test/CodeGen/unique-internal-linkage-names.cpp b/clang/test/CodeGen/unique-internal-linkage-names.cpp index c567bcde45a84..95591de308d37 100644 --- a/clang/test/CodeGen/unique-internal-linkage-names.cpp +++ b/clang/test/CodeGen/unique-internal-linkage-names.cpp @@ -42,12 +42,26 @@ int mver_call() { return mver(); } +namespace { +class A { +public: + A() {} + ~A() {} +}; +} + +void test() { + A a; +} + // PLAIN: @_ZL4glob = internal global // PLAIN: @_ZZ8retAnonMvE5fGlob = internal global // PLAIN: @_ZN12_GLOBAL__N_16anon_mE = internal global // PLAIN: define internal i32 @_ZL3foov() // PLAIN: define internal i32 @_ZN12_GLOBAL__N_14getMEv // PLAIN: define weak_odr i32 ()* @_ZL4mverv.resolver() +// PLAIN: define internal void @_ZN12_GLOBAL__N_11AC1Ev +// PLAIN: define internal void @_ZN12_GLOBAL__N_11AD1Ev // PLAIN: define internal i32 @_ZL4mverv() // PLAIN: define internal i32 @_ZL4mverv.sse4.2() // PLAIN-NOT: "sample-profile-suffix-elision-policy" @@ -57,6 +71,8 @@ int mver_call() { // UNIQUE: define internal i32 @_ZL3foov.[[MODHASH:__uniq.[0-9]+]]() #[[#ATTR:]] { // UNIQUE: define internal i32 @_ZN12_GLOBAL__N_14getMEv.[[MODHASH]] // UNIQUE: define weak_odr i32 ()* @_ZL4mverv.[[MODHASH]].resolver() +// UNIQUE: define internal void @_ZN12_GLOBAL__N_11AC1Ev.__uniq.68358509610070717889884130747296293671 +// UNIQUE: define internal void @_ZN12_GLOBAL__N_11AD1Ev.__uniq.68358509610070717889884130747296293671 // UNIQUE: define internal i32 @_ZL4mverv.[[MODHASH]]() // UNIQUE: define internal i32 @_ZL4mverv.[[MODHASH]].sse4.2 // UNIQUE: attributes #[[#ATTR]] = { {{.*}}"sample-profile-suffix-elision-policy"{{.*}} } diff --git a/clang/test/CodeGen/vector-compat-pixel-bool-ternary.c b/clang/test/CodeGen/vector-compat-pixel-bool-ternary.c new file mode 100644 index 0000000000000..9b383f4cb20bf --- /dev/null +++ b/clang/test/CodeGen/vector-compat-pixel-bool-ternary.c @@ -0,0 +1,98 @@ +// RUN: not %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=mixed -triple powerpc-unknown-unknown -S -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR +// RUN: not %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=gcc -triple powerpc-unknown-unknown -S -emit-llvm %s -o - 2>&1| FileCheck %s --check-prefix=ERROR +// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=xl -triple powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s +// RUN: %clang -mcpu=pwr8 -faltivec-src-compat=xl --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s +// RUN: %clang -mcpu=pwr9 -faltivec-src-compat=xl --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s + +// CHECK-LABEL: @bi8( +// CHECK: [[A_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: store <16 x i8> [[A:%.*]], <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <16 x i8> [[B:%.*]], <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequb.p(i32 2, <16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(16 * sizeof(char)))) char' (vector of 16 'char' values) where arithmetic or pointer type is required +int bi8(vector bool char a, vector bool char b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @bi16( +// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: store <8 x i16> [[A:%.*]], <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <8 x i16> [[B:%.*]], <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequh.p(i32 2, <8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(8 * sizeof(short)))) short' (vector of 8 'short' values) where arithmetic or pointer type is required +int bi16(vector bool short a, vector bool short b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @bi32( +// CHECK: [[A_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: store <4 x i32> [[A:%.*]], <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <4 x i32> [[B:%.*]], <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequw.p(i32 2, <4 x i32> [[TMP0]], <4 x i32> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(4 * sizeof(long)))) long' (vector of 4 'long' values) where arithmetic or pointer type is required +int bi32(vector bool int a, vector bool int b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @bi64( +// CHECK: [[A_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK-NEXT: store <2 x i64> [[A:%.*]], <2 x i64>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <2 x i64> [[B:%.*]], <2 x i64>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequd.p(i32 2, <2 x i64> [[TMP0]], <2 x i64> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(2 * sizeof(long long)))) long long' (vector of 2 'long long' values) where arithmetic or pointer type is required +int bi64(vector bool long long a, vector bool long long b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @VecPixel( +// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: store <8 x i16> [[A:%.*]], <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <8 x i16> [[B:%.*]], <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequh.p(i32 2, <8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(8 * sizeof(short)))) short' (vector of 8 'short' values) where arithmetic or pointer type is required +int VecPixel(vector pixel a, vector pixel b) { + return a == b ? 3 : 7; +} diff --git a/clang/test/CodeGen/vector-compat-pixel-bool.c b/clang/test/CodeGen/vector-compat-pixel-bool.c new file mode 100644 index 0000000000000..d8179ad96ee8d --- /dev/null +++ b/clang/test/CodeGen/vector-compat-pixel-bool.c @@ -0,0 +1,88 @@ +// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=mixed -triple powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=gcc -triple powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s +// RUN: not %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=xl -triple powerpc-unknown-unknown -S -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR +// RUN: %clang -mcpu=pwr8 -faltivec-src-compat=gcc --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s +// RUN: %clang -mcpu=pwr9 -faltivec-src-compat=gcc --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s + +// CHECK-LABEL: @bi8( +// CHECK: [[A_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: store <16 x i8> [[A:%.*]], <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <16 x i8> [[B:%.*]], <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <16 x i8> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8> +// CHECK-NEXT: ret <16 x i8> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector unsigned char bi8(vector bool char a, vector bool char b) { + return a == b; +} + +// CHECK-LABEL: @bi16( +// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: store <8 x i16> [[A:%.*]], <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <8 x i16> [[B:%.*]], <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i16> +// CHECK-NEXT: ret <8 x i16> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector bool short bi16(vector bool short a, vector bool short b) { + return a == b; +} + +// CHECK-LABEL: @bi32( +// CHECK: [[A_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: store <4 x i32> [[A:%.*]], <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <4 x i32> [[B:%.*]], <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32> +// CHECK-NEXT: ret <4 x i32> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector bool int bi32(vector bool int a, vector bool int b) { + return a == b; +} + +// CHECK-LABEL: @bi64( +// CHECK: [[A_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK-NEXT: store <2 x i64> [[A:%.*]], <2 x i64>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <2 x i64> [[B:%.*]], <2 x i64>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i64> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64> +// CHECK-NEXT: ret <2 x i64> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector long long bi64(vector bool long long a, vector bool long long b) { + return a == b; +} + +// CHECK-LABEL: @VecPixel( +// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: store <8 x i16> [[A:%.*]], <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <8 x i16> [[B:%.*]], <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i16> +// CHECK-NEXT: ret <8 x i16> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector pixel VecPixel(vector pixel a, vector pixel b) { + return a == b; +} diff --git a/clang/test/CodeGen/vector-compat-ternary.c b/clang/test/CodeGen/vector-compat-ternary.c new file mode 100644 index 0000000000000..5b57980a7c2d5 --- /dev/null +++ b/clang/test/CodeGen/vector-compat-ternary.c @@ -0,0 +1,170 @@ +// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=mixed -triple powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s +// RUN: not %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=gcc -triple powerpc-unknown-unknown -S -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR +// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=xl -triple powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s +// RUN: %clang -mcpu=pwr8 -faltivec-src-compat=xl --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s +// RUN: %clang -mcpu=pwr9 -faltivec-src-compat=xl --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s + +// CHECK-LABEL: @ui8( +// CHECK: [[A_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: store <16 x i8> [[A:%.*]], <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <16 x i8> [[B:%.*]], <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequb.p(i32 2, <16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(16 * sizeof(char)))) char' (vector of 16 'char' values) where arithmetic or pointer type is required +int ui8(vector unsigned char a, vector unsigned char b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @si8( +// CHECK: [[A_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: store <16 x i8> [[A:%.*]], <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <16 x i8> [[B:%.*]], <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequb.p(i32 2, <16 x i8> [[TMP0]], <16 x i8> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(16 * sizeof(char)))) char' (vector of 16 'char' values) where arithmetic or pointer type is required +int si8(vector signed char a, vector signed char b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @ui16( +// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: store <8 x i16> [[A:%.*]], <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <8 x i16> [[B:%.*]], <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequh.p(i32 2, <8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(8 * sizeof(short)))) short' (vector of 8 'short' values) where arithmetic or pointer type is required +int ui16(vector unsigned short a, vector unsigned short b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @si16( +// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: store <8 x i16> [[A:%.*]], <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <8 x i16> [[B:%.*]], <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequh.p(i32 2, <8 x i16> [[TMP0]], <8 x i16> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(8 * sizeof(short)))) short' (vector of 8 'short' values) where arithmetic or pointer type is required +int si16(vector signed short a, vector signed short b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @ui32( +// CHECK: [[A_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: store <4 x i32> [[A:%.*]], <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <4 x i32> [[B:%.*]], <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequw.p(i32 2, <4 x i32> [[TMP0]], <4 x i32> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(4 * sizeof(long)))) long' (vector of 4 'long' values) where arithmetic or pointer type is required +int ui32(vector unsigned int a, vector unsigned int b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @si32( +// CHECK: [[A_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: store <4 x i32> [[A:%.*]], <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <4 x i32> [[B:%.*]], <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequw.p(i32 2, <4 x i32> [[TMP0]], <4 x i32> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(4 * sizeof(long)))) long' (vector of 4 'long' values) where arithmetic or pointer type is required +int si32(vector signed int a, vector signed int b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @si64( +// CHECK: [[A_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK-NEXT: store <2 x i64> [[A:%.*]], <2 x i64>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <2 x i64> [[B:%.*]], <2 x i64>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpequd.p(i32 2, <2 x i64> [[TMP0]], <2 x i64> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(2 * sizeof(long long)))) long long' (vector of 2 'long long' values) where arithmetic or pointer type is required +int si64(vector long long a, vector long long b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @f32( +// CHECK: [[A_ADDR:%.*]] = alloca <4 x float>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x float>, align 16 +// CHECK-NEXT: store <4 x float> [[A:%.*]], <4 x float>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <4 x float> [[B:%.*]], <4 x float>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, <4 x float>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.altivec.vcmpeqfp.p(i32 2, <4 x float> [[TMP0]], <4 x float> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(4 * sizeof(long)))) long' (vector of 4 'long' values) where arithmetic or pointer type is required +int f32(vector float a, vector float b) { + return a == b ? 3 : 7; +} + +// CHECK-LABEL: @f64( +// CHECK: [[A_ADDR:%.*]] = alloca <2 x double>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x double>, align 16 +// CHECK-NEXT: store <2 x double> [[A:%.*]], <2 x double>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <2 x double> [[B:%.*]], <2 x double>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, <2 x double>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.ppc.vsx.xvcmpeqdp.p(i32 2, <2 x double> [[TMP0]], <2 x double> [[TMP1]]) +// CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP2]], 0 +// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[TOBOOL]] to i64 +// CHECK-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 3, i32 7 +// CHECK-NEXT: ret i32 [[COND]] +// +// ERROR: error: used type '__attribute__((__vector_size__(2 * sizeof(long long)))) long long' (vector of 2 'long long' values) where arithmetic or pointer type is required +int f64(vector double a, vector double b) { + return a == b ? 3 : 7; +} diff --git a/clang/test/CodeGen/vector-compat.c b/clang/test/CodeGen/vector-compat.c new file mode 100644 index 0000000000000..023f1e8f36999 --- /dev/null +++ b/clang/test/CodeGen/vector-compat.c @@ -0,0 +1,152 @@ +// RUN: not %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=mixed -triple powerpc-unknown-unknown -S -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR +// RUN: %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=gcc -triple powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s +// RUN: not %clang_cc1 -target-feature +altivec -target-feature +vsx \ +// RUN: -faltivec-src-compat=xl -triple powerpc-unknown-unknown -S -emit-llvm %s -o - 2>&1 | FileCheck %s --check-prefix=ERROR +// RUN: %clang -mcpu=pwr8 -faltivec-src-compat=gcc --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s +// RUN: %clang -mcpu=pwr9 -faltivec-src-compat=gcc --target=powerpc-unknown-unknown -S -emit-llvm %s -o - | FileCheck %s + +// CHECK-LABEL: @ui8( +// CHECK: [[A_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: store <16 x i8> [[A:%.*]], <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <16 x i8> [[B:%.*]], <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <16 x i8> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8> +// CHECK-NEXT: ret <16 x i8> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector unsigned char ui8(vector unsigned char a, vector unsigned char b) { + return a == b; +} + +// CHECK-LABEL: @si8( +// CHECK: [[A_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <16 x i8>, align 16 +// CHECK-NEXT: store <16 x i8> [[A:%.*]], <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <16 x i8> [[B:%.*]], <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <16 x i8>, <16 x i8>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <16 x i8>, <16 x i8>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <16 x i8> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <16 x i1> [[CMP]] to <16 x i8> +// CHECK-NEXT: ret <16 x i8> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector signed char si8(vector signed char a, vector signed char b) { + return a == b; +} + +// CHECK-LABEL: @ui16( +// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: store <8 x i16> [[A:%.*]], <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <8 x i16> [[B:%.*]], <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i16> +// CHECK-NEXT: ret <8 x i16> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector unsigned short ui16(vector unsigned short a, vector unsigned short b) { + return a == b; +} + +// CHECK-LABEL: @si16( +// CHECK: [[A_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <8 x i16>, align 16 +// CHECK-NEXT: store <8 x i16> [[A:%.*]], <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <8 x i16> [[B:%.*]], <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i16>, <8 x i16>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <8 x i16>, <8 x i16>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <8 x i16> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <8 x i1> [[CMP]] to <8 x i16> +// CHECK-NEXT: ret <8 x i16> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector signed short si16(vector signed short a, vector signed short b) { + return a == b; +} + +// CHECK-LABEL: @ui32( +// CHECK: [[A_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: store <4 x i32> [[A:%.*]], <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <4 x i32> [[B:%.*]], <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32> +// CHECK-NEXT: ret <4 x i32> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector unsigned int ui32(vector unsigned int a, vector unsigned int b) { + return a == b; +} + +// CHECK-LABEL: @si32( +// CHECK: [[A_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x i32>, align 16 +// CHECK-NEXT: store <4 x i32> [[A:%.*]], <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <4 x i32> [[B:%.*]], <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <4 x i32>, <4 x i32>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <4 x i32> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32> +// CHECK-NEXT: ret <4 x i32> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector signed int si32(vector signed int a, vector signed int b) { + return a == b; +} + +// CHECK-LABEL: @si64( +// CHECK: [[A_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x i64>, align 16 +// CHECK-NEXT: store <2 x i64> [[A:%.*]], <2 x i64>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <2 x i64> [[B:%.*]], <2 x i64>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i64>, <2 x i64>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <2 x i64>, <2 x i64>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq <2 x i64> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64> +// CHECK-NEXT: ret <2 x i64> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector long long si64(vector long long a, vector long long b) { + return a == b; +} + +// CHECK-LABEL: @f32( +// CHECK: [[A_ADDR:%.*]] = alloca <4 x float>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <4 x float>, align 16 +// CHECK-NEXT: store <4 x float> [[A:%.*]], <4 x float>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <4 x float> [[B:%.*]], <4 x float>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <4 x float>, <4 x float>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <4 x float>, <4 x float>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = fcmp oeq <4 x float> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <4 x i1> [[CMP]] to <4 x i32> +// CHECK-NEXT: ret <4 x i32> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector int f32(vector float a, vector float b) { + return a == b; +} + +// CHECK-LABEL: @f64( +// CHECK: [[A_ADDR:%.*]] = alloca <2 x double>, align 16 +// CHECK-NEXT: [[B_ADDR:%.*]] = alloca <2 x double>, align 16 +// CHECK-NEXT: store <2 x double> [[A:%.*]], <2 x double>* [[A_ADDR]], align 16 +// CHECK-NEXT: store <2 x double> [[B:%.*]], <2 x double>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[TMP0:%.*]] = load <2 x double>, <2 x double>* [[A_ADDR]], align 16 +// CHECK-NEXT: [[TMP1:%.*]] = load <2 x double>, <2 x double>* [[B_ADDR]], align 16 +// CHECK-NEXT: [[CMP:%.*]] = fcmp oeq <2 x double> [[TMP0]], [[TMP1]] +// CHECK-NEXT: [[SEXT:%.*]] = sext <2 x i1> [[CMP]] to <2 x i64> +// CHECK-NEXT: ret <2 x i64> [[SEXT]] +// +// ERROR: returning 'int' from a function with incompatible result type +vector long long f64(vector double a, vector double b) { + return a == b; +} diff --git a/clang/test/CodeGenCUDA/convergent.cu b/clang/test/CodeGenCUDA/convergent.cu index ff18f92ef1eae..5d98d4ba69262 100644 --- a/clang/test/CodeGenCUDA/convergent.cu +++ b/clang/test/CodeGenCUDA/convergent.cu @@ -42,4 +42,4 @@ __host__ __device__ void bar() { // HOST: declare void @_Z3bazv() [[BAZ_ATTR:#[0-9]+]] // HOST: attributes [[BAZ_ATTR]] = { // HOST-NOT: convergent -// NOST-SAME: } +// HOST-SAME: } diff --git a/clang/test/CodeGenCUDA/dft-func-attr-skip-intrinsic.hip b/clang/test/CodeGenCUDA/dft-func-attr-skip-intrinsic.hip index 9e3e436200fc3..ee4c585cb5d7c 100644 --- a/clang/test/CodeGenCUDA/dft-func-attr-skip-intrinsic.hip +++ b/clang/test/CodeGenCUDA/dft-func-attr-skip-intrinsic.hip @@ -15,4 +15,4 @@ __device__ float foo(float x) { // CHECK: attributes [[ATTR1]] = { convergent // CHECK: attributes [[ATTR2]] = { // CHECK-NOT: convergent -// CHECK: } +// CHECK-SAME: } diff --git a/clang/test/CodeGenCoroutines/coro-newpm-pipeline.cpp b/clang/test/CodeGenCoroutines/coro-newpm-pipeline.cpp index 83f8121296690..869e98ecdb9ec 100644 --- a/clang/test/CodeGenCoroutines/coro-newpm-pipeline.cpp +++ b/clang/test/CodeGenCoroutines/coro-newpm-pipeline.cpp @@ -3,23 +3,17 @@ // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm-bc -o /dev/null \ // RUN: -fexperimental-new-pass-manager -fdebug-pass-manager -fcoroutines-ts \ -// RUN: -O0 %s 2>&1 | FileCheck %s +// RUN: -O0 %s 2>&1 | FileCheck %s --check-prefixes=CHECK-ALL // RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -emit-llvm-bc -o /dev/null \ // RUN: -fexperimental-new-pass-manager -fdebug-pass-manager -fcoroutines-ts \ -// RUN: -O1 %s 2>&1 | FileCheck %s +// RUN: -O1 %s 2>&1 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-OPT // -// CHECK: Running pass:{{.*}}CoroEarlyPass +// CHECK-ALL: Running pass:{{.*}}CoroEarlyPass // -// The first coro-split pass enqueues a second run of the entire CGSCC pipeline. -// CHECK: Running pass: CoroSplitPass on (_Z3foov) -// CHECK: Running pass:{{.*}}CoroElidePass{{.*}} on {{.*}}_Z3foov{{.*}} +// CHECK-ALL: Running pass: CoroSplitPass on (_Z3foov) +// CHECK-OPT: Running pass:{{.*}}CoroElidePass{{.*}} on {{.*}}_Z3foov{{.*}} // -// The second coro-split pass splits coroutine 'foo' into funclets -// 'foo.resume', 'foo.destroy', and 'foo.cleanup'. -// CHECK: Running pass: CoroSplitPass on (_Z3foov) -// CHECK: Running pass:{{.*}}CoroElidePass{{.*}} on {{.*}}_Z3foov{{.*}} -// -// CHECK: Running pass:{{.*}}CoroCleanupPass +// CHECK-ALL: Running pass:{{.*}}CoroCleanupPass namespace std { namespace experimental { @@ -27,7 +21,7 @@ namespace experimental { struct handle {}; struct awaitable { - bool await_ready() noexcept { return true; } + bool await_ready() noexcept { return false; } void await_suspend(handle) noexcept {} bool await_resume() noexcept { return true; } }; diff --git a/clang/test/CodeGenObjC/nontrivial-c-struct-exception.m b/clang/test/CodeGenObjC/nontrivial-c-struct-exception.m index 10fc3a3db6b61..7fd0f23943c09 100644 --- a/clang/test/CodeGenObjC/nontrivial-c-struct-exception.m +++ b/clang/test/CodeGenObjC/nontrivial-c-struct-exception.m @@ -54,6 +54,9 @@ void testStrongException(void) { // CHECK: resume +// CHECK: define{{.*}} void @__destructor_8_w8({{.*}} !dbg ![[DTOR_SP:.*]] { +// CHECK: load i8**, i8*** {{.*}}, !dbg ![[DTOR_LOC:.*]] + Weak genWeak(void); void calleeWeak(Weak, Weak); @@ -63,3 +66,5 @@ void testWeakException(void) { // CHECK-DAG: [[ARTIFICIAL_LOC_1]] = !DILocation(line: 0 // CHECK-DAG: [[ARTIFICIAL_LOC_2]] = !DILocation(line: 0 +// CHECK: ![[DTOR_SP]] = distinct !DISubprogram(linkageName: "__destructor_8_w8", +// CHECK: ![[DTOR_LOC]] = !DILocation(line: 0, scope: ![[DTOR_SP]]) diff --git a/clang/test/CodeGenObjCXX/arc-rv-attr.mm b/clang/test/CodeGenObjCXX/arc-rv-attr.mm new file mode 100644 index 0000000000000..0f4519bd527d9 --- /dev/null +++ b/clang/test/CodeGenObjCXX/arc-rv-attr.mm @@ -0,0 +1,11 @@ +// RUN: %clang_cc1 -triple arm64-apple-ios9 -fobjc-runtime=ios-9.0 -fobjc-arc -std=c++11 -O -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK + +id foo(void); + +// CHECK-LABEL: define{{.*}} void @_Z14test_list_initv( +// CHECK: %[[CALL1:.*]] = call i8* @_Z3foov() [ "clang.arc.attachedcall"(i64 0) ] +// CHECK: call i8* @llvm.objc.retain(i8* %[[CALL1]]) + +void test_list_init() { + auto t = id{foo()}; +} diff --git a/clang/test/CodeGenOpenCL/builtins-amdgcn-raytracing.cl b/clang/test/CodeGenOpenCL/builtins-amdgcn-raytracing.cl new file mode 100644 index 0000000000000..805d17a392b31 --- /dev/null +++ b/clang/test/CodeGenOpenCL/builtins-amdgcn-raytracing.cl @@ -0,0 +1,61 @@ +// REQUIRES: amdgpu-registered-target +// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1030 -S \ +// RUN: -emit-llvm -cl-std=CL2.0 -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu gfx1030 -S \ +// RUN: -cl-std=CL2.0 -o - %s | FileCheck -check-prefix=ISA %s + +// Test llvm.amdgcn.image.bvh.intersect.ray intrinsic. + +// The clang builtin functions __builtin_amdgcn_image_bvh_intersect_ray* use +// postfixes to indicate the types of the 1st, 4th, and 5th arguments. +// By default, the 1st argument is i32, the 4/5-th arguments are float4. +// Postfix l indicates the 1st argument is i64 and postfix h indicates +// the 4/5-th arguments are half4. + +typedef unsigned int uint; +typedef unsigned long ulong; +typedef float float4 __attribute__((ext_vector_type(4))); +typedef double double4 __attribute__((ext_vector_type(4))); +typedef half half4 __attribute__((ext_vector_type(4))); +typedef uint uint4 __attribute__((ext_vector_type(4))); + +// CHECK: call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i32.v4f32 +// ISA: image_bvh_intersect_ray +void test_image_bvh_intersect_ray(global uint4* out, uint node_ptr, + float ray_extent, float4 ray_origin, float4 ray_dir, float4 ray_inv_dir, + uint4 texture_descr) +{ + *out = __builtin_amdgcn_image_bvh_intersect_ray(node_ptr, ray_extent, + ray_origin, ray_dir, ray_inv_dir, texture_descr); +} + +// CHECK: call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i32.v4f16 +// ISA: image_bvh_intersect_ray +void test_image_bvh_intersect_ray_h(global uint4* out, uint node_ptr, + float ray_extent, float4 ray_origin, half4 ray_dir, half4 ray_inv_dir, + uint4 texture_descr) +{ + *out = __builtin_amdgcn_image_bvh_intersect_ray_h(node_ptr, ray_extent, + ray_origin, ray_dir, ray_inv_dir, texture_descr); +} + +// CHECK: call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i64.v4f32 +// ISA: image_bvh_intersect_ray +void test_image_bvh_intersect_ray_l(global uint4* out, ulong node_ptr, + float ray_extent, float4 ray_origin, float4 ray_dir, float4 ray_inv_dir, + uint4 texture_descr) +{ + *out = __builtin_amdgcn_image_bvh_intersect_ray_l(node_ptr, ray_extent, + ray_origin, ray_dir, ray_inv_dir, texture_descr); +} + +// CHECK: call <4 x i32> @llvm.amdgcn.image.bvh.intersect.ray.i64.v4f16 +// ISA: image_bvh_intersect_ray +void test_image_bvh_intersect_ray_lh(global uint4* out, ulong node_ptr, + float ray_extent, float4 ray_origin, half4 ray_dir, half4 ray_inv_dir, + uint4 texture_descr) +{ + *out = __builtin_amdgcn_image_bvh_intersect_ray_lh(node_ptr, ray_extent, + ray_origin, ray_dir, ray_inv_dir, texture_descr); +} + diff --git a/clang/test/Coverage/ast-printing.cpp b/clang/test/Coverage/ast-printing.cpp index 948b67eec6b0c..97279e47b55c5 100644 --- a/clang/test/Coverage/ast-printing.cpp +++ b/clang/test/Coverage/ast-printing.cpp @@ -1,9 +1,10 @@ -// RUN: %clang_cc1 -std=c++14 -fsyntax-only %s -// RUN: %clang_cc1 -std=c++14 -ast-print %s -o %t.1.cpp -// RUN: %clang_cc1 -std=c++14 -ast-print %t.1.cpp -o %t.2.cpp +// RUN: %clang_cc1 -std=c++20 -fsyntax-only %s +// RUN: %clang_cc1 -std=c++20 -ast-print %s -o %t.1.cpp +// RUN: %clang_cc1 -std=c++20 -ast-print %t.1.cpp -o %t.2.cpp // RUN: diff %t.1.cpp %t.2.cpp -// RUN: %clang_cc1 -std=c++14 -ast-dump %s -// RUN: %clang_cc1 -std=c++14 -ast-dump-all %s -// RUN: %clang_cc1 -std=c++14 -fdump-record-layouts %s +// RUN: %clang_cc1 -std=c++20 -ast-dump %s +// RUN: %clang_cc1 -std=c++20 -ast-dump-all %s +// RUN: %clang_cc1 -std=c++20 -ast-dump=json -triple=x86_64-linux-gnu %s +// RUN: %clang_cc1 -std=c++20 -fdump-record-layouts %s #include "cxx-language-features.inc" diff --git a/clang/test/Coverage/cxx-language-features.inc b/clang/test/Coverage/cxx-language-features.inc index 1e3b0744950ad..4eaba456f8845 100644 --- a/clang/test/Coverage/cxx-language-features.inc +++ b/clang/test/Coverage/cxx-language-features.inc @@ -65,3 +65,15 @@ private: template T varTemplate = 0; static_assert(true, ""); + +// Concepts +template concept True = true; +template concept Concept = requires (T a) { + a; + { a() } noexcept -> True; + requires false || true; + typename T::type; +}; +template void constrained1() requires Concept; +template void constrained2(); +void constrained3(Concept auto x); diff --git a/clang/test/Driver/clang-offload-bundler.c b/clang/test/Driver/clang-offload-bundler.c index 2ad675e73844d..5caf515ef0e7b 100644 --- a/clang/test/Driver/clang-offload-bundler.c +++ b/clang/test/Driver/clang-offload-bundler.c @@ -46,9 +46,9 @@ // CK-HELP: {{.*}}bc {{.*}}- llvm-bc // CK-HELP: {{.*}}s {{.*}}- assembler // CK-HELP: {{.*}}o {{.*}}- object +// CK-HELP: {{.*}}a {{.*}}- archive of objects // CK-HELP: {{.*}}gch {{.*}}- precompiled-header // CK-HELP: {{.*}}ast {{.*}}- clang AST file -// CK-HELP: {{.*}}a {{.*}}- archive of objects // CK-HELP: {{.*}}ao {{.*}}- archive with one object; output is an unbundled object // CK-HELP: {{.*}}aoo {{.*}}- archive; output file is a list of unbundled objects // CK-HELP: {{.*}}-unbundle {{.*}}- Unbundle bundled file into several output files. @@ -106,6 +106,9 @@ // RUN: not clang-offload-bundler -type=i -targets=host-%itanium_abi_triple,host-%itanium_abi_triple,openmp-x86_64-pc-linux-gnu -inputs=%t.i,%t.tgt1,%t.tgt2 -outputs=%t.bundle.i 2>&1 | FileCheck %s --check-prefix CK-ERR9B // CK-ERR9B: error: Duplicate targets are not allowed +// RUN: not clang-offload-bundler -type=a -targets=hxst-powerpcxxle-ibm-linux-gnu,openxp-pxxerpc64le-ibm-linux-gnu,xpenmp-x86_xx-pc-linux-gnu -inputs=%t.i,%t.tgt1,%t.tgt2 -outputs=%t.bundle.i 2>&1 | FileCheck %s --check-prefix CK-ERR10A +// CK-ERR10A: error: Archive files are only supported for unbundling + // RUN: not clang-offload-bundler -type=i -targets=host-%itanium_abi_triple,openmp-powerpc64le-ibm-linux-gnu -outputs=%t.i,%t.tgt1,%t.tgt2 -inputs=%t.bundle.i -unbundle -check-section 2>&1 | FileCheck %s --check-prefix CK-ERR10 // CK-ERR10: error: -unbundle and -check-section are not compatible options @@ -379,30 +382,30 @@ // // Check error due to missing bundles // -// RUN: clang-offload-bundler -type=bc -targets=host-%itanium_abi_triple,hip-amdgcn-amd-amdhsa-gfx900 -inputs=%t.bc,%t.tgt1 -outputs=%t.hip.bundle.bc +// RUN: clang-offload-bundler -type=bc -targets=host-%itanium_abi_triple,hip-amdgcn-amd-amdhsa--gfx900 -inputs=%t.bc,%t.tgt1 -outputs=%t.hip.bundle.bc // RUN: not clang-offload-bundler -type=bc -inputs=%t.hip.bundle.bc -outputs=%t.tmp.bc -unbundle \ -// RUN: -targets=hip-amdgcn-amd-amdhsa-gfx906 \ +// RUN: -targets=hip-amdgcn-amd-amdhsa--gfx906 \ // RUN: 2>&1 | FileCheck -check-prefix=MISS1 %s // RUN: not clang-offload-bundler -type=bc -inputs=%t.hip.bundle.bc -outputs=%t.tmp.bc,%t.tmp2.bc -unbundle \ -// RUN: -targets=hip-amdgcn-amd-amdhsa-gfx906,hip-amdgcn-amd-amdhsa-gfx900 \ +// RUN: -targets=hip-amdgcn-amd-amdhsa--gfx906,hip-amdgcn-amd-amdhsa--gfx900 \ // RUN: 2>&1 | FileCheck -check-prefix=MISS1 %s -// MISS1: error: Can't find bundles for hip-amdgcn-amd-amdhsa-gfx906 +// MISS1: error: Can't find bundles for hip-amdgcn-amd-amdhsa--gfx906 // RUN: not clang-offload-bundler -type=bc -inputs=%t.hip.bundle.bc -outputs=%t.tmp.bc,%t.tmp2.bc -unbundle \ -// RUN: -targets=hip-amdgcn-amd-amdhsa-gfx906,hip-amdgcn-amd-amdhsa-gfx803 \ +// RUN: -targets=hip-amdgcn-amd-amdhsa--gfx906,hip-amdgcn-amd-amdhsa--gfx803 \ // RUN: 2>&1 | FileCheck -check-prefix=MISS2 %s -// MISS2: error: Can't find bundles for hip-amdgcn-amd-amdhsa-gfx803 and hip-amdgcn-amd-amdhsa-gfx906 +// MISS2: error: Can't find bundles for hip-amdgcn-amd-amdhsa--gfx803 and hip-amdgcn-amd-amdhsa--gfx906 // RUN: not clang-offload-bundler -type=bc -inputs=%t.hip.bundle.bc -outputs=%t.tmp.bc,%t.tmp2.bc,%t.tmp3.bc -unbundle \ -// RUN: -targets=hip-amdgcn-amd-amdhsa-gfx906,hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx1010 \ +// RUN: -targets=hip-amdgcn-amd-amdhsa--gfx906,hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx1010 \ // RUN: 2>&1 | FileCheck -check-prefix=MISS3 %s -// MISS3: error: Can't find bundles for hip-amdgcn-amd-amdhsa-gfx1010, hip-amdgcn-amd-amdhsa-gfx803, and hip-amdgcn-amd-amdhsa-gfx906 +// MISS3: error: Can't find bundles for hip-amdgcn-amd-amdhsa--gfx1010, hip-amdgcn-amd-amdhsa--gfx803, and hip-amdgcn-amd-amdhsa--gfx906 // // Check error due to duplicate targets // -// RUN: not clang-offload-bundler -type=bc -targets=host-%itanium_abi_triple,hip-amdgcn-amd-amdhsa-gfx900,hip-amdgcn-amd-amdhsa-gfx900 \ +// RUN: not clang-offload-bundler -type=bc -targets=host-%itanium_abi_triple,hip-amdgcn-amd-amdhsa--gfx900,hip-amdgcn-amd-amdhsa--gfx900 \ // RUN: -inputs=%t.bc,%t.tgt1,%t.tgt1 -outputs=%t.hip.bundle.bc 2>&1 | FileCheck -check-prefix=DUP %s // RUN: not clang-offload-bundler -type=bc -inputs=%t.hip.bundle.bc -outputs=%t.tmp.bc,%t.tmp2.bc -unbundle \ -// RUN: -targets=hip-amdgcn-amd-amdhsa-gfx906,hip-amdgcn-amd-amdhsa-gfx906 \ +// RUN: -targets=hip-amdgcn-amd-amdhsa--gfx906,hip-amdgcn-amd-amdhsa--gfx906 \ // RUN: 2>&1 | FileCheck -check-prefix=DUP %s // DUP: error: Duplicate targets are not allowed // @@ -430,17 +433,29 @@ // // Check bundling without host target is allowed for HIP. // -// RUN: clang-offload-bundler -type=bc -targets=hip-amdgcn-amd-amdhsa-gfx900,hip-amdgcn-amd-amdhsa-gfx906 \ +// RUN: clang-offload-bundler -type=bc -targets=hip-amdgcn-amd-amdhsa--gfx900,hip-amdgcn-amd-amdhsa--gfx906 \ // RUN: -inputs=%t.tgt1,%t.tgt2 -outputs=%t.hip.bundle.bc // RUN: clang-offload-bundler -type=bc -list -inputs=%t.hip.bundle.bc | FileCheck -check-prefix=NOHOST %s -// RUN: clang-offload-bundler -type=bc -targets=hip-amdgcn-amd-amdhsa-gfx900,hip-amdgcn-amd-amdhsa-gfx906 \ +// RUN: clang-offload-bundler -type=bc -targets=hip-amdgcn-amd-amdhsa--gfx900,hip-amdgcn-amd-amdhsa--gfx906 \ // RUN: -outputs=%t.res.tgt1,%t.res.tgt2 -inputs=%t.hip.bundle.bc -unbundle // RUN: diff %t.tgt1 %t.res.tgt1 // RUN: diff %t.tgt2 %t.res.tgt2 // // NOHOST-NOT: host- -// NOHOST-DAG: hip-amdgcn-amd-amdhsa-gfx900 -// NOHOST-DAG: hip-amdgcn-amd-amdhsa-gfx906 +// NOHOST-DAG: hip-amdgcn-amd-amdhsa--gfx900 +// NOHOST-DAG: hip-amdgcn-amd-amdhsa--gfx906 +// Check archive unbundling +// +// Create few code object bundles and archive them to create an input archive +// RUN: clang-offload-bundler -type=o -targets=host-%itanium_abi_triple,openmp-amdgcn-amd-amdhsa--gfx906,openmp-amdgcn-amd-amdhsa--gfx908 -inputs=%t.o,%t.tgt1,%t.tgt2 -outputs=%t.simple.bundle +// RUN: clang-offload-bundler -type=o -targets=host-%itanium_abi_triple,openmp-amdgcn-amd-amdhsa--gfx903 -inputs=%t.o,%t.tgt1 -outputs=%t.simple1.bundle +// RUN: llvm-ar cr %t.input-archive.a %t.simple.bundle %t.simple1.bundle + +// RUN: clang-offload-bundler -unbundle -type=a -targets=openmp-amdgcn-amd-amdhsa--gfx906,openmp-amdgcn-amd-amdhsa--gfx908 -inputs=%t.input-archive.a -outputs=%t-archive-gfx906-simple.a,%t-archive-gfx908-simple.a +// RUN: llvm-ar t %t-archive-gfx906-simple.a | FileCheck %s -check-prefix=GFX906 +// GFX906: simple-openmp-amdgcn-amd-amdhsa--gfx906 +// RUN: llvm-ar t %t-archive-gfx908-simple.a | FileCheck %s -check-prefix=GFX908 +// GFX908-NOT: {{gfx906}} // Some code so that we can create a binary out of this file. int A = 0; diff --git a/clang/test/Driver/clang_f_opts.c b/clang/test/Driver/clang_f_opts.c index a255f68713aec..d729378403f3f 100644 --- a/clang/test/Driver/clang_f_opts.c +++ b/clang/test/Driver/clang_f_opts.c @@ -1,13 +1,14 @@ // REQUIRES: clang-driver // RUN: %clang -### -S -fasm -fblocks -fbuiltin -fno-math-errno -fcommon -fpascal-strings -fno-blocks -fno-builtin -fmath-errno -fno-common -fno-pascal-strings -fblocks -fbuiltin -fmath-errno -fcommon -fpascal-strings -fsplit-stack %s 2>&1 | FileCheck -check-prefix=CHECK-OPTIONS1 %s -// RUN: %clang -### -S -fasm -fblocks -fbuiltin -fno-math-errno -fcommon -fpascal-strings -fno-asm -fno-blocks -fno-builtin -fmath-errno -fno-common -fno-pascal-strings -fno-show-source-location -fshort-enums %s 2>&1 | FileCheck -check-prefix=CHECK-OPTIONS2 %s +// RUN: %clang -### -S -fasm -fblocks -fbuiltin -fno-math-errno -fcommon -fpascal-strings -fno-asm -fno-blocks -fno-builtin -fmath-errno -fno-common -fno-pascal-strings -fno-show-source-location -fshort-enums -fprotect-parens %s 2>&1 | FileCheck -check-prefix=CHECK-OPTIONS2 %s // CHECK-OPTIONS1: -fsplit-stack // CHECK-OPTIONS1: -fgnu-keywords // CHECK-OPTIONS1: -fblocks // CHECK-OPTIONS1: -fpascal-strings +// CHECK-OPTIONS2: -fprotect-parens // CHECK-OPTIONS2: -fmath-errno // CHECK-OPTIONS2: -fno-gnu-keywords // CHECK-OPTIONS2: -fno-builtin diff --git a/clang/test/Driver/fbasic-block-sections.c b/clang/test/Driver/fbasic-block-sections.c index 6aa030bf27ca5..60889fb11530d 100644 --- a/clang/test/Driver/fbasic-block-sections.c +++ b/clang/test/Driver/fbasic-block-sections.c @@ -3,11 +3,18 @@ // RUN: %clang -### -target x86_64 -fbasic-block-sections=list=%s %s -S 2>&1 | FileCheck -check-prefix=CHECK-OPT-LIST %s // RUN: %clang -### -target x86_64 -fbasic-block-sections=labels %s -S 2>&1 | FileCheck -check-prefix=CHECK-OPT-LABELS %s // RUN: not %clang -c -target arm-unknown-linux -fbasic-block-sections=all %s -S 2>&1 | FileCheck -check-prefix=CHECK-TRIPLE %s +// RUN: %clang -### -target arm-unknown-linux -fbasic-block-sections=all -fbasic-block-sections=none %s -S 2>&1 \ +// RUN: | FileCheck -check-prefix=CHECK-NOOPT %s // RUN: not %clang -c -target x86_64-apple-darwin10 -fbasic-block-sections=all %s -S 2>&1 | FileCheck -check-prefix=CHECK-TRIPLE %s // RUN: %clang -### -target x86_64 -fbasic-block-sections=alll %s -S 2>&1 | FileCheck -check-prefix=CHECK-INVALID-VALUE %s // RUN: %clang -### -target x86_64 -fbasic-block-sections=list %s -S 2>&1 | FileCheck -check-prefix=CHECK-INVALID-VALUE %s // RUN: %clang -### -target x86_64 -fbasic-block-sections=list= %s -S 2>&1 | FileCheck -check-prefix=CHECK-OPT-NULL-LIST %s +// RUN: %clang -### -target x86_64 -fbasic-block-sections=none %s -S 2>&1 | FileCheck -check-prefix=CHECK-OPT-NONE %s +// RUN: %clang -### -x cuda -nocudainc -nocudalib -target x86_64 -fbasic-block-sections=all %s -c 2>&1 \ +// RUN: | FileCheck -check-prefix=CHECK-CUDA %s + // +// CHECK-NOOPT-NOT: -fbasic-block-sections= // CHECK-OPT-NONE: "-fbasic-block-sections=none" // CHECK-OPT-ALL: "-fbasic-block-sections=all" // CHECK-OPT-LIST: "-fbasic-block-sections={{[^ ]*}}fbasic-block-sections.c" @@ -15,3 +22,9 @@ // CHECK-TRIPLE: error: unsupported option '-fbasic-block-sections=all' for target // CHECK-INVALID-VALUE: error: invalid value {{[^ ]*}} in '-fbasic-block-sections={{.*}}' // CHECK-OPT-NULL-LIST: "-fbasic-block-sections=list=" + +// GPU-side compilations should have no -fbasic-block-sections. It should only +// be passed to the host compilation +// CHECK-CUDA-NOT: -fbasic-block-sections= +// CHECK-CUDA: "-cc1" "-triple" "x86_64" +// CHECK-CUDA-SAME: "-fbasic-block-sections=all" diff --git a/clang/test/Driver/hip-rdc-device-only.hip b/clang/test/Driver/hip-rdc-device-only.hip index ca8d54ea633e2..a95f636d777c1 100644 --- a/clang/test/Driver/hip-rdc-device-only.hip +++ b/clang/test/Driver/hip-rdc-device-only.hip @@ -82,7 +82,7 @@ // COMMON-SAME: {{.*}} {{".*a.cu"}} // COMMON: "{{.*}}clang-offload-bundler" "-type={{(bc|ll)}}" -// COMMON-SAME: "-targets=hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900" +// COMMON-SAME: "-targets=hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900" // COMMON-SAME: "-outputs=a-hip-amdgcn-amd-amdhsa.{{(bc|ll)}}" // COMMON: [[CLANG]] "-cc1" "-triple" "amdgcn-amd-amdhsa" @@ -112,7 +112,7 @@ // COMMON-SAME: {{.*}} {{".*b.hip"}} // COMMON: "{{.*}}clang-offload-bundler" "-type={{(bc|ll)}}" -// COMMON-SAME: "-targets=hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900" +// COMMON-SAME: "-targets=hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900" // COMMON-SAME: "-outputs=b-hip-amdgcn-amd-amdhsa.{{(bc|ll)}}" // SAVETEMP: [[CLANG:".*clang.*"]] "-cc1" "-triple" "amdgcn-amd-amdhsa" "-aux-triple" "x86_64-unknown-linux-gnu" @@ -142,7 +142,7 @@ // SAVETEMP-SAME: {{.*}} "-o" {{"a.*.ll"}} "-x" "ir" [[A_GFX900_TMP_BC]] // SAVETEMP: "{{.*}}clang-offload-bundler" "-type=ll" -// SAVETEMP-SAME: "-targets=hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900" +// SAVETEMP-SAME: "-targets=hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900" // SAVETEMP-SAME: "-outputs=a-hip-amdgcn-amd-amdhsa.ll" // SAVETEMP: [[CLANG]] "-cc1" "-triple" "amdgcn-amd-amdhsa" "-aux-triple" "x86_64-unknown-linux-gnu" @@ -172,7 +172,7 @@ // SAVETEMP-SAME: {{.*}} "-o" {{"b.*.ll"}} "-x" "ir" [[B_GFX900_TMP_BC]] // SAVETEMP: "{{.*}}clang-offload-bundler" "-type=ll" -// SAVETEMP-SAME: "-targets=hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900" +// SAVETEMP-SAME: "-targets=hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900" // SAVETEMP-SAME: "-outputs=b-hip-amdgcn-amd-amdhsa.ll" // FAIL: error: cannot specify -o when generating multiple output files diff --git a/clang/test/Driver/hip-toolchain-rdc-separate.hip b/clang/test/Driver/hip-toolchain-rdc-separate.hip index 698ee14e74dc9..cdddbcc8fd216 100644 --- a/clang/test/Driver/hip-toolchain-rdc-separate.hip +++ b/clang/test/Driver/hip-toolchain-rdc-separate.hip @@ -44,7 +44,7 @@ // CHECK-SAME: {{.*}} [[A_SRC]] // CHECK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o" -// CHECK-SAME: "-targets=hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900,host-x86_64-unknown-linux-gnu" +// CHECK-SAME: "-targets=hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900,host-x86_64-unknown-linux-gnu" // CHECK-SAME: "-outputs=[[A_O:.*a.o]]" "-inputs=[[A_BC1]],[[A_BC2]],[[A_OBJ_HOST]]" // CHECK: [[CLANG]] "-cc1" "-triple" "amdgcn-amd-amdhsa" @@ -79,7 +79,7 @@ // CHECK-SAME: {{.*}} [[B_SRC]] // CHECK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o" -// CHECK-SAME: "-targets=hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900,host-x86_64-unknown-linux-gnu" +// CHECK-SAME: "-targets=hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900,host-x86_64-unknown-linux-gnu" // CHECK-SAME: "-outputs=[[B_O:.*b.o]]" "-inputs=[[B_BC1]],[[B_BC2]],[[B_OBJ_HOST]]" // RUN: touch %T/a.o @@ -91,22 +91,22 @@ // RUN: 2>&1 | FileCheck -check-prefix=LINK %s // LINK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o" -// LINK-SAME: "-targets=host-x86_64-unknown-linux-gnu,hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900" +// LINK-SAME: "-targets=host-x86_64-unknown-linux-gnu,hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900" // LINK-SAME: "-inputs=[[A_O:.*a.o]]" "-outputs=[[A_OBJ_HOST:.*o]],{{.*o}},{{.*o}}" // LINK: "-unbundle" "-allow-missing-bundles" // LINK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o" -// LINK-SAME: "-targets=host-x86_64-unknown-linux-gnu,hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900" +// LINK-SAME: "-targets=host-x86_64-unknown-linux-gnu,hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900" // LINK-SAME: "-inputs=[[B_O:.*b.o]]" "-outputs=[[B_OBJ_HOST:.*o]],{{.*o}},{{.*o}}" // LINK: "-unbundle" "-allow-missing-bundles" // LINK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o" -// LINK-SAME: "-targets=host-x86_64-unknown-linux-gnu,hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900" +// LINK-SAME: "-targets=host-x86_64-unknown-linux-gnu,hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900" // LINK-SAME: "-inputs=[[A_O]]" "-outputs={{.*o}},[[A_BC1:.*o]],[[A_BC2:.*o]]" // LINK: "-unbundle" "-allow-missing-bundles" // LINK: [[BUNDLER:".*clang-offload-bundler"]] "-type=o" -// LINK-SAME: "-targets=host-x86_64-unknown-linux-gnu,hip-amdgcn-amd-amdhsa-gfx803,hip-amdgcn-amd-amdhsa-gfx900" +// LINK-SAME: "-targets=host-x86_64-unknown-linux-gnu,hip-amdgcn-amd-amdhsa--gfx803,hip-amdgcn-amd-amdhsa--gfx900" // LINK-SAME: "-inputs=[[B_O]]" "-outputs={{.*o}},[[B_BC1:.*o]],[[B_BC2:.*o]]" // LINK: "-unbundle" "-allow-missing-bundles" diff --git a/clang/test/Driver/x86-mgeneral-regs-only.c b/clang/test/Driver/x86-mgeneral-regs-only.c new file mode 100644 index 0000000000000..35f96795eb9de --- /dev/null +++ b/clang/test/Driver/x86-mgeneral-regs-only.c @@ -0,0 +1,26 @@ +// Test the -mgeneral-regs-only option on x86 + +// RUN: %clang -target i386-unknown-linux-gnu -mgeneral-regs-only %s -### 2>&1 | FileCheck --check-prefix=CMD %s +// RUN: %clang -target x86_64-unknown-linux-gnu -mgeneral-regs-only %s -### 2>&1 | FileCheck --check-prefix=CMD %s +// RUN: %clang -target i386-unknown-linux-gnu -mavx2 -mgeneral-regs-only %s -### 2>&1 | FileCheck --check-prefixes=CMD,CMD-BEFORE %s +// RUN: %clang -target x86_64-unknown-linux-gnu -mavx2 -mgeneral-regs-only %s -### 2>&1 | FileCheck --check-prefixes=CMD,CMD-BEFORE %s +// RUN: %clang -target i386-unknown-linux-gnu -mgeneral-regs-only -mavx2 %s -### 2>&1 | FileCheck --check-prefixes=CMD,CMD-AFTER %s +// RUN: %clang -target x86_64-unknown-linux-gnu -mgeneral-regs-only -mavx2 %s -### 2>&1 | FileCheck --check-prefixes=CMD,CMD-AFTER %s + +// RUN: %clang -target i386-unknown-linux-gnu -mgeneral-regs-only -S -emit-llvm %s -o - 2>&1 | FileCheck --check-prefix=IR-GPR %s +// RUN: %clang -target x86_64-unknown-linux-gnu -mgeneral-regs-only -S -emit-llvm %s -o - 2>&1 | FileCheck --check-prefix=IR-GPR %s +// RUN: %clang -target i386-unknown-linux-gnu -mavx2 -mgeneral-regs-only -S -emit-llvm %s -o - 2>&1 | FileCheck --check-prefix=IR-GPR %s +// RUN: %clang -target x86_64-unknown-linux-gnu -mavx2 -mgeneral-regs-only -S -emit-llvm %s -o - 2>&1 | FileCheck --check-prefix=IR-GPR %s +// RUN: %clang -target i386-unknown-linux-gnu -mgeneral-regs-only -mavx2 -S -emit-llvm %s -o - 2>&1 | FileCheck --check-prefix=IR-AVX2 %s +// RUN: %clang -target x86_64-unknown-linux-gnu -mgeneral-regs-only -mavx2 -S -emit-llvm %s -o - 2>&1 | FileCheck --check-prefix=IR-AVX2 %s + +// CMD-BEFORE: "-target-feature" "+avx2" +// CMD: "-target-feature" "-x87" +// CMD: "-target-feature" "-mmx" +// CMD: "-target-feature" "-sse" +// CMD-AFTER: "-target-feature" "+avx2" + +void foo() { } + +// IR-GPR: attributes {{.*}} = { {{.*}} "target-features"="{{.*}}-avx{{.*}}-avx2{{.*}}-avx512f{{.*}}-sse{{.*}}-sse2{{.*}}-ssse3{{.*}}-x87{{.*}}" +// IR-AVX2: attributes {{.*}} = { {{.*}} "target-features"="{{.*}}+avx{{.*}}+avx2{{.*}}+sse{{.*}}+sse2{{.*}}+ssse3{{.*}}-avx512f{{.*}}-x87{{.*}}" diff --git a/clang/test/Headers/Inputs/include/crt/device_double_functions.hpp b/clang/test/Headers/Inputs/include/crt/device_double_functions.hpp new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/crt/device_double_functions.hpp @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/crt/device_functions.hpp b/clang/test/Headers/Inputs/include/crt/device_functions.hpp new file mode 100644 index 0000000000000..41dc8722fe643 --- /dev/null +++ b/clang/test/Headers/Inputs/include/crt/device_functions.hpp @@ -0,0 +1,3 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once +__device__ void __brkpt(); diff --git a/clang/test/Headers/Inputs/include/crt/device_runtime.h b/clang/test/Headers/Inputs/include/crt/device_runtime.h new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/crt/device_runtime.h @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/crt/host_runtime.h b/clang/test/Headers/Inputs/include/crt/host_runtime.h new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/crt/host_runtime.h @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/crt/math_functions.hpp b/clang/test/Headers/Inputs/include/crt/math_functions.hpp new file mode 100644 index 0000000000000..fbd2bb52fa842 --- /dev/null +++ b/clang/test/Headers/Inputs/include/crt/math_functions.hpp @@ -0,0 +1,12 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once +__device__ int __isinff(float); +__device__ int __isinf(double); +__device__ int __finitef(float); +__device__ int __isfinited(double); +__device__ int __isnanf(float); +__device__ int __isnan(double); +__device__ int __signbitf(float); +__device__ int __signbitd(double); +__device__ double max(double, double); +__device__ float max(float, float); diff --git a/clang/test/Headers/Inputs/include/crt/sm_70_rt.hpp b/clang/test/Headers/Inputs/include/crt/sm_70_rt.hpp new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/crt/sm_70_rt.hpp @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/cstdlib b/clang/test/Headers/Inputs/include/cstdlib index 1d1864a98976b..689b5e06edec9 100644 --- a/clang/test/Headers/Inputs/include/cstdlib +++ b/clang/test/Headers/Inputs/include/cstdlib @@ -5,11 +5,9 @@ #if __cplusplus >= 201703L extern int abs (int __x) throw() __attribute__ ((__const__)) ; extern long int labs (long int __x) throw() __attribute__ ((__const__)) ; -extern float fabs (float __x) throw() __attribute__ ((__const__)) ; #else extern int abs (int __x) __attribute__ ((__const__)) ; extern long int labs (long int __x) __attribute__ ((__const__)) ; -extern float fabs (float __x) __attribute__ ((__const__)) ; #endif namespace std diff --git a/clang/test/Headers/Inputs/include/cuda.h b/clang/test/Headers/Inputs/include/cuda.h new file mode 100644 index 0000000000000..32870938a8e18 --- /dev/null +++ b/clang/test/Headers/Inputs/include/cuda.h @@ -0,0 +1,127 @@ +/* Minimal declarations for CUDA support. Testing purposes only. */ +#pragma once + +#include + +// Make this file work with nvcc, for testing compatibility. + +#ifndef __NVCC__ +#define __constant__ __attribute__((constant)) +#define __device__ __attribute__((device)) +#define __global__ __attribute__((global)) +#define __host__ __attribute__((host)) +#define __shared__ __attribute__((shared)) +#define __managed__ __attribute__((managed)) +#define __launch_bounds__(...) __attribute__((launch_bounds(__VA_ARGS__))) + +struct dim3 { + unsigned x, y, z; + __host__ __device__ dim3(unsigned x, unsigned y = 1, unsigned z = 1) : x(x), y(y), z(z) {} +}; + +// Host- and device-side placement new overloads. +void *operator new(__SIZE_TYPE__, void *p) { return p; } +void *operator new[](__SIZE_TYPE__, void *p) { return p; } +__device__ void *operator new(__SIZE_TYPE__, void *p) { return p; } +__device__ void *operator new[](__SIZE_TYPE__, void *p) { return p; } + +#define CUDA_VERSION 10100 + +struct char2 { + char x, y; + __host__ __device__ char2(char x = 0, char y = 0) : x(x), y(y) {} +}; +struct char4 { + char x, y, z, w; + __host__ __device__ char4(char x = 0, char y = 0, char z = 0, char w = 0) : x(x), y(y), z(z), w(w) {} +}; + +struct uchar2 { + unsigned char x, y; + __host__ __device__ uchar2(unsigned char x = 0, unsigned char y = 0) : x(x), y(y) {} +}; +struct uchar4 { + unsigned char x, y, z, w; + __host__ __device__ uchar4(unsigned char x = 0, unsigned char y = 0, unsigned char z = 0, unsigned char w = 0) : x(x), y(y), z(z), w(w) {} +}; + +struct short2 { + short x, y; + __host__ __device__ short2(short x = 0, short y = 0) : x(x), y(y) {} +}; +struct short4 { + short x, y, z, w; + __host__ __device__ short4(short x = 0, short y = 0, short z = 0, short w = 0) : x(x), y(y), z(z), w(w) {} +}; + +struct ushort2 { + unsigned short x, y; + __host__ __device__ ushort2(unsigned short x = 0, unsigned short y = 0) : x(x), y(y) {} +}; +struct ushort4 { + unsigned short x, y, z, w; + __host__ __device__ ushort4(unsigned short x = 0, unsigned short y = 0, unsigned short z = 0, unsigned short w = 0) : x(x), y(y), z(z), w(w) {} +}; + +struct int2 { + int x, y; + __host__ __device__ int2(int x = 0, int y = 0) : x(x), y(y) {} +}; +struct int4 { + int x, y, z, w; + __host__ __device__ int4(int x = 0, int y = 0, int z = 0, int w = 0) : x(x), y(y), z(z), w(w) {} +}; + +struct uint2 { + unsigned x, y; + __host__ __device__ uint2(unsigned x = 0, unsigned y = 0) : x(x), y(y) {} +}; +struct uint3 { + unsigned x, y, z; + __host__ __device__ uint3(unsigned x = 0, unsigned y = 0, unsigned z = 0) : x(x), y(y), z(z) {} +}; +struct uint4 { + unsigned x, y, z, w; + __host__ __device__ uint4(unsigned x = 0, unsigned y = 0, unsigned z = 0, unsigned w = 0) : x(x), y(y), z(z), w(w) {} +}; + + +struct longlong2 { + long long x, y; + __host__ __device__ longlong2(long long x = 0, long long y = 0) : x(x), y(y) {} +}; +struct longlong4 { + long long x, y, z, w; + __host__ __device__ longlong4(long long x = 0, long long y = 0, long long z = 0, long long w = 0) : x(x), y(y), z(z), w(w) {} +}; + +struct ulonglong2 { + unsigned long long x, y; + __host__ __device__ ulonglong2(unsigned long long x = 0, unsigned long long y = 0) : x(x), y(y) {} +}; +struct ulonglong4 { + unsigned long long x, y, z, w; + __host__ __device__ ulonglong4(unsigned long long x = 0, unsigned long long y = 0, unsigned long long z = 0, unsigned long long w = 0) : x(x), y(y), z(z), w(w) {} +}; + + +struct float2 { + float x, y; + __host__ __device__ float2(float x = 0, float y = 0) : x(x), y(y) {} +}; +struct float4 { + float x, y, z, w; + __host__ __device__ float4(float x = 0, float y = 0, float z = 0, float w = 0) : x(x), y(y), z(z), w(w) {} +}; + +struct double2 { + double x, y; + __host__ __device__ double2(double x = 0, double y = 0) : x(x), y(y) {} +}; +struct double4 { + double x, y, z, w; + __host__ __device__ double4(double x = 0, double y = 0, double z = 0, double w = 0) : x(x), y(y), z(z), w(w) {} +}; + + +#endif // !__NVCC__ diff --git a/clang/test/Headers/Inputs/include/cuda_runtime.h b/clang/test/Headers/Inputs/include/cuda_runtime.h new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/cuda_runtime.h @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/curand_mtgp32_kernel.h b/clang/test/Headers/Inputs/include/curand_mtgp32_kernel.h new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/curand_mtgp32_kernel.h @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/device_atomic_functions.h b/clang/test/Headers/Inputs/include/device_atomic_functions.h new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/device_atomic_functions.h @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/device_atomic_functions.hpp b/clang/test/Headers/Inputs/include/device_atomic_functions.hpp new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/device_atomic_functions.hpp @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/device_double_functions.h b/clang/test/Headers/Inputs/include/device_double_functions.h new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/device_double_functions.h @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/driver_types.h b/clang/test/Headers/Inputs/include/driver_types.h new file mode 100644 index 0000000000000..b5d366aee29fd --- /dev/null +++ b/clang/test/Headers/Inputs/include/driver_types.h @@ -0,0 +1,4 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once + +#include diff --git a/clang/test/Headers/Inputs/include/host_config.h b/clang/test/Headers/Inputs/include/host_config.h new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/host_config.h @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/host_defines.h b/clang/test/Headers/Inputs/include/host_defines.h new file mode 100644 index 0000000000000..03fed3a2a5d46 --- /dev/null +++ b/clang/test/Headers/Inputs/include/host_defines.h @@ -0,0 +1,3 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once +#define __forceinline__ diff --git a/clang/test/Headers/Inputs/include/math_functions_dbl_ptx3.hpp b/clang/test/Headers/Inputs/include/math_functions_dbl_ptx3.hpp new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/math_functions_dbl_ptx3.hpp @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/new b/clang/test/Headers/Inputs/include/new index 8159d5527cc3a..5110731fb2f89 100644 --- a/clang/test/Headers/Inputs/include/new +++ b/clang/test/Headers/Inputs/include/new @@ -1,3 +1,4 @@ +#pragma once namespace std { diff --git a/clang/test/Headers/Inputs/include/sm_20_atomic_functions.hpp b/clang/test/Headers/Inputs/include/sm_20_atomic_functions.hpp new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/sm_20_atomic_functions.hpp @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/sm_20_intrinsics.hpp b/clang/test/Headers/Inputs/include/sm_20_intrinsics.hpp new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/sm_20_intrinsics.hpp @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/sm_32_atomic_functions.hpp b/clang/test/Headers/Inputs/include/sm_32_atomic_functions.hpp new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/sm_32_atomic_functions.hpp @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/sm_60_atomic_functions.hpp b/clang/test/Headers/Inputs/include/sm_60_atomic_functions.hpp new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/sm_60_atomic_functions.hpp @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/sm_61_intrinsics.hpp b/clang/test/Headers/Inputs/include/sm_61_intrinsics.hpp new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/sm_61_intrinsics.hpp @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/Inputs/include/string.h b/clang/test/Headers/Inputs/include/string.h new file mode 100644 index 0000000000000..98cf77fd564c0 --- /dev/null +++ b/clang/test/Headers/Inputs/include/string.h @@ -0,0 +1,3 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once +void* memcpy(void* dst, const void* src, size_t num); diff --git a/clang/test/Headers/Inputs/include/texture_indirect_functions.h b/clang/test/Headers/Inputs/include/texture_indirect_functions.h new file mode 100644 index 0000000000000..bffa775cb2822 --- /dev/null +++ b/clang/test/Headers/Inputs/include/texture_indirect_functions.h @@ -0,0 +1,2 @@ +// required for __clang_cuda_runtime_wrapper.h tests +#pragma once diff --git a/clang/test/Headers/cuda_with_openmp.cu b/clang/test/Headers/cuda_with_openmp.cu new file mode 100644 index 0000000000000..efde4ecdc6626 --- /dev/null +++ b/clang/test/Headers/cuda_with_openmp.cu @@ -0,0 +1,8 @@ +// Test using -x cuda -fopenmp does not clash integrated headers. +// Reported in https://bugs.llvm.org/show_bug.cgi?id=48014 +///==========================================================================/// + +// REQUIRES: nvptx-registered-target + +// RUN: %clang -x cuda -fopenmp -c %s -o - --cuda-path=%S/../Driver/Inputs/CUDA/usr/local/cuda -nocudalib -isystem %S/Inputs/include -isystem %S/../../lib/Headers -fsyntax-only + diff --git a/clang/test/Headers/hexagon-audio-headers.c b/clang/test/Headers/hexagon-audio-headers.c new file mode 100644 index 0000000000000..d7ebda3fbc44e --- /dev/null +++ b/clang/test/Headers/hexagon-audio-headers.c @@ -0,0 +1,36 @@ +// REQUIRES: hexagon-registered-target + +// RUN: %clang_cc1 -O0 -internal-isystem %S/../../lib/Headers/ \ +// RUN: -target-cpu hexagonv67t -triple hexagon-unknown-elf \ +// RUN: -emit-llvm %s -o - | FileCheck %s + +// RUN: %clang_cc1 -O0 -internal-isystem %S/../../lib/Headers/ \ +// RUN: -target-cpu hexagonv67t -triple hexagon-unknown-elf -x c++ \ +// RUN: -emit-llvm %s -o - | FileCheck %s + +// RUN: not %clang_cc1 -O0 -internal-isystem %S/../../lib/Headers/ \ +// RUN: -target-cpu hexagonv68 -triple hexagon-unknown-elf -x c++ \ +// RUN: -fsyntax-only %s 2>&1 | FileCheck --implicit-check-not='error:' \ +// RUN: --check-prefix=CHECK-ERR-CXX %s + +// RUN: not %clang_cc1 -O0 -internal-isystem %S/../../lib/Headers/ \ +// RUN: -target-cpu hexagonv68 -triple hexagon-unknown-elf -std=c99 \ +// RUN: -Wimplicit-function-declaration -Werror -fsyntax-only %s 2>&1 | \ +// RUN: FileCheck --implicit-check-not='error:' --check-prefix=CHECK-ERR-C99 %s + +#include + +void test_audio() { + unsigned int b; + unsigned long long c; + + // CHECK-ERR-CXX: error: use of undeclared identifier 'Q6_R_clip_RI' + // CHECK-ERR-C99: error: implicit declaration of function 'Q6_R_clip_RI' is invalid in C99 + // CHECK: call i32 @llvm.hexagon.A7.clip + b = Q6_R_clip_RI(b, 9); + + // CHECK-ERR-CXX: error: use of undeclared identifier 'Q6_P_cround_PI' + // CHECK-ERR-C99: error: implicit declaration of function 'Q6_P_cround_PI' is invalid in C99 + // CHECK: call i64 @llvm.hexagon.A7.cround + c = Q6_P_cround_PI(c, 12); +} diff --git a/clang/test/Headers/hexagon-headers.c b/clang/test/Headers/hexagon-headers.c new file mode 100644 index 0000000000000..529ffce0658c5 --- /dev/null +++ b/clang/test/Headers/hexagon-headers.c @@ -0,0 +1,28 @@ +// REQUIRES: hexagon-registered-target + +// RUN: %clang_cc1 -O0 -internal-isystem %S/../../lib/Headers/ \ +// RUN: -target-cpu hexagonv68 -triple hexagon-unknown-elf \ +// RUN: -emit-llvm %s -o - | FileCheck %s + +// RUN: %clang_cc1 -O0 -internal-isystem %S/../../lib/Headers/ \ +// RUN: -target-cpu hexagonv68 -triple hexagon-unknown-elf -x c++ \ +// RUN: -emit-llvm %s -o - | FileCheck %s + +#include + +// expected-no-diagnostics + +void test_protos(float a, unsigned int b) { + unsigned char c; + // CHECK: call i64 @llvm.hexagon.A2.absp + b = Q6_P_abs_P(b); +} + +void test_dma() { + unsigned int b; + + // CHECK: call i32 @llvm.hexagon.Y6.dmpoll + b = Q6_R_dmpoll(); + // CHECK: call i32 @llvm.hexagon.Y6.dmpause + b = Q6_R_dmpause(); +} diff --git a/clang/test/Headers/hexagon-hvx-headers.c b/clang/test/Headers/hexagon-hvx-headers.c new file mode 100644 index 0000000000000..afea9a6bee298 --- /dev/null +++ b/clang/test/Headers/hexagon-hvx-headers.c @@ -0,0 +1,37 @@ +// REQUIRES: hexagon-registered-target + +// RUN: %clang_cc1 -O0 -internal-isystem %S/../../lib/Headers/ \ +// RUN: -target-cpu hexagonv68 -triple hexagon-unknown-elf \ +// RUN: -target-feature +hvx-length128b -target-feature +hvxv68 \ +// RUN: -emit-llvm %s -o - | FileCheck --check-prefix=CHECK %s + +// RUN: %clang_cc1 -O0 -internal-isystem %S/../../lib/Headers/ \ +// RUN: -target-cpu hexagonv68 -triple hexagon-unknown-elf -DDIRECT \ +// RUN: -target-feature +hvx-length128b -target-feature +hvxv68 \ +// RUN: -emit-llvm %s -o - | FileCheck --check-prefix=CHECK %s + +// RUN: %clang_cc1 -O0 -internal-isystem %S/../../lib/Headers/ \ +// RUN: -target-cpu hexagonv68 -triple hexagon-unknown-elf -x c++ \ +// RUN: -target-feature +hvx-length128b -target-feature +hvxv68 \ +// RUN: -emit-llvm %s -o - | FileCheck --check-prefix=CHECK %s + +// RUN: %clang_cc1 -O0 -internal-isystem %S/../../lib/Headers/ \ +// RUN: -target-cpu hexagonv68 -triple hexagon-unknown-elf \ +// RUN: -target-feature +hvx-length64b -target-feature +hvxv68 \ +// RUN: -emit-llvm %s -o - | FileCheck --check-prefix=CHECK-64 %s + +#ifdef DIRECT +#include +#else +#include +#endif +#include + +// expected-no-diagnostics + +void test_hvx_protos(float a, unsigned int b) { + HVX_VectorPair c; + // CHECK-64: call <32 x i32> @llvm.hexagon.V6.v6mpyhubs10 + // CHECK: call <64 x i32> @llvm.hexagon.V6.v6mpyhubs10.128B + c = Q6_Ww_v6mpy_WubWbI_h(c, c, 12); +} diff --git a/clang/test/Modules/Inputs/merge-using-decls/a.h b/clang/test/Modules/Inputs/merge-using-decls/a.h index 0fe0067bf23c4..2469cbd7601fe 100644 --- a/clang/test/Modules/Inputs/merge-using-decls/a.h +++ b/clang/test/Modules/Inputs/merge-using-decls/a.h @@ -1,6 +1,7 @@ struct X { int v; typedef int t; + void f(X); }; struct YA { @@ -8,6 +9,10 @@ struct YA { typedef int type; }; +struct Z { + void f(Z); +}; + template struct C : X, T { using T::value; using typename T::type; @@ -41,3 +46,10 @@ typedef C::type I; typedef D::type I; typedef E::type I; typedef F::type I; + +#if __cplusplus >= 201702L +template struct G : T... { + using T::f...; +}; +using Q = decltype(G()); +#endif diff --git a/clang/test/Modules/Inputs/merge-using-decls/b.h b/clang/test/Modules/Inputs/merge-using-decls/b.h index 5d112ffbfe96f..be9bf240ccebf 100644 --- a/clang/test/Modules/Inputs/merge-using-decls/b.h +++ b/clang/test/Modules/Inputs/merge-using-decls/b.h @@ -1,6 +1,7 @@ struct X { int v; typedef int t; + void f(X); }; struct YB { @@ -14,6 +15,10 @@ struct YBRev { int type; }; +struct Z { + void f(Z); +}; + template struct C : X, T { using T::value; using typename T::type; @@ -54,3 +59,10 @@ typedef E::type I; #endif typedef F::type I; + +#if __cplusplus >= 201702L +template struct G : T... { + using T::f...; +}; +using Q = decltype(G()); +#endif diff --git a/clang/test/Modules/merge-using-decls.cpp b/clang/test/Modules/merge-using-decls.cpp index 1ec9a9a17bdee..e3bf977f05449 100644 --- a/clang/test/Modules/merge-using-decls.cpp +++ b/clang/test/Modules/merge-using-decls.cpp @@ -2,9 +2,11 @@ // RUN: %clang_cc1 -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -x c++ -I%S/Inputs/merge-using-decls -verify %s -DORDER=1 // RUN: %clang_cc1 -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -x c++ -I%S/Inputs/merge-using-decls -verify -std=c++98 %s -DORDER=1 // RUN: %clang_cc1 -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -x c++ -I%S/Inputs/merge-using-decls -verify -std=c++11 %s -DORDER=1 +// RUN: %clang_cc1 -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -x c++ -I%S/Inputs/merge-using-decls -verify -std=c++17 %s -DORDER=1 // RUN: %clang_cc1 -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -x c++ -I%S/Inputs/merge-using-decls -verify %s -DORDER=2 // RUN: %clang_cc1 -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -x c++ -I%S/Inputs/merge-using-decls -verify -std=c++98 %s -DORDER=2 // RUN: %clang_cc1 -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -x c++ -I%S/Inputs/merge-using-decls -verify -std=c++11 %s -DORDER=2 +// RUN: %clang_cc1 -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -x c++ -I%S/Inputs/merge-using-decls -verify -std=c++17 %s -DORDER=2 #if ORDER == 1 #include "a.h" @@ -39,6 +41,19 @@ template int UseAll(); template int UseAll(); template int UseAll(); +#if __cplusplus >= 201702L +void use_g(Q q) { + q.f(q); // expected-error {{ambiguous}} +#if ORDER == 1 + // expected-note@a.h:* {{candidate function}} + // expected-note@a.h:* {{candidate function}} +#else + // expected-note@b.h:* {{candidate function}} + // expected-note@b.h:* {{candidate function}} +#endif +} +#endif + // Which of these two sets of diagnostics is chosen is not important. It's OK // if this varies with ORDER, but it must be consistent across runs. #if ORDER == 1 diff --git a/clang/test/OpenMP/distribute_parallel_for_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_codegen.cpp index 2034f82e25d5e..d1a3f33c33d9c 100644 --- a/clang/test/OpenMP/distribute_parallel_for_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_codegen.cpp @@ -1976,34 +1976,33 @@ int main() { // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK1: omp.dispatch.cond: // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK1-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK1-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK1-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK1: cond.true: // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK1-NEXT: br label [[COND_END:%.*]] // CHECK1: cond.false: // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK1-NEXT: br label [[COND_END]] // CHECK1: cond.end: -// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK1-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK1-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK1: omp.dispatch.body: // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -2016,15 +2015,15 @@ int main() { // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK1-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK1-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM13]] -// CHECK1-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX14]], align 8 -// CHECK1-NEXT: [[ADD15:%.*]] = fadd double [[TMP25]], [[TMP28]] +// CHECK1-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK1-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] +// CHECK1-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8 +// CHECK1-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] // CHECK1-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK1-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK1-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM16]] -// CHECK1-NEXT: store double [[ADD15]], double* [[ARRAYIDX17]], align 8 +// CHECK1-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK1-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] +// CHECK1-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP31]], align 8 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 1 @@ -2039,20 +2038,20 @@ int main() { // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP35]], 1 -// CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP35]], 1 +// CHECK1-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK1: omp.dispatch.inc: // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] -// CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] +// CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] -// CHECK1-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] +// CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK1: omp.dispatch.end: // CHECK1-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -3769,34 +3768,33 @@ int main() { // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK2: omp.dispatch.cond: // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK2-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK2-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK2-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK2-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK2: cond.true: // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK2-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK2-NEXT: br label [[COND_END:%.*]] // CHECK2: cond.false: // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK2-NEXT: br label [[COND_END]] // CHECK2: cond.end: -// CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK2-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK2-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK2-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK2: omp.dispatch.body: // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK2-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK2-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -3809,15 +3807,15 @@ int main() { // CHECK2-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8 // CHECK2-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK2-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK2-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM13]] -// CHECK2-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX14]], align 8 -// CHECK2-NEXT: [[ADD15:%.*]] = fadd double [[TMP25]], [[TMP28]] +// CHECK2-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK2-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] +// CHECK2-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8 +// CHECK2-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] // CHECK2-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK2-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK2-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM16]] -// CHECK2-NEXT: store double [[ADD15]], double* [[ARRAYIDX17]], align 8 +// CHECK2-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK2-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] +// CHECK2-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 // CHECK2-NEXT: store double** [[TMP1]], double*** [[TMP31]], align 8 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 1 @@ -3832,20 +3830,20 @@ int main() { // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP35]], 1 -// CHECK2-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP35]], 1 +// CHECK2-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK2: omp.dispatch.inc: // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] -// CHECK2-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK2-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] +// CHECK2-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] -// CHECK2-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] +// CHECK2-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK2: omp.dispatch.end: // CHECK2-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -5522,7 +5520,7 @@ int main() { // CHECK3: omp.dispatch.cond: // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK3-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK3: cond.true: // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -7249,7 +7247,7 @@ int main() { // CHECK4: omp.dispatch.cond: // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK4-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK4: cond.true: // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -9465,34 +9463,33 @@ int main() { // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK9: omp.dispatch.cond: // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK9-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK9-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK9-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK9-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK9: cond.true: // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK9-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK9-NEXT: br label [[COND_END:%.*]] // CHECK9: cond.false: // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK9-NEXT: br label [[COND_END]] // CHECK9: cond.end: -// CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK9-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK9-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK9: omp.dispatch.body: // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK9: omp.inner.for.cond: // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK9: omp.inner.for.body: // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -9505,34 +9502,34 @@ int main() { // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK9-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK9-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM13]] -// CHECK9-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX14]], align 8 -// CHECK9-NEXT: [[ADD15:%.*]] = fadd double [[TMP25]], [[TMP28]] +// CHECK9-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK9-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] +// CHECK9-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8 +// CHECK9-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] // CHECK9-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK9-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK9-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM16]] -// CHECK9-NEXT: store double [[ADD15]], double* [[ARRAYIDX17]], align 8 +// CHECK9-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK9-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] +// CHECK9-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK9: omp.body.continue: // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK9: omp.inner.for.inc: // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP31]], 1 -// CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4 +// CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 +// CHECK9-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK9: omp.inner.for.end: // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK9: omp.dispatch.inc: // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] -// CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] +// CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK9-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] -// CHECK9-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] +// CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK9: omp.dispatch.end: // CHECK9-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -11683,34 +11680,33 @@ int main() { // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK9: omp.dispatch.cond: // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK9-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK9-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK9-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK9-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK9: cond.true: // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK9-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK9-NEXT: br label [[COND_END:%.*]] // CHECK9: cond.false: // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK9-NEXT: br label [[COND_END]] // CHECK9: cond.end: -// CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK9-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK9-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK9: omp.dispatch.body: // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK9: omp.inner.for.cond: // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK9: omp.inner.for.body: // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -11723,34 +11719,34 @@ int main() { // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP3]], align 8 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK9-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK9-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM13]] -// CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX14]], align 4 -// CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] +// CHECK9-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK9-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM12]] +// CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX13]], align 4 +// CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[TMP1]], align 8 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK9-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK9-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i64 [[IDXPROM16]] -// CHECK9-NEXT: store i32 [[ADD15]], i32* [[ARRAYIDX17]], align 4 +// CHECK9-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK9-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i64 [[IDXPROM15]] +// CHECK9-NEXT: store i32 [[ADD14]], i32* [[ARRAYIDX16]], align 4 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK9: omp.body.continue: // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK9: omp.inner.for.inc: // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP31]], 1 -// CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4 +// CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 +// CHECK9-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK9: omp.inner.for.end: // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK9: omp.dispatch.inc: // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] -// CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] +// CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK9-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] -// CHECK9-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] +// CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK9: omp.dispatch.end: // CHECK9-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -13896,34 +13892,33 @@ int main() { // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK10: omp.dispatch.cond: // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK10-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK10-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK10-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK10-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK10: cond.true: // CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK10-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK10-NEXT: br label [[COND_END:%.*]] // CHECK10: cond.false: // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK10-NEXT: br label [[COND_END]] // CHECK10: cond.end: -// CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK10-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK10-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK10: omp.dispatch.body: // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK10: omp.inner.for.cond: // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK10-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK10-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK10: omp.inner.for.body: // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -13936,34 +13931,34 @@ int main() { // CHECK10-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8 // CHECK10-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK10-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK10-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM13]] -// CHECK10-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX14]], align 8 -// CHECK10-NEXT: [[ADD15:%.*]] = fadd double [[TMP25]], [[TMP28]] +// CHECK10-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK10-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] +// CHECK10-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8 +// CHECK10-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] // CHECK10-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK10-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK10-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM16]] -// CHECK10-NEXT: store double [[ADD15]], double* [[ARRAYIDX17]], align 8 +// CHECK10-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK10-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] +// CHECK10-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK10: omp.body.continue: // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK10: omp.inner.for.inc: // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP31]], 1 -// CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4 +// CHECK10-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 +// CHECK10-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK10: omp.inner.for.end: // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK10: omp.dispatch.inc: // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK10-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] -// CHECK10-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] +// CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK10-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] -// CHECK10-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK10-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] +// CHECK10-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK10: omp.dispatch.end: // CHECK10-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -16114,34 +16109,33 @@ int main() { // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK10: omp.dispatch.cond: // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK10-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK10-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK10-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK10-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK10: cond.true: // CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK10-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK10-NEXT: br label [[COND_END:%.*]] // CHECK10: cond.false: // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK10-NEXT: br label [[COND_END]] // CHECK10: cond.end: -// CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK10-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK10-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK10: omp.dispatch.body: // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK10: omp.inner.for.cond: // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK10-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK10-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK10: omp.inner.for.body: // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -16154,34 +16148,34 @@ int main() { // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 // CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP3]], align 8 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK10-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK10-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM13]] -// CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX14]], align 4 -// CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] +// CHECK10-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK10-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM12]] +// CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX13]], align 4 +// CHECK10-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[TMP1]], align 8 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK10-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK10-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i64 [[IDXPROM16]] -// CHECK10-NEXT: store i32 [[ADD15]], i32* [[ARRAYIDX17]], align 4 +// CHECK10-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK10-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i64 [[IDXPROM15]] +// CHECK10-NEXT: store i32 [[ADD14]], i32* [[ARRAYIDX16]], align 4 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK10: omp.body.continue: // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK10: omp.inner.for.inc: // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP31]], 1 -// CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4 +// CHECK10-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 +// CHECK10-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK10: omp.inner.for.end: // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK10: omp.dispatch.inc: // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK10-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] -// CHECK10-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] +// CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK10-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] -// CHECK10-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK10-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] +// CHECK10-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK10: omp.dispatch.end: // CHECK10-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -18277,7 +18271,7 @@ int main() { // CHECK11: omp.dispatch.cond: // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK11-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK11: cond.true: // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -20419,7 +20413,7 @@ int main() { // CHECK11: omp.dispatch.cond: // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK11-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK11: cond.true: // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -22556,7 +22550,7 @@ int main() { // CHECK12: omp.dispatch.cond: // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK12-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK12: cond.true: // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -24698,7 +24692,7 @@ int main() { // CHECK12: omp.dispatch.cond: // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK12-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK12: cond.true: // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 diff --git a/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp index c9a16f2db634c..60b4685ed9b46 100644 --- a/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_simd_codegen.cpp @@ -2084,34 +2084,33 @@ int main() { // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK1: omp.dispatch.cond: // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK1-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK1-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK1-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK1: cond.true: // CHECK1-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK1-NEXT: br label [[COND_END:%.*]] // CHECK1: cond.false: // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK1-NEXT: br label [[COND_END]] // CHECK1: cond.end: -// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK1-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK1-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK1: omp.dispatch.body: // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !40 -// CHECK1-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -2124,15 +2123,15 @@ int main() { // CHECK1-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !40 // CHECK1-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !40 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !40 -// CHECK1-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK1-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM13]] -// CHECK1-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX14]], align 8, !llvm.access.group !40 -// CHECK1-NEXT: [[ADD15:%.*]] = fadd double [[TMP25]], [[TMP28]] +// CHECK1-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK1-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] +// CHECK1-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8, !llvm.access.group !40 +// CHECK1-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] // CHECK1-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !40 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !40 -// CHECK1-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK1-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM16]] -// CHECK1-NEXT: store double [[ADD15]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !40 +// CHECK1-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK1-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] +// CHECK1-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8, !llvm.access.group !40 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 // CHECK1-NEXT: store double** [[TMP1]], double*** [[TMP31]], align 8, !llvm.access.group !40 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 1 @@ -2147,20 +2146,20 @@ int main() { // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 -// CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP35]], 1 -// CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 +// CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP35]], 1 +// CHECK1-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK1: omp.dispatch.inc: // CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] -// CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] +// CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] -// CHECK1-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] +// CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK1: omp.dispatch.end: // CHECK1-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -2171,11 +2170,11 @@ int main() { // CHECK1-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK1: .omp.final.then: // CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 -// CHECK1-NEXT: [[SUB21:%.*]] = sub nsw i32 [[TMP44]], 0 -// CHECK1-NEXT: [[DIV22:%.*]] = sdiv i32 [[SUB21]], 1 -// CHECK1-NEXT: [[MUL23:%.*]] = mul nsw i32 [[DIV22]], 1 -// CHECK1-NEXT: [[ADD24:%.*]] = add nsw i32 0, [[MUL23]] -// CHECK1-NEXT: store i32 [[ADD24]], i32* [[I6]], align 4 +// CHECK1-NEXT: [[SUB20:%.*]] = sub nsw i32 [[TMP44]], 0 +// CHECK1-NEXT: [[DIV21:%.*]] = sdiv i32 [[SUB20]], 1 +// CHECK1-NEXT: [[MUL22:%.*]] = mul nsw i32 [[DIV21]], 1 +// CHECK1-NEXT: [[ADD23:%.*]] = add nsw i32 0, [[MUL22]] +// CHECK1-NEXT: store i32 [[ADD23]], i32* [[I6]], align 4 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK1: .omp.final.done: // CHECK1-NEXT: br label [[OMP_PRECOND_END]] @@ -4045,34 +4044,33 @@ int main() { // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK2: omp.dispatch.cond: // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK2-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK2-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK2-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK2-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK2-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK2: cond.true: // CHECK2-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK2-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK2-NEXT: br label [[COND_END:%.*]] // CHECK2: cond.false: // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK2-NEXT: br label [[COND_END]] // CHECK2: cond.end: -// CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK2-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK2-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK2-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK2: omp.dispatch.body: // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !40 -// CHECK2-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK2-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK2-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -4085,15 +4083,15 @@ int main() { // CHECK2-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !40 // CHECK2-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !40 // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !40 -// CHECK2-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK2-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM13]] -// CHECK2-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX14]], align 8, !llvm.access.group !40 -// CHECK2-NEXT: [[ADD15:%.*]] = fadd double [[TMP25]], [[TMP28]] +// CHECK2-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK2-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] +// CHECK2-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8, !llvm.access.group !40 +// CHECK2-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] // CHECK2-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !40 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !40 -// CHECK2-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK2-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM16]] -// CHECK2-NEXT: store double [[ADD15]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !40 +// CHECK2-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK2-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] +// CHECK2-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8, !llvm.access.group !40 // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 0 // CHECK2-NEXT: store double** [[TMP1]], double*** [[TMP31]], align 8, !llvm.access.group !40 // CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[CLASS_ANON_4]], %class.anon.4* [[REF_TMP]], i32 0, i32 1 @@ -4108,20 +4106,20 @@ int main() { // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 -// CHECK2-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP35]], 1 -// CHECK2-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 +// CHECK2-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP35]], 1 +// CHECK2-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !40 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP41:![0-9]+]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK2: omp.dispatch.inc: // CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] -// CHECK2-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK2-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP36]], [[TMP37]] +// CHECK2-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] -// CHECK2-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP38]], [[TMP39]] +// CHECK2-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK2: omp.dispatch.end: // CHECK2-NEXT: [[TMP40:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -4132,11 +4130,11 @@ int main() { // CHECK2-NEXT: br i1 [[TMP43]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK2: .omp.final.then: // CHECK2-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 -// CHECK2-NEXT: [[SUB21:%.*]] = sub nsw i32 [[TMP44]], 0 -// CHECK2-NEXT: [[DIV22:%.*]] = sdiv i32 [[SUB21]], 1 -// CHECK2-NEXT: [[MUL23:%.*]] = mul nsw i32 [[DIV22]], 1 -// CHECK2-NEXT: [[ADD24:%.*]] = add nsw i32 0, [[MUL23]] -// CHECK2-NEXT: store i32 [[ADD24]], i32* [[I6]], align 4 +// CHECK2-NEXT: [[SUB20:%.*]] = sub nsw i32 [[TMP44]], 0 +// CHECK2-NEXT: [[DIV21:%.*]] = sdiv i32 [[SUB20]], 1 +// CHECK2-NEXT: [[MUL22:%.*]] = mul nsw i32 [[DIV21]], 1 +// CHECK2-NEXT: [[ADD23:%.*]] = add nsw i32 0, [[MUL22]] +// CHECK2-NEXT: store i32 [[ADD23]], i32* [[I6]], align 4 // CHECK2-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK2: .omp.final.done: // CHECK2-NEXT: br label [[OMP_PRECOND_END]] @@ -5966,7 +5964,7 @@ int main() { // CHECK3: omp.dispatch.cond: // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK3-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK3: cond.true: // CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -7861,7 +7859,7 @@ int main() { // CHECK4: omp.dispatch.cond: // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK4-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK4-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK4-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK4: cond.true: // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -10353,34 +10351,33 @@ int main() { // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK9: omp.dispatch.cond: // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK9-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK9-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK9-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK9-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK9: cond.true: // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK9-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK9-NEXT: br label [[COND_END:%.*]] // CHECK9: cond.false: // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK9-NEXT: br label [[COND_END]] // CHECK9: cond.end: -// CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK9-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK9-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK9: omp.dispatch.body: // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK9: omp.inner.for.cond: // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !47 -// CHECK9-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK9: omp.inner.for.body: // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -10393,34 +10390,34 @@ int main() { // CHECK9-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !47 // CHECK9-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !47 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !47 -// CHECK9-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK9-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM13]] -// CHECK9-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX14]], align 8, !llvm.access.group !47 -// CHECK9-NEXT: [[ADD15:%.*]] = fadd double [[TMP25]], [[TMP28]] +// CHECK9-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK9-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] +// CHECK9-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8, !llvm.access.group !47 +// CHECK9-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] // CHECK9-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !47 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !47 -// CHECK9-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK9-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM16]] -// CHECK9-NEXT: store double [[ADD15]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !47 +// CHECK9-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK9-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] +// CHECK9-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8, !llvm.access.group !47 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK9: omp.body.continue: // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK9: omp.inner.for.inc: // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47 -// CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP31]], 1 -// CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47 +// CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 +// CHECK9-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]] // CHECK9: omp.inner.for.end: // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK9: omp.dispatch.inc: // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] -// CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] +// CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK9-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] -// CHECK9-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] +// CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK9: omp.dispatch.end: // CHECK9-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -10431,11 +10428,11 @@ int main() { // CHECK9-NEXT: br i1 [[TMP39]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK9: .omp.final.then: // CHECK9-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 -// CHECK9-NEXT: [[SUB21:%.*]] = sub nsw i32 [[TMP40]], 0 -// CHECK9-NEXT: [[DIV22:%.*]] = sdiv i32 [[SUB21]], 1 -// CHECK9-NEXT: [[MUL23:%.*]] = mul nsw i32 [[DIV22]], 1 -// CHECK9-NEXT: [[ADD24:%.*]] = add nsw i32 0, [[MUL23]] -// CHECK9-NEXT: store i32 [[ADD24]], i32* [[I6]], align 4 +// CHECK9-NEXT: [[SUB20:%.*]] = sub nsw i32 [[TMP40]], 0 +// CHECK9-NEXT: [[DIV21:%.*]] = sdiv i32 [[SUB20]], 1 +// CHECK9-NEXT: [[MUL22:%.*]] = mul nsw i32 [[DIV21]], 1 +// CHECK9-NEXT: [[ADD23:%.*]] = add nsw i32 0, [[MUL22]] +// CHECK9-NEXT: store i32 [[ADD23]], i32* [[I6]], align 4 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK9: .omp.final.done: // CHECK9-NEXT: br label [[OMP_PRECOND_END]] @@ -12724,34 +12721,33 @@ int main() { // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK9: omp.dispatch.cond: // CHECK9-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK9-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK9-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK9-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK9-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK9: cond.true: // CHECK9-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK9-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK9-NEXT: br label [[COND_END:%.*]] // CHECK9: cond.false: // CHECK9-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK9-NEXT: br label [[COND_END]] // CHECK9: cond.end: -// CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK9-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK9-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK9-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK9-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK9: omp.dispatch.body: // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK9: omp.inner.for.cond: // CHECK9-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !89 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !89 -// CHECK9-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK9-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK9-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK9-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK9: omp.inner.for.body: // CHECK9-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !89 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -12764,34 +12760,34 @@ int main() { // CHECK9-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !89 // CHECK9-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP3]], align 8, !llvm.access.group !89 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !89 -// CHECK9-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK9-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM13]] -// CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !89 -// CHECK9-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] +// CHECK9-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK9-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM12]] +// CHECK9-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !89 +// CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] // CHECK9-NEXT: [[TMP29:%.*]] = load i32*, i32** [[TMP1]], align 8, !llvm.access.group !89 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !89 -// CHECK9-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK9-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i64 [[IDXPROM16]] -// CHECK9-NEXT: store i32 [[ADD15]], i32* [[ARRAYIDX17]], align 4, !llvm.access.group !89 +// CHECK9-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK9-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i64 [[IDXPROM15]] +// CHECK9-NEXT: store i32 [[ADD14]], i32* [[ARRAYIDX16]], align 4, !llvm.access.group !89 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK9: omp.body.continue: // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK9: omp.inner.for.inc: // CHECK9-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !89 -// CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP31]], 1 -// CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !89 +// CHECK9-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 +// CHECK9-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !89 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP90:![0-9]+]] // CHECK9: omp.inner.for.end: // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK9: omp.dispatch.inc: // CHECK9-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] -// CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK9-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] +// CHECK9-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK9-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] -// CHECK9-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK9-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] +// CHECK9-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK9: omp.dispatch.end: // CHECK9-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -12802,11 +12798,11 @@ int main() { // CHECK9-NEXT: br i1 [[TMP39]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK9: .omp.final.then: // CHECK9-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 -// CHECK9-NEXT: [[SUB21:%.*]] = sub nsw i32 [[TMP40]], 0 -// CHECK9-NEXT: [[DIV22:%.*]] = sdiv i32 [[SUB21]], 1 -// CHECK9-NEXT: [[MUL23:%.*]] = mul nsw i32 [[DIV22]], 1 -// CHECK9-NEXT: [[ADD24:%.*]] = add nsw i32 0, [[MUL23]] -// CHECK9-NEXT: store i32 [[ADD24]], i32* [[I6]], align 4 +// CHECK9-NEXT: [[SUB20:%.*]] = sub nsw i32 [[TMP40]], 0 +// CHECK9-NEXT: [[DIV21:%.*]] = sdiv i32 [[SUB20]], 1 +// CHECK9-NEXT: [[MUL22:%.*]] = mul nsw i32 [[DIV21]], 1 +// CHECK9-NEXT: [[ADD23:%.*]] = add nsw i32 0, [[MUL22]] +// CHECK9-NEXT: store i32 [[ADD23]], i32* [[I6]], align 4 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK9: .omp.final.done: // CHECK9-NEXT: br label [[OMP_PRECOND_END]] @@ -15105,34 +15101,33 @@ int main() { // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK10: omp.dispatch.cond: // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK10-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK10-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK10-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK10-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK10: cond.true: // CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK10-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK10-NEXT: br label [[COND_END:%.*]] // CHECK10: cond.false: // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK10-NEXT: br label [[COND_END]] // CHECK10: cond.end: -// CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK10-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK10-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK10: omp.dispatch.body: // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK10: omp.inner.for.cond: // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !47 -// CHECK10-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK10-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK10-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK10: omp.inner.for.body: // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -15145,34 +15140,34 @@ int main() { // CHECK10-NEXT: [[TMP25:%.*]] = load double, double* [[ARRAYIDX]], align 8, !llvm.access.group !47 // CHECK10-NEXT: [[TMP26:%.*]] = load double*, double** [[TMP3]], align 8, !llvm.access.group !47 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !47 -// CHECK10-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK10-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM13]] -// CHECK10-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX14]], align 8, !llvm.access.group !47 -// CHECK10-NEXT: [[ADD15:%.*]] = fadd double [[TMP25]], [[TMP28]] +// CHECK10-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK10-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds double, double* [[TMP26]], i64 [[IDXPROM12]] +// CHECK10-NEXT: [[TMP28:%.*]] = load double, double* [[ARRAYIDX13]], align 8, !llvm.access.group !47 +// CHECK10-NEXT: [[ADD14:%.*]] = fadd double [[TMP25]], [[TMP28]] // CHECK10-NEXT: [[TMP29:%.*]] = load double*, double** [[TMP1]], align 8, !llvm.access.group !47 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !47 -// CHECK10-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK10-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM16]] -// CHECK10-NEXT: store double [[ADD15]], double* [[ARRAYIDX17]], align 8, !llvm.access.group !47 +// CHECK10-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK10-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds double, double* [[TMP29]], i64 [[IDXPROM15]] +// CHECK10-NEXT: store double [[ADD14]], double* [[ARRAYIDX16]], align 8, !llvm.access.group !47 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK10: omp.body.continue: // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK10: omp.inner.for.inc: // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47 -// CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP31]], 1 -// CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47 +// CHECK10-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 +// CHECK10-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !47 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]] // CHECK10: omp.inner.for.end: // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK10: omp.dispatch.inc: // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK10-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] -// CHECK10-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] +// CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK10-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] -// CHECK10-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK10-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] +// CHECK10-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK10: omp.dispatch.end: // CHECK10-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -15183,11 +15178,11 @@ int main() { // CHECK10-NEXT: br i1 [[TMP39]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK10: .omp.final.then: // CHECK10-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 -// CHECK10-NEXT: [[SUB21:%.*]] = sub nsw i32 [[TMP40]], 0 -// CHECK10-NEXT: [[DIV22:%.*]] = sdiv i32 [[SUB21]], 1 -// CHECK10-NEXT: [[MUL23:%.*]] = mul nsw i32 [[DIV22]], 1 -// CHECK10-NEXT: [[ADD24:%.*]] = add nsw i32 0, [[MUL23]] -// CHECK10-NEXT: store i32 [[ADD24]], i32* [[I6]], align 4 +// CHECK10-NEXT: [[SUB20:%.*]] = sub nsw i32 [[TMP40]], 0 +// CHECK10-NEXT: [[DIV21:%.*]] = sdiv i32 [[SUB20]], 1 +// CHECK10-NEXT: [[MUL22:%.*]] = mul nsw i32 [[DIV21]], 1 +// CHECK10-NEXT: [[ADD23:%.*]] = add nsw i32 0, [[MUL22]] +// CHECK10-NEXT: store i32 [[ADD23]], i32* [[I6]], align 4 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK10: .omp.final.done: // CHECK10-NEXT: br label [[OMP_PRECOND_END]] @@ -17476,34 +17471,33 @@ int main() { // CHECK10-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK10: omp.dispatch.cond: // CHECK10-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CONV7:%.*]] = sext i32 [[TMP13]] to i64 // CHECK10-NEXT: [[TMP14:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK10-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP14]] +// CHECK10-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP14]] to i32 +// CHECK10-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP13]], [[CONV7]] // CHECK10-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK10: cond.true: // CHECK10-NEXT: [[TMP15:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK10-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP15]] to i32 // CHECK10-NEXT: br label [[COND_END:%.*]] // CHECK10: cond.false: // CHECK10-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CONV9:%.*]] = sext i32 [[TMP16]] to i64 // CHECK10-NEXT: br label [[COND_END]] // CHECK10: cond.end: -// CHECK10-NEXT: [[COND:%.*]] = phi i64 [ [[TMP15]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK10-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK10-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK10-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ] +// CHECK10-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: store i32 [[TMP17]], i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK10-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK10-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] -// CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK10-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]] +// CHECK10-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK10: omp.dispatch.body: // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK10: omp.inner.for.cond: // CHECK10-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !89 // CHECK10-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !89 -// CHECK10-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK10-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK10-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK10-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK10: omp.inner.for.body: // CHECK10-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !89 // CHECK10-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP22]], 1 @@ -17516,34 +17510,34 @@ int main() { // CHECK10-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group !89 // CHECK10-NEXT: [[TMP26:%.*]] = load i32*, i32** [[TMP3]], align 8, !llvm.access.group !89 // CHECK10-NEXT: [[TMP27:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !89 -// CHECK10-NEXT: [[IDXPROM13:%.*]] = sext i32 [[TMP27]] to i64 -// CHECK10-NEXT: [[ARRAYIDX14:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM13]] -// CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX14]], align 4, !llvm.access.group !89 -// CHECK10-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] +// CHECK10-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP27]] to i64 +// CHECK10-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds i32, i32* [[TMP26]], i64 [[IDXPROM12]] +// CHECK10-NEXT: [[TMP28:%.*]] = load i32, i32* [[ARRAYIDX13]], align 4, !llvm.access.group !89 +// CHECK10-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP25]], [[TMP28]] // CHECK10-NEXT: [[TMP29:%.*]] = load i32*, i32** [[TMP1]], align 8, !llvm.access.group !89 // CHECK10-NEXT: [[TMP30:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group !89 -// CHECK10-NEXT: [[IDXPROM16:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK10-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i64 [[IDXPROM16]] -// CHECK10-NEXT: store i32 [[ADD15]], i32* [[ARRAYIDX17]], align 4, !llvm.access.group !89 +// CHECK10-NEXT: [[IDXPROM15:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK10-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds i32, i32* [[TMP29]], i64 [[IDXPROM15]] +// CHECK10-NEXT: store i32 [[ADD14]], i32* [[ARRAYIDX16]], align 4, !llvm.access.group !89 // CHECK10-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK10: omp.body.continue: // CHECK10-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK10: omp.inner.for.inc: // CHECK10-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !89 -// CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP31]], 1 -// CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !89 +// CHECK10-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP31]], 1 +// CHECK10-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !89 // CHECK10-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP90:![0-9]+]] // CHECK10: omp.inner.for.end: // CHECK10-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK10: omp.dispatch.inc: // CHECK10-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK10-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] -// CHECK10-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK10-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP32]], [[TMP33]] +// CHECK10-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK10-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK10-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] -// CHECK10-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK10-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP34]], [[TMP35]] +// CHECK10-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK10-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK10: omp.dispatch.end: // CHECK10-NEXT: [[TMP36:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -17554,11 +17548,11 @@ int main() { // CHECK10-NEXT: br i1 [[TMP39]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK10: .omp.final.then: // CHECK10-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 -// CHECK10-NEXT: [[SUB21:%.*]] = sub nsw i32 [[TMP40]], 0 -// CHECK10-NEXT: [[DIV22:%.*]] = sdiv i32 [[SUB21]], 1 -// CHECK10-NEXT: [[MUL23:%.*]] = mul nsw i32 [[DIV22]], 1 -// CHECK10-NEXT: [[ADD24:%.*]] = add nsw i32 0, [[MUL23]] -// CHECK10-NEXT: store i32 [[ADD24]], i32* [[I6]], align 4 +// CHECK10-NEXT: [[SUB20:%.*]] = sub nsw i32 [[TMP40]], 0 +// CHECK10-NEXT: [[DIV21:%.*]] = sdiv i32 [[SUB20]], 1 +// CHECK10-NEXT: [[MUL22:%.*]] = mul nsw i32 [[DIV21]], 1 +// CHECK10-NEXT: [[ADD23:%.*]] = add nsw i32 0, [[MUL22]] +// CHECK10-NEXT: store i32 [[ADD23]], i32* [[I6]], align 4 // CHECK10-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK10: .omp.final.done: // CHECK10-NEXT: br label [[OMP_PRECOND_END]] @@ -19807,7 +19801,7 @@ int main() { // CHECK11: omp.dispatch.cond: // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK11-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK11: cond.true: // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -22102,7 +22096,7 @@ int main() { // CHECK11: omp.dispatch.cond: // CHECK11-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK11-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK11: cond.true: // CHECK11-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -24407,7 +24401,7 @@ int main() { // CHECK12: omp.dispatch.cond: // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK12-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK12: cond.true: // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -26702,7 +26696,7 @@ int main() { // CHECK12: omp.dispatch.cond: // CHECK12-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK12-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK12-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP13]], [[TMP14]] +// CHECK12-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]] // CHECK12-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK12: cond.true: // CHECK12-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 diff --git a/clang/test/OpenMP/for_reduction_codegen_UDR.cpp b/clang/test/OpenMP/for_reduction_codegen_UDR.cpp index d778cab63507b..d33753f0383e8 100644 --- a/clang/test/OpenMP/for_reduction_codegen_UDR.cpp +++ b/clang/test/OpenMP/for_reduction_codegen_UDR.cpp @@ -510,7 +510,6 @@ int main() { // CHECK1-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 8 // CHECK1-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 8 // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[S1]]) // CHECK1-NEXT: call void @.omp_initializer.(%struct.S* [[S1]], %struct.S* [[TMP0]]) // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: @@ -790,7 +789,6 @@ int main() { // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK1-NEXT: call void @.omp_initializer..3(float* [[T_VAR3]], float* [[TMP0]]) // CHECK1-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 -// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[VAR4]]) // CHECK1-NEXT: [[TMP8:%.*]] = bitcast %struct.S.0* [[VAR4]] to i8* // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP8]], i64 4 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* @@ -799,7 +797,6 @@ int main() { // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[ADD_PTR5]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP9]], %struct.BaseS1* [[TMP11]]) // CHECK1-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[_TMP6]], align 8 -// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[VAR17]]) // CHECK1-NEXT: call void @.omp_initializer..7(%struct.S.0* [[VAR17]], %struct.S.0* [[TMP2]]) // CHECK1-NEXT: [[TMP12:%.*]] = load float, float* @.init, align 4 // CHECK1-NEXT: store float [[TMP12]], float* [[T_VAR18]], align 4 @@ -1170,24 +1167,12 @@ int main() { // CHECK1-NEXT: [[TMP29:%.*]] = mul nuw i64 [[TMP28]], ptrtoint (%struct.S.0* getelementptr ([[STRUCT_S_0]], %struct.S.0* null, i32 1) to i64) // CHECK1-NEXT: [[VLA16:%.*]] = alloca [[STRUCT_S_0]], i64 [[TMP28]], align 16 // CHECK1-NEXT: store i64 [[TMP28]], i64* [[__VLA_EXPR1]], align 8 -// CHECK1-NEXT: [[ISEMPTY:%.*]] = icmp eq i64 [[TMP28]], 0 -// CHECK1-NEXT: br i1 [[ISEMPTY]], label [[ARRAYCTOR_CONT:%.*]], label [[NEW_CTORLOOP:%.*]] -// CHECK1: new.ctorloop: -// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[VLA16]], i64 [[TMP28]] -// CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK1: arrayctor.loop: -// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[VLA16]], [[NEW_CTORLOOP]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT]], label [[ARRAYCTOR_LOOP]] -// CHECK1: arrayctor.cont: // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[VLA16]], i64 [[TMP28]] // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY17:%.*]] = icmp eq %struct.S.0* [[VLA16]], [[TMP30]] // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY17]], label [[OMP_ARRAYINIT_DONE25:%.*]], label [[OMP_ARRAYINIT_BODY18:%.*]] // CHECK1: omp.arrayinit.body18: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST19:%.*]] = phi %struct.S.0* [ [[ARRAYIDX10]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT22:%.*]], [[OMP_ARRAYINIT_BODY18]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST20:%.*]] = phi %struct.S.0* [ [[VLA16]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT23:%.*]], [[OMP_ARRAYINIT_BODY18]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST19:%.*]] = phi %struct.S.0* [ [[ARRAYIDX10]], [[OMP_ARRAYINIT_DONE]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT22:%.*]], [[OMP_ARRAYINIT_BODY18]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST20:%.*]] = phi %struct.S.0* [ [[VLA16]], [[OMP_ARRAYINIT_DONE]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT23:%.*]], [[OMP_ARRAYINIT_BODY18]] ] // CHECK1-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST20]] to i8* // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP31]], i64 4 // CHECK1-NEXT: [[TMP32:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* @@ -1511,35 +1496,25 @@ int main() { // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] // CHECK1: omp.arrayinit.done: // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [10 x [4 x %struct.S.0]], [10 x [4 x %struct.S.0]]* [[ARRS5]], i32 0, i32 0, i32 0 -// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 40 -// CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK1: arrayctor.loop: -// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[OMP_ARRAYINIT_DONE]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] -// CHECK1: arrayctor.cont: -// CHECK1-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [10 x [4 x %struct.S.0]], [10 x [4 x %struct.S.0]]* [[ARRS5]], i32 0, i32 0, i32 0 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast [10 x [4 x %struct.S.0]]* [[TMP3]] to %struct.S.0* -// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i64 40 -// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY7:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN6]], [[TMP10]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY7]], label [[OMP_ARRAYINIT_DONE15:%.*]], label [[OMP_ARRAYINIT_BODY8:%.*]] -// CHECK1: omp.arrayinit.body8: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi %struct.S.0* [ [[TMP9]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT12:%.*]], [[OMP_ARRAYINIT_BODY8]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN6]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT13:%.*]], [[OMP_ARRAYINIT_BODY8]] ] -// CHECK1-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST10]] to i8* +// CHECK1-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 40 +// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY6:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP10]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY6]], label [[OMP_ARRAYINIT_DONE14:%.*]], label [[OMP_ARRAYINIT_BODY7:%.*]] +// CHECK1: omp.arrayinit.body7: +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST8:%.*]] = phi %struct.S.0* [ [[TMP9]], [[OMP_ARRAYINIT_DONE]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYINIT_BODY7]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST9:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[OMP_ARRAYINIT_DONE]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT12:%.*]], [[OMP_ARRAYINIT_BODY7]] ] +// CHECK1-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]] to i8* // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP11]], i64 4 // CHECK1-NEXT: [[TMP12:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* -// CHECK1-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST9]] to i8* -// CHECK1-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i8, i8* [[TMP13]], i64 4 -// CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[ADD_PTR11]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]] to i8* +// CHECK1-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i8, i8* [[TMP13]], i64 4 +// CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[ADD_PTR10]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP12]], %struct.BaseS1* [[TMP14]]) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT12]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT13]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE14:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT13]], [[TMP10]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYINIT_DONE15]], label [[OMP_ARRAYINIT_BODY8]] -// CHECK1: omp.arrayinit.done15: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT12]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT12]], [[TMP10]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYINIT_DONE14]], label [[OMP_ARRAYINIT_BODY7]] +// CHECK1: omp.arrayinit.done14: // CHECK1-NEXT: [[LHS_BEGIN:%.*]] = bitcast [10 x [4 x %struct.S.0]]* [[TMP3]] to %struct.S.0* // CHECK1-NEXT: [[RHS_BEGIN:%.*]] = bitcast [10 x [4 x %struct.S.0]]* [[ARRS5]] to %struct.S.0* // CHECK1-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -1562,8 +1537,8 @@ int main() { // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP16:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK1-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] +// CHECK1-NEXT: [[CMP15:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK1-NEXT: br i1 [[CMP15]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] // CHECK1: omp.inner.for.cond.cleanup: // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: @@ -1575,17 +1550,17 @@ int main() { // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA3]], i64 [[TMP23]] // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 -// CHECK1-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM]] -// CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX17]], align 4 +// CHECK1-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM]] +// CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX16]], align 4 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP25]], 1 -// CHECK1-NEXT: store i32 [[INC]], i32* [[ARRAYIDX17]], align 4 +// CHECK1-NEXT: store i32 [[INC]], i32* [[ARRAYIDX16]], align 4 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK1: omp.body.continue: // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP26]], 1 -// CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP26]], 1 +// CHECK1-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] @@ -1613,88 +1588,88 @@ int main() { // CHECK1: .omp.reduction.case1: // CHECK1-NEXT: [[TMP39:%.*]] = getelementptr i32, i32* [[TMP2]], i64 [[TMP6]] // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[TMP2]], [[TMP39]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE23:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE22:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] // CHECK1: omp.arraycpy.body: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST19:%.*]] = phi i32* [ [[VLA3]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST20:%.*]] = phi i32* [ [[TMP2]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT21:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK1-NEXT: call void @.omp_combiner..10(i32* [[OMP_ARRAYCPY_DESTELEMENTPAST20]], i32* [[OMP_ARRAYCPY_SRCELEMENTPAST19]]) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT21]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST20]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST19]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE22:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT21]], [[TMP39]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE22]], label [[OMP_ARRAYCPY_DONE23]], label [[OMP_ARRAYCPY_BODY]] -// CHECK1: omp.arraycpy.done23: +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST18:%.*]] = phi i32* [ [[VLA3]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST19:%.*]] = phi i32* [ [[TMP2]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT20:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK1-NEXT: call void @.omp_combiner..10(i32* [[OMP_ARRAYCPY_DESTELEMENTPAST19]], i32* [[OMP_ARRAYCPY_SRCELEMENTPAST18]]) +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT20]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST19]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST18]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE21:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT20]], [[TMP39]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_DONE22]], label [[OMP_ARRAYCPY_BODY]] +// CHECK1: omp.arraycpy.done22: // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[LHS_BEGIN]], i64 40 -// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY24:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP40]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY24]], label [[OMP_ARRAYCPY_DONE33:%.*]], label [[OMP_ARRAYCPY_BODY25:%.*]] -// CHECK1: omp.arraycpy.body25: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST26:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[OMP_ARRAYCPY_DONE23]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT31:%.*]], [[OMP_ARRAYCPY_BODY25]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST27:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[OMP_ARRAYCPY_DONE23]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT30:%.*]], [[OMP_ARRAYCPY_BODY25]] ] -// CHECK1-NEXT: [[TMP41:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST27]] to i8* -// CHECK1-NEXT: [[ADD_PTR28:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 -// CHECK1-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR28]] to %struct.BaseS1* -// CHECK1-NEXT: [[TMP43:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST26]] to i8* -// CHECK1-NEXT: [[ADD_PTR29:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 -// CHECK1-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR29]] to %struct.BaseS1* +// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY23:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP40]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY23]], label [[OMP_ARRAYCPY_DONE32:%.*]], label [[OMP_ARRAYCPY_BODY24:%.*]] +// CHECK1: omp.arraycpy.body24: +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST25:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[OMP_ARRAYCPY_DONE22]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT30:%.*]], [[OMP_ARRAYCPY_BODY24]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST26:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[OMP_ARRAYCPY_DONE22]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT29:%.*]], [[OMP_ARRAYCPY_BODY24]] ] +// CHECK1-NEXT: [[TMP41:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST26]] to i8* +// CHECK1-NEXT: [[ADD_PTR27:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 +// CHECK1-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR27]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP43:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST25]] to i8* +// CHECK1-NEXT: [[ADD_PTR28:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 +// CHECK1-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR28]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP42]], %struct.BaseS1* [[TMP44]]) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT30]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST27]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT31]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST26]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE32:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT30]], [[TMP40]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE32]], label [[OMP_ARRAYCPY_DONE33]], label [[OMP_ARRAYCPY_BODY25]] -// CHECK1: omp.arraycpy.done33: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT29]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST26]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT30]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST25]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE31:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT29]], [[TMP40]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE31]], label [[OMP_ARRAYCPY_DONE32]], label [[OMP_ARRAYCPY_BODY24]] +// CHECK1: omp.arraycpy.done32: // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK1: .omp.reduction.case2: // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr i32, i32* [[TMP2]], i64 [[TMP6]] -// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY34:%.*]] = icmp eq i32* [[TMP2]], [[TMP45]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY34]], label [[OMP_ARRAYCPY_DONE41:%.*]], label [[OMP_ARRAYCPY_BODY35:%.*]] -// CHECK1: omp.arraycpy.body35: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST36:%.*]] = phi i32* [ [[VLA3]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT39:%.*]], [[OMP_ARRAYCPY_BODY35]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST37:%.*]] = phi i32* [ [[TMP2]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT38:%.*]], [[OMP_ARRAYCPY_BODY35]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY33:%.*]] = icmp eq i32* [[TMP2]], [[TMP45]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY33]], label [[OMP_ARRAYCPY_DONE40:%.*]], label [[OMP_ARRAYCPY_BODY34:%.*]] +// CHECK1: omp.arraycpy.body34: +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST35:%.*]] = phi i32* [ [[VLA3]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT38:%.*]], [[OMP_ARRAYCPY_BODY34]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST36:%.*]] = phi i32* [ [[TMP2]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT37:%.*]], [[OMP_ARRAYCPY_BODY34]] ] // CHECK1-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK1-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: call void @.omp_combiner..10(i32* [[OMP_ARRAYCPY_DESTELEMENTPAST37]], i32* [[OMP_ARRAYCPY_SRCELEMENTPAST36]]) +// CHECK1-NEXT: call void @.omp_combiner..10(i32* [[OMP_ARRAYCPY_DESTELEMENTPAST36]], i32* [[OMP_ARRAYCPY_SRCELEMENTPAST35]]) // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT38]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST37]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT39]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST36]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE40:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT38]], [[TMP45]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE40]], label [[OMP_ARRAYCPY_DONE41]], label [[OMP_ARRAYCPY_BODY35]] -// CHECK1: omp.arraycpy.done41: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT37]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST36]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT38]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST35]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE39:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT37]], [[TMP45]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE39]], label [[OMP_ARRAYCPY_DONE40]], label [[OMP_ARRAYCPY_BODY34]] +// CHECK1: omp.arraycpy.done40: // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[LHS_BEGIN]], i64 40 -// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY42:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP48]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY42]], label [[OMP_ARRAYCPY_DONE51:%.*]], label [[OMP_ARRAYCPY_BODY43:%.*]] -// CHECK1: omp.arraycpy.body43: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST44:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[OMP_ARRAYCPY_DONE41]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT49:%.*]], [[OMP_ARRAYCPY_BODY43]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST45:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[OMP_ARRAYCPY_DONE41]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT48:%.*]], [[OMP_ARRAYCPY_BODY43]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY41:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP48]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY41]], label [[OMP_ARRAYCPY_DONE50:%.*]], label [[OMP_ARRAYCPY_BODY42:%.*]] +// CHECK1: omp.arraycpy.body42: +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST43:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[OMP_ARRAYCPY_DONE40]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT48:%.*]], [[OMP_ARRAYCPY_BODY42]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST44:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[OMP_ARRAYCPY_DONE40]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT47:%.*]], [[OMP_ARRAYCPY_BODY42]] ] // CHECK1-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK1-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: [[TMP51:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST45]] to i8* -// CHECK1-NEXT: [[ADD_PTR46:%.*]] = getelementptr inbounds i8, i8* [[TMP51]], i64 4 -// CHECK1-NEXT: [[TMP52:%.*]] = bitcast i8* [[ADD_PTR46]] to %struct.BaseS1* -// CHECK1-NEXT: [[TMP53:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST44]] to i8* -// CHECK1-NEXT: [[ADD_PTR47:%.*]] = getelementptr inbounds i8, i8* [[TMP53]], i64 4 -// CHECK1-NEXT: [[TMP54:%.*]] = bitcast i8* [[ADD_PTR47]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP51:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST44]] to i8* +// CHECK1-NEXT: [[ADD_PTR45:%.*]] = getelementptr inbounds i8, i8* [[TMP51]], i64 4 +// CHECK1-NEXT: [[TMP52:%.*]] = bitcast i8* [[ADD_PTR45]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP53:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST43]] to i8* +// CHECK1-NEXT: [[ADD_PTR46:%.*]] = getelementptr inbounds i8, i8* [[TMP53]], i64 4 +// CHECK1-NEXT: [[TMP54:%.*]] = bitcast i8* [[ADD_PTR46]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP52]], %struct.BaseS1* [[TMP54]]) // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT48]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST45]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT49]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST44]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE50:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT48]], [[TMP48]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE50]], label [[OMP_ARRAYCPY_DONE51]], label [[OMP_ARRAYCPY_BODY43]] -// CHECK1: omp.arraycpy.done51: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT47]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST44]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT48]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST43]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE49:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT47]], [[TMP48]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE49]], label [[OMP_ARRAYCPY_DONE50]], label [[OMP_ARRAYCPY_BODY42]] +// CHECK1: omp.arraycpy.done50: // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK1: .omp.reduction.default: -// CHECK1-NEXT: [[ARRAY_BEGIN52:%.*]] = getelementptr inbounds [10 x [4 x %struct.S.0]], [10 x [4 x %struct.S.0]]* [[ARRS5]], i32 0, i32 0, i32 0 -// CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN52]], i64 40 +// CHECK1-NEXT: [[ARRAY_BEGIN51:%.*]] = getelementptr inbounds [10 x [4 x %struct.S.0]], [10 x [4 x %struct.S.0]]* [[ARRS5]], i32 0, i32 0, i32 0 +// CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN51]], i64 40 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] // CHECK1: arraydestroy.body: // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP55]], [[DOTOMP_REDUCTION_DEFAULT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] -// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN52]] -// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE53:%.*]], label [[ARRAYDESTROY_BODY]] -// CHECK1: arraydestroy.done53: +// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN51]] +// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE52:%.*]], label [[ARRAYDESTROY_BODY]] +// CHECK1: arraydestroy.done52: // CHECK1-NEXT: [[TMP56:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 // CHECK1-NEXT: call void @llvm.stackrestore(i8* [[TMP56]]) // CHECK1-NEXT: [[TMP57:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -1806,24 +1781,12 @@ int main() { // CHECK1-NEXT: store i8* [[TMP11]], i8** [[SAVED_STACK]], align 8 // CHECK1-NEXT: [[VLA:%.*]] = alloca [[STRUCT_S_0]], i64 [[TMP9]], align 16 // CHECK1-NEXT: store i64 [[TMP9]], i64* [[__VLA_EXPR0]], align 8 -// CHECK1-NEXT: [[ISEMPTY:%.*]] = icmp eq i64 [[TMP9]], 0 -// CHECK1-NEXT: br i1 [[ISEMPTY]], label [[ARRAYCTOR_CONT:%.*]], label [[NEW_CTORLOOP:%.*]] -// CHECK1: new.ctorloop: -// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[VLA]], i64 [[TMP9]] -// CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK1: arrayctor.loop: -// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[VLA]], [[NEW_CTORLOOP]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT]], label [[ARRAYCTOR_LOOP]] -// CHECK1: arrayctor.cont: // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[VLA]], i64 [[TMP9]] // CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[VLA]], [[TMP12]] // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] // CHECK1: omp.arrayinit.body: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX1]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[VLA]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX1]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[VLA]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYINIT_BODY]] ] // CHECK1-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP13]], i64 4 // CHECK1-NEXT: [[TMP14:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* @@ -2034,32 +1997,22 @@ int main() { // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[TMP0]], i64 0, i64 0 // CHECK1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[TMP0]], i64 0, i64 4 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[VVAR22]], i32 0, i32 0 -// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 5 -// CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK1: arrayctor.loop: -// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] -// CHECK1: arrayctor.cont: -// CHECK1-NEXT: [[ARRAY_BEGIN3:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[VVAR22]], i32 0, i32 0 -// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN3]], i64 5 -// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN3]], [[TMP1]] +// CHECK1-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 5 +// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP1]] // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] // CHECK1: omp.arrayinit.body: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN3]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYINIT_BODY]] ] // CHECK1-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 4 // CHECK1-NEXT: [[TMP3:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* // CHECK1-NEXT: [[TMP4:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* -// CHECK1-NEXT: [[ADD_PTR4:%.*]] = getelementptr inbounds i8, i8* [[TMP4]], i64 4 -// CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[ADD_PTR4]] to %struct.BaseS1* +// CHECK1-NEXT: [[ADD_PTR3:%.*]] = getelementptr inbounds i8, i8* [[TMP4]], i64 4 +// CHECK1-NEXT: [[TMP5:%.*]] = bitcast i8* [[ADD_PTR3]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP3]], %struct.BaseS1* [[TMP5]]) // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP1]] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP1]] // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] // CHECK1: omp.arrayinit.done: // CHECK1-NEXT: [[TMP6:%.*]] = bitcast [5 x %struct.S.0]* [[TMP0]] to %struct.S.0* @@ -2091,8 +2044,8 @@ int main() { // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] -// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] +// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] +// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] // CHECK1: omp.inner.for.cond.cleanup: // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: @@ -2105,8 +2058,8 @@ int main() { // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], 1 -// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 +// CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] @@ -2128,60 +2081,60 @@ int main() { // CHECK1: .omp.reduction.case1: // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAYIDX]], i64 5 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP31]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] // CHECK1: omp.arraycpy.body: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST8:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST9:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK1-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]] to i8* -// CHECK1-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i8, i8* [[TMP32]], i64 4 -// CHECK1-NEXT: [[TMP33:%.*]] = bitcast i8* [[ADD_PTR10]] to %struct.BaseS1* -// CHECK1-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]] to i8* -// CHECK1-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i8, i8* [[TMP34]], i64 4 -// CHECK1-NEXT: [[TMP35:%.*]] = bitcast i8* [[ADD_PTR11]] to %struct.BaseS1* +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST7:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST8:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK1-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST8]] to i8* +// CHECK1-NEXT: [[ADD_PTR9:%.*]] = getelementptr inbounds i8, i8* [[TMP32]], i64 4 +// CHECK1-NEXT: [[TMP33:%.*]] = bitcast i8* [[ADD_PTR9]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST7]] to i8* +// CHECK1-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i8, i8* [[TMP34]], i64 4 +// CHECK1-NEXT: [[TMP35:%.*]] = bitcast i8* [[ADD_PTR10]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP33]], %struct.BaseS1* [[TMP35]]) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT12]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT12]], [[TMP31]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] -// CHECK1: omp.arraycpy.done14: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST8]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST7]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE12:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT11]], [[TMP31]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] +// CHECK1: omp.arraycpy.done13: // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP28]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK1: .omp.reduction.case2: // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAYIDX]], i64 5 -// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY15:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP36]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY15]], label [[OMP_ARRAYCPY_DONE24:%.*]], label [[OMP_ARRAYCPY_BODY16:%.*]] -// CHECK1: omp.arraycpy.body16: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST17:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT22:%.*]], [[OMP_ARRAYCPY_BODY16]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST18:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT21:%.*]], [[OMP_ARRAYCPY_BODY16]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY14:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP36]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY14]], label [[OMP_ARRAYCPY_DONE23:%.*]], label [[OMP_ARRAYCPY_BODY15:%.*]] +// CHECK1: omp.arraycpy.body15: +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST16:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT21:%.*]], [[OMP_ARRAYCPY_BODY15]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST17:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT20:%.*]], [[OMP_ARRAYCPY_BODY15]] ] // CHECK1-NEXT: [[TMP37:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP37]], align 4 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP38]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: [[TMP39:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST18]] to i8* -// CHECK1-NEXT: [[ADD_PTR19:%.*]] = getelementptr inbounds i8, i8* [[TMP39]], i64 4 -// CHECK1-NEXT: [[TMP40:%.*]] = bitcast i8* [[ADD_PTR19]] to %struct.BaseS1* -// CHECK1-NEXT: [[TMP41:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST17]] to i8* -// CHECK1-NEXT: [[ADD_PTR20:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 -// CHECK1-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR20]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP39:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST17]] to i8* +// CHECK1-NEXT: [[ADD_PTR18:%.*]] = getelementptr inbounds i8, i8* [[TMP39]], i64 4 +// CHECK1-NEXT: [[TMP40:%.*]] = bitcast i8* [[ADD_PTR18]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP41:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST16]] to i8* +// CHECK1-NEXT: [[ADD_PTR19:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 +// CHECK1-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR19]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP40]], %struct.BaseS1* [[TMP42]]) // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP38]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT21]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST18]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT22]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST17]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE23:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT21]], [[TMP36]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE23]], label [[OMP_ARRAYCPY_DONE24]], label [[OMP_ARRAYCPY_BODY16]] -// CHECK1: omp.arraycpy.done24: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT20]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST17]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT21]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST16]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE22:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT20]], [[TMP36]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE22]], label [[OMP_ARRAYCPY_DONE23]], label [[OMP_ARRAYCPY_BODY15]] +// CHECK1: omp.arraycpy.done23: // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP28]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK1: .omp.reduction.default: -// CHECK1-NEXT: [[ARRAY_BEGIN25:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[VVAR22]], i32 0, i32 0 -// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN25]], i64 5 +// CHECK1-NEXT: [[ARRAY_BEGIN24:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[VVAR22]], i32 0, i32 0 +// CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN24]], i64 5 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] // CHECK1: arraydestroy.body: // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP43]], [[DOTOMP_REDUCTION_DEFAULT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] -// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN25]] -// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE26:%.*]], label [[ARRAYDESTROY_BODY]] -// CHECK1: arraydestroy.done26: +// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN24]] +// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE25:%.*]], label [[ARRAYDESTROY_BODY]] +// CHECK1: arraydestroy.done25: // CHECK1-NEXT: [[TMP44:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[TMP44]], align 4 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP45]]) @@ -2241,7 +2194,7 @@ int main() { // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK1-NEXT: [[VAR34:%.*]] = alloca [2 x %struct.S.0], align 16 -// CHECK1-NEXT: [[_TMP8:%.*]] = alloca [4 x %struct.S.0]*, align 8 +// CHECK1-NEXT: [[_TMP7:%.*]] = alloca [4 x %struct.S.0]*, align 8 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -2260,32 +2213,22 @@ int main() { // CHECK1-NEXT: [[TMP3:%.*]] = load [4 x %struct.S.0]*, [4 x %struct.S.0]** [[_TMP1]], align 8 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [4 x %struct.S.0], [4 x %struct.S.0]* [[TMP3]], i64 0, i64 2 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[VAR34]], i32 0, i32 0 -// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 -// CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK1: arrayctor.loop: -// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] -// CHECK1: arrayctor.cont: -// CHECK1-NEXT: [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[VAR34]], i32 0, i32 0 -// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN5]], i64 2 -// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN5]], [[TMP4]] +// CHECK1-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 +// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP4]] // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] // CHECK1: omp.arrayinit.body: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN5]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT7:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT6:%.*]], [[OMP_ARRAYINIT_BODY]] ] // CHECK1-NEXT: [[TMP5:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP5]], i64 4 // CHECK1-NEXT: [[TMP6:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* // CHECK1-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* -// CHECK1-NEXT: [[ADD_PTR6:%.*]] = getelementptr inbounds i8, i8* [[TMP7]], i64 4 -// CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[ADD_PTR6]] to %struct.BaseS1* +// CHECK1-NEXT: [[ADD_PTR5:%.*]] = getelementptr inbounds i8, i8* [[TMP7]], i64 4 +// CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[ADD_PTR5]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP6]], %struct.BaseS1* [[TMP8]]) // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT7]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT7]], [[TMP4]] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT6]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT6]], [[TMP4]] // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] // CHECK1: omp.arrayinit.done: // CHECK1-NEXT: [[TMP9:%.*]] = load [4 x %struct.S.0]*, [4 x %struct.S.0]** [[_TMP1]], align 8 @@ -2297,7 +2240,7 @@ int main() { // CHECK1-NEXT: [[TMP15:%.*]] = bitcast [2 x %struct.S.0]* [[VAR34]] to %struct.S.0* // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[TMP15]], i64 [[TMP14]] // CHECK1-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP16]] to [4 x %struct.S.0]* -// CHECK1-NEXT: store [4 x %struct.S.0]* [[TMP17]], [4 x %struct.S.0]** [[_TMP8]], align 8 +// CHECK1-NEXT: store [4 x %struct.S.0]* [[TMP17]], [4 x %struct.S.0]** [[_TMP7]], align 8 // CHECK1-NEXT: [[RHS_BEGIN:%.*]] = bitcast [2 x %struct.S.0]* [[VAR34]] to %struct.S.0* // CHECK1-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 @@ -2319,8 +2262,8 @@ int main() { // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP23]], [[TMP24]] -// CHECK1-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] +// CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP23]], [[TMP24]] +// CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] // CHECK1: omp.inner.for.cond.cleanup: // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: @@ -2333,8 +2276,8 @@ int main() { // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP26]], 1 -// CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], 1 +// CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] @@ -2356,60 +2299,60 @@ int main() { // CHECK1: .omp.reduction.case1: // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAYIDX]], i64 2 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP35]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE17:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE16:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] // CHECK1: omp.arraycpy.body: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST11:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST12:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT15:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK1-NEXT: [[TMP36:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST12]] to i8* -// CHECK1-NEXT: [[ADD_PTR13:%.*]] = getelementptr inbounds i8, i8* [[TMP36]], i64 4 -// CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8* [[ADD_PTR13]] to %struct.BaseS1* -// CHECK1-NEXT: [[TMP38:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST11]] to i8* -// CHECK1-NEXT: [[ADD_PTR14:%.*]] = getelementptr inbounds i8, i8* [[TMP38]], i64 4 -// CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8* [[ADD_PTR14]] to %struct.BaseS1* +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT14:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK1-NEXT: [[TMP36:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] to i8* +// CHECK1-NEXT: [[ADD_PTR12:%.*]] = getelementptr inbounds i8, i8* [[TMP36]], i64 4 +// CHECK1-NEXT: [[TMP37:%.*]] = bitcast i8* [[ADD_PTR12]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP38:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST10]] to i8* +// CHECK1-NEXT: [[ADD_PTR13:%.*]] = getelementptr inbounds i8, i8* [[TMP38]], i64 4 +// CHECK1-NEXT: [[TMP39:%.*]] = bitcast i8* [[ADD_PTR13]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP37]], %struct.BaseS1* [[TMP39]]) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT15]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST12]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST11]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE16:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT15]], [[TMP35]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE16]], label [[OMP_ARRAYCPY_DONE17]], label [[OMP_ARRAYCPY_BODY]] -// CHECK1: omp.arraycpy.done17: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT14]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE15:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT14]], [[TMP35]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE15]], label [[OMP_ARRAYCPY_DONE16]], label [[OMP_ARRAYCPY_BODY]] +// CHECK1: omp.arraycpy.done16: // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK1: .omp.reduction.case2: // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAYIDX]], i64 2 -// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY18:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP40]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY18]], label [[OMP_ARRAYCPY_DONE27:%.*]], label [[OMP_ARRAYCPY_BODY19:%.*]] -// CHECK1: omp.arraycpy.body19: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST20:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT25:%.*]], [[OMP_ARRAYCPY_BODY19]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST21:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT24:%.*]], [[OMP_ARRAYCPY_BODY19]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY17:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP40]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY17]], label [[OMP_ARRAYCPY_DONE26:%.*]], label [[OMP_ARRAYCPY_BODY18:%.*]] +// CHECK1: omp.arraycpy.body18: +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST19:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT24:%.*]], [[OMP_ARRAYCPY_BODY18]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST20:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT23:%.*]], [[OMP_ARRAYCPY_BODY18]] ] // CHECK1-NEXT: [[TMP41:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[TMP41]], align 4 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP42]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: [[TMP43:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST21]] to i8* -// CHECK1-NEXT: [[ADD_PTR22:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 -// CHECK1-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR22]] to %struct.BaseS1* -// CHECK1-NEXT: [[TMP45:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST20]] to i8* -// CHECK1-NEXT: [[ADD_PTR23:%.*]] = getelementptr inbounds i8, i8* [[TMP45]], i64 4 -// CHECK1-NEXT: [[TMP46:%.*]] = bitcast i8* [[ADD_PTR23]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP43:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST20]] to i8* +// CHECK1-NEXT: [[ADD_PTR21:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 +// CHECK1-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR21]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP45:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST19]] to i8* +// CHECK1-NEXT: [[ADD_PTR22:%.*]] = getelementptr inbounds i8, i8* [[TMP45]], i64 4 +// CHECK1-NEXT: [[TMP46:%.*]] = bitcast i8* [[ADD_PTR22]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP44]], %struct.BaseS1* [[TMP46]]) // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP42]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT24]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST21]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT25]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST20]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE26:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT24]], [[TMP40]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE26]], label [[OMP_ARRAYCPY_DONE27]], label [[OMP_ARRAYCPY_BODY19]] -// CHECK1: omp.arraycpy.done27: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT23]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST20]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT24]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST19]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE25:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT23]], [[TMP40]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE25]], label [[OMP_ARRAYCPY_DONE26]], label [[OMP_ARRAYCPY_BODY18]] +// CHECK1: omp.arraycpy.done26: // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK1: .omp.reduction.default: -// CHECK1-NEXT: [[ARRAY_BEGIN28:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[VAR34]], i32 0, i32 0 -// CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN28]], i64 2 +// CHECK1-NEXT: [[ARRAY_BEGIN27:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[VAR34]], i32 0, i32 0 +// CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN27]], i64 2 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] // CHECK1: arraydestroy.body: // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP47]], [[DOTOMP_REDUCTION_DEFAULT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] -// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN28]] -// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE29:%.*]], label [[ARRAYDESTROY_BODY]] -// CHECK1: arraydestroy.done29: +// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN27]] +// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE28:%.*]], label [[ARRAYDESTROY_BODY]] +// CHECK1: arraydestroy.done28: // CHECK1-NEXT: [[TMP48:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK1-NEXT: [[TMP49:%.*]] = load i32, i32* [[TMP48]], align 4 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP49]]) @@ -2468,7 +2411,7 @@ int main() { // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 -// CHECK1-NEXT: [[_TMP6:%.*]] = alloca [4 x %struct.S.0]*, align 8 +// CHECK1-NEXT: [[_TMP5:%.*]] = alloca [4 x %struct.S.0]*, align 8 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK1-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 // CHECK1-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -2488,36 +2431,26 @@ int main() { // CHECK1-NEXT: [[DOTVAR3__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP4]], i64 48, i8* inttoptr (i64 6 to i8*)) // CHECK1-NEXT: [[DOTVAR3__ADDR:%.*]] = bitcast i8* [[DOTVAR3__VOID_ADDR]] to [4 x %struct.S.0]* // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [4 x %struct.S.0], [4 x %struct.S.0]* [[DOTVAR3__ADDR]], i32 0, i32 0 -// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 4 -// CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK1: arrayctor.loop: -// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK1-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] -// CHECK1: arrayctor.cont: -// CHECK1-NEXT: [[ARRAY_BEGIN3:%.*]] = getelementptr inbounds [4 x %struct.S.0], [4 x %struct.S.0]* [[DOTVAR3__ADDR]], i32 0, i32 0 // CHECK1-NEXT: [[TMP5:%.*]] = bitcast [4 x %struct.S.0]* [[TMP2]] to %struct.S.0* -// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN3]], i64 4 -// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN3]], [[TMP6]] +// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 4 +// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP6]] // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] // CHECK1: omp.arrayinit.body: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP5]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN3]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYINIT_BODY]] ] // CHECK1-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP7]], i64 4 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* // CHECK1-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* -// CHECK1-NEXT: [[ADD_PTR4:%.*]] = getelementptr inbounds i8, i8* [[TMP9]], i64 4 -// CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8* [[ADD_PTR4]] to %struct.BaseS1* +// CHECK1-NEXT: [[ADD_PTR3:%.*]] = getelementptr inbounds i8, i8* [[TMP9]], i64 4 +// CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8* [[ADD_PTR3]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP8]], %struct.BaseS1* [[TMP10]]) // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP6]] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP6]] // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] // CHECK1: omp.arrayinit.done: -// CHECK1-NEXT: store [4 x %struct.S.0]* [[DOTVAR3__ADDR]], [4 x %struct.S.0]** [[_TMP6]], align 8 +// CHECK1-NEXT: store [4 x %struct.S.0]* [[DOTVAR3__ADDR]], [4 x %struct.S.0]** [[_TMP5]], align 8 // CHECK1-NEXT: [[LHS_BEGIN:%.*]] = bitcast [4 x %struct.S.0]* [[TMP2]] to %struct.S.0* // CHECK1-NEXT: [[RHS_BEGIN:%.*]] = bitcast [4 x %struct.S.0]* [[DOTVAR3__ADDR]] to %struct.S.0* // CHECK1-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) @@ -2538,8 +2471,8 @@ int main() { // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] -// CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] +// CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] +// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] // CHECK1: omp.inner.for.cond.cleanup: // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: @@ -2552,8 +2485,8 @@ int main() { // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] @@ -2571,58 +2504,58 @@ int main() { // CHECK1: .omp.reduction.case1: // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[LHS_BEGIN]], i64 4 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP22]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE15:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] // CHECK1: omp.arraycpy.body: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT13:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK1-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST10]] to i8* -// CHECK1-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i8, i8* [[TMP23]], i64 4 -// CHECK1-NEXT: [[TMP24:%.*]] = bitcast i8* [[ADD_PTR11]] to %struct.BaseS1* -// CHECK1-NEXT: [[TMP25:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST9]] to i8* -// CHECK1-NEXT: [[ADD_PTR12:%.*]] = getelementptr inbounds i8, i8* [[TMP25]], i64 4 -// CHECK1-NEXT: [[TMP26:%.*]] = bitcast i8* [[ADD_PTR12]] to %struct.BaseS1* +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST8:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST9:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK1-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]] to i8* +// CHECK1-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i8, i8* [[TMP23]], i64 4 +// CHECK1-NEXT: [[TMP24:%.*]] = bitcast i8* [[ADD_PTR10]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP25:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]] to i8* +// CHECK1-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i8, i8* [[TMP25]], i64 4 +// CHECK1-NEXT: [[TMP26:%.*]] = bitcast i8* [[ADD_PTR11]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP24]], %struct.BaseS1* [[TMP26]]) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT13]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE14:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT13]], [[TMP22]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_DONE15]], label [[OMP_ARRAYCPY_BODY]] -// CHECK1: omp.arraycpy.done15: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT12]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT12]], [[TMP22]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] +// CHECK1: omp.arraycpy.done14: // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK1: .omp.reduction.case2: // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[LHS_BEGIN]], i64 4 -// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY16:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP27]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY16]], label [[OMP_ARRAYCPY_DONE25:%.*]], label [[OMP_ARRAYCPY_BODY17:%.*]] -// CHECK1: omp.arraycpy.body17: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST18:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT23:%.*]], [[OMP_ARRAYCPY_BODY17]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST19:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT22:%.*]], [[OMP_ARRAYCPY_BODY17]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY15:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP27]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY15]], label [[OMP_ARRAYCPY_DONE24:%.*]], label [[OMP_ARRAYCPY_BODY16:%.*]] +// CHECK1: omp.arraycpy.body16: +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST17:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT22:%.*]], [[OMP_ARRAYCPY_BODY16]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST18:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT21:%.*]], [[OMP_ARRAYCPY_BODY16]] ] // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST19]] to i8* -// CHECK1-NEXT: [[ADD_PTR20:%.*]] = getelementptr inbounds i8, i8* [[TMP28]], i64 4 -// CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8* [[ADD_PTR20]] to %struct.BaseS1* -// CHECK1-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST18]] to i8* -// CHECK1-NEXT: [[ADD_PTR21:%.*]] = getelementptr inbounds i8, i8* [[TMP30]], i64 4 -// CHECK1-NEXT: [[TMP31:%.*]] = bitcast i8* [[ADD_PTR21]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST18]] to i8* +// CHECK1-NEXT: [[ADD_PTR19:%.*]] = getelementptr inbounds i8, i8* [[TMP28]], i64 4 +// CHECK1-NEXT: [[TMP29:%.*]] = bitcast i8* [[ADD_PTR19]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST17]] to i8* +// CHECK1-NEXT: [[ADD_PTR20:%.*]] = getelementptr inbounds i8, i8* [[TMP30]], i64 4 +// CHECK1-NEXT: [[TMP31:%.*]] = bitcast i8* [[ADD_PTR20]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP29]], %struct.BaseS1* [[TMP31]]) // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT22]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST19]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT23]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST18]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE24:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT22]], [[TMP27]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE24]], label [[OMP_ARRAYCPY_DONE25]], label [[OMP_ARRAYCPY_BODY17]] -// CHECK1: omp.arraycpy.done25: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT21]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST18]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT22]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST17]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE23:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT21]], [[TMP27]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE23]], label [[OMP_ARRAYCPY_DONE24]], label [[OMP_ARRAYCPY_BODY16]] +// CHECK1: omp.arraycpy.done24: // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK1: .omp.reduction.default: -// CHECK1-NEXT: [[ARRAY_BEGIN26:%.*]] = getelementptr inbounds [4 x %struct.S.0], [4 x %struct.S.0]* [[DOTVAR3__ADDR]], i32 0, i32 0 -// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN26]], i64 4 +// CHECK1-NEXT: [[ARRAY_BEGIN25:%.*]] = getelementptr inbounds [4 x %struct.S.0], [4 x %struct.S.0]* [[DOTVAR3__ADDR]], i32 0, i32 0 +// CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN25]], i64 4 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] // CHECK1: arraydestroy.body: // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[DOTOMP_REDUCTION_DEFAULT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] -// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN26]] -// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE27:%.*]], label [[ARRAYDESTROY_BODY]] -// CHECK1: arraydestroy.done27: +// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN25]] +// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE26:%.*]], label [[ARRAYDESTROY_BODY]] +// CHECK1: arraydestroy.done26: // CHECK1-NEXT: [[TMP33:%.*]] = bitcast [4 x %struct.S.0]* [[DOTVAR3__ADDR]] to i8* // CHECK1-NEXT: call void @__kmpc_free(i32 [[TMP4]], i8* [[TMP33]], i8* inttoptr (i64 6 to i8*)) // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP4]]) @@ -2843,7 +2776,6 @@ int main() { // CHECK1-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK1-NEXT: call void @.omp_initializer..25(i32* [[T_VAR3]], i32* [[TMP0]]) // CHECK1-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 -// CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[VAR4]]) // CHECK1-NEXT: [[TMP8:%.*]] = bitcast %struct.S* [[VAR4]] to i8* // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP8]], i64 4 // CHECK1-NEXT: [[TMP9:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* @@ -2852,7 +2784,6 @@ int main() { // CHECK1-NEXT: [[TMP11:%.*]] = bitcast i8* [[ADD_PTR5]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP9]], %struct.BaseS1* [[TMP11]]) // CHECK1-NEXT: store %struct.S* [[VAR4]], %struct.S** [[_TMP6]], align 8 -// CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[VAR17]]) // CHECK1-NEXT: call void @.omp_initializer..27(%struct.S* [[VAR17]], %struct.S* [[TMP2]]) // CHECK1-NEXT: call void @.omp_initializer..29(i32* [[T_VAR18]], i32* [[TMP3]]) // CHECK1-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -3296,32 +3227,22 @@ int main() { // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [42 x %struct.S], [42 x %struct.S]* [[TMP0]], i64 0, i64 1 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [42 x %struct.S], [42 x %struct.S]* [[TMP0]], i64 0, i64 40 // CHECK1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [40 x %struct.S], [40 x %struct.S]* [[ARR4]], i32 0, i32 0 -// CHECK1-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[ARRAY_BEGIN]], i64 40 -// CHECK1-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK1: arrayctor.loop: -// CHECK1-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK1-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK1-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 -// CHECK1-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK1-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] -// CHECK1: arrayctor.cont: -// CHECK1-NEXT: [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [40 x %struct.S], [40 x %struct.S]* [[ARR4]], i32 0, i32 0 -// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN5]], i64 40 -// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN5]], [[TMP6]] +// CHECK1-NEXT: [[TMP6:%.*]] = getelementptr [[STRUCT_S:%.*]], %struct.S* [[ARRAY_BEGIN]], i64 40 +// CHECK1-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP6]] // CHECK1-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] // CHECK1: omp.arrayinit.body: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN5]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT7:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT6:%.*]], [[OMP_ARRAYINIT_BODY]] ] // CHECK1-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP7]], i64 4 // CHECK1-NEXT: [[TMP8:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* // CHECK1-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* -// CHECK1-NEXT: [[ADD_PTR6:%.*]] = getelementptr inbounds i8, i8* [[TMP9]], i64 4 -// CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8* [[ADD_PTR6]] to %struct.BaseS1* +// CHECK1-NEXT: [[ADD_PTR5:%.*]] = getelementptr inbounds i8, i8* [[TMP9]], i64 4 +// CHECK1-NEXT: [[TMP10:%.*]] = bitcast i8* [[ADD_PTR5]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_initializer..37(%struct.BaseS1* [[TMP8]], %struct.BaseS1* [[TMP10]]) // CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT7]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT7]], [[TMP6]] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT6]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT6]], [[TMP6]] // CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] // CHECK1: omp.arrayinit.done: // CHECK1-NEXT: [[TMP11:%.*]] = bitcast [42 x %struct.S]* [[TMP0]] to %struct.S* @@ -3353,8 +3274,8 @@ int main() { // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP24]], [[TMP25]] -// CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] +// CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP24]], [[TMP25]] +// CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] // CHECK1: omp.inner.for.cond.cleanup: // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: @@ -3365,20 +3286,20 @@ int main() { // CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP28]] to i64 -// CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] -// CHECK1-NEXT: store i32 [[TMP27]], i32* [[ARRAYIDX9]], align 4 +// CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] +// CHECK1-NEXT: store i32 [[TMP27]], i32* [[ARRAYIDX8]], align 4 // CHECK1-NEXT: [[TMP29:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[I]], align 4 -// CHECK1-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK1-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP3]], i64 0, i64 [[IDXPROM10]] -// CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(12) %struct.S* @_ZN1SIiEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(12) [[ARRAYIDX11]], %struct.S* nonnull align 4 dereferenceable(12) [[TMP29]]) +// CHECK1-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK1-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP3]], i64 0, i64 [[IDXPROM9]] +// CHECK1-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(12) %struct.S* @_ZN1SIiEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(12) [[ARRAYIDX10]], %struct.S* nonnull align 4 dereferenceable(12) [[TMP29]]) // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK1: omp.body.continue: // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP31]], 1 -// CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP31]], 1 +// CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] @@ -3400,60 +3321,60 @@ int main() { // CHECK1: .omp.reduction.case1: // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAYIDX]], i64 40 // CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAYIDX]], [[TMP40]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE19:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE18:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] // CHECK1: omp.arraycpy.body: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST13:%.*]] = phi %struct.S* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST14:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT17:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK1-NEXT: [[TMP41:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST14]] to i8* -// CHECK1-NEXT: [[ADD_PTR15:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 -// CHECK1-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR15]] to %struct.BaseS1* -// CHECK1-NEXT: [[TMP43:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST13]] to i8* -// CHECK1-NEXT: [[ADD_PTR16:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 -// CHECK1-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR16]] to %struct.BaseS1* +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST12:%.*]] = phi %struct.S* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST13:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT16:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK1-NEXT: [[TMP41:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST13]] to i8* +// CHECK1-NEXT: [[ADD_PTR14:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 +// CHECK1-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR14]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP43:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST12]] to i8* +// CHECK1-NEXT: [[ADD_PTR15:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 +// CHECK1-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR15]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_combiner..36(%struct.BaseS1* [[TMP42]], %struct.BaseS1* [[TMP44]]) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT17]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST14]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST13]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE18:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT17]], [[TMP40]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE18]], label [[OMP_ARRAYCPY_DONE19]], label [[OMP_ARRAYCPY_BODY]] -// CHECK1: omp.arraycpy.done19: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT16]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST13]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST12]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE17:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT16]], [[TMP40]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE17]], label [[OMP_ARRAYCPY_DONE18]], label [[OMP_ARRAYCPY_BODY]] +// CHECK1: omp.arraycpy.done18: // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP37]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK1: .omp.reduction.case2: // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAYIDX]], i64 40 -// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY20:%.*]] = icmp eq %struct.S* [[ARRAYIDX]], [[TMP45]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY20]], label [[OMP_ARRAYCPY_DONE29:%.*]], label [[OMP_ARRAYCPY_BODY21:%.*]] -// CHECK1: omp.arraycpy.body21: -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST22:%.*]] = phi %struct.S* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT27:%.*]], [[OMP_ARRAYCPY_BODY21]] ] -// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST23:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT26:%.*]], [[OMP_ARRAYCPY_BODY21]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_ISEMPTY19:%.*]] = icmp eq %struct.S* [[ARRAYIDX]], [[TMP45]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY19]], label [[OMP_ARRAYCPY_DONE28:%.*]], label [[OMP_ARRAYCPY_BODY20:%.*]] +// CHECK1: omp.arraycpy.body20: +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST21:%.*]] = phi %struct.S* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT26:%.*]], [[OMP_ARRAYCPY_BODY20]] ] +// CHECK1-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST22:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT25:%.*]], [[OMP_ARRAYCPY_BODY20]] ] // CHECK1-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK1-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4 // CHECK1-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: [[TMP48:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST23]] to i8* -// CHECK1-NEXT: [[ADD_PTR24:%.*]] = getelementptr inbounds i8, i8* [[TMP48]], i64 4 -// CHECK1-NEXT: [[TMP49:%.*]] = bitcast i8* [[ADD_PTR24]] to %struct.BaseS1* -// CHECK1-NEXT: [[TMP50:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST22]] to i8* -// CHECK1-NEXT: [[ADD_PTR25:%.*]] = getelementptr inbounds i8, i8* [[TMP50]], i64 4 -// CHECK1-NEXT: [[TMP51:%.*]] = bitcast i8* [[ADD_PTR25]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP48:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST22]] to i8* +// CHECK1-NEXT: [[ADD_PTR23:%.*]] = getelementptr inbounds i8, i8* [[TMP48]], i64 4 +// CHECK1-NEXT: [[TMP49:%.*]] = bitcast i8* [[ADD_PTR23]] to %struct.BaseS1* +// CHECK1-NEXT: [[TMP50:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST21]] to i8* +// CHECK1-NEXT: [[ADD_PTR24:%.*]] = getelementptr inbounds i8, i8* [[TMP50]], i64 4 +// CHECK1-NEXT: [[TMP51:%.*]] = bitcast i8* [[ADD_PTR24]] to %struct.BaseS1* // CHECK1-NEXT: call void @.omp_combiner..36(%struct.BaseS1* [[TMP49]], %struct.BaseS1* [[TMP51]]) // CHECK1-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT26]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST23]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT27]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST22]], i32 1 -// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE28:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT26]], [[TMP45]] -// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE28]], label [[OMP_ARRAYCPY_DONE29]], label [[OMP_ARRAYCPY_BODY21]] -// CHECK1: omp.arraycpy.done29: +// CHECK1-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT25]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST22]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT26]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST21]], i32 1 +// CHECK1-NEXT: [[OMP_ARRAYCPY_DONE27:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT25]], [[TMP45]] +// CHECK1-NEXT: br i1 [[OMP_ARRAYCPY_DONE27]], label [[OMP_ARRAYCPY_DONE28]], label [[OMP_ARRAYCPY_BODY20]] +// CHECK1: omp.arraycpy.done28: // CHECK1-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP37]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK1-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK1: .omp.reduction.default: -// CHECK1-NEXT: [[ARRAY_BEGIN30:%.*]] = getelementptr inbounds [40 x %struct.S], [40 x %struct.S]* [[ARR4]], i32 0, i32 0 -// CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN30]], i64 40 +// CHECK1-NEXT: [[ARRAY_BEGIN29:%.*]] = getelementptr inbounds [40 x %struct.S], [40 x %struct.S]* [[ARR4]], i32 0, i32 0 +// CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN29]], i64 40 // CHECK1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] // CHECK1: arraydestroy.body: // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP52]], [[DOTOMP_REDUCTION_DEFAULT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] // CHECK1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] -// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN30]] -// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE31:%.*]], label [[ARRAYDESTROY_BODY]] -// CHECK1: arraydestroy.done31: +// CHECK1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN29]] +// CHECK1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE30:%.*]], label [[ARRAYDESTROY_BODY]] +// CHECK1: arraydestroy.done30: // CHECK1-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK1-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4 // CHECK1-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP54]]) @@ -3581,7 +3502,6 @@ int main() { // CHECK2-NEXT: store %struct.S* [[S]], %struct.S** [[S_ADDR]], align 8 // CHECK2-NEXT: [[TMP0:%.*]] = load %struct.S*, %struct.S** [[S_ADDR]], align 8 // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[S1]]) // CHECK2-NEXT: call void @.omp_initializer.(%struct.S* [[S1]], %struct.S* [[TMP0]]) // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: @@ -3861,7 +3781,6 @@ int main() { // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK2-NEXT: call void @.omp_initializer..3(float* [[T_VAR3]], float* [[TMP0]]) // CHECK2-NEXT: [[TMP7:%.*]] = load %struct.S.0*, %struct.S.0** [[_TMP1]], align 8 -// CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[VAR4]]) // CHECK2-NEXT: [[TMP8:%.*]] = bitcast %struct.S.0* [[VAR4]] to i8* // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP8]], i64 4 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* @@ -3870,7 +3789,6 @@ int main() { // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[ADD_PTR5]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP9]], %struct.BaseS1* [[TMP11]]) // CHECK2-NEXT: store %struct.S.0* [[VAR4]], %struct.S.0** [[_TMP6]], align 8 -// CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[VAR17]]) // CHECK2-NEXT: call void @.omp_initializer..7(%struct.S.0* [[VAR17]], %struct.S.0* [[TMP2]]) // CHECK2-NEXT: [[TMP12:%.*]] = load float, float* @.init, align 4 // CHECK2-NEXT: store float [[TMP12]], float* [[T_VAR18]], align 4 @@ -4241,24 +4159,12 @@ int main() { // CHECK2-NEXT: [[TMP29:%.*]] = mul nuw i64 [[TMP28]], ptrtoint (%struct.S.0* getelementptr ([[STRUCT_S_0]], %struct.S.0* null, i32 1) to i64) // CHECK2-NEXT: [[VLA16:%.*]] = alloca [[STRUCT_S_0]], i64 [[TMP28]], align 16 // CHECK2-NEXT: store i64 [[TMP28]], i64* [[__VLA_EXPR1]], align 8 -// CHECK2-NEXT: [[ISEMPTY:%.*]] = icmp eq i64 [[TMP28]], 0 -// CHECK2-NEXT: br i1 [[ISEMPTY]], label [[ARRAYCTOR_CONT:%.*]], label [[NEW_CTORLOOP:%.*]] -// CHECK2: new.ctorloop: -// CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[VLA16]], i64 [[TMP28]] -// CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK2: arrayctor.loop: -// CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[VLA16]], [[NEW_CTORLOOP]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT]], label [[ARRAYCTOR_LOOP]] -// CHECK2: arrayctor.cont: // CHECK2-NEXT: [[TMP30:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[VLA16]], i64 [[TMP28]] // CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY17:%.*]] = icmp eq %struct.S.0* [[VLA16]], [[TMP30]] // CHECK2-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY17]], label [[OMP_ARRAYINIT_DONE25:%.*]], label [[OMP_ARRAYINIT_BODY18:%.*]] // CHECK2: omp.arrayinit.body18: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST19:%.*]] = phi %struct.S.0* [ [[ARRAYIDX10]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT22:%.*]], [[OMP_ARRAYINIT_BODY18]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST20:%.*]] = phi %struct.S.0* [ [[VLA16]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT23:%.*]], [[OMP_ARRAYINIT_BODY18]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST19:%.*]] = phi %struct.S.0* [ [[ARRAYIDX10]], [[OMP_ARRAYINIT_DONE]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT22:%.*]], [[OMP_ARRAYINIT_BODY18]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST20:%.*]] = phi %struct.S.0* [ [[VLA16]], [[OMP_ARRAYINIT_DONE]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT23:%.*]], [[OMP_ARRAYINIT_BODY18]] ] // CHECK2-NEXT: [[TMP31:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST20]] to i8* // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP31]], i64 4 // CHECK2-NEXT: [[TMP32:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* @@ -4582,35 +4488,25 @@ int main() { // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] // CHECK2: omp.arrayinit.done: // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [10 x [4 x %struct.S.0]], [10 x [4 x %struct.S.0]]* [[ARRS5]], i32 0, i32 0, i32 0 -// CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 40 -// CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK2: arrayctor.loop: -// CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[OMP_ARRAYINIT_DONE]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] -// CHECK2: arrayctor.cont: -// CHECK2-NEXT: [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [10 x [4 x %struct.S.0]], [10 x [4 x %struct.S.0]]* [[ARRS5]], i32 0, i32 0, i32 0 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast [10 x [4 x %struct.S.0]]* [[TMP3]] to %struct.S.0* -// CHECK2-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN6]], i64 40 -// CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY7:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN6]], [[TMP10]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY7]], label [[OMP_ARRAYINIT_DONE15:%.*]], label [[OMP_ARRAYINIT_BODY8:%.*]] -// CHECK2: omp.arrayinit.body8: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi %struct.S.0* [ [[TMP9]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT12:%.*]], [[OMP_ARRAYINIT_BODY8]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN6]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT13:%.*]], [[OMP_ARRAYINIT_BODY8]] ] -// CHECK2-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST10]] to i8* +// CHECK2-NEXT: [[TMP10:%.*]] = getelementptr [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 40 +// CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY6:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP10]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY6]], label [[OMP_ARRAYINIT_DONE14:%.*]], label [[OMP_ARRAYINIT_BODY7:%.*]] +// CHECK2: omp.arrayinit.body7: +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST8:%.*]] = phi %struct.S.0* [ [[TMP9]], [[OMP_ARRAYINIT_DONE]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYINIT_BODY7]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST9:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[OMP_ARRAYINIT_DONE]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT12:%.*]], [[OMP_ARRAYINIT_BODY7]] ] +// CHECK2-NEXT: [[TMP11:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]] to i8* // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP11]], i64 4 // CHECK2-NEXT: [[TMP12:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* -// CHECK2-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST9]] to i8* -// CHECK2-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i8, i8* [[TMP13]], i64 4 -// CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[ADD_PTR11]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]] to i8* +// CHECK2-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i8, i8* [[TMP13]], i64 4 +// CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[ADD_PTR10]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP12]], %struct.BaseS1* [[TMP14]]) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT12]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT13]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE14:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT13]], [[TMP10]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYINIT_DONE15]], label [[OMP_ARRAYINIT_BODY8]] -// CHECK2: omp.arrayinit.done15: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT12]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT12]], [[TMP10]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYINIT_DONE14]], label [[OMP_ARRAYINIT_BODY7]] +// CHECK2: omp.arrayinit.done14: // CHECK2-NEXT: [[LHS_BEGIN:%.*]] = bitcast [10 x [4 x %struct.S.0]]* [[TMP3]] to %struct.S.0* // CHECK2-NEXT: [[RHS_BEGIN:%.*]] = bitcast [10 x [4 x %struct.S.0]]* [[ARRS5]] to %struct.S.0* // CHECK2-NEXT: [[TMP15:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -4633,8 +4529,8 @@ int main() { // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP16:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] -// CHECK2-NEXT: br i1 [[CMP16]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] +// CHECK2-NEXT: [[CMP15:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]] +// CHECK2-NEXT: br i1 [[CMP15]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] // CHECK2: omp.inner.for.cond.cleanup: // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: @@ -4646,17 +4542,17 @@ int main() { // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[VLA3]], i64 [[TMP23]] // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[I]], align 4 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP24]] to i64 -// CHECK2-NEXT: [[ARRAYIDX17:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM]] -// CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX17]], align 4 +// CHECK2-NEXT: [[ARRAYIDX16:%.*]] = getelementptr inbounds i32, i32* [[ARRAYIDX]], i64 [[IDXPROM]] +// CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[ARRAYIDX16]], align 4 // CHECK2-NEXT: [[INC:%.*]] = add nsw i32 [[TMP25]], 1 -// CHECK2-NEXT: store i32 [[INC]], i32* [[ARRAYIDX17]], align 4 +// CHECK2-NEXT: store i32 [[INC]], i32* [[ARRAYIDX16]], align 4 // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK2: omp.body.continue: // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP26]], 1 -// CHECK2-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP26]], 1 +// CHECK2-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] @@ -4684,88 +4580,88 @@ int main() { // CHECK2: .omp.reduction.case1: // CHECK2-NEXT: [[TMP39:%.*]] = getelementptr i32, i32* [[TMP2]], i64 [[TMP6]] // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq i32* [[TMP2]], [[TMP39]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE23:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE22:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] // CHECK2: omp.arraycpy.body: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST19:%.*]] = phi i32* [ [[VLA3]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST20:%.*]] = phi i32* [ [[TMP2]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT21:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK2-NEXT: call void @.omp_combiner..10(i32* [[OMP_ARRAYCPY_DESTELEMENTPAST20]], i32* [[OMP_ARRAYCPY_SRCELEMENTPAST19]]) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT21]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST20]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST19]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE22:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT21]], [[TMP39]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE22]], label [[OMP_ARRAYCPY_DONE23]], label [[OMP_ARRAYCPY_BODY]] -// CHECK2: omp.arraycpy.done23: +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST18:%.*]] = phi i32* [ [[VLA3]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST19:%.*]] = phi i32* [ [[TMP2]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT20:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK2-NEXT: call void @.omp_combiner..10(i32* [[OMP_ARRAYCPY_DESTELEMENTPAST19]], i32* [[OMP_ARRAYCPY_SRCELEMENTPAST18]]) +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT20]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST19]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST18]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE21:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT20]], [[TMP39]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_DONE22]], label [[OMP_ARRAYCPY_BODY]] +// CHECK2: omp.arraycpy.done22: // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[LHS_BEGIN]], i64 40 -// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY24:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP40]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY24]], label [[OMP_ARRAYCPY_DONE33:%.*]], label [[OMP_ARRAYCPY_BODY25:%.*]] -// CHECK2: omp.arraycpy.body25: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST26:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[OMP_ARRAYCPY_DONE23]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT31:%.*]], [[OMP_ARRAYCPY_BODY25]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST27:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[OMP_ARRAYCPY_DONE23]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT30:%.*]], [[OMP_ARRAYCPY_BODY25]] ] -// CHECK2-NEXT: [[TMP41:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST27]] to i8* -// CHECK2-NEXT: [[ADD_PTR28:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 -// CHECK2-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR28]] to %struct.BaseS1* -// CHECK2-NEXT: [[TMP43:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST26]] to i8* -// CHECK2-NEXT: [[ADD_PTR29:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 -// CHECK2-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR29]] to %struct.BaseS1* +// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY23:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP40]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY23]], label [[OMP_ARRAYCPY_DONE32:%.*]], label [[OMP_ARRAYCPY_BODY24:%.*]] +// CHECK2: omp.arraycpy.body24: +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST25:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[OMP_ARRAYCPY_DONE22]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT30:%.*]], [[OMP_ARRAYCPY_BODY24]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST26:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[OMP_ARRAYCPY_DONE22]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT29:%.*]], [[OMP_ARRAYCPY_BODY24]] ] +// CHECK2-NEXT: [[TMP41:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST26]] to i8* +// CHECK2-NEXT: [[ADD_PTR27:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 +// CHECK2-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR27]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP43:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST25]] to i8* +// CHECK2-NEXT: [[ADD_PTR28:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 +// CHECK2-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR28]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP42]], %struct.BaseS1* [[TMP44]]) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT30]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST27]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT31]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST26]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE32:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT30]], [[TMP40]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE32]], label [[OMP_ARRAYCPY_DONE33]], label [[OMP_ARRAYCPY_BODY25]] -// CHECK2: omp.arraycpy.done33: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT29]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST26]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT30]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST25]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE31:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT29]], [[TMP40]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE31]], label [[OMP_ARRAYCPY_DONE32]], label [[OMP_ARRAYCPY_BODY24]] +// CHECK2: omp.arraycpy.done32: // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK2: .omp.reduction.case2: // CHECK2-NEXT: [[TMP45:%.*]] = getelementptr i32, i32* [[TMP2]], i64 [[TMP6]] -// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY34:%.*]] = icmp eq i32* [[TMP2]], [[TMP45]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY34]], label [[OMP_ARRAYCPY_DONE41:%.*]], label [[OMP_ARRAYCPY_BODY35:%.*]] -// CHECK2: omp.arraycpy.body35: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST36:%.*]] = phi i32* [ [[VLA3]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT39:%.*]], [[OMP_ARRAYCPY_BODY35]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST37:%.*]] = phi i32* [ [[TMP2]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT38:%.*]], [[OMP_ARRAYCPY_BODY35]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY33:%.*]] = icmp eq i32* [[TMP2]], [[TMP45]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY33]], label [[OMP_ARRAYCPY_DONE40:%.*]], label [[OMP_ARRAYCPY_BODY34:%.*]] +// CHECK2: omp.arraycpy.body34: +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST35:%.*]] = phi i32* [ [[VLA3]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT38:%.*]], [[OMP_ARRAYCPY_BODY34]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST36:%.*]] = phi i32* [ [[TMP2]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT37:%.*]], [[OMP_ARRAYCPY_BODY34]] ] // CHECK2-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK2-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: call void @.omp_combiner..10(i32* [[OMP_ARRAYCPY_DESTELEMENTPAST37]], i32* [[OMP_ARRAYCPY_SRCELEMENTPAST36]]) +// CHECK2-NEXT: call void @.omp_combiner..10(i32* [[OMP_ARRAYCPY_DESTELEMENTPAST36]], i32* [[OMP_ARRAYCPY_SRCELEMENTPAST35]]) // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT38]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST37]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT39]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST36]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE40:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT38]], [[TMP45]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE40]], label [[OMP_ARRAYCPY_DONE41]], label [[OMP_ARRAYCPY_BODY35]] -// CHECK2: omp.arraycpy.done41: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT37]] = getelementptr i32, i32* [[OMP_ARRAYCPY_DESTELEMENTPAST36]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT38]] = getelementptr i32, i32* [[OMP_ARRAYCPY_SRCELEMENTPAST35]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE39:%.*]] = icmp eq i32* [[OMP_ARRAYCPY_DEST_ELEMENT37]], [[TMP45]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE39]], label [[OMP_ARRAYCPY_DONE40]], label [[OMP_ARRAYCPY_BODY34]] +// CHECK2: omp.arraycpy.done40: // CHECK2-NEXT: [[TMP48:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[LHS_BEGIN]], i64 40 -// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY42:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP48]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY42]], label [[OMP_ARRAYCPY_DONE51:%.*]], label [[OMP_ARRAYCPY_BODY43:%.*]] -// CHECK2: omp.arraycpy.body43: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST44:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[OMP_ARRAYCPY_DONE41]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT49:%.*]], [[OMP_ARRAYCPY_BODY43]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST45:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[OMP_ARRAYCPY_DONE41]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT48:%.*]], [[OMP_ARRAYCPY_BODY43]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY41:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP48]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY41]], label [[OMP_ARRAYCPY_DONE50:%.*]], label [[OMP_ARRAYCPY_BODY42:%.*]] +// CHECK2: omp.arraycpy.body42: +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST43:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[OMP_ARRAYCPY_DONE40]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT48:%.*]], [[OMP_ARRAYCPY_BODY42]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST44:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[OMP_ARRAYCPY_DONE40]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT47:%.*]], [[OMP_ARRAYCPY_BODY42]] ] // CHECK2-NEXT: [[TMP49:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK2-NEXT: [[TMP50:%.*]] = load i32, i32* [[TMP49]], align 4 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: [[TMP51:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST45]] to i8* -// CHECK2-NEXT: [[ADD_PTR46:%.*]] = getelementptr inbounds i8, i8* [[TMP51]], i64 4 -// CHECK2-NEXT: [[TMP52:%.*]] = bitcast i8* [[ADD_PTR46]] to %struct.BaseS1* -// CHECK2-NEXT: [[TMP53:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST44]] to i8* -// CHECK2-NEXT: [[ADD_PTR47:%.*]] = getelementptr inbounds i8, i8* [[TMP53]], i64 4 -// CHECK2-NEXT: [[TMP54:%.*]] = bitcast i8* [[ADD_PTR47]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP51:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST44]] to i8* +// CHECK2-NEXT: [[ADD_PTR45:%.*]] = getelementptr inbounds i8, i8* [[TMP51]], i64 4 +// CHECK2-NEXT: [[TMP52:%.*]] = bitcast i8* [[ADD_PTR45]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP53:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST43]] to i8* +// CHECK2-NEXT: [[ADD_PTR46:%.*]] = getelementptr inbounds i8, i8* [[TMP53]], i64 4 +// CHECK2-NEXT: [[TMP54:%.*]] = bitcast i8* [[ADD_PTR46]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP52]], %struct.BaseS1* [[TMP54]]) // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP50]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT48]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST45]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT49]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST44]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE50:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT48]], [[TMP48]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE50]], label [[OMP_ARRAYCPY_DONE51]], label [[OMP_ARRAYCPY_BODY43]] -// CHECK2: omp.arraycpy.done51: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT47]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST44]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT48]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST43]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE49:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT47]], [[TMP48]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE49]], label [[OMP_ARRAYCPY_DONE50]], label [[OMP_ARRAYCPY_BODY42]] +// CHECK2: omp.arraycpy.done50: // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP36]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK2: .omp.reduction.default: -// CHECK2-NEXT: [[ARRAY_BEGIN52:%.*]] = getelementptr inbounds [10 x [4 x %struct.S.0]], [10 x [4 x %struct.S.0]]* [[ARRS5]], i32 0, i32 0, i32 0 -// CHECK2-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN52]], i64 40 +// CHECK2-NEXT: [[ARRAY_BEGIN51:%.*]] = getelementptr inbounds [10 x [4 x %struct.S.0]], [10 x [4 x %struct.S.0]]* [[ARRS5]], i32 0, i32 0, i32 0 +// CHECK2-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN51]], i64 40 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] // CHECK2: arraydestroy.body: // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP55]], [[DOTOMP_REDUCTION_DEFAULT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] -// CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN52]] -// CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE53:%.*]], label [[ARRAYDESTROY_BODY]] -// CHECK2: arraydestroy.done53: +// CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN51]] +// CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE52:%.*]], label [[ARRAYDESTROY_BODY]] +// CHECK2: arraydestroy.done52: // CHECK2-NEXT: [[TMP56:%.*]] = load i8*, i8** [[SAVED_STACK]], align 8 // CHECK2-NEXT: call void @llvm.stackrestore(i8* [[TMP56]]) // CHECK2-NEXT: [[TMP57:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -4877,24 +4773,12 @@ int main() { // CHECK2-NEXT: store i8* [[TMP11]], i8** [[SAVED_STACK]], align 8 // CHECK2-NEXT: [[VLA:%.*]] = alloca [[STRUCT_S_0]], i64 [[TMP9]], align 16 // CHECK2-NEXT: store i64 [[TMP9]], i64* [[__VLA_EXPR0]], align 8 -// CHECK2-NEXT: [[ISEMPTY:%.*]] = icmp eq i64 [[TMP9]], 0 -// CHECK2-NEXT: br i1 [[ISEMPTY]], label [[ARRAYCTOR_CONT:%.*]], label [[NEW_CTORLOOP:%.*]] -// CHECK2: new.ctorloop: -// CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[VLA]], i64 [[TMP9]] -// CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK2: arrayctor.loop: -// CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[VLA]], [[NEW_CTORLOOP]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT]], label [[ARRAYCTOR_LOOP]] -// CHECK2: arrayctor.cont: // CHECK2-NEXT: [[TMP12:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[VLA]], i64 [[TMP9]] // CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[VLA]], [[TMP12]] // CHECK2-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] // CHECK2: omp.arrayinit.body: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX1]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[VLA]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX1]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[VLA]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYINIT_BODY]] ] // CHECK2-NEXT: [[TMP13:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP13]], i64 4 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* @@ -5105,32 +4989,22 @@ int main() { // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[TMP0]], i64 0, i64 0 // CHECK2-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[TMP0]], i64 0, i64 4 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[VVAR22]], i32 0, i32 0 -// CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 5 -// CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK2: arrayctor.loop: -// CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] -// CHECK2: arrayctor.cont: -// CHECK2-NEXT: [[ARRAY_BEGIN3:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[VVAR22]], i32 0, i32 0 -// CHECK2-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN3]], i64 5 -// CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN3]], [[TMP1]] +// CHECK2-NEXT: [[TMP1:%.*]] = getelementptr [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 5 +// CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP1]] // CHECK2-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] // CHECK2: omp.arrayinit.body: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN3]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYINIT_BODY]] ] // CHECK2-NEXT: [[TMP2:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP2]], i64 4 // CHECK2-NEXT: [[TMP3:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* // CHECK2-NEXT: [[TMP4:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* -// CHECK2-NEXT: [[ADD_PTR4:%.*]] = getelementptr inbounds i8, i8* [[TMP4]], i64 4 -// CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[ADD_PTR4]] to %struct.BaseS1* +// CHECK2-NEXT: [[ADD_PTR3:%.*]] = getelementptr inbounds i8, i8* [[TMP4]], i64 4 +// CHECK2-NEXT: [[TMP5:%.*]] = bitcast i8* [[ADD_PTR3]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP3]], %struct.BaseS1* [[TMP5]]) // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP1]] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP1]] // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] // CHECK2: omp.arrayinit.done: // CHECK2-NEXT: [[TMP6:%.*]] = bitcast [5 x %struct.S.0]* [[TMP0]] to %struct.S.0* @@ -5162,8 +5036,8 @@ int main() { // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] -// CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] +// CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]] +// CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] // CHECK2: omp.inner.for.cond.cleanup: // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: @@ -5176,8 +5050,8 @@ int main() { // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP22]], 1 -// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1 +// CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] @@ -5199,60 +5073,60 @@ int main() { // CHECK2: .omp.reduction.case1: // CHECK2-NEXT: [[TMP31:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAYIDX]], i64 5 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP31]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] // CHECK2: omp.arraycpy.body: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST8:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST9:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK2-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]] to i8* -// CHECK2-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i8, i8* [[TMP32]], i64 4 -// CHECK2-NEXT: [[TMP33:%.*]] = bitcast i8* [[ADD_PTR10]] to %struct.BaseS1* -// CHECK2-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]] to i8* -// CHECK2-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i8, i8* [[TMP34]], i64 4 -// CHECK2-NEXT: [[TMP35:%.*]] = bitcast i8* [[ADD_PTR11]] to %struct.BaseS1* +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST7:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST8:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT11:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK2-NEXT: [[TMP32:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST8]] to i8* +// CHECK2-NEXT: [[ADD_PTR9:%.*]] = getelementptr inbounds i8, i8* [[TMP32]], i64 4 +// CHECK2-NEXT: [[TMP33:%.*]] = bitcast i8* [[ADD_PTR9]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP34:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST7]] to i8* +// CHECK2-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i8, i8* [[TMP34]], i64 4 +// CHECK2-NEXT: [[TMP35:%.*]] = bitcast i8* [[ADD_PTR10]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP33]], %struct.BaseS1* [[TMP35]]) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT12]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT12]], [[TMP31]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] -// CHECK2: omp.arraycpy.done14: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT11]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST8]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST7]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE12:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT11]], [[TMP31]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]] +// CHECK2: omp.arraycpy.done13: // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP28]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK2: .omp.reduction.case2: // CHECK2-NEXT: [[TMP36:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAYIDX]], i64 5 -// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY15:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP36]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY15]], label [[OMP_ARRAYCPY_DONE24:%.*]], label [[OMP_ARRAYCPY_BODY16:%.*]] -// CHECK2: omp.arraycpy.body16: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST17:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT22:%.*]], [[OMP_ARRAYCPY_BODY16]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST18:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT21:%.*]], [[OMP_ARRAYCPY_BODY16]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY14:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP36]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY14]], label [[OMP_ARRAYCPY_DONE23:%.*]], label [[OMP_ARRAYCPY_BODY15:%.*]] +// CHECK2: omp.arraycpy.body15: +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST16:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT21:%.*]], [[OMP_ARRAYCPY_BODY15]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST17:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT20:%.*]], [[OMP_ARRAYCPY_BODY15]] ] // CHECK2-NEXT: [[TMP37:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[TMP37]], align 4 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP38]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: [[TMP39:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST18]] to i8* -// CHECK2-NEXT: [[ADD_PTR19:%.*]] = getelementptr inbounds i8, i8* [[TMP39]], i64 4 -// CHECK2-NEXT: [[TMP40:%.*]] = bitcast i8* [[ADD_PTR19]] to %struct.BaseS1* -// CHECK2-NEXT: [[TMP41:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST17]] to i8* -// CHECK2-NEXT: [[ADD_PTR20:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 -// CHECK2-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR20]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP39:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST17]] to i8* +// CHECK2-NEXT: [[ADD_PTR18:%.*]] = getelementptr inbounds i8, i8* [[TMP39]], i64 4 +// CHECK2-NEXT: [[TMP40:%.*]] = bitcast i8* [[ADD_PTR18]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP41:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST16]] to i8* +// CHECK2-NEXT: [[ADD_PTR19:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 +// CHECK2-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR19]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP40]], %struct.BaseS1* [[TMP42]]) // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP38]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT21]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST18]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT22]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST17]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE23:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT21]], [[TMP36]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE23]], label [[OMP_ARRAYCPY_DONE24]], label [[OMP_ARRAYCPY_BODY16]] -// CHECK2: omp.arraycpy.done24: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT20]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST17]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT21]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST16]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE22:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT20]], [[TMP36]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE22]], label [[OMP_ARRAYCPY_DONE23]], label [[OMP_ARRAYCPY_BODY15]] +// CHECK2: omp.arraycpy.done23: // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP28]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK2: .omp.reduction.default: -// CHECK2-NEXT: [[ARRAY_BEGIN25:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[VVAR22]], i32 0, i32 0 -// CHECK2-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN25]], i64 5 +// CHECK2-NEXT: [[ARRAY_BEGIN24:%.*]] = getelementptr inbounds [5 x %struct.S.0], [5 x %struct.S.0]* [[VVAR22]], i32 0, i32 0 +// CHECK2-NEXT: [[TMP43:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN24]], i64 5 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] // CHECK2: arraydestroy.body: // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP43]], [[DOTOMP_REDUCTION_DEFAULT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] -// CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN25]] -// CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE26:%.*]], label [[ARRAYDESTROY_BODY]] -// CHECK2: arraydestroy.done26: +// CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN24]] +// CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE25:%.*]], label [[ARRAYDESTROY_BODY]] +// CHECK2: arraydestroy.done25: // CHECK2-NEXT: [[TMP44:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK2-NEXT: [[TMP45:%.*]] = load i32, i32* [[TMP44]], align 4 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP45]]) @@ -5312,7 +5186,7 @@ int main() { // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 // CHECK2-NEXT: [[VAR34:%.*]] = alloca [2 x %struct.S.0], align 16 -// CHECK2-NEXT: [[_TMP8:%.*]] = alloca [4 x %struct.S.0]*, align 8 +// CHECK2-NEXT: [[_TMP7:%.*]] = alloca [4 x %struct.S.0]*, align 8 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -5331,32 +5205,22 @@ int main() { // CHECK2-NEXT: [[TMP3:%.*]] = load [4 x %struct.S.0]*, [4 x %struct.S.0]** [[_TMP1]], align 8 // CHECK2-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [4 x %struct.S.0], [4 x %struct.S.0]* [[TMP3]], i64 0, i64 2 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[VAR34]], i32 0, i32 0 -// CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 -// CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK2: arrayctor.loop: -// CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] -// CHECK2: arrayctor.cont: -// CHECK2-NEXT: [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[VAR34]], i32 0, i32 0 -// CHECK2-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN5]], i64 2 -// CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN5]], [[TMP4]] +// CHECK2-NEXT: [[TMP4:%.*]] = getelementptr [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 2 +// CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP4]] // CHECK2-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] // CHECK2: omp.arrayinit.body: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN5]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT7:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT6:%.*]], [[OMP_ARRAYINIT_BODY]] ] // CHECK2-NEXT: [[TMP5:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP5]], i64 4 // CHECK2-NEXT: [[TMP6:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* // CHECK2-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* -// CHECK2-NEXT: [[ADD_PTR6:%.*]] = getelementptr inbounds i8, i8* [[TMP7]], i64 4 -// CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[ADD_PTR6]] to %struct.BaseS1* +// CHECK2-NEXT: [[ADD_PTR5:%.*]] = getelementptr inbounds i8, i8* [[TMP7]], i64 4 +// CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[ADD_PTR5]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP6]], %struct.BaseS1* [[TMP8]]) // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT7]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT7]], [[TMP4]] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT6]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT6]], [[TMP4]] // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] // CHECK2: omp.arrayinit.done: // CHECK2-NEXT: [[TMP9:%.*]] = load [4 x %struct.S.0]*, [4 x %struct.S.0]** [[_TMP1]], align 8 @@ -5368,7 +5232,7 @@ int main() { // CHECK2-NEXT: [[TMP15:%.*]] = bitcast [2 x %struct.S.0]* [[VAR34]] to %struct.S.0* // CHECK2-NEXT: [[TMP16:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[TMP15]], i64 [[TMP14]] // CHECK2-NEXT: [[TMP17:%.*]] = bitcast %struct.S.0* [[TMP16]] to [4 x %struct.S.0]* -// CHECK2-NEXT: store [4 x %struct.S.0]* [[TMP17]], [4 x %struct.S.0]** [[_TMP8]], align 8 +// CHECK2-NEXT: store [4 x %struct.S.0]* [[TMP17]], [4 x %struct.S.0]** [[_TMP7]], align 8 // CHECK2-NEXT: [[RHS_BEGIN:%.*]] = bitcast [2 x %struct.S.0]* [[VAR34]] to %struct.S.0* // CHECK2-NEXT: [[TMP18:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[TMP18]], align 4 @@ -5390,8 +5254,8 @@ int main() { // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP23]], [[TMP24]] -// CHECK2-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] +// CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP23]], [[TMP24]] +// CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] // CHECK2: omp.inner.for.cond.cleanup: // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: @@ -5404,8 +5268,8 @@ int main() { // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP26]], 1 -// CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP26]], 1 +// CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] @@ -5427,60 +5291,60 @@ int main() { // CHECK2: .omp.reduction.case1: // CHECK2-NEXT: [[TMP35:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAYIDX]], i64 2 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP35]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE17:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE16:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] // CHECK2: omp.arraycpy.body: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST11:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST12:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT15:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK2-NEXT: [[TMP36:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST12]] to i8* -// CHECK2-NEXT: [[ADD_PTR13:%.*]] = getelementptr inbounds i8, i8* [[TMP36]], i64 4 -// CHECK2-NEXT: [[TMP37:%.*]] = bitcast i8* [[ADD_PTR13]] to %struct.BaseS1* -// CHECK2-NEXT: [[TMP38:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST11]] to i8* -// CHECK2-NEXT: [[ADD_PTR14:%.*]] = getelementptr inbounds i8, i8* [[TMP38]], i64 4 -// CHECK2-NEXT: [[TMP39:%.*]] = bitcast i8* [[ADD_PTR14]] to %struct.BaseS1* +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT14:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK2-NEXT: [[TMP36:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST11]] to i8* +// CHECK2-NEXT: [[ADD_PTR12:%.*]] = getelementptr inbounds i8, i8* [[TMP36]], i64 4 +// CHECK2-NEXT: [[TMP37:%.*]] = bitcast i8* [[ADD_PTR12]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP38:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST10]] to i8* +// CHECK2-NEXT: [[ADD_PTR13:%.*]] = getelementptr inbounds i8, i8* [[TMP38]], i64 4 +// CHECK2-NEXT: [[TMP39:%.*]] = bitcast i8* [[ADD_PTR13]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP37]], %struct.BaseS1* [[TMP39]]) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT15]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST12]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST11]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE16:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT15]], [[TMP35]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE16]], label [[OMP_ARRAYCPY_DONE17]], label [[OMP_ARRAYCPY_BODY]] -// CHECK2: omp.arraycpy.done17: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT14]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE15:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT14]], [[TMP35]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE15]], label [[OMP_ARRAYCPY_DONE16]], label [[OMP_ARRAYCPY_BODY]] +// CHECK2: omp.arraycpy.done16: // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK2: .omp.reduction.case2: // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAYIDX]], i64 2 -// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY18:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP40]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY18]], label [[OMP_ARRAYCPY_DONE27:%.*]], label [[OMP_ARRAYCPY_BODY19:%.*]] -// CHECK2: omp.arraycpy.body19: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST20:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT25:%.*]], [[OMP_ARRAYCPY_BODY19]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST21:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT24:%.*]], [[OMP_ARRAYCPY_BODY19]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY17:%.*]] = icmp eq %struct.S.0* [[ARRAYIDX]], [[TMP40]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY17]], label [[OMP_ARRAYCPY_DONE26:%.*]], label [[OMP_ARRAYCPY_BODY18:%.*]] +// CHECK2: omp.arraycpy.body18: +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST19:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT24:%.*]], [[OMP_ARRAYCPY_BODY18]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST20:%.*]] = phi %struct.S.0* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT23:%.*]], [[OMP_ARRAYCPY_BODY18]] ] // CHECK2-NEXT: [[TMP41:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[TMP41]], align 4 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP42]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: [[TMP43:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST21]] to i8* -// CHECK2-NEXT: [[ADD_PTR22:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 -// CHECK2-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR22]] to %struct.BaseS1* -// CHECK2-NEXT: [[TMP45:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST20]] to i8* -// CHECK2-NEXT: [[ADD_PTR23:%.*]] = getelementptr inbounds i8, i8* [[TMP45]], i64 4 -// CHECK2-NEXT: [[TMP46:%.*]] = bitcast i8* [[ADD_PTR23]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP43:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST20]] to i8* +// CHECK2-NEXT: [[ADD_PTR21:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 +// CHECK2-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR21]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP45:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST19]] to i8* +// CHECK2-NEXT: [[ADD_PTR22:%.*]] = getelementptr inbounds i8, i8* [[TMP45]], i64 4 +// CHECK2-NEXT: [[TMP46:%.*]] = bitcast i8* [[ADD_PTR22]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP44]], %struct.BaseS1* [[TMP46]]) // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP42]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT24]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST21]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT25]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST20]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE26:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT24]], [[TMP40]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE26]], label [[OMP_ARRAYCPY_DONE27]], label [[OMP_ARRAYCPY_BODY19]] -// CHECK2: omp.arraycpy.done27: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT23]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST20]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT24]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST19]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE25:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT23]], [[TMP40]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE25]], label [[OMP_ARRAYCPY_DONE26]], label [[OMP_ARRAYCPY_BODY18]] +// CHECK2: omp.arraycpy.done26: // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP32]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK2: .omp.reduction.default: -// CHECK2-NEXT: [[ARRAY_BEGIN28:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[VAR34]], i32 0, i32 0 -// CHECK2-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN28]], i64 2 +// CHECK2-NEXT: [[ARRAY_BEGIN27:%.*]] = getelementptr inbounds [2 x %struct.S.0], [2 x %struct.S.0]* [[VAR34]], i32 0, i32 0 +// CHECK2-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN27]], i64 2 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] // CHECK2: arraydestroy.body: // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP47]], [[DOTOMP_REDUCTION_DEFAULT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] -// CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN28]] -// CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE29:%.*]], label [[ARRAYDESTROY_BODY]] -// CHECK2: arraydestroy.done29: +// CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN27]] +// CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE28:%.*]], label [[ARRAYDESTROY_BODY]] +// CHECK2: arraydestroy.done28: // CHECK2-NEXT: [[TMP48:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK2-NEXT: [[TMP49:%.*]] = load i32, i32* [[TMP48]], align 4 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP49]]) @@ -5539,7 +5403,7 @@ int main() { // CHECK2-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4 // CHECK2-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4 // CHECK2-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4 -// CHECK2-NEXT: [[_TMP6:%.*]] = alloca [4 x %struct.S.0]*, align 8 +// CHECK2-NEXT: [[_TMP5:%.*]] = alloca [4 x %struct.S.0]*, align 8 // CHECK2-NEXT: [[I:%.*]] = alloca i32, align 4 // CHECK2-NEXT: [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x i8*], align 8 // CHECK2-NEXT: store i32* [[DOTGLOBAL_TID_]], i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -5559,36 +5423,26 @@ int main() { // CHECK2-NEXT: [[DOTVAR3__VOID_ADDR:%.*]] = call i8* @__kmpc_alloc(i32 [[TMP4]], i64 48, i8* inttoptr (i64 6 to i8*)) // CHECK2-NEXT: [[DOTVAR3__ADDR:%.*]] = bitcast i8* [[DOTVAR3__VOID_ADDR]] to [4 x %struct.S.0]* // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [4 x %struct.S.0], [4 x %struct.S.0]* [[DOTVAR3__ADDR]], i32 0, i32 0 -// CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 4 -// CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK2: arrayctor.loop: -// CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK2-NEXT: call void @_ZN1SIfEC1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYCTOR_CUR]], i64 1 -// CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] -// CHECK2: arrayctor.cont: -// CHECK2-NEXT: [[ARRAY_BEGIN3:%.*]] = getelementptr inbounds [4 x %struct.S.0], [4 x %struct.S.0]* [[DOTVAR3__ADDR]], i32 0, i32 0 // CHECK2-NEXT: [[TMP5:%.*]] = bitcast [4 x %struct.S.0]* [[TMP2]] to %struct.S.0* -// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN3]], i64 4 -// CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN3]], [[TMP6]] +// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr [[STRUCT_S_0:%.*]], %struct.S.0* [[ARRAY_BEGIN]], i64 4 +// CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[ARRAY_BEGIN]], [[TMP6]] // CHECK2-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] // CHECK2: omp.arrayinit.body: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP5]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN3]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S.0* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT4:%.*]], [[OMP_ARRAYINIT_BODY]] ] // CHECK2-NEXT: [[TMP7:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP7]], i64 4 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* // CHECK2-NEXT: [[TMP9:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* -// CHECK2-NEXT: [[ADD_PTR4:%.*]] = getelementptr inbounds i8, i8* [[TMP9]], i64 4 -// CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8* [[ADD_PTR4]] to %struct.BaseS1* +// CHECK2-NEXT: [[ADD_PTR3:%.*]] = getelementptr inbounds i8, i8* [[TMP9]], i64 4 +// CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8* [[ADD_PTR3]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP8]], %struct.BaseS1* [[TMP10]]) // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP6]] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT4]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT4]], [[TMP6]] // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] // CHECK2: omp.arrayinit.done: -// CHECK2-NEXT: store [4 x %struct.S.0]* [[DOTVAR3__ADDR]], [4 x %struct.S.0]** [[_TMP6]], align 8 +// CHECK2-NEXT: store [4 x %struct.S.0]* [[DOTVAR3__ADDR]], [4 x %struct.S.0]** [[_TMP5]], align 8 // CHECK2-NEXT: [[LHS_BEGIN:%.*]] = bitcast [4 x %struct.S.0]* [[TMP2]] to %struct.S.0* // CHECK2-NEXT: [[RHS_BEGIN:%.*]] = bitcast [4 x %struct.S.0]* [[DOTVAR3__ADDR]] to %struct.S.0* // CHECK2-NEXT: call void @__kmpc_for_static_init_4(%struct.ident_t* @[[GLOB2]], i32 [[TMP4]], i32 34, i32* [[DOTOMP_IS_LAST]], i32* [[DOTOMP_LB]], i32* [[DOTOMP_UB]], i32* [[DOTOMP_STRIDE]], i32 1, i32 1) @@ -5609,8 +5463,8 @@ int main() { // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] -// CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] +// CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] +// CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] // CHECK2: omp.inner.for.cond.cleanup: // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: @@ -5623,8 +5477,8 @@ int main() { // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] @@ -5642,58 +5496,58 @@ int main() { // CHECK2: .omp.reduction.case1: // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[LHS_BEGIN]], i64 4 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP22]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE15:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] // CHECK2: omp.arraycpy.body: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST9:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST10:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT13:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK2-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST10]] to i8* -// CHECK2-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i8, i8* [[TMP23]], i64 4 -// CHECK2-NEXT: [[TMP24:%.*]] = bitcast i8* [[ADD_PTR11]] to %struct.BaseS1* -// CHECK2-NEXT: [[TMP25:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST9]] to i8* -// CHECK2-NEXT: [[ADD_PTR12:%.*]] = getelementptr inbounds i8, i8* [[TMP25]], i64 4 -// CHECK2-NEXT: [[TMP26:%.*]] = bitcast i8* [[ADD_PTR12]] to %struct.BaseS1* +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST8:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST9:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT12:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK2-NEXT: [[TMP23:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]] to i8* +// CHECK2-NEXT: [[ADD_PTR10:%.*]] = getelementptr inbounds i8, i8* [[TMP23]], i64 4 +// CHECK2-NEXT: [[TMP24:%.*]] = bitcast i8* [[ADD_PTR10]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP25:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]] to i8* +// CHECK2-NEXT: [[ADD_PTR11:%.*]] = getelementptr inbounds i8, i8* [[TMP25]], i64 4 +// CHECK2-NEXT: [[TMP26:%.*]] = bitcast i8* [[ADD_PTR11]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP24]], %struct.BaseS1* [[TMP26]]) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT13]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST10]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST9]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE14:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT13]], [[TMP22]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_DONE15]], label [[OMP_ARRAYCPY_BODY]] -// CHECK2: omp.arraycpy.done15: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT12]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST9]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST8]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE13:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT12]], [[TMP22]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]] +// CHECK2: omp.arraycpy.done14: // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK2: .omp.reduction.case2: // CHECK2-NEXT: [[TMP27:%.*]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[LHS_BEGIN]], i64 4 -// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY16:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP27]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY16]], label [[OMP_ARRAYCPY_DONE25:%.*]], label [[OMP_ARRAYCPY_BODY17:%.*]] -// CHECK2: omp.arraycpy.body17: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST18:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT23:%.*]], [[OMP_ARRAYCPY_BODY17]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST19:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT22:%.*]], [[OMP_ARRAYCPY_BODY17]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY15:%.*]] = icmp eq %struct.S.0* [[LHS_BEGIN]], [[TMP27]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY15]], label [[OMP_ARRAYCPY_DONE24:%.*]], label [[OMP_ARRAYCPY_BODY16:%.*]] +// CHECK2: omp.arraycpy.body16: +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST17:%.*]] = phi %struct.S.0* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT22:%.*]], [[OMP_ARRAYCPY_BODY16]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST18:%.*]] = phi %struct.S.0* [ [[LHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT21:%.*]], [[OMP_ARRAYCPY_BODY16]] ] // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST19]] to i8* -// CHECK2-NEXT: [[ADD_PTR20:%.*]] = getelementptr inbounds i8, i8* [[TMP28]], i64 4 -// CHECK2-NEXT: [[TMP29:%.*]] = bitcast i8* [[ADD_PTR20]] to %struct.BaseS1* -// CHECK2-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST18]] to i8* -// CHECK2-NEXT: [[ADD_PTR21:%.*]] = getelementptr inbounds i8, i8* [[TMP30]], i64 4 -// CHECK2-NEXT: [[TMP31:%.*]] = bitcast i8* [[ADD_PTR21]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP28:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST18]] to i8* +// CHECK2-NEXT: [[ADD_PTR19:%.*]] = getelementptr inbounds i8, i8* [[TMP28]], i64 4 +// CHECK2-NEXT: [[TMP29:%.*]] = bitcast i8* [[ADD_PTR19]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP30:%.*]] = bitcast %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST17]] to i8* +// CHECK2-NEXT: [[ADD_PTR20:%.*]] = getelementptr inbounds i8, i8* [[TMP30]], i64 4 +// CHECK2-NEXT: [[TMP31:%.*]] = bitcast i8* [[ADD_PTR20]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_combiner..4(%struct.BaseS1* [[TMP29]], %struct.BaseS1* [[TMP31]]) // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT22]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST19]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT23]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST18]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE24:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT22]], [[TMP27]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE24]], label [[OMP_ARRAYCPY_DONE25]], label [[OMP_ARRAYCPY_BODY17]] -// CHECK2: omp.arraycpy.done25: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT21]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_DESTELEMENTPAST18]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT22]] = getelementptr [[STRUCT_S_0]], %struct.S.0* [[OMP_ARRAYCPY_SRCELEMENTPAST17]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE23:%.*]] = icmp eq %struct.S.0* [[OMP_ARRAYCPY_DEST_ELEMENT21]], [[TMP27]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE23]], label [[OMP_ARRAYCPY_DONE24]], label [[OMP_ARRAYCPY_BODY16]] +// CHECK2: omp.arraycpy.done24: // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP4]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK2: .omp.reduction.default: -// CHECK2-NEXT: [[ARRAY_BEGIN26:%.*]] = getelementptr inbounds [4 x %struct.S.0], [4 x %struct.S.0]* [[DOTVAR3__ADDR]], i32 0, i32 0 -// CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN26]], i64 4 +// CHECK2-NEXT: [[ARRAY_BEGIN25:%.*]] = getelementptr inbounds [4 x %struct.S.0], [4 x %struct.S.0]* [[DOTVAR3__ADDR]], i32 0, i32 0 +// CHECK2-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAY_BEGIN25]], i64 4 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] // CHECK2: arraydestroy.body: // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S.0* [ [[TMP32]], [[DOTOMP_REDUCTION_DEFAULT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], %struct.S.0* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 // CHECK2-NEXT: call void @_ZN1SIfED1Ev(%struct.S.0* nonnull align 4 dereferenceable(12) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] -// CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN26]] -// CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE27:%.*]], label [[ARRAYDESTROY_BODY]] -// CHECK2: arraydestroy.done27: +// CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S.0* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN25]] +// CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE26:%.*]], label [[ARRAYDESTROY_BODY]] +// CHECK2: arraydestroy.done26: // CHECK2-NEXT: [[TMP33:%.*]] = bitcast [4 x %struct.S.0]* [[DOTVAR3__ADDR]] to i8* // CHECK2-NEXT: call void @__kmpc_free(i32 [[TMP4]], i8* [[TMP33]], i8* inttoptr (i64 6 to i8*)) // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP4]]) @@ -5914,7 +5768,6 @@ int main() { // CHECK2-NEXT: store i32 0, i32* [[DOTOMP_IS_LAST]], align 4 // CHECK2-NEXT: call void @.omp_initializer..25(i32* [[T_VAR3]], i32* [[TMP0]]) // CHECK2-NEXT: [[TMP7:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 -// CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[VAR4]]) // CHECK2-NEXT: [[TMP8:%.*]] = bitcast %struct.S* [[VAR4]] to i8* // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP8]], i64 4 // CHECK2-NEXT: [[TMP9:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* @@ -5923,7 +5776,6 @@ int main() { // CHECK2-NEXT: [[TMP11:%.*]] = bitcast i8* [[ADD_PTR5]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_initializer..5(%struct.BaseS1* [[TMP9]], %struct.BaseS1* [[TMP11]]) // CHECK2-NEXT: store %struct.S* [[VAR4]], %struct.S** [[_TMP6]], align 8 -// CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[VAR17]]) // CHECK2-NEXT: call void @.omp_initializer..27(%struct.S* [[VAR17]], %struct.S* [[TMP2]]) // CHECK2-NEXT: call void @.omp_initializer..29(i32* [[T_VAR18]], i32* [[TMP3]]) // CHECK2-NEXT: [[TMP12:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -6367,32 +6219,22 @@ int main() { // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [42 x %struct.S], [42 x %struct.S]* [[TMP0]], i64 0, i64 1 // CHECK2-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds [42 x %struct.S], [42 x %struct.S]* [[TMP0]], i64 0, i64 40 // CHECK2-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [40 x %struct.S], [40 x %struct.S]* [[ARR4]], i32 0, i32 0 -// CHECK2-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], %struct.S* [[ARRAY_BEGIN]], i64 40 -// CHECK2-NEXT: br label [[ARRAYCTOR_LOOP:%.*]] -// CHECK2: arrayctor.loop: -// CHECK2-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ] -// CHECK2-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[ARRAYCTOR_CUR]]) -// CHECK2-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYCTOR_CUR]], i64 1 -// CHECK2-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq %struct.S* [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]] -// CHECK2-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]] -// CHECK2: arrayctor.cont: -// CHECK2-NEXT: [[ARRAY_BEGIN5:%.*]] = getelementptr inbounds [40 x %struct.S], [40 x %struct.S]* [[ARR4]], i32 0, i32 0 -// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN5]], i64 40 -// CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN5]], [[TMP6]] +// CHECK2-NEXT: [[TMP6:%.*]] = getelementptr [[STRUCT_S:%.*]], %struct.S* [[ARRAY_BEGIN]], i64 40 +// CHECK2-NEXT: [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAY_BEGIN]], [[TMP6]] // CHECK2-NEXT: br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]] // CHECK2: omp.arrayinit.body: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN5]], [[ARRAYCTOR_CONT]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT7:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi %struct.S* [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT6:%.*]], [[OMP_ARRAYINIT_BODY]] ] // CHECK2-NEXT: [[TMP7:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]] to i8* // CHECK2-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i8, i8* [[TMP7]], i64 4 // CHECK2-NEXT: [[TMP8:%.*]] = bitcast i8* [[ADD_PTR]] to %struct.BaseS1* // CHECK2-NEXT: [[TMP9:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]] to i8* -// CHECK2-NEXT: [[ADD_PTR6:%.*]] = getelementptr inbounds i8, i8* [[TMP9]], i64 4 -// CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8* [[ADD_PTR6]] to %struct.BaseS1* +// CHECK2-NEXT: [[ADD_PTR5:%.*]] = getelementptr inbounds i8, i8* [[TMP9]], i64 4 +// CHECK2-NEXT: [[TMP10:%.*]] = bitcast i8* [[ADD_PTR5]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_initializer..37(%struct.BaseS1* [[TMP8]], %struct.BaseS1* [[TMP10]]) // CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT7]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT7]], [[TMP6]] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT6]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT6]], [[TMP6]] // CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]] // CHECK2: omp.arrayinit.done: // CHECK2-NEXT: [[TMP11:%.*]] = bitcast [42 x %struct.S]* [[TMP0]] to %struct.S* @@ -6424,8 +6266,8 @@ int main() { // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP24]], [[TMP25]] -// CHECK2-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] +// CHECK2-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP24]], [[TMP25]] +// CHECK2-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]] // CHECK2: omp.inner.for.cond.cleanup: // CHECK2-NEXT: br label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: @@ -6436,20 +6278,20 @@ int main() { // CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP2]], align 4 // CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[I]], align 4 // CHECK2-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP28]] to i64 -// CHECK2-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] -// CHECK2-NEXT: store i32 [[TMP27]], i32* [[ARRAYIDX9]], align 4 +// CHECK2-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[TMP1]], i64 0, i64 [[IDXPROM]] +// CHECK2-NEXT: store i32 [[TMP27]], i32* [[ARRAYIDX8]], align 4 // CHECK2-NEXT: [[TMP29:%.*]] = load %struct.S*, %struct.S** [[_TMP1]], align 8 // CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[I]], align 4 -// CHECK2-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP30]] to i64 -// CHECK2-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP3]], i64 0, i64 [[IDXPROM10]] -// CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(12) %struct.S* @_ZN1SIiEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(12) [[ARRAYIDX11]], %struct.S* nonnull align 4 dereferenceable(12) [[TMP29]]) +// CHECK2-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP30]] to i64 +// CHECK2-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], [2 x %struct.S]* [[TMP3]], i64 0, i64 [[IDXPROM9]] +// CHECK2-NEXT: [[CALL:%.*]] = call nonnull align 4 dereferenceable(12) %struct.S* @_ZN1SIiEaSERKS0_(%struct.S* nonnull align 4 dereferenceable(12) [[ARRAYIDX10]], %struct.S* nonnull align 4 dereferenceable(12) [[TMP29]]) // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK2: omp.body.continue: // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP31]], 1 -// CHECK2-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP31]], 1 +// CHECK2-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] @@ -6471,60 +6313,60 @@ int main() { // CHECK2: .omp.reduction.case1: // CHECK2-NEXT: [[TMP40:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAYIDX]], i64 40 // CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq %struct.S* [[ARRAYIDX]], [[TMP40]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE19:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE18:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]] // CHECK2: omp.arraycpy.body: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST13:%.*]] = phi %struct.S* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST14:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT17:%.*]], [[OMP_ARRAYCPY_BODY]] ] -// CHECK2-NEXT: [[TMP41:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST14]] to i8* -// CHECK2-NEXT: [[ADD_PTR15:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 -// CHECK2-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR15]] to %struct.BaseS1* -// CHECK2-NEXT: [[TMP43:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST13]] to i8* -// CHECK2-NEXT: [[ADD_PTR16:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 -// CHECK2-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR16]] to %struct.BaseS1* +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST12:%.*]] = phi %struct.S* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST13:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT16:%.*]], [[OMP_ARRAYCPY_BODY]] ] +// CHECK2-NEXT: [[TMP41:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST13]] to i8* +// CHECK2-NEXT: [[ADD_PTR14:%.*]] = getelementptr inbounds i8, i8* [[TMP41]], i64 4 +// CHECK2-NEXT: [[TMP42:%.*]] = bitcast i8* [[ADD_PTR14]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP43:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST12]] to i8* +// CHECK2-NEXT: [[ADD_PTR15:%.*]] = getelementptr inbounds i8, i8* [[TMP43]], i64 4 +// CHECK2-NEXT: [[TMP44:%.*]] = bitcast i8* [[ADD_PTR15]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_combiner..36(%struct.BaseS1* [[TMP42]], %struct.BaseS1* [[TMP44]]) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT17]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST14]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST13]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE18:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT17]], [[TMP40]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE18]], label [[OMP_ARRAYCPY_DONE19]], label [[OMP_ARRAYCPY_BODY]] -// CHECK2: omp.arraycpy.done19: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT16]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST13]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST12]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE17:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT16]], [[TMP40]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE17]], label [[OMP_ARRAYCPY_DONE18]], label [[OMP_ARRAYCPY_BODY]] +// CHECK2: omp.arraycpy.done18: // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP37]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK2: .omp.reduction.case2: // CHECK2-NEXT: [[TMP45:%.*]] = getelementptr [[STRUCT_S]], %struct.S* [[ARRAYIDX]], i64 40 -// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY20:%.*]] = icmp eq %struct.S* [[ARRAYIDX]], [[TMP45]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY20]], label [[OMP_ARRAYCPY_DONE29:%.*]], label [[OMP_ARRAYCPY_BODY21:%.*]] -// CHECK2: omp.arraycpy.body21: -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST22:%.*]] = phi %struct.S* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT27:%.*]], [[OMP_ARRAYCPY_BODY21]] ] -// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST23:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT26:%.*]], [[OMP_ARRAYCPY_BODY21]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_ISEMPTY19:%.*]] = icmp eq %struct.S* [[ARRAYIDX]], [[TMP45]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY19]], label [[OMP_ARRAYCPY_DONE28:%.*]], label [[OMP_ARRAYCPY_BODY20:%.*]] +// CHECK2: omp.arraycpy.body20: +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST21:%.*]] = phi %struct.S* [ [[RHS_BEGIN]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT26:%.*]], [[OMP_ARRAYCPY_BODY20]] ] +// CHECK2-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST22:%.*]] = phi %struct.S* [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT25:%.*]], [[OMP_ARRAYCPY_BODY20]] ] // CHECK2-NEXT: [[TMP46:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK2-NEXT: [[TMP47:%.*]] = load i32, i32* [[TMP46]], align 4 // CHECK2-NEXT: call void @__kmpc_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: [[TMP48:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST23]] to i8* -// CHECK2-NEXT: [[ADD_PTR24:%.*]] = getelementptr inbounds i8, i8* [[TMP48]], i64 4 -// CHECK2-NEXT: [[TMP49:%.*]] = bitcast i8* [[ADD_PTR24]] to %struct.BaseS1* -// CHECK2-NEXT: [[TMP50:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST22]] to i8* -// CHECK2-NEXT: [[ADD_PTR25:%.*]] = getelementptr inbounds i8, i8* [[TMP50]], i64 4 -// CHECK2-NEXT: [[TMP51:%.*]] = bitcast i8* [[ADD_PTR25]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP48:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST22]] to i8* +// CHECK2-NEXT: [[ADD_PTR23:%.*]] = getelementptr inbounds i8, i8* [[TMP48]], i64 4 +// CHECK2-NEXT: [[TMP49:%.*]] = bitcast i8* [[ADD_PTR23]] to %struct.BaseS1* +// CHECK2-NEXT: [[TMP50:%.*]] = bitcast %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST21]] to i8* +// CHECK2-NEXT: [[ADD_PTR24:%.*]] = getelementptr inbounds i8, i8* [[TMP50]], i64 4 +// CHECK2-NEXT: [[TMP51:%.*]] = bitcast i8* [[ADD_PTR24]] to %struct.BaseS1* // CHECK2-NEXT: call void @.omp_combiner..36(%struct.BaseS1* [[TMP49]], %struct.BaseS1* [[TMP51]]) // CHECK2-NEXT: call void @__kmpc_end_critical(%struct.ident_t* @[[GLOB1]], i32 [[TMP47]], [8 x i32]* @.gomp_critical_user_.atomic_reduction.var) -// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT26]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST23]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT27]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST22]], i32 1 -// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE28:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT26]], [[TMP45]] -// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE28]], label [[OMP_ARRAYCPY_DONE29]], label [[OMP_ARRAYCPY_BODY21]] -// CHECK2: omp.arraycpy.done29: +// CHECK2-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT25]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_DESTELEMENTPAST22]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT26]] = getelementptr [[STRUCT_S]], %struct.S* [[OMP_ARRAYCPY_SRCELEMENTPAST21]], i32 1 +// CHECK2-NEXT: [[OMP_ARRAYCPY_DONE27:%.*]] = icmp eq %struct.S* [[OMP_ARRAYCPY_DEST_ELEMENT25]], [[TMP45]] +// CHECK2-NEXT: br i1 [[OMP_ARRAYCPY_DONE27]], label [[OMP_ARRAYCPY_DONE28]], label [[OMP_ARRAYCPY_BODY20]] +// CHECK2: omp.arraycpy.done28: // CHECK2-NEXT: call void @__kmpc_end_reduce(%struct.ident_t* @[[GLOB3]], i32 [[TMP37]], [8 x i32]* @.gomp_critical_user_.reduction.var) // CHECK2-NEXT: br label [[DOTOMP_REDUCTION_DEFAULT]] // CHECK2: .omp.reduction.default: -// CHECK2-NEXT: [[ARRAY_BEGIN30:%.*]] = getelementptr inbounds [40 x %struct.S], [40 x %struct.S]* [[ARR4]], i32 0, i32 0 -// CHECK2-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN30]], i64 40 +// CHECK2-NEXT: [[ARRAY_BEGIN29:%.*]] = getelementptr inbounds [40 x %struct.S], [40 x %struct.S]* [[ARR4]], i32 0, i32 0 +// CHECK2-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAY_BEGIN29]], i64 40 // CHECK2-NEXT: br label [[ARRAYDESTROY_BODY:%.*]] // CHECK2: arraydestroy.body: // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi %struct.S* [ [[TMP52]], [[DOTOMP_REDUCTION_DEFAULT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ] // CHECK2-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], %struct.S* [[ARRAYDESTROY_ELEMENTPAST]], i64 -1 // CHECK2-NEXT: call void @_ZN1SIiED1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]] -// CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN30]] -// CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE31:%.*]], label [[ARRAYDESTROY_BODY]] -// CHECK2: arraydestroy.done31: +// CHECK2-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq %struct.S* [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN29]] +// CHECK2-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE30:%.*]], label [[ARRAYDESTROY_BODY]] +// CHECK2: arraydestroy.done30: // CHECK2-NEXT: [[TMP53:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 // CHECK2-NEXT: [[TMP54:%.*]] = load i32, i32* [[TMP53]], align 4 // CHECK2-NEXT: call void @__kmpc_barrier(%struct.ident_t* @[[GLOB4]], i32 [[TMP54]]) @@ -6627,7 +6469,6 @@ int main() { // CHECK3-NEXT: [[S1:%.*]] = alloca [[STRUCT_S]], align 4 // CHECK3-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[S]]) // CHECK3-NEXT: store i32 0, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[S1]]) // CHECK3-NEXT: call void @.omp_initializer.(%struct.S* [[S1]], %struct.S* [[S]]) // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK3: omp.inner.for.cond: @@ -7265,7 +7106,6 @@ int main() { // CHECK4-NEXT: [[S1:%.*]] = alloca [[STRUCT_S]], align 4 // CHECK4-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[S]]) // CHECK4-NEXT: store i32 0, i32* [[DOTOMP_IV]], align 4 -// CHECK4-NEXT: call void @_ZN1SIiEC1Ev(%struct.S* nonnull align 4 dereferenceable(12) [[S1]]) // CHECK4-NEXT: call void @.omp_initializer.(%struct.S* [[S1]], %struct.S* [[S]]) // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK4: omp.inner.for.cond: diff --git a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp index 4256228fdea9a..de393701c2f0f 100644 --- a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp @@ -18721,34 +18721,33 @@ int bar(int n){ // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK1: omp.dispatch.cond: // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV7:%.*]] = sext i32 [[TMP9]] to i64 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK1-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP10]] +// CHECK1-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP10]] to i32 +// CHECK1-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP9]], [[CONV7]] // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK1: cond.true: // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP11]] to i32 // CHECK1-NEXT: br label [[COND_END:%.*]] // CHECK1: cond.false: // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV9:%.*]] = sext i32 [[TMP12]] to i64 // CHECK1-NEXT: br label [[COND_END]] // CHECK1: cond.end: -// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP11]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK1-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK1-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] +// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] -// CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] +// CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK1: omp.dispatch.body: // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] -// CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] +// CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 @@ -18765,20 +18764,20 @@ int bar(int n){ // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP21]], 1 -// CHECK1-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP21]], 1 +// CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK1: omp.dispatch.inc: // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] -// CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_LB]], align 4 +// CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] +// CHECK1-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] -// CHECK1-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] +// CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK1: omp.dispatch.end: // CHECK1-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -20328,34 +20327,33 @@ int bar(int n){ // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK2: omp.dispatch.cond: // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV7:%.*]] = sext i32 [[TMP9]] to i64 // CHECK2-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK2-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP10]] +// CHECK2-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP10]] to i32 +// CHECK2-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP9]], [[CONV7]] // CHECK2-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK2: cond.true: // CHECK2-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK2-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP11]] to i32 // CHECK2-NEXT: br label [[COND_END:%.*]] // CHECK2: cond.false: // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV9:%.*]] = sext i32 [[TMP12]] to i64 // CHECK2-NEXT: br label [[COND_END]] // CHECK2: cond.end: -// CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[TMP11]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK2-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK2-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] +// CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] -// CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK2-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] +// CHECK2-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK2: omp.dispatch.body: // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] -// CHECK2-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK2-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] +// CHECK2-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 @@ -20372,20 +20370,20 @@ int bar(int n){ // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP21]], 1 -// CHECK2-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP21]], 1 +// CHECK2-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK2: omp.dispatch.inc: // CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] -// CHECK2-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_LB]], align 4 +// CHECK2-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] +// CHECK2-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] -// CHECK2-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] +// CHECK2-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK2: omp.dispatch.end: // CHECK2-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -21917,7 +21915,7 @@ int bar(int n){ // CHECK3: omp.dispatch.cond: // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK3-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]] +// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK3: cond.true: // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -23463,7 +23461,7 @@ int bar(int n){ // CHECK4: omp.dispatch.cond: // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK4-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]] +// CHECK4-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] // CHECK4-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK4: cond.true: // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 diff --git a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp index 7b17bb7824a03..4b558c34e1e6f 100644 --- a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_generic_mode_codegen.cpp @@ -274,64 +274,63 @@ int main(int argc, char **argv) { // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK1: omp.dispatch.cond: // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV8:%.*]] = sext i32 [[TMP10]] to i64 // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK1-NEXT: [[CMP9:%.*]] = icmp ugt i64 [[CONV8]], [[TMP11]] +// CHECK1-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP11]] to i32 +// CHECK1-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP10]], [[CONV8]] // CHECK1-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK1: cond.true: // CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[CONV10:%.*]] = trunc i64 [[TMP12]] to i32 // CHECK1-NEXT: br label [[COND_END:%.*]] // CHECK1: cond.false: // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV10:%.*]] = sext i32 [[TMP13]] to i64 // CHECK1-NEXT: br label [[COND_END]] // CHECK1: cond.end: -// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[CONV10]], [[COND_FALSE]] ] -// CHECK1-NEXT: [[CONV11:%.*]] = trunc i64 [[COND]] to i32 -// CHECK1-NEXT: store i32 [[CONV11]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV10]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] +// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] -// CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] +// CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK1: omp.dispatch.body: // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP13:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] -// CHECK1-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK1-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] +// CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK1-NEXT: store i32 [[ADD]], i32* [[I7]], align 4 // CHECK1-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I7]]) #[[ATTR4:[0-9]+]] -// CHECK1-NEXT: [[CALL14:%.*]] = call i32 @_Z3fooPi(i32* [[TMP0]]) #[[ATTR4]] -// CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[CALL]], [[CALL14]] -// CHECK1-NEXT: [[CALL16:%.*]] = call i32 @_Z3fooPi(i32* [[CONV]]) #[[ATTR4]] -// CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[ADD15]], [[CALL16]] -// CHECK1-NEXT: store i32 [[ADD17]], i32* [[TMP0]], align 4 +// CHECK1-NEXT: [[CALL13:%.*]] = call i32 @_Z3fooPi(i32* [[TMP0]]) #[[ATTR4]] +// CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[CALL]], [[CALL13]] +// CHECK1-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[CONV]]) #[[ATTR4]] +// CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD14]], [[CALL15]] +// CHECK1-NEXT: store i32 [[ADD16]], i32* [[TMP0]], align 4 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK1: omp.body.continue: // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP20]], 1 -// CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1 +// CHECK1-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK1: omp.dispatch.inc: // CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] -// CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] +// CHECK1-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] -// CHECK1-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] +// CHECK1-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK1: omp.dispatch.end: // CHECK1-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -574,7 +573,7 @@ int main(int argc, char **argv) { // CHECK2: omp.dispatch.cond: // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK2-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP10]], [[TMP11]] +// CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK2: cond.true: // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -870,7 +869,7 @@ int main(int argc, char **argv) { // CHECK3: omp.dispatch.cond: // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK3-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP10]], [[TMP11]] +// CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK3: cond.true: // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -1179,64 +1178,63 @@ int main(int argc, char **argv) { // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK4: omp.dispatch.cond: // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK4-NEXT: [[CONV8:%.*]] = sext i32 [[TMP10]] to i64 // CHECK4-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK4-NEXT: [[CMP9:%.*]] = icmp ugt i64 [[CONV8]], [[TMP11]] +// CHECK4-NEXT: [[CONV8:%.*]] = trunc i64 [[TMP11]] to i32 +// CHECK4-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP10]], [[CONV8]] // CHECK4-NEXT: br i1 [[CMP9]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK4: cond.true: // CHECK4-NEXT: [[TMP12:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK4-NEXT: [[CONV10:%.*]] = trunc i64 [[TMP12]] to i32 // CHECK4-NEXT: br label [[COND_END:%.*]] // CHECK4: cond.false: // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK4-NEXT: [[CONV10:%.*]] = sext i32 [[TMP13]] to i64 // CHECK4-NEXT: br label [[COND_END]] // CHECK4: cond.end: -// CHECK4-NEXT: [[COND:%.*]] = phi i64 [ [[TMP12]], [[COND_TRUE]] ], [ [[CONV10]], [[COND_FALSE]] ] -// CHECK4-NEXT: [[CONV11:%.*]] = trunc i64 [[COND]] to i32 -// CHECK4-NEXT: store i32 [[CONV11]], i32* [[DOTOMP_UB]], align 4 +// CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[CONV10]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ] +// CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK4-NEXT: store i32 [[TMP14]], i32* [[DOTOMP_IV]], align 4 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK4-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] -// CHECK4-NEXT: br i1 [[CMP12]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK4-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]] +// CHECK4-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK4: omp.dispatch.body: // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK4: omp.inner.for.cond: // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK4-NEXT: [[CMP13:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] -// CHECK4-NEXT: br i1 [[CMP13]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK4-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]] +// CHECK4-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK4: omp.inner.for.body: // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] // CHECK4-NEXT: store i32 [[ADD]], i32* [[I7]], align 4 // CHECK4-NEXT: [[CALL:%.*]] = call i32 @_Z3fooPi(i32* [[I7]]) #[[ATTR4:[0-9]+]] -// CHECK4-NEXT: [[CALL14:%.*]] = call i32 @_Z3fooPi(i32* [[TMP0]]) #[[ATTR4]] -// CHECK4-NEXT: [[ADD15:%.*]] = add nsw i32 [[CALL]], [[CALL14]] -// CHECK4-NEXT: [[CALL16:%.*]] = call i32 @_Z3fooPi(i32* [[CONV]]) #[[ATTR4]] -// CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[ADD15]], [[CALL16]] -// CHECK4-NEXT: store i32 [[ADD17]], i32* [[TMP0]], align 4 +// CHECK4-NEXT: [[CALL13:%.*]] = call i32 @_Z3fooPi(i32* [[TMP0]]) #[[ATTR4]] +// CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[CALL]], [[CALL13]] +// CHECK4-NEXT: [[CALL15:%.*]] = call i32 @_Z3fooPi(i32* [[CONV]]) #[[ATTR4]] +// CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[ADD14]], [[CALL15]] +// CHECK4-NEXT: store i32 [[ADD16]], i32* [[TMP0]], align 4 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK4: omp.body.continue: // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK4: omp.inner.for.inc: // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP20]], 1 -// CHECK4-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_IV]], align 4 +// CHECK4-NEXT: [[ADD17:%.*]] = add nsw i32 [[TMP20]], 1 +// CHECK4-NEXT: store i32 [[ADD17]], i32* [[DOTOMP_IV]], align 4 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK4: omp.inner.for.end: // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK4: omp.dispatch.inc: // CHECK4-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK4-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] -// CHECK4-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_LB]], align 4 +// CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[TMP22]] +// CHECK4-NEXT: store i32 [[ADD18]], i32* [[DOTOMP_LB]], align 4 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK4-NEXT: [[ADD20:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] -// CHECK4-NEXT: store i32 [[ADD20]], i32* [[DOTOMP_UB]], align 4 +// CHECK4-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP23]], [[TMP24]] +// CHECK4-NEXT: store i32 [[ADD19]], i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK4: omp.dispatch.end: // CHECK4-NEXT: [[TMP25:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -1479,7 +1477,7 @@ int main(int argc, char **argv) { // CHECK5: omp.dispatch.cond: // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK5-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP10]], [[TMP11]] +// CHECK5-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] // CHECK5-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK5: cond.true: // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -1775,7 +1773,7 @@ int main(int argc, char **argv) { // CHECK6: omp.dispatch.cond: // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK6-NEXT: [[CMP5:%.*]] = icmp ugt i32 [[TMP10]], [[TMP11]] +// CHECK6-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]] // CHECK6-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK6: cond.true: // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 diff --git a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp index 35816730ed9b0..140ea15fd1b31 100644 --- a/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp +++ b/clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp @@ -9488,73 +9488,73 @@ int bar(int n){ // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: -// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 +// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0:]] +// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1 // CHECK1-NEXT: [[CMP7:%.*]] = icmp slt i32 [[TMP12]], [[ADD]] // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: -// CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 +// CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 -// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 -// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8 +// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[CONV8:%.*]] = bitcast i64* [[N_CASTED]] to i32* -// CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV8]], align 4 -// CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 -// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8 +// CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV8]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[CONV1]], align 8, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[CONV9:%.*]] = bitcast i64* [[L_CASTED]] to i32* -// CHECK1-NEXT: store i32 [[TMP20]], i32* [[CONV9]], align 4 -// CHECK1-NEXT: [[TMP21:%.*]] = load i64, i64* [[L_CASTED]], align 8 +// CHECK1-NEXT: store i32 [[TMP20]], i32* [[CONV9]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP21:%.*]] = load i64, i64* [[L_CASTED]], align 8, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK1-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP15]] to i8* -// CHECK1-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8 +// CHECK1-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK1-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP17]] to i8* -// CHECK1-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8 +// CHECK1-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 // CHECK1-NEXT: [[TMP27:%.*]] = inttoptr i64 [[TMP19]] to i8* -// CHECK1-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8 +// CHECK1-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 // CHECK1-NEXT: [[TMP29:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8* -// CHECK1-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8 +// CHECK1-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 8, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 4 // CHECK1-NEXT: [[TMP31:%.*]] = inttoptr i64 [[TMP21]] to i8* -// CHECK1-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8 -// CHECK1-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 -// CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4 +// CHECK1-NEXT: store i8* [[TMP31]], i8** [[TMP30]], align 8, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP32:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[TMP32]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[TMP34:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i64 5) +// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP33]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i32]*, i64)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP34]], i64 5), !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: -// CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP35]], [[TMP36]] -// CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP37]], [[TMP38]] -// CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP39]], [[TMP40]] -// CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 +// CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: [[CMP13:%.*]] = icmp sgt i32 [[TMP41]], [[TMP42]] // CHECK1-NEXT: br i1 [[CMP13]], label [[COND_TRUE14:%.*]], label [[COND_FALSE15:%.*]] // CHECK1: cond.true14: -// CHECK1-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4 +// CHECK1-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_3]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: br label [[COND_END16:%.*]] // CHECK1: cond.false15: -// CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK1-NEXT: [[TMP44:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK1-NEXT: br label [[COND_END16]] // CHECK1: cond.end16: // CHECK1-NEXT: [[COND17:%.*]] = phi i32 [ [[TMP43]], [[COND_TRUE14]] ], [ [[TMP44]], [[COND_FALSE15]] ] -// CHECK1-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] +// CHECK1-NEXT: store i32 [[COND17]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: [[TMP45:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: store i32 [[TMP45]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK1: omp.loop.exit: @@ -9646,64 +9646,63 @@ int bar(int n){ // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK1: omp.dispatch.cond: // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV7:%.*]] = sext i32 [[TMP9]] to i64 // CHECK1-NEXT: [[TMP10:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK1-NEXT: [[CMP8:%.*]] = icmp ugt i64 [[CONV7]], [[TMP10]] +// CHECK1-NEXT: [[CONV7:%.*]] = trunc i64 [[TMP10]] to i32 +// CHECK1-NEXT: [[CMP8:%.*]] = icmp sgt i32 [[TMP9]], [[CONV7]] // CHECK1-NEXT: br i1 [[CMP8]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK1: cond.true: // CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[CONV9:%.*]] = trunc i64 [[TMP11]] to i32 // CHECK1-NEXT: br label [[COND_END:%.*]] // CHECK1: cond.false: // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV9:%.*]] = sext i32 [[TMP12]] to i64 // CHECK1-NEXT: br label [[COND_END]] // CHECK1: cond.end: -// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP11]], [[COND_TRUE]] ], [ [[CONV9]], [[COND_FALSE]] ] -// CHECK1-NEXT: [[CONV10:%.*]] = trunc i64 [[COND]] to i32 -// CHECK1-NEXT: store i32 [[CONV10]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV9]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ] +// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: store i32 [[TMP13]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] -// CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK1-NEXT: [[CMP10:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]] +// CHECK1-NEXT: br i1 [[CMP10]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK1: omp.dispatch.body: // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: -// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] -// CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1:]] +// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK1-NEXT: [[CMP11:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] +// CHECK1-NEXT: br i1 [[CMP11]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: -// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK1-NEXT: store i32 [[ADD]], i32* [[I6]], align 4 -// CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4 +// CHECK1-NEXT: store i32 [[ADD]], i32* [[I6]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] -// CHECK1-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4 -// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4 -// CHECK1-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 8 +// CHECK1-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[I6]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK1-NEXT: store i32 [[TMP20]], i32* [[CONV1]], align 8, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK1: omp.body.continue: // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: -// CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP21]], 1 -// CHECK1-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] +// CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK1-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP21]], 1 +// CHECK1-NEXT: store i32 [[ADD12]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK1: omp.dispatch.inc: // CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] -// CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_LB]], align 4 +// CHECK1-NEXT: [[ADD13:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] +// CHECK1-NEXT: store i32 [[ADD13]], i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD15:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] -// CHECK1-NEXT: store i32 [[ADD15]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] +// CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK1: omp.dispatch.end: // CHECK1-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 @@ -9714,11 +9713,11 @@ int bar(int n){ // CHECK1-NEXT: br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]] // CHECK1: .omp.final.then: // CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_]], align 4 -// CHECK1-NEXT: [[SUB16:%.*]] = sub nsw i32 [[TMP30]], 0 -// CHECK1-NEXT: [[DIV17:%.*]] = sdiv i32 [[SUB16]], 1 -// CHECK1-NEXT: [[MUL18:%.*]] = mul nsw i32 [[DIV17]], 1 -// CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 0, [[MUL18]] -// CHECK1-NEXT: store i32 [[ADD19]], i32* [[I6]], align 4 +// CHECK1-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP30]], 0 +// CHECK1-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1 +// CHECK1-NEXT: [[MUL17:%.*]] = mul nsw i32 [[DIV16]], 1 +// CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 0, [[MUL17]] +// CHECK1-NEXT: store i32 [[ADD18]], i32* [[I6]], align 4 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]] // CHECK1: .omp.final.done: // CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IS_LAST]], align 4 @@ -9829,66 +9828,66 @@ int bar(int n){ // CHECK1-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: -// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 +// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2:]] +// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1 // CHECK1-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]] // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: -// CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 +// CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[TMP15:%.*]] = zext i32 [[TMP14]] to i64 -// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[TMP17:%.*]] = zext i32 [[TMP16]] to i64 -// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8 +// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[CONV6:%.*]] = bitcast i64* [[N_CASTED]] to i32* -// CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4 -// CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8 +// CHECK1-NEXT: store i32 [[TMP18]], i32* [[CONV6]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: [[TMP19:%.*]] = load i64, i64* [[N_CASTED]], align 8, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK1-NEXT: [[TMP21:%.*]] = inttoptr i64 [[TMP15]] to i8* -// CHECK1-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8 +// CHECK1-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 8, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK1-NEXT: [[TMP23:%.*]] = inttoptr i64 [[TMP17]] to i8* -// CHECK1-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8 +// CHECK1-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 8, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 // CHECK1-NEXT: [[TMP25:%.*]] = inttoptr i64 [[TMP19]] to i8* -// CHECK1-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8 +// CHECK1-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 8, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 // CHECK1-NEXT: [[TMP27:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8* -// CHECK1-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8 -// CHECK1-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8 -// CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4 +// CHECK1-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 8, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: [[TMP28:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[TMP28]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[TMP30:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4) +// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP29]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, i64, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP30]], i64 4), !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: -// CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]] -// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]] -// CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP35]], [[TMP36]] -// CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 +// CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP37]], [[TMP38]] // CHECK1-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] // CHECK1: cond.true11: -// CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 +// CHECK1-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: br label [[COND_END13:%.*]] // CHECK1: cond.false12: -// CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK1-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK1-NEXT: br label [[COND_END13]] // CHECK1: cond.end13: // CHECK1-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP39]], [[COND_TRUE11]] ], [ [[TMP40]], [[COND_FALSE12]] ] -// CHECK1-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] +// CHECK1-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: store i32 [[TMP41]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK1: omp.loop.exit: @@ -9969,33 +9968,33 @@ int bar(int n){ // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: -// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3:]] // CHECK1-NEXT: [[CONV6:%.*]] = sext i32 [[TMP10]] to i64 -// CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[TMP11:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK1-NEXT: [[CMP7:%.*]] = icmp ule i64 [[CONV6]], [[TMP11]] // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: -// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4 -// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4 +// CHECK1-NEXT: store i32 [[ADD]], i32* [[I5]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] +// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[I5]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i64 0, i64 [[IDXPROM]] -// CHECK1-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2 +// CHECK1-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK1-NEXT: [[CONV8:%.*]] = sext i16 [[TMP14]] to i32 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], 1 // CHECK1-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i16 -// CHECK1-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2 +// CHECK1-NEXT: store i16 [[CONV10]], i16* [[ARRAYIDX]], align 2, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK1: omp.body.continue: // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: -// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] +// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] -// CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] +// CHECK1-NEXT: store i32 [[ADD11]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] +// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK1: omp.loop.exit: @@ -10084,53 +10083,53 @@ int bar(int n){ // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: -// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4:]] // CHECK1-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: -// CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 +// CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 -// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK1-NEXT: [[TMP12:%.*]] = inttoptr i64 [[TMP8]] to i8* -// CHECK1-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8 +// CHECK1-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 8, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK1-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP10]] to i8* -// CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 +// CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 // CHECK1-NEXT: [[TMP16:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* -// CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 +// CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK1-NEXT: [[TMP17:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3) +// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP17]], i64 3), !llvm.access.group ![[#ACC_GROUP_4]] // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: -// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK1-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] -// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK1-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK1-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP24]], 9 // CHECK1-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK1: cond.true5: // CHECK1-NEXT: br label [[COND_END7:%.*]] // CHECK1: cond.false6: -// CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK1-NEXT: br label [[COND_END7]] // CHECK1: cond.end7: // CHECK1-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP25]], [[COND_FALSE6]] ] -// CHECK1-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] +// CHECK1-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK1-NEXT: store i32 [[TMP26]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK1: omp.loop.exit: @@ -10183,31 +10182,31 @@ int bar(int n){ // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: -// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5:]] // CHECK1-NEXT: [[CONV2:%.*]] = sext i32 [[TMP6]] to i64 -// CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV2]], [[TMP7]] // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: -// CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 -// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 +// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] +// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i64 0, i64 [[IDXPROM]] -// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 +// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1 -// CHECK1-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4 +// CHECK1-NEXT: store i32 [[ADD3]], i32* [[ARRAYIDX]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK1: omp.body.continue: // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: -// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] +// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] -// CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] +// CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] +// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK1: omp.loop.exit: @@ -10302,60 +10301,60 @@ int bar(int n){ // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: -// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6:]] // CHECK1-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: -// CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 +// CHECK1-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[TMP8:%.*]] = zext i32 [[TMP7]] to i64 -// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[TMP9]] to i64 -// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8 +// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[CONV3:%.*]] = bitcast i64* [[F_CASTED]] to i32* -// CHECK1-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4 -// CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8 +// CHECK1-NEXT: store i32 [[TMP11]], i32* [[CONV3]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK1-NEXT: [[TMP12:%.*]] = load i64, i64* [[F_CASTED]], align 8, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 0 // CHECK1-NEXT: [[TMP14:%.*]] = inttoptr i64 [[TMP8]] to i8* -// CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8 +// CHECK1-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 8, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 1 // CHECK1-NEXT: [[TMP16:%.*]] = inttoptr i64 [[TMP10]] to i8* -// CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8 +// CHECK1-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 8, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 2 // CHECK1-NEXT: [[TMP18:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8* -// CHECK1-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8 +// CHECK1-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 8, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i64 0, i64 3 // CHECK1-NEXT: [[TMP20:%.*]] = inttoptr i64 [[TMP12]] to i8* -// CHECK1-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8 +// CHECK1-NEXT: store i8* [[TMP20]], i8** [[TMP19]], align 8, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[TMP21:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4) +// CHECK1-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i64, i64, [10 x [10 x i32]]*, i64)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP21]], i64 4), !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: -// CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK1-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] -// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK1-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK1-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] -// CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK1-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK1-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP26]], [[TMP27]] -// CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK1-NEXT: store i32 [[ADD5]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK1-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP28]], 99 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE7:%.*]], label [[COND_FALSE8:%.*]] // CHECK1: cond.true7: // CHECK1-NEXT: br label [[COND_END9:%.*]] // CHECK1: cond.false8: -// CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK1-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK1-NEXT: br label [[COND_END9]] // CHECK1: cond.end9: // CHECK1-NEXT: [[COND10:%.*]] = phi i32 [ 99, [[COND_TRUE7]] ], [ [[TMP29]], [[COND_FALSE8]] ] -// CHECK1-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK1-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] +// CHECK1-NEXT: store i32 [[COND10]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK1-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK1-NEXT: store i32 [[TMP30]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK1: omp.loop.exit: @@ -10415,49 +10414,49 @@ int bar(int n){ // CHECK1-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: -// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7:]] // CHECK1-NEXT: [[CONV4:%.*]] = sext i32 [[TMP6]] to i64 -// CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK1-NEXT: [[CMP:%.*]] = icmp ule i64 [[CONV4]], [[TMP7]] // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: -// CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4 -// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK1-NEXT: [[DIV5:%.*]] = sdiv i32 [[TMP10]], 10 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[DIV5]], 10 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL6]] // CHECK1-NEXT: [[MUL7:%.*]] = mul nsw i32 [[SUB]], 1 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 0, [[MUL7]] -// CHECK1-NEXT: store i32 [[ADD8]], i32* [[J]], align 4 -// CHECK1-NEXT: store i32 10, i32* [[K]], align 4 -// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 -// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 -// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 8 +// CHECK1-NEXT: store i32 [[ADD8]], i32* [[J]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK1-NEXT: store i32 10, i32* [[K]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[CONV]], align 8, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK1-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]] // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP11]], [[MUL9]] -// CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4 +// CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[ADD10]], [[TMP14]] -// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 +// CHECK1-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i64 0, i64 [[IDXPROM]] -// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4 +// CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK1-NEXT: [[IDXPROM12:%.*]] = sext i32 [[TMP16]] to i64 // CHECK1-NEXT: [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i64 0, i64 [[IDXPROM12]] -// CHECK1-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4 +// CHECK1-NEXT: store i32 [[ADD11]], i32* [[ARRAYIDX13]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK1: omp.body.continue: // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: -// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] +// CHECK1-NEXT: store i32 [[ADD14]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK1: omp.loop.exit: @@ -10575,69 +10574,69 @@ int bar(int n){ // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: -// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 +// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0:]] +// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1 // CHECK2-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP12]], [[ADD]] // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: -// CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 -// CHECK2-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 -// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 -// CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[L_ADDR]], align 4 -// CHECK2-NEXT: store i32 [[TMP18]], i32* [[L_CASTED]], align 4 -// CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[L_CASTED]], align 4 +// CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[L_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: store i32 [[TMP18]], i32* [[L_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[L_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK2-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP14]] to i8* -// CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4 +// CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK2-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP15]] to i8* -// CHECK2-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4 +// CHECK2-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK2-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8* -// CHECK2-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4 +// CHECK2-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 // CHECK2-NEXT: [[TMP27:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8* -// CHECK2-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4 +// CHECK2-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 // CHECK2-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP19]] to i8* -// CHECK2-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4 -// CHECK2-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 -// CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 +// CHECK2-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: [[TMP32:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP31]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP32]], i32 5) +// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP31]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP32]], i32 5), !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: -// CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP33]], [[TMP34]] -// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP35]], [[TMP36]] -// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP37]], [[TMP38]] -// CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 +// CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP39]], [[TMP40]] // CHECK2-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] // CHECK2: cond.true11: -// CHECK2-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 +// CHECK2-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: br label [[COND_END13:%.*]] // CHECK2: cond.false12: -// CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK2-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK2-NEXT: br label [[COND_END13]] // CHECK2: cond.end13: // CHECK2-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP41]], [[COND_TRUE11]] ], [ [[TMP42]], [[COND_FALSE12]] ] -// CHECK2-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: store i32 [[TMP43]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] +// CHECK2-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: store i32 [[TMP43]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK2: omp.loop.exit: @@ -10726,7 +10725,7 @@ int bar(int n){ // CHECK2: omp.dispatch.cond: // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK2-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]] +// CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK2: cond.true: // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -10746,28 +10745,28 @@ int bar(int n){ // CHECK2: omp.dispatch.body: // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: -// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1:]] +// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] // CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: -// CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK2-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 -// CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 +// CHECK2-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]] -// CHECK2-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4 -// CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4 -// CHECK2-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4 +// CHECK2-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK2-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK2: omp.body.continue: // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: -// CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1 -// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] +// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK2: omp.dispatch.inc: @@ -10901,63 +10900,63 @@ int bar(int n){ // CHECK2-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: -// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 +// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2:]] +// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1 // CHECK2-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]] // CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: -// CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 -// CHECK2-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 -// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 +// CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK2-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8* -// CHECK2-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4 +// CHECK2-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK2-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8* -// CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4 +// CHECK2-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK2-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8* -// CHECK2-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4 +// CHECK2-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 // CHECK2-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8* -// CHECK2-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4 -// CHECK2-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 -// CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 +// CHECK2-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4) +// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4), !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: -// CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]] -// CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]] -// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]] -// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 +// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]] // CHECK2-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] // CHECK2: cond.true10: -// CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 +// CHECK2-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: br label [[COND_END12:%.*]] // CHECK2: cond.false11: -// CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK2-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK2-NEXT: br label [[COND_END12]] // CHECK2: cond.end12: // CHECK2-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ] -// CHECK2-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] +// CHECK2-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK2: omp.loop.exit: @@ -11035,31 +11034,31 @@ int bar(int n){ // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: -// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 +// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3:]] +// CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK2-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]] // CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: -// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK2-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 -// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4 +// CHECK2-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] +// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]] -// CHECK2-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2 +// CHECK2-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK2-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1 // CHECK2-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 -// CHECK2-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2 +// CHECK2-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK2: omp.body.continue: // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: -// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] +// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] -// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] +// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] +// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK2: omp.loop.exit: @@ -11148,51 +11147,51 @@ int bar(int n){ // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: -// CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4:]] // CHECK2-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10 // CHECK2-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: -// CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK2-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK2-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8* -// CHECK2-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4 +// CHECK2-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK2-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8* -// CHECK2-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4 +// CHECK2-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK2-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* -// CHECK2-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4 +// CHECK2-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK2-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3) +// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3), !llvm.access.group ![[#ACC_GROUP_4]] // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: -// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] -// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK2-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9 // CHECK2-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK2: cond.true5: // CHECK2-NEXT: br label [[COND_END7:%.*]] // CHECK2: cond.false6: -// CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK2-NEXT: br label [[COND_END7]] // CHECK2: cond.end7: // CHECK2-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ] -// CHECK2-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] +// CHECK2-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK2-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK2: omp.loop.exit: @@ -11243,29 +11242,29 @@ int bar(int n){ // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: -// CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 +// CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5:]] +// CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK2-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]] // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: -// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 -// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 +// CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] +// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] -// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 +// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK2-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1 -// CHECK2-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4 +// CHECK2-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK2: omp.body.continue: // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: -// CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] +// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK2-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] -// CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] +// CHECK2-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] +// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK2: omp.loop.exit: @@ -11357,57 +11356,57 @@ int bar(int n){ // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: -// CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6:]] // CHECK2-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100 // CHECK2-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: -// CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4 -// CHECK2-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4 -// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4 +// CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK2-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK2-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8* -// CHECK2-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4 +// CHECK2-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK2-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK2-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8* -// CHECK2-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4 +// CHECK2-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK2-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK2-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8* -// CHECK2-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4 +// CHECK2-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK2-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 // CHECK2-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8* -// CHECK2-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4 +// CHECK2-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK2-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4) +// CHECK2-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4), !llvm.access.group ![[#ACC_GROUP_6]] // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: -// CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK2-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] -// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK2-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] -// CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK2-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK2-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99 // CHECK2-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]] // CHECK2: cond.true6: // CHECK2-NEXT: br label [[COND_END8:%.*]] // CHECK2: cond.false7: -// CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK2-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK2-NEXT: br label [[COND_END8]] // CHECK2: cond.end8: // CHECK2-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ] -// CHECK2-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK2-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] +// CHECK2-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK2: omp.loop.exit: @@ -11464,46 +11463,46 @@ int bar(int n){ // CHECK2-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: -// CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 +// CHECK2-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7:]] +// CHECK2-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK2-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]] // CHECK2-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: -// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK2-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 // CHECK2-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4 -// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK2-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10 // CHECK2-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10 // CHECK2-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]] // CHECK2-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1 // CHECK2-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]] -// CHECK2-NEXT: store i32 [[ADD5]], i32* [[J]], align 4 -// CHECK2-NEXT: store i32 10, i32* [[K]], align 4 -// CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 -// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 -// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4 +// CHECK2-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK2-NEXT: store i32 10, i32* [[K]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK2-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]] // CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]] -// CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4 +// CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]] -// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 +// CHECK2-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK2-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]] -// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4 +// CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK2-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]] -// CHECK2-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4 +// CHECK2-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK2-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK2: omp.body.continue: // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: -// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK2-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] +// CHECK2-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK2: omp.loop.exit: @@ -11621,69 +11620,69 @@ int bar(int n){ // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK3: omp.inner.for.cond: -// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 +// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0:]] +// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1 // CHECK3-NEXT: [[CMP6:%.*]] = icmp slt i32 [[TMP12]], [[ADD]] // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK3: omp.inner.for.body: -// CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 -// CHECK3-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 -// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 -// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[L_ADDR]], align 4 -// CHECK3-NEXT: store i32 [[TMP18]], i32* [[L_CASTED]], align 4 -// CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[L_CASTED]], align 4 +// CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[L_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: store i32 [[TMP18]], i32* [[L_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[L_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK3-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP14]] to i8* -// CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4 +// CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK3-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP15]] to i8* -// CHECK3-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4 +// CHECK3-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK3-NEXT: [[TMP25:%.*]] = inttoptr i32 [[TMP17]] to i8* -// CHECK3-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4 +// CHECK3-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 // CHECK3-NEXT: [[TMP27:%.*]] = bitcast [1000 x i32]* [[TMP0]] to i8* -// CHECK3-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4 +// CHECK3-NEXT: store i8* [[TMP27]], i8** [[TMP26]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x i8*], [5 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 4 // CHECK3-NEXT: [[TMP29:%.*]] = inttoptr i32 [[TMP19]] to i8* -// CHECK3-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4 -// CHECK3-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 -// CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4 +// CHECK3-NEXT: store i8* [[TMP29]], i8** [[TMP28]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP30:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[TMP30]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: [[TMP32:%.*]] = bitcast [5 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP31]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP32]], i32 5) +// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP31]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i32]*, i32)* @__omp_outlined__1 to i8*), i8* null, i8** [[TMP32]], i32 5), !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK3: omp.inner.for.inc: -// CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP33]], [[TMP34]] -// CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP35]], [[TMP36]] -// CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP37]], [[TMP38]] -// CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 +// CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP40:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: [[CMP10:%.*]] = icmp sgt i32 [[TMP39]], [[TMP40]] // CHECK3-NEXT: br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]] // CHECK3: cond.true11: -// CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4 +// CHECK3-NEXT: [[TMP41:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_2]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: br label [[COND_END13:%.*]] // CHECK3: cond.false12: -// CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK3-NEXT: [[TMP42:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] // CHECK3-NEXT: br label [[COND_END13]] // CHECK3: cond.end13: // CHECK3-NEXT: [[COND14:%.*]] = phi i32 [ [[TMP41]], [[COND_TRUE11]] ], [ [[TMP42]], [[COND_FALSE12]] ] -// CHECK3-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: store i32 [[TMP43]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]] +// CHECK3-NEXT: store i32 [[COND14]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: [[TMP43:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: store i32 [[TMP43]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_0]] +// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] // CHECK3: omp.inner.for.end: // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK3: omp.loop.exit: @@ -11772,7 +11771,7 @@ int bar(int n){ // CHECK3: omp.dispatch.cond: // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK3-NEXT: [[CMP4:%.*]] = icmp ugt i32 [[TMP9]], [[TMP10]] +// CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]] // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK3: cond.true: // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -11792,28 +11791,28 @@ int bar(int n){ // CHECK3: omp.dispatch.body: // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK3: omp.inner.for.cond: -// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 +// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1:]] +// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]] // CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK3: omp.inner.for.body: -// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 -// CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4 +// CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], [1000 x i32]* [[TMP0]], i32 0, i32 [[TMP19]] -// CHECK3-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4 -// CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4 -// CHECK3-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4 +// CHECK3-NEXT: store i32 1, i32* [[ARRAYIDX]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK3-NEXT: store i32 [[TMP20]], i32* [[L_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK3: omp.body.continue: // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK3: omp.inner.for.inc: -// CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1 -// CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]] +// CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_1]] +// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] // CHECK3: omp.inner.for.end: // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK3: omp.dispatch.inc: @@ -11947,63 +11946,63 @@ int bar(int n){ // CHECK3-NEXT: store i32 [[TMP11]], i32* [[DOTOMP_IV]], align 4 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK3: omp.inner.for.cond: -// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 +// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2:]] +// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP13]], 1 // CHECK3-NEXT: [[CMP5:%.*]] = icmp slt i32 [[TMP12]], [[ADD]] // CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK3: omp.inner.for.body: -// CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4 -// CHECK3-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4 -// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4 +// CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[N_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: store i32 [[TMP16]], i32* [[N_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[N_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK3-NEXT: [[TMP19:%.*]] = inttoptr i32 [[TMP14]] to i8* -// CHECK3-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4 +// CHECK3-NEXT: store i8* [[TMP19]], i8** [[TMP18]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK3-NEXT: [[TMP21:%.*]] = inttoptr i32 [[TMP15]] to i8* -// CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4 +// CHECK3-NEXT: store i8* [[TMP21]], i8** [[TMP20]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK3-NEXT: [[TMP23:%.*]] = inttoptr i32 [[TMP17]] to i8* -// CHECK3-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4 +// CHECK3-NEXT: store i8* [[TMP23]], i8** [[TMP22]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 // CHECK3-NEXT: [[TMP25:%.*]] = bitcast [1000 x i16]* [[TMP0]] to i8* -// CHECK3-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4 -// CHECK3-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4 -// CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4 +// CHECK3-NEXT: store i8* [[TMP25]], i8** [[TMP24]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP26:%.*]] = load i32*, i32** [[DOTGLOBAL_TID__ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[TMP26]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: [[TMP28:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4) +// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP27]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, i32, [1000 x i16]*)* @__omp_outlined__3 to i8*), i8* null, i8** [[TMP28]], i32 4), !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK3: omp.inner.for.inc: -// CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: [[TMP29:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP30:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP29]], [[TMP30]] -// CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP31:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP32:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP31]], [[TMP32]] -// CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP33:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP34:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP33]], [[TMP34]] -// CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 +// CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP35:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP36:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: [[CMP9:%.*]] = icmp sgt i32 [[TMP35]], [[TMP36]] // CHECK3-NEXT: br i1 [[CMP9]], label [[COND_TRUE10:%.*]], label [[COND_FALSE11:%.*]] // CHECK3: cond.true10: -// CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4 +// CHECK3-NEXT: [[TMP37:%.*]] = load i32, i32* [[DOTCAPTURE_EXPR_1]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: br label [[COND_END12:%.*]] // CHECK3: cond.false11: -// CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK3-NEXT: [[TMP38:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] // CHECK3-NEXT: br label [[COND_END12]] // CHECK3: cond.end12: // CHECK3-NEXT: [[COND13:%.*]] = phi i32 [ [[TMP37]], [[COND_TRUE10]] ], [ [[TMP38]], [[COND_FALSE11]] ] -// CHECK3-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]] +// CHECK3-NEXT: store i32 [[COND13]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: [[TMP39:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: store i32 [[TMP39]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_2]] +// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]] // CHECK3: omp.inner.for.end: // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK3: omp.loop.exit: @@ -12081,31 +12080,31 @@ int bar(int n){ // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK3: omp.inner.for.cond: -// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 +// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3:]] +// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK3-NEXT: [[CMP4:%.*]] = icmp ule i32 [[TMP10]], [[TMP11]] // CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK3: omp.inner.for.body: -// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4 -// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4 +// CHECK3-NEXT: store i32 [[ADD]], i32* [[I3]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] +// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[I3]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i16], [1000 x i16]* [[TMP0]], i32 0, i32 [[TMP13]] -// CHECK3-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2 +// CHECK3-NEXT: [[TMP14:%.*]] = load i16, i16* [[ARRAYIDX]], align 2, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP14]] to i32 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[CONV]], 1 // CHECK3-NEXT: [[CONV6:%.*]] = trunc i32 [[ADD5]] to i16 -// CHECK3-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2 +// CHECK3-NEXT: store i16 [[CONV6]], i16* [[ARRAYIDX]], align 2, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK3: omp.body.continue: // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK3: omp.inner.for.inc: -// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] +// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP15]], [[TMP16]] -// CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]] +// CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_3]] +// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]] // CHECK3: omp.inner.for.end: // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK3: omp.loop.exit: @@ -12194,51 +12193,51 @@ int bar(int n){ // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK3: omp.inner.for.cond: -// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4:]] // CHECK3-NEXT: [[CMP1:%.*]] = icmp slt i32 [[TMP6]], 10 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK3: omp.inner.for.body: -// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK3-NEXT: [[TMP10:%.*]] = inttoptr i32 [[TMP7]] to i8* -// CHECK3-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4 +// CHECK3-NEXT: store i8* [[TMP10]], i8** [[TMP9]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK3-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP8]] to i8* -// CHECK3-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4 +// CHECK3-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x i8*], [3 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK3-NEXT: [[TMP14:%.*]] = bitcast [10 x i32]* [[TMP0]] to i8* -// CHECK3-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4 +// CHECK3-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK3-NEXT: [[TMP15:%.*]] = bitcast [3 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3) +// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x i32]*)* @__omp_outlined__5 to i8*), i8* null, i8** [[TMP15]], i32 3), !llvm.access.group ![[#ACC_GROUP_4]] // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK3: omp.inner.for.inc: -// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]] -// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK3-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP22]], 9 // CHECK3-NEXT: br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]] // CHECK3: cond.true5: // CHECK3-NEXT: br label [[COND_END7:%.*]] // CHECK3: cond.false6: -// CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] // CHECK3-NEXT: br label [[COND_END7]] // CHECK3: cond.end7: // CHECK3-NEXT: [[COND8:%.*]] = phi i32 [ 9, [[COND_TRUE5]] ], [ [[TMP23]], [[COND_FALSE6]] ] -// CHECK3-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]] +// CHECK3-NEXT: store i32 [[COND8]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK3-NEXT: store i32 [[TMP24]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_4]] +// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]] // CHECK3: omp.inner.for.end: // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK3: omp.loop.exit: @@ -12289,29 +12288,29 @@ int bar(int n){ // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK3: omp.inner.for.cond: -// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 +// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5:]] +// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK3-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]] // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK3: omp.inner.for.body: -// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 -// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4 +// CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] +// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[TMP0]], i32 0, i32 [[TMP9]] -// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4 +// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[ARRAYIDX]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK3-NEXT: [[ADD1:%.*]] = add nsw i32 [[TMP10]], 1 -// CHECK3-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4 +// CHECK3-NEXT: store i32 [[ADD1]], i32* [[ARRAYIDX]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK3: omp.body.continue: // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK3: omp.inner.for.inc: -// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] +// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP11]], [[TMP12]] -// CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]] +// CHECK3-NEXT: store i32 [[ADD2]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_5]] +// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]] // CHECK3: omp.inner.for.end: // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK3: omp.loop.exit: @@ -12403,57 +12402,57 @@ int bar(int n){ // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK3: omp.inner.for.cond: -// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6:]] // CHECK3-NEXT: [[CMP2:%.*]] = icmp slt i32 [[TMP6]], 100 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK3: omp.inner.for.body: -// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4 -// CHECK3-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4 -// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4 +// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[F_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: store i32 [[TMP9]], i32* [[F_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[F_CASTED]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 0 // CHECK3-NEXT: [[TMP12:%.*]] = inttoptr i32 [[TMP7]] to i8* -// CHECK3-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4 +// CHECK3-NEXT: store i8* [[TMP12]], i8** [[TMP11]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 1 // CHECK3-NEXT: [[TMP14:%.*]] = inttoptr i32 [[TMP8]] to i8* -// CHECK3-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4 +// CHECK3-NEXT: store i8* [[TMP14]], i8** [[TMP13]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 2 // CHECK3-NEXT: [[TMP16:%.*]] = bitcast [10 x [10 x i32]]* [[TMP0]] to i8* -// CHECK3-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4 +// CHECK3-NEXT: store i8* [[TMP16]], i8** [[TMP15]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x i8*], [4 x i8*]* [[CAPTURED_VARS_ADDRS]], i32 0, i32 3 // CHECK3-NEXT: [[TMP18:%.*]] = inttoptr i32 [[TMP10]] to i8* -// CHECK3-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4 +// CHECK3-NEXT: store i8* [[TMP18]], i8** [[TMP17]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK3-NEXT: [[TMP19:%.*]] = bitcast [4 x i8*]* [[CAPTURED_VARS_ADDRS]] to i8** -// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4) +// CHECK3-NEXT: call void @__kmpc_parallel_51(%struct.ident_t* @[[GLOB3]], i32 [[TMP2]], i32 1, i32 -1, i32 -1, i8* bitcast (void (i32*, i32*, i32, i32, [10 x [10 x i32]]*, i32)* @__omp_outlined__7 to i8*), i8* null, i8** [[TMP19]], i32 4), !llvm.access.group ![[#ACC_GROUP_6]] // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK3: omp.inner.for.inc: -// CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: store i32 [[ADD]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: [[TMP22:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: [[TMP23:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP22]], [[TMP23]] -// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: store i32 [[ADD3]], i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: [[TMP24:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: [[TMP25:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP24]], [[TMP25]] -// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK3-NEXT: store i32 [[ADD4]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: [[TMP26:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK3-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP26]], 99 // CHECK3-NEXT: br i1 [[CMP5]], label [[COND_TRUE6:%.*]], label [[COND_FALSE7:%.*]] // CHECK3: cond.true6: // CHECK3-NEXT: br label [[COND_END8:%.*]] // CHECK3: cond.false7: -// CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4 +// CHECK3-NEXT: [[TMP27:%.*]] = load i32, i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] // CHECK3-NEXT: br label [[COND_END8]] // CHECK3: cond.end8: // CHECK3-NEXT: [[COND9:%.*]] = phi i32 [ 99, [[COND_TRUE6]] ], [ [[TMP27]], [[COND_FALSE7]] ] -// CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4 -// CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4 -// CHECK3-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]] +// CHECK3-NEXT: store i32 [[COND9]], i32* [[DOTOMP_COMB_UB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: [[TMP28:%.*]] = load i32, i32* [[DOTOMP_COMB_LB]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: store i32 [[TMP28]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_6]] +// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]] // CHECK3: omp.inner.for.end: // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK3: omp.loop.exit: @@ -12510,46 +12509,46 @@ int bar(int n){ // CHECK3-NEXT: store i32 [[TMP5]], i32* [[DOTOMP_IV]], align 4 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK3: omp.inner.for.cond: -// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 +// CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7:]] +// CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK3-NEXT: [[CMP:%.*]] = icmp ule i32 [[TMP6]], [[TMP7]] // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK3: omp.inner.for.body: -// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 10 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]] -// CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4 -// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 +// CHECK3-NEXT: store i32 [[ADD]], i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK3-NEXT: [[DIV2:%.*]] = sdiv i32 [[TMP10]], 10 // CHECK3-NEXT: [[MUL3:%.*]] = mul nsw i32 [[DIV2]], 10 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL3]] // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[SUB]], 1 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 0, [[MUL4]] -// CHECK3-NEXT: store i32 [[ADD5]], i32* [[J]], align 4 -// CHECK3-NEXT: store i32 10, i32* [[K]], align 4 -// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4 -// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4 -// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4 +// CHECK3-NEXT: store i32 [[ADD5]], i32* [[J]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK3-NEXT: store i32 10, i32* [[K]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[F_ADDR]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK3-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP12]], [[TMP13]] // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[MUL6]] -// CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4 +// CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[K]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP14]] -// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4 +// CHECK3-NEXT: [[TMP15:%.*]] = load i32, i32* [[I]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* [[TMP0]], i32 0, i32 [[TMP15]] -// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4 +// CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[J]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK3-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [10 x i32], [10 x i32]* [[ARRAYIDX]], i32 0, i32 [[TMP16]] -// CHECK3-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4 +// CHECK3-NEXT: store i32 [[ADD8]], i32* [[ARRAYIDX9]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]] // CHECK3: omp.body.continue: // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK3: omp.inner.for.inc: -// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 +// CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] // CHECK3-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK3-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4 -// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]] +// CHECK3-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group ![[#ACC_GROUP_7]] +// CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP35:![0-9]+]] // CHECK3: omp.inner.for.end: // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]] // CHECK3: omp.loop.exit: diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_ast_print.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_ast_print.cpp index 39813253f0af9..67554172e9485 100644 --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_ast_print.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_ast_print.cpp @@ -1,8 +1,8 @@ -// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -ast-print %s -Wno-openmp-mapping | FileCheck %s +// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=50 -ast-print %s -Wno-openmp-mapping -Wsign-conversion | FileCheck %s // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -x c++ -std=c++11 -emit-pch -o %t %s -Wno-openmp-mapping // RUN: %clang_cc1 -fopenmp -fopenmp-version=50 -std=c++11 -include-pch %t -fsyntax-only -verify %s -ast-print -Wno-openmp-mapping | FileCheck %s -// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -ast-print %s -Wno-openmp-mapping | FileCheck %s +// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=50 -ast-print %s -Wno-openmp-mapping -Wsign-conversion | FileCheck %s // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -x c++ -std=c++11 -emit-pch -o %t %s -Wno-openmp-mapping // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=50 -std=c++11 -include-pch %t -fsyntax-only -verify %s -ast-print -Wno-openmp-mapping | FileCheck %s // expected-no-diagnostics diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp index 3d9b9c871d95b..364dac905a3d2 100644 --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp @@ -741,34 +741,33 @@ int main (int argc, char **argv) { // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK1: omp.dispatch.cond: // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK1-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK1: cond.true: // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK1-NEXT: br label [[COND_END:%.*]] // CHECK1: cond.false: // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK1-NEXT: br label [[COND_END]] // CHECK1: cond.end: -// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK1: omp.dispatch.body: // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -784,20 +783,20 @@ int main (int argc, char **argv) { // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK1: omp.dispatch.inc: // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK1: omp.dispatch.end: // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -1656,34 +1655,33 @@ int main (int argc, char **argv) { // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK2: omp.dispatch.cond: // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK2-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK2: cond.true: // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK2-NEXT: br label [[COND_END:%.*]] // CHECK2: cond.false: // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK2-NEXT: br label [[COND_END]] // CHECK2: cond.end: -// CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK2-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK2: omp.dispatch.body: // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -1699,20 +1697,20 @@ int main (int argc, char **argv) { // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK2: omp.dispatch.inc: // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK2: omp.dispatch.end: // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -2558,7 +2556,7 @@ int main (int argc, char **argv) { // CHECK3: omp.dispatch.cond: // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK3-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK3: cond.true: // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -3445,7 +3443,7 @@ int main (int argc, char **argv) { // CHECK4: omp.dispatch.cond: // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK4-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK4: cond.true: // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -4345,34 +4343,33 @@ int main (int argc, char **argv) { // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK5: omp.dispatch.cond: // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK5-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK5-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK5: cond.true: // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK5-NEXT: br label [[COND_END:%.*]] // CHECK5: cond.false: // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK5-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK5-NEXT: br label [[COND_END]] // CHECK5: cond.end: -// CHECK5-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK5-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK5-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK5: omp.dispatch.body: // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK5: omp.inner.for.cond: // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK5-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK5: omp.inner.for.body: // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -4388,20 +4385,20 @@ int main (int argc, char **argv) { // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK5: omp.inner.for.inc: // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 +// CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK5: omp.inner.for.end: // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK5: omp.dispatch.inc: // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK5: omp.dispatch.end: // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -5260,34 +5257,33 @@ int main (int argc, char **argv) { // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK6: omp.dispatch.cond: // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK6-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK6-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK6-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK6-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK6: cond.true: // CHECK6-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK6-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK6-NEXT: br label [[COND_END:%.*]] // CHECK6: cond.false: // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK6-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK6-NEXT: br label [[COND_END]] // CHECK6: cond.end: -// CHECK6-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK6-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK6-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK6-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK6-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK6: omp.dispatch.body: // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK6: omp.inner.for.cond: // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK6-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK6: omp.inner.for.body: // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -5303,20 +5299,20 @@ int main (int argc, char **argv) { // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK6: omp.inner.for.inc: // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 +// CHECK6-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK6-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK6: omp.inner.for.end: // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK6: omp.dispatch.inc: // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK6: omp.dispatch.end: // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -6162,7 +6158,7 @@ int main (int argc, char **argv) { // CHECK7: omp.dispatch.cond: // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK7-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK7: cond.true: // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -7049,7 +7045,7 @@ int main (int argc, char **argv) { // CHECK8: omp.dispatch.cond: // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK8-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK8: cond.true: // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -9537,34 +9533,33 @@ int main (int argc, char **argv) { // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK13: omp.dispatch.cond: // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK13-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK13: cond.true: // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK13-NEXT: br label [[COND_END:%.*]] // CHECK13: cond.false: // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK13-NEXT: br label [[COND_END]] // CHECK13: cond.end: -// CHECK13-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK13: omp.dispatch.body: // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK13: omp.inner.for.cond: // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK13: omp.inner.for.body: // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -9579,20 +9574,20 @@ int main (int argc, char **argv) { // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK13: omp.inner.for.inc: // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 +// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK13: omp.inner.for.end: // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK13: omp.dispatch.inc: // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK13: omp.dispatch.end: // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -12057,34 +12052,33 @@ int main (int argc, char **argv) { // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK14: omp.dispatch.cond: // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK14-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK14: cond.true: // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK14-NEXT: br label [[COND_END:%.*]] // CHECK14: cond.false: // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK14-NEXT: br label [[COND_END]] // CHECK14: cond.end: -// CHECK14-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK14: omp.dispatch.body: // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK14: omp.inner.for.cond: // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK14-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK14: omp.inner.for.body: // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -12099,20 +12093,20 @@ int main (int argc, char **argv) { // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK14: omp.inner.for.inc: // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 +// CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK14: omp.inner.for.end: // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK14: omp.dispatch.inc: // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK14-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK14: omp.dispatch.end: // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -14494,7 +14488,7 @@ int main (int argc, char **argv) { // CHECK15: omp.dispatch.cond: // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK15-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK15: cond.true: // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -16911,7 +16905,7 @@ int main (int argc, char **argv) { // CHECK16: omp.dispatch.cond: // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK16-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK16: cond.true: // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -19411,34 +19405,33 @@ int main (int argc, char **argv) { // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK17: omp.dispatch.cond: // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK17-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK17-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK17: cond.true: // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK17-NEXT: br label [[COND_END:%.*]] // CHECK17: cond.false: // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK17-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK17-NEXT: br label [[COND_END]] // CHECK17: cond.end: -// CHECK17-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK17: omp.dispatch.body: // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK17: omp.inner.for.cond: // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK17: omp.inner.for.body: // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -19453,20 +19446,20 @@ int main (int argc, char **argv) { // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK17: omp.inner.for.inc: // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 +// CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK17: omp.inner.for.end: // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK17: omp.dispatch.inc: // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK17: omp.dispatch.end: // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -21931,34 +21924,33 @@ int main (int argc, char **argv) { // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK18: omp.dispatch.cond: // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK18-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK18-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK18-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK18: cond.true: // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK18-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK18-NEXT: br label [[COND_END:%.*]] // CHECK18: cond.false: // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK18-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK18-NEXT: br label [[COND_END]] // CHECK18: cond.end: -// CHECK18-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK18-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK18-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK18-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK18: omp.dispatch.body: // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK18: omp.inner.for.cond: // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK18-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK18-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK18: omp.inner.for.body: // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -21973,20 +21965,20 @@ int main (int argc, char **argv) { // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK18: omp.inner.for.inc: // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 +// CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK18: omp.inner.for.end: // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK18: omp.dispatch.inc: // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK18-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK18-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK18: omp.dispatch.end: // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -24368,7 +24360,7 @@ int main (int argc, char **argv) { // CHECK19: omp.dispatch.cond: // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK19-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK19: cond.true: // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -26785,7 +26777,7 @@ int main (int argc, char **argv) { // CHECK20: omp.dispatch.cond: // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK20-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK20: cond.true: // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 diff --git a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp index 411dd6de11286..da7a6b1712ce6 100644 --- a/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp +++ b/clang/test/OpenMP/target_teams_distribute_parallel_for_simd_schedule_codegen.cpp @@ -776,34 +776,33 @@ int main (int argc, char **argv) { // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK1: omp.dispatch.cond: // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK1-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK1: cond.true: // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK1-NEXT: br label [[COND_END:%.*]] // CHECK1: cond.false: // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK1-NEXT: br label [[COND_END]] // CHECK1: cond.end: -// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK1: omp.dispatch.body: // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 -// CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -819,20 +818,20 @@ int main (int argc, char **argv) { // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 -// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 +// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK1: omp.dispatch.inc: // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK1: omp.dispatch.end: // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -1761,34 +1760,33 @@ int main (int argc, char **argv) { // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK2: omp.dispatch.cond: // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK2-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK2: cond.true: // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK2-NEXT: br label [[COND_END:%.*]] // CHECK2: cond.false: // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK2-NEXT: br label [[COND_END]] // CHECK2: cond.end: -// CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK2-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK2: omp.dispatch.body: // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 -// CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -1804,20 +1802,20 @@ int main (int argc, char **argv) { // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 -// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 +// CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK2: omp.dispatch.inc: // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK2: omp.dispatch.end: // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -2733,7 +2731,7 @@ int main (int argc, char **argv) { // CHECK3: omp.dispatch.cond: // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK3-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK3: cond.true: // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -3690,7 +3688,7 @@ int main (int argc, char **argv) { // CHECK4: omp.dispatch.cond: // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK4-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK4: cond.true: // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -4660,34 +4658,33 @@ int main (int argc, char **argv) { // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK5: omp.dispatch.cond: // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK5-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK5-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK5: cond.true: // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK5-NEXT: br label [[COND_END:%.*]] // CHECK5: cond.false: // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK5-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK5-NEXT: br label [[COND_END]] // CHECK5: cond.end: -// CHECK5-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK5-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK5-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK5: omp.dispatch.body: // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK5: omp.inner.for.cond: // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 -// CHECK5-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK5: omp.inner.for.body: // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -4703,20 +4700,20 @@ int main (int argc, char **argv) { // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK5: omp.inner.for.inc: // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 -// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 +// CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK5: omp.inner.for.end: // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK5: omp.dispatch.inc: // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK5: omp.dispatch.end: // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -5645,34 +5642,33 @@ int main (int argc, char **argv) { // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK6: omp.dispatch.cond: // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK6-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK6-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK6-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK6-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK6: cond.true: // CHECK6-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK6-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK6-NEXT: br label [[COND_END:%.*]] // CHECK6: cond.false: // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK6-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK6-NEXT: br label [[COND_END]] // CHECK6: cond.end: -// CHECK6-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK6-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK6-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK6-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK6-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK6: omp.dispatch.body: // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK6: omp.inner.for.cond: // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 -// CHECK6-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK6: omp.inner.for.body: // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -5688,20 +5684,20 @@ int main (int argc, char **argv) { // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK6: omp.inner.for.inc: // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 -// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 +// CHECK6-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK6-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK6: omp.inner.for.end: // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK6: omp.dispatch.inc: // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK6: omp.dispatch.end: // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -6617,7 +6613,7 @@ int main (int argc, char **argv) { // CHECK7: omp.dispatch.cond: // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK7-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK7: cond.true: // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -7574,7 +7570,7 @@ int main (int argc, char **argv) { // CHECK8: omp.dispatch.cond: // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK8-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK8: cond.true: // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -11022,34 +11018,33 @@ int main (int argc, char **argv) { // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK13: omp.dispatch.cond: // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK13-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK13: cond.true: // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK13-NEXT: br label [[COND_END:%.*]] // CHECK13: cond.false: // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK13-NEXT: br label [[COND_END]] // CHECK13: cond.end: -// CHECK13-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK13: omp.dispatch.body: // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK13: omp.inner.for.cond: // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61 -// CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK13: omp.inner.for.body: // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -11064,20 +11059,20 @@ int main (int argc, char **argv) { // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK13: omp.inner.for.inc: // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 -// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 +// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] // CHECK13: omp.inner.for.end: // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK13: omp.dispatch.inc: // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK13: omp.dispatch.end: // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -13732,34 +13727,33 @@ int main (int argc, char **argv) { // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK14: omp.dispatch.cond: // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK14-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK14: cond.true: // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK14-NEXT: br label [[COND_END:%.*]] // CHECK14: cond.false: // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK14-NEXT: br label [[COND_END]] // CHECK14: cond.end: -// CHECK14-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK14: omp.dispatch.body: // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK14: omp.inner.for.cond: // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61 -// CHECK14-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK14-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK14: omp.inner.for.body: // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -13774,20 +13768,20 @@ int main (int argc, char **argv) { // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK14: omp.inner.for.inc: // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 -// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 +// CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] // CHECK14: omp.inner.for.end: // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK14: omp.dispatch.inc: // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK14-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK14: omp.dispatch.end: // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -16359,7 +16353,7 @@ int main (int argc, char **argv) { // CHECK15: omp.dispatch.cond: // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK15-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK15: cond.true: // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -18966,7 +18960,7 @@ int main (int argc, char **argv) { // CHECK16: omp.dispatch.cond: // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK16-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK16: cond.true: // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -21656,34 +21650,33 @@ int main (int argc, char **argv) { // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK17: omp.dispatch.cond: // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK17-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK17-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK17: cond.true: // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK17-NEXT: br label [[COND_END:%.*]] // CHECK17: cond.false: // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK17-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK17-NEXT: br label [[COND_END]] // CHECK17: cond.end: -// CHECK17-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK17: omp.dispatch.body: // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK17: omp.inner.for.cond: // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61 -// CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK17: omp.inner.for.body: // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -21698,20 +21691,20 @@ int main (int argc, char **argv) { // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK17: omp.inner.for.inc: // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 -// CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 +// CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] // CHECK17: omp.inner.for.end: // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK17: omp.dispatch.inc: // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK17: omp.dispatch.end: // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -24366,34 +24359,33 @@ int main (int argc, char **argv) { // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK18: omp.dispatch.cond: // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK18-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK18-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK18-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK18: cond.true: // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK18-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK18-NEXT: br label [[COND_END:%.*]] // CHECK18: cond.false: // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK18-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK18-NEXT: br label [[COND_END]] // CHECK18: cond.end: -// CHECK18-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK18-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK18-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK18-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK18: omp.dispatch.body: // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK18: omp.inner.for.cond: // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61 -// CHECK18-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK18-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK18: omp.inner.for.body: // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -24408,20 +24400,20 @@ int main (int argc, char **argv) { // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK18: omp.inner.for.inc: // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 -// CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 +// CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] // CHECK18: omp.inner.for.end: // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK18: omp.dispatch.inc: // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK18-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK18-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK18: omp.dispatch.end: // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -26993,7 +26985,7 @@ int main (int argc, char **argv) { // CHECK19: omp.dispatch.cond: // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK19-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK19: cond.true: // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -29600,7 +29592,7 @@ int main (int argc, char **argv) { // CHECK20: omp.dispatch.cond: // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK20-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK20: cond.true: // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp index a48230f44f502..b1a46f0dfbb58 100644 --- a/clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp @@ -755,34 +755,33 @@ int main (int argc, char **argv) { // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK1: omp.dispatch.cond: // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK1-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK1: cond.true: // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK1-NEXT: br label [[COND_END:%.*]] // CHECK1: cond.false: // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK1-NEXT: br label [[COND_END]] // CHECK1: cond.end: -// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK1: omp.dispatch.body: // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -798,20 +797,20 @@ int main (int argc, char **argv) { // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 +// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK1: omp.dispatch.inc: // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK1: omp.dispatch.end: // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -1670,34 +1669,33 @@ int main (int argc, char **argv) { // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK2: omp.dispatch.cond: // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK2-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK2: cond.true: // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK2-NEXT: br label [[COND_END:%.*]] // CHECK2: cond.false: // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK2-NEXT: br label [[COND_END]] // CHECK2: cond.end: -// CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK2-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK2: omp.dispatch.body: // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -1713,20 +1711,20 @@ int main (int argc, char **argv) { // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 +// CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK2: omp.dispatch.inc: // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK2: omp.dispatch.end: // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -2572,7 +2570,7 @@ int main (int argc, char **argv) { // CHECK3: omp.dispatch.cond: // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK3-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK3: cond.true: // CHECK3-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -3459,7 +3457,7 @@ int main (int argc, char **argv) { // CHECK4: omp.dispatch.cond: // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK4-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK4: cond.true: // CHECK4-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -4359,34 +4357,33 @@ int main (int argc, char **argv) { // CHECK5-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK5: omp.dispatch.cond: // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK5-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK5-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK5-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK5-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK5: cond.true: // CHECK5-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK5-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK5-NEXT: br label [[COND_END:%.*]] // CHECK5: cond.false: // CHECK5-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK5-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK5-NEXT: br label [[COND_END]] // CHECK5: cond.end: -// CHECK5-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK5-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK5-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK5-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK5-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK5-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK5-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK5-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK5-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK5: omp.dispatch.body: // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK5: omp.inner.for.cond: // CHECK5-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK5-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK5-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK5-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK5-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK5: omp.inner.for.body: // CHECK5-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -4402,20 +4399,20 @@ int main (int argc, char **argv) { // CHECK5-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK5: omp.inner.for.inc: // CHECK5-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 +// CHECK5-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK5-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 // CHECK5-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK5: omp.inner.for.end: // CHECK5-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK5: omp.dispatch.inc: // CHECK5-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK5-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK5-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK5-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK5-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK5-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK5-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK5-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK5-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK5-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK5-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK5: omp.dispatch.end: // CHECK5-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -5274,34 +5271,33 @@ int main (int argc, char **argv) { // CHECK6-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK6: omp.dispatch.cond: // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK6-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK6-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK6-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK6-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK6: cond.true: // CHECK6-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK6-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK6-NEXT: br label [[COND_END:%.*]] // CHECK6: cond.false: // CHECK6-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK6-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK6-NEXT: br label [[COND_END]] // CHECK6: cond.end: -// CHECK6-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK6-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK6-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK6-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK6-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK6-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK6-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK6-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK6-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK6: omp.dispatch.body: // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK6: omp.inner.for.cond: // CHECK6-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK6-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK6-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK6-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK6-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK6: omp.inner.for.body: // CHECK6-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -5317,20 +5313,20 @@ int main (int argc, char **argv) { // CHECK6-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK6: omp.inner.for.inc: // CHECK6-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 +// CHECK6-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK6-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4 // CHECK6-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK6: omp.inner.for.end: // CHECK6-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK6: omp.dispatch.inc: // CHECK6-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK6-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK6-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK6-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK6-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK6-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK6-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK6-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK6-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK6-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK6-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK6: omp.dispatch.end: // CHECK6-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -6176,7 +6172,7 @@ int main (int argc, char **argv) { // CHECK7: omp.dispatch.cond: // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK7-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK7: cond.true: // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -7063,7 +7059,7 @@ int main (int argc, char **argv) { // CHECK8: omp.dispatch.cond: // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK8-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK8: cond.true: // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -9498,34 +9494,33 @@ int main (int argc, char **argv) { // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK13: omp.dispatch.cond: // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK13-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK13: cond.true: // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK13-NEXT: br label [[COND_END:%.*]] // CHECK13: cond.false: // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK13-NEXT: br label [[COND_END]] // CHECK13: cond.end: -// CHECK13-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK13: omp.dispatch.body: // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK13: omp.inner.for.cond: // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK13: omp.inner.for.body: // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -9540,20 +9535,20 @@ int main (int argc, char **argv) { // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK13: omp.inner.for.inc: // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 +// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK13: omp.inner.for.end: // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK13: omp.dispatch.inc: // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK13: omp.dispatch.end: // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -11968,34 +11963,33 @@ int main (int argc, char **argv) { // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK14: omp.dispatch.cond: // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK14-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK14: cond.true: // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK14-NEXT: br label [[COND_END:%.*]] // CHECK14: cond.false: // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK14-NEXT: br label [[COND_END]] // CHECK14: cond.end: -// CHECK14-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK14: omp.dispatch.body: // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK14: omp.inner.for.cond: // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK14-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK14: omp.inner.for.body: // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -12010,20 +12004,20 @@ int main (int argc, char **argv) { // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK14: omp.inner.for.inc: // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 +// CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK14: omp.inner.for.end: // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK14: omp.dispatch.inc: // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK14-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK14: omp.dispatch.end: // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -14375,7 +14369,7 @@ int main (int argc, char **argv) { // CHECK15: omp.dispatch.cond: // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK15-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK15: cond.true: // CHECK15-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -16762,7 +16756,7 @@ int main (int argc, char **argv) { // CHECK16: omp.dispatch.cond: // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK16-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK16-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK16: cond.true: // CHECK16-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -19212,34 +19206,33 @@ int main (int argc, char **argv) { // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK17: omp.dispatch.cond: // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK17-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK17-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK17-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK17-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK17: cond.true: // CHECK17-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK17-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK17-NEXT: br label [[COND_END:%.*]] // CHECK17: cond.false: // CHECK17-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK17-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK17-NEXT: br label [[COND_END]] // CHECK17: cond.end: -// CHECK17-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK17-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK17-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK17-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK17-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK17-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK17-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK17: omp.dispatch.body: // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK17: omp.inner.for.cond: // CHECK17-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK17-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK17-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK17: omp.inner.for.body: // CHECK17-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -19254,20 +19247,20 @@ int main (int argc, char **argv) { // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK17: omp.inner.for.inc: // CHECK17-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 +// CHECK17-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK17-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK17: omp.inner.for.end: // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK17: omp.dispatch.inc: // CHECK17-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK17-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK17-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK17-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK17-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK17-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK17: omp.dispatch.end: // CHECK17-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -21682,34 +21675,33 @@ int main (int argc, char **argv) { // CHECK18-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK18: omp.dispatch.cond: // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK18-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK18-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK18-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK18-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK18: cond.true: // CHECK18-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK18-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK18-NEXT: br label [[COND_END:%.*]] // CHECK18: cond.false: // CHECK18-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK18-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK18-NEXT: br label [[COND_END]] // CHECK18: cond.end: -// CHECK18-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK18-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK18-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK18-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK18-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK18-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK18-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK18-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK18-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK18: omp.dispatch.body: // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK18: omp.inner.for.cond: // CHECK18-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK18-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK18-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK18-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK18-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK18: omp.inner.for.body: // CHECK18-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -21724,20 +21716,20 @@ int main (int argc, char **argv) { // CHECK18-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK18: omp.inner.for.inc: // CHECK18-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 -// CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4 +// CHECK18-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK18-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4 // CHECK18-NEXT: br label [[OMP_INNER_FOR_COND]] // CHECK18: omp.inner.for.end: // CHECK18-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK18: omp.dispatch.inc: // CHECK18-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK18-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK18-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK18-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK18-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK18-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK18-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK18-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK18-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK18-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK18-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK18: omp.dispatch.end: // CHECK18-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -24089,7 +24081,7 @@ int main (int argc, char **argv) { // CHECK19: omp.dispatch.cond: // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK19-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK19: cond.true: // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -26476,7 +26468,7 @@ int main (int argc, char **argv) { // CHECK20: omp.dispatch.cond: // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK20-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK20: cond.true: // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 diff --git a/clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp b/clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp index 00ec282f9322c..c62b4386594ff 100644 --- a/clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp +++ b/clang/test/OpenMP/teams_distribute_parallel_for_simd_schedule_codegen.cpp @@ -800,34 +800,33 @@ int main (int argc, char **argv) { // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK1: omp.dispatch.cond: // CHECK1-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK1-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK1-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK1: cond.true: // CHECK1-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK1-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK1-NEXT: br label [[COND_END:%.*]] // CHECK1: cond.false: // CHECK1-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK1-NEXT: br label [[COND_END]] // CHECK1: cond.end: -// CHECK1-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK1-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK1-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK1-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK1-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK1-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK1: omp.dispatch.body: // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK1: omp.inner.for.cond: // CHECK1-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 -// CHECK1-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK1-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK1: omp.inner.for.body: // CHECK1-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -843,20 +842,20 @@ int main (int argc, char **argv) { // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK1: omp.inner.for.inc: // CHECK1-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 -// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 +// CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK1-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK1: omp.inner.for.end: // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK1: omp.dispatch.inc: // CHECK1-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK1-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK1-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK1-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK1: omp.dispatch.end: // CHECK1-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -1785,34 +1784,33 @@ int main (int argc, char **argv) { // CHECK2-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK2: omp.dispatch.cond: // CHECK2-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK2-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK2-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK2-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK2-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK2-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK2: cond.true: // CHECK2-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK2-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK2-NEXT: br label [[COND_END:%.*]] // CHECK2: cond.false: // CHECK2-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK2-NEXT: br label [[COND_END]] // CHECK2: cond.end: -// CHECK2-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK2-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK2-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK2-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK2-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK2-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK2-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK2: omp.dispatch.body: // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK2: omp.inner.for.cond: // CHECK2-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK2-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 -// CHECK2-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK2-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK2-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK2-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK2: omp.inner.for.body: // CHECK2-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK2-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -1828,20 +1826,20 @@ int main (int argc, char **argv) { // CHECK2-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK2: omp.inner.for.inc: // CHECK2-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 -// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 +// CHECK2-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK2-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK2-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK2: omp.inner.for.end: // CHECK2-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK2: omp.dispatch.inc: // CHECK2-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK2-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK2-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK2-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK2-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK2-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK2-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK2-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK2-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK2: omp.dispatch.end: // CHECK2-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -2770,34 +2768,33 @@ int main (int argc, char **argv) { // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK3: omp.dispatch.cond: // CHECK3-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK3-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK3-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK3-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK3-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK3: cond.true: // CHECK3-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK3-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK3-NEXT: br label [[COND_END:%.*]] // CHECK3: cond.false: // CHECK3-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK3-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK3-NEXT: br label [[COND_END]] // CHECK3: cond.end: -// CHECK3-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK3-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK3-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK3-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK3-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK3-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK3-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK3: omp.dispatch.body: // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK3: omp.inner.for.cond: // CHECK3-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 -// CHECK3-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK3-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK3-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK3-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK3: omp.inner.for.body: // CHECK3-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -2813,20 +2810,20 @@ int main (int argc, char **argv) { // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK3: omp.inner.for.inc: // CHECK3-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 -// CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 +// CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK3-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK3: omp.inner.for.end: // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK3: omp.dispatch.inc: // CHECK3-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK3-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK3-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK3-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK3: omp.dispatch.end: // CHECK3-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -3755,34 +3752,33 @@ int main (int argc, char **argv) { // CHECK4-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK4: omp.dispatch.cond: // CHECK4-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK4-NEXT: [[CONV2:%.*]] = sext i32 [[TMP5]] to i64 // CHECK4-NEXT: [[TMP6:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK4-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV2]], [[TMP6]] +// CHECK4-NEXT: [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32 +// CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]] // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK4: cond.true: // CHECK4-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK4-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 // CHECK4-NEXT: br label [[COND_END:%.*]] // CHECK4: cond.false: // CHECK4-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK4-NEXT: [[CONV3:%.*]] = sext i32 [[TMP8]] to i64 // CHECK4-NEXT: br label [[COND_END]] // CHECK4: cond.end: -// CHECK4-NEXT: [[COND:%.*]] = phi i64 [ [[TMP7]], [[COND_TRUE]] ], [ [[CONV3]], [[COND_FALSE]] ] -// CHECK4-NEXT: [[CONV4:%.*]] = trunc i64 [[COND]] to i32 -// CHECK4-NEXT: store i32 [[CONV4]], i32* [[DOTOMP_UB]], align 4 +// CHECK4-NEXT: [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ] +// CHECK4-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK4-NEXT: store i32 [[TMP9]], i32* [[DOTOMP_IV]], align 4 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] -// CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]] +// CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK4: omp.dispatch.body: // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK4: omp.inner.for.cond: // CHECK4-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !26 -// CHECK4-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] -// CHECK4-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK4-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]] +// CHECK4-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK4: omp.inner.for.body: // CHECK4-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1 @@ -3798,20 +3794,20 @@ int main (int argc, char **argv) { // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK4: omp.inner.for.inc: // CHECK4-NEXT: [[TMP16:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 -// CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP16]], 1 -// CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 +// CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1 +// CHECK4-NEXT: store i32 [[ADD6]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !26 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]] // CHECK4: omp.inner.for.end: // CHECK4-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK4: omp.dispatch.inc: // CHECK4-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] -// CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 +// CHECK4-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]] +// CHECK4-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_LB]], align 4 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] -// CHECK4-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 +// CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]] +// CHECK4-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_UB]], align 4 // CHECK4-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK4: omp.dispatch.end: // CHECK4-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP4]]) @@ -4727,7 +4723,7 @@ int main (int argc, char **argv) { // CHECK5: omp.dispatch.cond: // CHECK5-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK5-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK5-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK5-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK5-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK5: cond.true: // CHECK5-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -5684,7 +5680,7 @@ int main (int argc, char **argv) { // CHECK6: omp.dispatch.cond: // CHECK6-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK6-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK6-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK6-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK6-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK6: cond.true: // CHECK6-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -6641,7 +6637,7 @@ int main (int argc, char **argv) { // CHECK7: omp.dispatch.cond: // CHECK7-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK7-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK7-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK7-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK7-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK7: cond.true: // CHECK7-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -7598,7 +7594,7 @@ int main (int argc, char **argv) { // CHECK8: omp.dispatch.cond: // CHECK8-NEXT: [[TMP5:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK8-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK8-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP5]], [[TMP6]] +// CHECK8-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]] // CHECK8-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK8: cond.true: // CHECK8-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -10993,34 +10989,33 @@ int main (int argc, char **argv) { // CHECK13-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK13: omp.dispatch.cond: // CHECK13-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK13-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK13-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK13-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK13-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK13-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK13: cond.true: // CHECK13-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK13-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK13-NEXT: br label [[COND_END:%.*]] // CHECK13: cond.false: // CHECK13-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK13-NEXT: br label [[COND_END]] // CHECK13: cond.end: -// CHECK13-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK13-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK13-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK13-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK13-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK13-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK13-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK13: omp.dispatch.body: // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK13: omp.inner.for.cond: // CHECK13-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61 -// CHECK13-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK13-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK13-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK13-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK13: omp.inner.for.body: // CHECK13-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -11035,20 +11030,20 @@ int main (int argc, char **argv) { // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK13: omp.inner.for.inc: // CHECK13-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 -// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 +// CHECK13-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK13-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] // CHECK13: omp.inner.for.end: // CHECK13-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK13: omp.dispatch.inc: // CHECK13-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK13-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK13-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK13-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK13-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK13-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK13-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK13-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK13: omp.dispatch.end: // CHECK13-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -13653,34 +13648,33 @@ int main (int argc, char **argv) { // CHECK14-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK14: omp.dispatch.cond: // CHECK14-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK14-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK14-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK14-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK14-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK14-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK14: cond.true: // CHECK14-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK14-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK14-NEXT: br label [[COND_END:%.*]] // CHECK14: cond.false: // CHECK14-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK14-NEXT: br label [[COND_END]] // CHECK14: cond.end: -// CHECK14-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK14-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK14-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK14-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK14-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK14-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK14-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK14-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK14: omp.dispatch.body: // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK14: omp.inner.for.cond: // CHECK14-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK14-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61 -// CHECK14-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK14-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK14-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK14-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK14: omp.inner.for.body: // CHECK14-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK14-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -13695,20 +13689,20 @@ int main (int argc, char **argv) { // CHECK14-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK14: omp.inner.for.inc: // CHECK14-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 -// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 +// CHECK14-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK14-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK14-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] // CHECK14: omp.inner.for.end: // CHECK14-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK14: omp.dispatch.inc: // CHECK14-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK14-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK14-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK14-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK14-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK14-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK14-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK14-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK14-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK14: omp.dispatch.end: // CHECK14-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -16313,34 +16307,33 @@ int main (int argc, char **argv) { // CHECK15-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK15: omp.dispatch.cond: // CHECK15-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK15-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK15-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK15-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK15-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK15-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK15-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK15: cond.true: // CHECK15-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK15-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK15-NEXT: br label [[COND_END:%.*]] // CHECK15: cond.false: // CHECK15-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK15-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK15-NEXT: br label [[COND_END]] // CHECK15: cond.end: -// CHECK15-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK15-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK15-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK15-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK15-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK15-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK15-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK15-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK15-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK15: omp.dispatch.body: // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK15: omp.inner.for.cond: // CHECK15-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61 -// CHECK15-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK15-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK15-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK15-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK15: omp.inner.for.body: // CHECK15-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -16355,20 +16348,20 @@ int main (int argc, char **argv) { // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK15: omp.inner.for.inc: // CHECK15-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 -// CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 +// CHECK15-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK15-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] // CHECK15: omp.inner.for.end: // CHECK15-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK15: omp.dispatch.inc: // CHECK15-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK15-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK15-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK15-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK15-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK15-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK15-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK15-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK15: omp.dispatch.end: // CHECK15-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -18973,34 +18966,33 @@ int main (int argc, char **argv) { // CHECK16-NEXT: br label [[OMP_DISPATCH_COND:%.*]] // CHECK16: omp.dispatch.cond: // CHECK16-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK16-NEXT: [[CONV3:%.*]] = sext i32 [[TMP6]] to i64 // CHECK16-NEXT: [[TMP7:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 -// CHECK16-NEXT: [[CMP:%.*]] = icmp ugt i64 [[CONV3]], [[TMP7]] +// CHECK16-NEXT: [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32 +// CHECK16-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV3]] // CHECK16-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK16: cond.true: // CHECK16-NEXT: [[TMP8:%.*]] = load i64, i64* [[DOTPREVIOUS_UB__ADDR]], align 8 +// CHECK16-NEXT: [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32 // CHECK16-NEXT: br label [[COND_END:%.*]] // CHECK16: cond.false: // CHECK16-NEXT: [[TMP9:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK16-NEXT: [[CONV4:%.*]] = sext i32 [[TMP9]] to i64 // CHECK16-NEXT: br label [[COND_END]] // CHECK16: cond.end: -// CHECK16-NEXT: [[COND:%.*]] = phi i64 [ [[TMP8]], [[COND_TRUE]] ], [ [[CONV4]], [[COND_FALSE]] ] -// CHECK16-NEXT: [[CONV5:%.*]] = trunc i64 [[COND]] to i32 -// CHECK16-NEXT: store i32 [[CONV5]], i32* [[DOTOMP_UB]], align 4 +// CHECK16-NEXT: [[COND:%.*]] = phi i32 [ [[CONV4]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ] +// CHECK16-NEXT: store i32 [[COND]], i32* [[DOTOMP_UB]], align 4 // CHECK16-NEXT: [[TMP10:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK16-NEXT: store i32 [[TMP10]], i32* [[DOTOMP_IV]], align 4 // CHECK16-NEXT: [[TMP11:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4 // CHECK16-NEXT: [[TMP12:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 -// CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] -// CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] +// CHECK16-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]] +// CHECK16-NEXT: br i1 [[CMP5]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]] // CHECK16: omp.dispatch.body: // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND:%.*]] // CHECK16: omp.inner.for.cond: // CHECK16-NEXT: [[TMP13:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK16-NEXT: [[TMP14:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4, !llvm.access.group !61 -// CHECK16-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] -// CHECK16-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] +// CHECK16-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]] +// CHECK16-NEXT: br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]] // CHECK16: omp.inner.for.body: // CHECK16-NEXT: [[TMP15:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK16-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1 @@ -19015,20 +19007,20 @@ int main (int argc, char **argv) { // CHECK16-NEXT: br label [[OMP_INNER_FOR_INC:%.*]] // CHECK16: omp.inner.for.inc: // CHECK16-NEXT: [[TMP17:%.*]] = load i32, i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 -// CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1 -// CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 +// CHECK16-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1 +// CHECK16-NEXT: store i32 [[ADD7]], i32* [[DOTOMP_IV]], align 4, !llvm.access.group !61 // CHECK16-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP62:![0-9]+]] // CHECK16: omp.inner.for.end: // CHECK16-NEXT: br label [[OMP_DISPATCH_INC:%.*]] // CHECK16: omp.dispatch.inc: // CHECK16-NEXT: [[TMP18:%.*]] = load i32, i32* [[DOTOMP_LB]], align 4 // CHECK16-NEXT: [[TMP19:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] -// CHECK16-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_LB]], align 4 +// CHECK16-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP18]], [[TMP19]] +// CHECK16-NEXT: store i32 [[ADD8]], i32* [[DOTOMP_LB]], align 4 // CHECK16-NEXT: [[TMP20:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK16-NEXT: [[TMP21:%.*]] = load i32, i32* [[DOTOMP_STRIDE]], align 4 -// CHECK16-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] -// CHECK16-NEXT: store i32 [[ADD10]], i32* [[DOTOMP_UB]], align 4 +// CHECK16-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], [[TMP21]] +// CHECK16-NEXT: store i32 [[ADD9]], i32* [[DOTOMP_UB]], align 4 // CHECK16-NEXT: br label [[OMP_DISPATCH_COND]] // CHECK16: omp.dispatch.end: // CHECK16-NEXT: call void @__kmpc_for_static_fini(%struct.ident_t* @[[GLOB1]], i32 [[TMP5]]) @@ -21570,7 +21562,7 @@ int main (int argc, char **argv) { // CHECK17: omp.dispatch.cond: // CHECK17-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK17-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK17: cond.true: // CHECK17-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -24147,7 +24139,7 @@ int main (int argc, char **argv) { // CHECK18: omp.dispatch.cond: // CHECK18-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK18-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK18-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK18-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK18-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK18: cond.true: // CHECK18-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -26724,7 +26716,7 @@ int main (int argc, char **argv) { // CHECK19: omp.dispatch.cond: // CHECK19-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK19-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK19: cond.true: // CHECK19-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 @@ -29301,7 +29293,7 @@ int main (int argc, char **argv) { // CHECK20: omp.dispatch.cond: // CHECK20-NEXT: [[TMP6:%.*]] = load i32, i32* [[DOTOMP_UB]], align 4 // CHECK20-NEXT: [[TMP7:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 -// CHECK20-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], [[TMP7]] +// CHECK20-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]] // CHECK20-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK20: cond.true: // CHECK20-NEXT: [[TMP8:%.*]] = load i32, i32* [[DOTPREVIOUS_UB__ADDR]], align 4 diff --git a/clang/test/Sema/arithmetic-fence-builtin.c b/clang/test/Sema/arithmetic-fence-builtin.c new file mode 100644 index 0000000000000..4f4f0a02cde9e --- /dev/null +++ b/clang/test/Sema/arithmetic-fence-builtin.c @@ -0,0 +1,48 @@ +// RUN: %clang_cc1 -triple i386-pc-linux-gnu -emit-llvm -o - -verify -x c++ %s +// RUN: %clang_cc1 -triple ppc64le -DPPC -emit-llvm -o - -verify -x c++ %s +// RUN: not %clang_cc1 -triple ppc64le -DPPC -emit-llvm -o - -x c++ %s \ +// RUN: -fprotect-parens 2>&1 | FileCheck -check-prefix=PPC %s +#ifndef PPC +int v; +template T addT(T a, T b) { + T *q = __arithmetic_fence(&a); + // expected-error@-1 {{invalid operand of type 'float *' where floating, complex or a vector of such types is required}} + // expected-error@-2 {{invalid operand of type 'int *' where floating, complex or a vector of such types is required}} + return __arithmetic_fence(a + b); + // expected-error@-1 {{invalid operand of type 'int' where floating, complex or a vector of such types is required}} +} +int addit(int a, int b) { + float x, y; + typedef struct { + int a, b; + } stype; + stype s; + s = __arithmetic_fence(s); // expected-error {{invalid operand of type 'stype' where floating, complex or a vector of such types is required}} + x = __arithmetic_fence(); // expected-error {{too few arguments to function call, expected 1, have 0}} + x = __arithmetic_fence(x, y); // expected-error {{too many arguments to function call, expected 1, have 2}} + // Complex is supported. + _Complex double cd, cd1; + cd = __arithmetic_fence(cd1); + // Vector is supported. + typedef float __v4hi __attribute__((__vector_size__(8))); + __v4hi vec1, vec2; + vec1 = __arithmetic_fence(vec2); + + v = __arithmetic_fence(a + b); // expected-error {{invalid operand of type 'int' where floating, complex or a vector of such types is required}} + float f = addT(a, b); // expected-note {{in instantiation of function template specialization 'addT' requested here}} + int i = addT(1, 2); // expected-note {{in instantiation of function template specialization 'addT' requested here}} + constexpr float d = 1.0 + 2.0; + constexpr float c = __arithmetic_fence(1.0 + 2.0); + constexpr float e = __arithmetic_fence(d); + return 0; +} +bool func(float f1, float f2, float f3) { + return (f1 == f2 && f1 == f3) || f2 == f3; // Should not warn here +} +static_assert( __arithmetic_fence(1.0 + 2.0), "message" ); +#else +float addit(float a, float b) { + return __arithmetic_fence(a+b); // expected-error {{builtin is not supported on this target}} +} +#endif +//PPC: error: option '-fprotect-parens' cannot be specified on this target diff --git a/clang/test/Sema/attr-availability-square-brackets.c b/clang/test/Sema/attr-availability-square-brackets.c index 13dbf0abb17f5..b03e19e4da233 100644 --- a/clang/test/Sema/attr-availability-square-brackets.c +++ b/clang/test/Sema/attr-availability-square-brackets.c @@ -1,11 +1,12 @@ // RUN: %clang_cc1 -triple x86_64-apple-darwin9 -fsyntax-only -fdouble-square-bracket-attributes -verify %s -void f0() [[clang::availability(macosx,introduced=10.4,deprecated=10.2)]]; // expected-warning{{feature cannot be deprecated in macOS version 10.2 before it was introduced in version 10.4; attribute ignored}} -void f1() [[clang::availability(ios,obsoleted=2.1,deprecated=3.0)]]; // expected-warning{{feature cannot be obsoleted in iOS version 2.1 before it was deprecated in version 3.0; attribute ignored}} -void f2() [[clang::availability(ios,introduced=2.1,deprecated=2.1)]]; +[[clang::availability(macosx,introduced=10.4,deprecated=10.2)]] void f0(); // expected-warning{{feature cannot be deprecated in macOS version 10.2 before it was introduced in version 10.4; attribute ignored}} +[[clang::availability(ios,obsoleted=2.1,deprecated=3.0)]] void f1(); // expected-warning{{feature cannot be obsoleted in iOS version 2.1 before it was deprecated in version 3.0; attribute ignored}} +[[clang::availability(ios,introduced=2.1,deprecated=2.1)]] void f2(); +[[clang::availability(macosx,introduced=8.0,deprecated=9.0, message="use CTFontCopyFullName")]] extern void -ATSFontGetName(const char *oName) [[clang::availability(macosx,introduced=8.0,deprecated=9.0, message="use CTFontCopyFullName")]]; // expected-note {{'ATSFontGetName' has been explicitly marked deprecated here}} +ATSFontGetName(const char *oName); // expected-note {{'ATSFontGetName' has been explicitly marked deprecated here}} void test_10095131() { ATSFontGetName("Hello"); // expected-warning {{'ATSFontGetName' is deprecated: first deprecated in macOS 9.0 - use CTFontCopyFullName}} diff --git a/clang/test/Sema/attr-c2x.c b/clang/test/Sema/attr-c2x.c index fae4c5d0fa907..016b1f58e3a73 100644 --- a/clang/test/Sema/attr-c2x.c +++ b/clang/test/Sema/attr-c2x.c @@ -11,16 +11,16 @@ enum [[clang::flag_enum]] EnumFlag { D0 = 1, D1 = 8 }; -void foo(void *c) [[clang::overloadable]]; -void foo(char *c) [[clang::overloadable]]; +[[clang::overloadable]] void foo(void *c); +[[clang::overloadable]] void foo(char *c); void context_okay(void *context [[clang::swift_context]]) [[clang::swiftcall]]; void context_okay2(void *context [[clang::swift_context]], void *selfType, char **selfWitnessTable) [[clang::swiftcall]]; -void *f1(void) [[clang::ownership_returns(foo)]]; -void *f2() [[clang::ownership_returns(foo)]]; // expected-warning {{'ownership_returns' attribute only applies to non-K&R-style functions}} +[[clang::ownership_returns(foo)]] void *f1(void); +[[clang::ownership_returns(foo)]] void *f2(); // expected-warning {{'ownership_returns' attribute only applies to non-K&R-style functions}} -void foo2(void) [[clang::unavailable("not available - replaced")]]; // expected-note {{'foo2' has been explicitly marked unavailable here}} +[[clang::unavailable("not available - replaced")]] void foo2(void); // expected-note {{'foo2' has been explicitly marked unavailable here}} void bar(void) { foo2(); // expected-error {{'foo2' is unavailable: not available - replaced}} } diff --git a/clang/test/Sema/attr-deprecated-c2x.c b/clang/test/Sema/attr-deprecated-c2x.c index 744fb1f7c4002..ba8434e8b094a 100644 --- a/clang/test/Sema/attr-deprecated-c2x.c +++ b/clang/test/Sema/attr-deprecated-c2x.c @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 %s -verify -fsyntax-only --std=c2x +// RUN: %clang_cc1 %s -verify -fsyntax-only -std=c2x -int f() [[deprecated]]; // expected-note 2 {{'f' has been explicitly marked deprecated here}} -void g() [[deprecated]];// expected-note {{'g' has been explicitly marked deprecated here}} +[[deprecated]] int f(); // expected-note 2 {{'f' has been explicitly marked deprecated here}} +[[deprecated]] void g();// expected-note {{'g' has been explicitly marked deprecated here}} void g(); extern int var [[deprecated]]; // expected-note 2 {{'var' has been explicitly marked deprecated here}} @@ -22,7 +22,7 @@ int w() { return var; // expected-warning {{'var' is deprecated}} } -int old_fn() [[deprecated]];// expected-note {{'old_fn' has been explicitly marked deprecated here}} +[[deprecated]] int old_fn();// expected-note {{'old_fn' has been explicitly marked deprecated here}} int old_fn(); int (*fn_ptr)() = old_fn; // expected-warning {{'old_fn' is deprecated}} @@ -52,3 +52,7 @@ struct bar_dep *test3; // expected-warning {{'bar_dep' is deprecated}} void test4(void) { i = 12; // expected-warning {{'i' is deprecated: this is the message}} } + +// Ensure that deprecated only accepts one argument, not the replacement +// argument supported as a GNU extension. +[[deprecated("message", "replacement not supported")]] void test5(void); // expected-error {{'deprecated' attribute takes no more than 1 argument}} diff --git a/clang/test/Sema/attr-external-source-symbol.c b/clang/test/Sema/attr-external-source-symbol.c index dfed609c8e87e..f257a63504d40 100644 --- a/clang/test/Sema/attr-external-source-symbol.c +++ b/clang/test/Sema/attr-external-source-symbol.c @@ -18,14 +18,14 @@ void namedDeclsOnly() { }; } -void threeClauses2() [[clang::external_source_symbol(language="Swift", defined_in="module", generated_declaration)]]; +[[clang::external_source_symbol(language="Swift", defined_in="module", generated_declaration)]] void threeClauses2(); -void twoClauses2() [[clang::external_source_symbol(language="Swift", defined_in="module")]]; +[[clang::external_source_symbol(language="Swift", defined_in="module")]] void twoClauses2(); -void fourClauses2() -[[clang::external_source_symbol(language="Swift", defined_in="module", generated_declaration, generated_declaration)]]; // expected-error {{duplicate 'generated_declaration' clause in an 'external_source_symbol' attribute}} +[[clang::external_source_symbol(language="Swift", defined_in="module", generated_declaration, generated_declaration)]] // expected-error {{duplicate 'generated_declaration' clause in an 'external_source_symbol' attribute}} +void fourClauses2(); -void oneClause2() [[clang::external_source_symbol(generated_declaration)]]; +[[clang::external_source_symbol(generated_declaration)]] void oneClause2(); -void noArguments2() -[[clang::external_source_symbol]]; // expected-error {{'external_source_symbol' attribute takes at least 1 argument}} +[[clang::external_source_symbol]] // expected-error {{'external_source_symbol' attribute takes at least 1 argument}} +void noArguments2(); diff --git a/clang/test/Sema/c2x-maybe_unused-errors.c b/clang/test/Sema/c2x-maybe_unused-errors.c index 72cefd10291a9..bb9931cd8d3da 100644 --- a/clang/test/Sema/c2x-maybe_unused-errors.c +++ b/clang/test/Sema/c2x-maybe_unused-errors.c @@ -10,3 +10,6 @@ struct [[maybe_unused("Wrong")]] S3 { // expected-error {{'maybe_unused' cannot int a; }; +void func(void) { + int a[10] [[maybe_unused]]; // expected-error {{'maybe_unused' attribute cannot be applied to types}} +} diff --git a/clang/test/Sema/overloadable.c b/clang/test/Sema/overloadable.c index 360f3308302e8..b520d76f9e7e8 100644 --- a/clang/test/Sema/overloadable.c +++ b/clang/test/Sema/overloadable.c @@ -1,6 +1,7 @@ -// RUN: %clang_cc1 -fsyntax-only -verify %s -Wincompatible-pointer-types +// RUN: %clang_cc1 -fsyntax-only -fdouble-square-bracket-attributes -verify %s -Wincompatible-pointer-types int var __attribute__((overloadable)); // expected-error{{'overloadable' attribute only applies to functions}} +void bad_attr_target(int) [[clang::overloadable]]; // expected-error{{'overloadable' attribute cannot be applied to types}} void params(void) __attribute__((overloadable(12))); // expected-error {{'overloadable' attribute takes no arguments}} int *f(int) __attribute__((overloadable)); // expected-note{{previous overload of function is here}} diff --git a/clang/test/SemaCXX/P1155.cpp b/clang/test/SemaCXX/P1155.cpp index 049987806e467..6dcbaa750557d 100644 --- a/clang/test/SemaCXX/P1155.cpp +++ b/clang/test/SemaCXX/P1155.cpp @@ -1,9 +1,7 @@ -// RUN: %clang_cc1 -std=c++2b -fsyntax-only -fcxx-exceptions -verify=cxx20_2b %s -// RUN: %clang_cc1 -std=c++20 -fsyntax-only -fcxx-exceptions -verify=cxx20_2b %s -// RUN: %clang_cc1 -std=c++17 -fsyntax-only -fcxx-exceptions -verify=cxx11_17 %s -// RUN: %clang_cc1 -std=c++14 -fsyntax-only -fcxx-exceptions -verify=cxx11_17 %s -// RUN: %clang_cc1 -std=c++11 -fsyntax-only -fcxx-exceptions -verify=cxx11_17 %s -// cxx20_2b-no-diagnostics +// RUN: %clang_cc1 -std=c++2b -fsyntax-only -fcxx-exceptions -verify %s +// RUN: %clang_cc1 -std=c++20 -fsyntax-only -fcxx-exceptions -verify %s +// RUN: %clang_cc1 -std=c++11 -fsyntax-only -fcxx-exceptions -verify %s +// expected-no-diagnostics // Throwing namespace test_throwing { @@ -14,7 +12,7 @@ class Widget { }; void seven(Widget w) { - throw w; // Clang already do this implicit move before -std=c++20 + throw w; } } // namespace test_throwing @@ -23,13 +21,13 @@ namespace test_non_constructor_conversion { class Widget {}; struct To { - operator Widget() const & = delete; // cxx11_17-note {{'operator Widget' has been explicitly marked deleted here}} + operator Widget() const & = delete; operator Widget() &&; }; Widget nine() { To t; - return t; // cxx11_17-error {{conversion function from 'test_non_constructor_conversion::To' to 'test_non_constructor_conversion::Widget' invokes a deleted function}} + return t; } } // namespace test_non_constructor_conversion @@ -39,16 +37,16 @@ class Widget { public: Widget(); Widget(Widget &&); - Widget(const Widget &) = delete; // cxx11_17-note {{'Widget' has been explicitly marked deleted here}} + Widget(const Widget &) = delete; }; struct Fowl { - Fowl(Widget); // cxx11_17-note {{passing argument to parameter here}} + Fowl(Widget); }; Fowl eleven() { Widget w; - return w; // cxx11_17-error {{call to deleted constructor of 'test_by_value_sinks::Widget'}} + return w; } } // namespace test_by_value_sinks @@ -58,13 +56,13 @@ class Base { public: Base(); Base(Base &&); - Base(Base const &) = delete; // cxx11_17-note {{'Base' has been explicitly marked deleted here}} + Base(Base const &) = delete; }; class Derived : public Base {}; Base thirteen() { Derived result; - return result; // cxx11_17-error {{call to deleted constructor of 'test_slicing::Base'}} + return result; } } // namespace test_slicing diff --git a/clang/test/SemaCXX/anonymous-struct.cpp b/clang/test/SemaCXX/anonymous-struct.cpp index 1b6207d19e44d..0a5395e15780b 100644 --- a/clang/test/SemaCXX/anonymous-struct.cpp +++ b/clang/test/SemaCXX/anonymous-struct.cpp @@ -49,7 +49,7 @@ typedef struct // expected-warning {{anonymous non-C-compatible type given name : B { // expected-note {{type is not C-compatible due to this base class}} } C; // expected-note {{type is given name 'C' for linkage purposes by this typedef declaration}} -#if __cplusplus > 201703L +#if __cplusplus > 201703L && __cplusplus < 202002L typedef struct { // expected-warning {{anonymous non-C-compatible type given name for linkage purposes by typedef declaration; add a tag name here}} static_assert([]{ return true; }()); // expected-note {{type is not C-compatible due to this lambda expression}} } Lambda1; // expected-note {{type is given name 'Lambda1' for linkage purposes by this typedef declaration}} diff --git a/clang/test/SemaCXX/conversion-function.cpp b/clang/test/SemaCXX/conversion-function.cpp index 0a3bfd3bcdaa4..8ff709ddbbb25 100644 --- a/clang/test/SemaCXX/conversion-function.cpp +++ b/clang/test/SemaCXX/conversion-function.cpp @@ -1,9 +1,7 @@ -// RUN: %clang_cc1 -std=c++2b -fsyntax-only -verify=expected -triple %itanium_abi_triple -Wbind-to-temporary-copy %s -// RUN: %clang_cc1 -std=c++20 -fsyntax-only -verify=expected -triple %itanium_abi_triple -Wbind-to-temporary-copy %s -// RUN: %clang_cc1 -std=c++14 -fsyntax-only -verify=expected,cxx98_14 -triple %itanium_abi_triple -Wbind-to-temporary-copy %s -// RUN: %clang_cc1 -std=c++11 -fsyntax-only -verify=expected,cxx98_14 -triple %itanium_abi_triple -Wbind-to-temporary-copy %s -// RUN: %clang_cc1 -std=c++98 -fsyntax-only -verify=expected,cxx98_14 -triple %itanium_abi_triple -Wbind-to-temporary-copy %s -// RUN: %clang_cc1 -fsyntax-only -verify=expected,cxx98_14 -triple %itanium_abi_triple -Wbind-to-temporary-copy %s +// RUN: %clang_cc1 -std=c++2b -fsyntax-only -verify=expected -triple %itanium_abi_triple -Wbind-to-temporary-copy %s +// RUN: %clang_cc1 -std=c++20 -fsyntax-only -verify=expected -triple %itanium_abi_triple -Wbind-to-temporary-copy %s +// RUN: %clang_cc1 -std=c++11 -fsyntax-only -verify=expected,cxx98_11,cxx11 -triple %itanium_abi_triple -Wbind-to-temporary-copy %s +// RUN: %clang_cc1 -std=c++98 -fsyntax-only -verify=expected,cxx98_11,cxx98 -triple %itanium_abi_triple -Wbind-to-temporary-copy %s class X { public: @@ -126,7 +124,7 @@ void f(Yb& a) { class AutoPtrRef { }; class AutoPtr { - AutoPtr(AutoPtr &); // cxx98_14-note{{declared private here}} + AutoPtr(AutoPtr &); // cxx98-note {{declared private here}} public: AutoPtr(); @@ -142,7 +140,7 @@ AutoPtr test_auto_ptr(bool Cond) { AutoPtr p; if (Cond) - return p; // cxx98_14-error{{calling a private constructor}} + return p; // cxx98-error {{calling a private constructor}} return AutoPtr(); } @@ -152,17 +150,14 @@ struct A1 { ~A1(); private: - A1(const A1&); // cxx98_14-note 2 {{declared private here}} + A1(const A1 &); // cxx98_11-note 2 {{declared private here}} }; A1 f() { // FIXME: redundant diagnostics! - return "Hello"; // cxx98_14-error {{calling a private constructor}} -#if __cplusplus <= 199711L - // expected-warning@-2 {{an accessible copy constructor}} -#else - // cxx98_14-warning@-4 {{copying parameter of type 'A1' when binding a reference to a temporary would invoke an inaccessible constructor in C++98}} -#endif + return "Hello"; // cxx98_11-error {{calling a private constructor}} + // cxx98-warning@-1 {{an accessible copy constructor}} + // cxx11-warning@-2 {{copying parameter of type 'A1' when binding a reference to a temporary would invoke an inaccessible constructor in C++98}} } namespace source_locations { diff --git a/clang/test/SemaCXX/lambda-unevaluated.cpp b/clang/test/SemaCXX/lambda-unevaluated.cpp new file mode 100644 index 0000000000000..07fa0d94bc8e4 --- /dev/null +++ b/clang/test/SemaCXX/lambda-unevaluated.cpp @@ -0,0 +1,31 @@ +// RUN: %clang_cc1 -std=c++20 %s -verify + + +template struct Nothing {}; +Nothing<[]() { return 0; }()> nothing; + +template struct NothingT {}; +Nothing<[]() { return 0; }> nothingT; + +template +concept True = [] { return true; }(); +static_assert(True); + +static_assert(sizeof([] { return 0; })); +static_assert(sizeof([] { return 0; }())); + +void f() noexcept(noexcept([] { return 0; }())); + +using a = decltype([] { return 0; }); +using b = decltype([] { return 0; }()); +using c = decltype([]() noexcept(noexcept([] { return 0; }())) { return 0; }); +using d = decltype(sizeof([] { return 0; })); + +template +int unique_test1(); +static_assert(&unique_test1<[](){}> != &unique_test1<[](){}>); + +template +auto g(T) -> decltype([]() { T::invalid; } ()); +auto e = g(0); // expected-error{{no matching function for call}} +// expected-note@-2 {{substitution failure}} diff --git a/clang/test/SemaCXX/recovery-expr-type.cpp b/clang/test/SemaCXX/recovery-expr-type.cpp index d3ac772db0089..509cd17459762 100644 --- a/clang/test/SemaCXX/recovery-expr-type.cpp +++ b/clang/test/SemaCXX/recovery-expr-type.cpp @@ -139,6 +139,7 @@ void baz() { namespace test12 { // Verify we do not crash. -void fun(int *foo = no_such_function()); // expected-error {{undeclared identifier}} -void baz() { fun(); } +int fun(int *foo = no_such_function()); // expected-error {{undeclared identifier}} +void crash1() { fun(); } +void crash2() { constexpr int s = fun(); } } // namespace test12 diff --git a/clang/test/SemaCXX/warn-return-std-move.cpp b/clang/test/SemaCXX/warn-return-std-move.cpp deleted file mode 100644 index 3dc81bc18ba60..0000000000000 --- a/clang/test/SemaCXX/warn-return-std-move.cpp +++ /dev/null @@ -1,351 +0,0 @@ -// RUN: %clang_cc1 -std=c++2b -fsyntax-only -verify=cxx20_2b,cxx2b -fcxx-exceptions -Wreturn-std-move %s -// RUN: %clang_cc1 -std=c++20 -fsyntax-only -verify=cxx20_2b -fcxx-exceptions -Wreturn-std-move %s -// RUN: %clang_cc1 -std=c++17 -fsyntax-only -verify=cxx11_17 -fcxx-exceptions -Wreturn-std-move %s -// RUN: %clang_cc1 -std=c++14 -fsyntax-only -verify=cxx11_17 -fcxx-exceptions -Wreturn-std-move %s -// RUN: %clang_cc1 -std=c++11 -fsyntax-only -verify=cxx11_17 -fcxx-exceptions -Wreturn-std-move %s - -// RUN: %clang_cc1 -std=c++17 -fsyntax-only -fcxx-exceptions -Wreturn-std-move -fdiagnostics-parseable-fixits %s 2>&1 | FileCheck %s -check-prefix=CHECK -// RUN: %clang_cc1 -std=c++14 -fsyntax-only -fcxx-exceptions -Wreturn-std-move -fdiagnostics-parseable-fixits %s 2>&1 | FileCheck %s -check-prefix=CHECK -// RUN: %clang_cc1 -std=c++11 -fsyntax-only -fcxx-exceptions -Wreturn-std-move -fdiagnostics-parseable-fixits %s 2>&1 | FileCheck %s -check-prefix=CHECK - -// definitions for std::move -namespace std { -inline namespace foo { -template struct remove_reference { typedef T type; }; -template struct remove_reference { typedef T type; }; -template struct remove_reference { typedef T type; }; - -template typename remove_reference::type &&move(T &&t); -} // namespace foo -} // namespace std - -struct Instrument { - Instrument() {} - Instrument(Instrument&&) { /* MOVE */ } - Instrument(const Instrument&) { /* COPY */ } -}; -struct ConvertFromBase { Instrument i; }; -struct ConvertFromDerived { Instrument i; }; -struct Base { - Instrument i; - operator ConvertFromBase() const& { return ConvertFromBase{i}; } - operator ConvertFromBase() && { return ConvertFromBase{std::move(i)}; } -}; -struct Derived : public Base { - operator ConvertFromDerived() const& { return ConvertFromDerived{i}; } - operator ConvertFromDerived() && { return ConvertFromDerived{std::move(i)}; } -}; -struct ConstructFromBase { - Instrument i; - ConstructFromBase(const Base& b): i(b.i) {} - ConstructFromBase(Base&& b): i(std::move(b.i)) {} -}; -struct ConstructFromDerived { - Instrument i; - ConstructFromDerived(const Derived& d): i(d.i) {} - ConstructFromDerived(Derived&& d): i(std::move(d.i)) {} -}; - -struct TrivialInstrument { - int i = 42; -}; -struct ConvertFromTrivialBase { TrivialInstrument i; }; -struct ConvertFromTrivialDerived { TrivialInstrument i; }; -struct TrivialBase { - TrivialInstrument i; - operator ConvertFromTrivialBase() const& { return ConvertFromTrivialBase{i}; } - operator ConvertFromTrivialBase() && { return ConvertFromTrivialBase{std::move(i)}; } -}; -struct TrivialDerived : public TrivialBase { - operator ConvertFromTrivialDerived() const& { return ConvertFromTrivialDerived{i}; } - operator ConvertFromTrivialDerived() && { return ConvertFromTrivialDerived{std::move(i)}; } -}; -struct ConstructFromTrivialBase { - TrivialInstrument i; - ConstructFromTrivialBase(const TrivialBase& b): i(b.i) {} - ConstructFromTrivialBase(TrivialBase&& b): i(std::move(b.i)) {} -}; -struct ConstructFromTrivialDerived { - TrivialInstrument i; - ConstructFromTrivialDerived(const TrivialDerived& d): i(d.i) {} - ConstructFromTrivialDerived(TrivialDerived&& d): i(std::move(d.i)) {} -}; - -Derived test1() { - Derived d1; - return d1; // ok -} -Base test2() { - Derived d2; - return d2; // e1 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:14}:"std::move(d2)" -} -ConstructFromDerived test3() { - Derived d3; - return d3; // ok -} -ConstructFromBase test4() { - Derived d4; - return d4; // e3 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:14}:"std::move(d4)" -} -ConvertFromDerived test5() { - Derived d5; - return d5; // e4 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:14}:"std::move(d5)" -} -ConvertFromBase test6() { - Derived d6; - return d6; // e5 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:14}:"std::move(d6)" -} - -// These test cases should not produce the warning. -Derived ok1() { Derived d; return d; } -Base ok2() { Derived d; return static_cast(d); } -ConstructFromDerived ok3() { Derived d; return static_cast(d); } -ConstructFromBase ok4() { Derived d; return static_cast(d); } -ConvertFromDerived ok5() { Derived d; return static_cast(d); } -ConvertFromBase ok6() { Derived d; return static_cast(d); } - -// If the target is an lvalue reference, assume it's not safe to move from. -Derived ok_plvalue1(Derived& d) { return d; } -Base ok_plvalue2(Derived& d) { return d; } -ConstructFromDerived ok_plvalue3(const Derived& d) { return d; } -ConstructFromBase ok_plvalue4(Derived& d) { return d; } -ConvertFromDerived ok_plvalue5(Derived& d) { return d; } -ConvertFromBase ok_plvalue6(Derived& d) { return d; } - -Derived ok_lvalue1(Derived *p) { Derived& d = *p; return d; } -Base ok_lvalue2(Derived *p) { Derived& d = *p; return d; } -ConstructFromDerived ok_lvalue3(Derived *p) { const Derived& d = *p; return d; } -ConstructFromBase ok_lvalue4(Derived *p) { Derived& d = *p; return d; } -ConvertFromDerived ok_lvalue5(Derived *p) { Derived& d = *p; return d; } -ConvertFromBase ok_lvalue6(Derived *p) { Derived& d = *p; return d; } - -// If the target is a global, assume it's not safe to move from. -static Derived global_d; -Derived ok_global1() { return global_d; } -Base ok_global2() { return global_d; } -ConstructFromDerived ok_global3() { return global_d; } -ConstructFromBase ok_global4() { return global_d; } -ConvertFromDerived ok_global5() { return global_d; } -ConvertFromBase ok_global6() { return global_d; } - -// If the target's copy constructor is trivial, assume the programmer doesn't care. -TrivialDerived ok_trivial1(TrivialDerived d) { return d; } -TrivialBase ok_trivial2(TrivialDerived d) { return d; } -ConstructFromTrivialDerived ok_trivial3(TrivialDerived d) { return d; } -ConstructFromTrivialBase ok_trivial4(TrivialDerived d) { return d; } -ConvertFromTrivialDerived ok_trivial5(TrivialDerived d) { return d; } -ConvertFromTrivialBase ok_trivial6(TrivialDerived d) { return d; } - -// If the target is a parameter, do apply the diagnostic. -Derived testParam1(Derived d) { return d; } -Base testParam2(Derived d) { - return d; // e6 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:13}:"std::move(d)" -} -ConstructFromDerived testParam3(Derived d) { - return d; // ok -} -ConstructFromBase testParam4(Derived d) { - return d; // e8 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:13}:"std::move(d)" -} -ConvertFromDerived testParam5(Derived d) { - return d; // e9 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:13}:"std::move(d)" -} -ConvertFromBase testParam6(Derived d) { - return d; // e10 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:13}:"std::move(d)" -} - -// If the target is an rvalue reference parameter, do apply the diagnostic. -Derived testRParam1(Derived&& d) { - return d; // e11 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:13}:"std::move(d)" -} -Base testRParam2(Derived&& d) { - return d; // e12 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:13}:"std::move(d)" -} -ConstructFromDerived testRParam3(Derived&& d) { - return d; // e13 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:13}:"std::move(d)" -} -ConstructFromBase testRParam4(Derived&& d) { - return d; // e14 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:13}:"std::move(d)" -} -ConvertFromDerived testRParam5(Derived&& d) { - return d; // e15 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:13}:"std::move(d)" -} -ConvertFromBase testRParam6(Derived&& d) { - return d; // e16 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:13}:"std::move(d)" -} - -// But if the return type is a reference type, then moving would be wrong. -Derived &testRetRef1(Derived &&d) { return d; } // cxx2b-error {{non-const lvalue reference to type 'Derived' cannot bind to a temporary of type 'Derived'}} -Base &testRetRef2(Derived &&d) { return d; } // cxx2b-error {{non-const lvalue reference to type 'Base' cannot bind to a temporary of type 'Derived'}} -#if __cplusplus >= 201402L -auto&& testRetRef3(Derived&& d) { return d; } -decltype(auto) testRetRef4(Derived&& d) { return (d); } -#endif - -// As long as we're checking parentheses, make sure parentheses don't disable the warning. -Base testParens1() { - Derived d; - return (d); // e17 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:12-[[@LINE-3]]:15}:"std::move(d)" -} -ConstructFromDerived testParens2() { - Derived d; - return (d); // ok -} - -// If the target is a catch-handler parameter, do apply the diagnostic. -void throw_derived(); -Derived testEParam1() { - try { throw_derived(); } catch (Derived d) { return d; } // e19 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:57-[[@LINE-3]]:58}:"std::move(d)" - __builtin_unreachable(); -} -Base testEParam2() { - try { throw_derived(); } catch (Derived d) { return d; } // e20 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:57-[[@LINE-3]]:58}:"std::move(d)" - __builtin_unreachable(); -} -ConstructFromDerived testEParam3() { - try { throw_derived(); } catch (Derived d) { return d; } // e21 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:57-[[@LINE-3]]:58}:"std::move(d)" - __builtin_unreachable(); -} -ConstructFromBase testEParam4() { - try { throw_derived(); } catch (Derived d) { return d; } // e22 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:57-[[@LINE-3]]:58}:"std::move(d)" - __builtin_unreachable(); -} -ConvertFromDerived testEParam5() { - try { throw_derived(); } catch (Derived d) { return d; } // e23 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:57-[[@LINE-3]]:58}:"std::move(d)" - __builtin_unreachable(); -} -ConvertFromBase testEParam6() { - try { throw_derived(); } catch (Derived d) { return d; } // e24 - // cxx11_17-warning@-1{{will be copied despite being returned by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:57-[[@LINE-3]]:58}:"std::move(d)" - __builtin_unreachable(); -} - -// If the exception variable is an lvalue reference, we cannot be sure -// that we own it; it is extremely contrived, but possible, for this to -// be a reference to an exception object that was thrown via -// `std::rethrow_exception(xp)` in Thread A, and meanwhile somebody else -// has got a copy of `xp` in Thread B, so that moving out of this object -// in Thread A would be observable (and racy) with respect to Thread B. -// Therefore assume it's not safe to move from. -Derived ok_REParam1() { try { throw_derived(); } catch (Derived& d) { return d; } __builtin_unreachable(); } -Base ok_REParam2() { try { throw_derived(); } catch (Derived& d) { return d; } __builtin_unreachable(); } -ConstructFromDerived ok_REParam3() { try { throw_derived(); } catch (Derived& d) { return d; } __builtin_unreachable(); } -ConstructFromBase ok_REParam4() { try { throw_derived(); } catch (Derived& d) { return d; } __builtin_unreachable(); } -ConvertFromDerived ok_REParam5() { try { throw_derived(); } catch (Derived& d) { return d; } __builtin_unreachable(); } -ConvertFromBase ok_REParam6() { try { throw_derived(); } catch (Derived& d) { return d; } __builtin_unreachable(); } - -Derived ok_CEParam1() { try { throw_derived(); } catch (const Derived& d) { return d; } __builtin_unreachable(); } -Base ok_CEParam2() { try { throw_derived(); } catch (const Derived& d) { return d; } __builtin_unreachable(); } -ConstructFromDerived ok_CEParam3() { try { throw_derived(); } catch (const Derived& d) { return d; } __builtin_unreachable(); } -ConstructFromBase ok_CEParam4() { try { throw_derived(); } catch (const Derived& d) { return d; } __builtin_unreachable(); } -ConvertFromDerived ok_CEParam5() { try { throw_derived(); } catch (const Derived& d) { return d; } __builtin_unreachable(); } -ConvertFromBase ok_CEParam6() { try { throw_derived(); } catch (const Derived& d) { return d; } __builtin_unreachable(); } - -// If rvalue overload resolution would find a copy constructor anyway, -// or if the copy constructor actually selected is trivial, then don't warn. -struct TriviallyCopyable {}; -struct OnlyCopyable { - OnlyCopyable() = default; - OnlyCopyable(const OnlyCopyable&) {} -}; - -TriviallyCopyable ok_copy1() { TriviallyCopyable c; return c; } -OnlyCopyable ok_copy2() { OnlyCopyable c; return c; } -TriviallyCopyable ok_copyparam1(TriviallyCopyable c) { return c; } -OnlyCopyable ok_copyparam2(OnlyCopyable c) { return c; } - -void test_throw1(Derived&& d) { - throw d; // e25 - // cxx11_17-warning@-1{{will be copied despite being thrown by name}} - // cxx11_17-note@-2{{to avoid copying}} - // CHECK: fix-it:"{{.*}}":{[[@LINE-3]]:11-[[@LINE-3]]:12}:"std::move(d)" -} - -void ok_throw1() { - Derived d; - throw d; -} -void ok_throw2(Derived d) { throw d; } -void ok_throw3(Derived &d) { throw d; } -void ok_throw4(Derived d) { throw std::move(d); } -void ok_throw5(Derived &d) { throw std::move(d); } -void ok_throw6(Derived &d) { throw static_cast(d); } -void ok_throw7(TriviallyCopyable d) { throw d; } -void ok_throw8(OnlyCopyable d) { throw d; } - -namespace test_delete { -struct Base { - Base(); - Base(Base &&) = delete; // cxx20_2b-note {{'Base' has been explicitly marked deleted here}} - Base(Base const &); -}; - -struct Derived : public Base {}; - -Base test_ok() { - Derived d; - return d; // cxx20_2b-error {{call to deleted constructor of 'test_delete::Base'}} -} -} // namespace test_delete diff --git a/clang/test/SemaCXX/warn-thread-safety-analysis.cpp b/clang/test/SemaCXX/warn-thread-safety-analysis.cpp index 8e8bb6f45dde4..e9d41da80517c 100644 --- a/clang/test/SemaCXX/warn-thread-safety-analysis.cpp +++ b/clang/test/SemaCXX/warn-thread-safety-analysis.cpp @@ -636,11 +636,11 @@ void shared_fun_0() { void shared_fun_1() { sls_mu.ReaderLock(); // \ - // expected-warning {{mutex 'sls_mu' is acquired exclusively and shared in the same scope}} + // expected-note {{the other acquisition of mutex 'sls_mu' is here}} do { sls_mu.Unlock(); sls_mu.Lock(); // \ - // expected-note {{the other acquisition of mutex 'sls_mu' is here}} + // expected-warning {{mutex 'sls_mu' is acquired exclusively and shared in the same scope}} } while (getBool()); sls_mu.Unlock(); } @@ -695,11 +695,11 @@ void shared_fun_11() { void shared_bad_0() { sls_mu.Lock(); // \ - // expected-warning {{mutex 'sls_mu' is acquired exclusively and shared in the same scope}} + // expected-note {{the other acquisition of mutex 'sls_mu' is here}} do { sls_mu.Unlock(); sls_mu.ReaderLock(); // \ - // expected-note {{the other acquisition of mutex 'sls_mu' is here}} + // expected-warning {{mutex 'sls_mu' is acquired exclusively and shared in the same scope}} } while (getBool()); sls_mu.Unlock(); } @@ -2773,6 +2773,45 @@ void unlockJoin() { x = 2; // expected-warning {{writing variable 'x' requires holding mutex 'mu' exclusively}} } +void loopAcquire() { + RelockableMutexLock scope(&mu, DeferTraits{}); + for (unsigned i = 1; i < 10; ++i) + scope.Lock(); // We could catch this double lock with negative capabilities. +} + +void loopRelease() { + RelockableMutexLock scope(&mu, ExclusiveTraits{}); // expected-note {{mutex acquired here}} + // We have to warn on this join point despite the lock being managed ... + for (unsigned i = 1; i < 10; ++i) { // expected-warning {{expecting mutex 'mu' to be held at start of each loop}} + x = 1; // ... because we might miss that this doesn't always happen under lock. + if (i == 5) + scope.Unlock(); + } +} + +void loopAcquireContinue() { + RelockableMutexLock scope(&mu, DeferTraits{}); + for (unsigned i = 1; i < 10; ++i) { + x = 1; // expected-warning {{writing variable 'x' requires holding mutex 'mu' exclusively}} + if (i == 5) { + scope.Lock(); + continue; + } + } +} + +void loopReleaseContinue() { + RelockableMutexLock scope(&mu, ExclusiveTraits{}); // expected-note {{mutex acquired here}} + // We have to warn on this join point despite the lock being managed ... + for (unsigned i = 1; i < 10; ++i) { + x = 1; // ... because we might miss that this doesn't always happen under lock. + if (i == 5) { + scope.Unlock(); + continue; // expected-warning {{expecting mutex 'mu' to be held at start of each loop}} + } + } +} + void exclusiveSharedJoin() { RelockableMutexLock scope(&mu, DeferTraits{}); if (b) diff --git a/clang/test/SemaObjCXX/block-capture.mm b/clang/test/SemaObjCXX/block-capture.mm index c4f80f5954bd0..77a3907c6578c 100644 --- a/clang/test/SemaObjCXX/block-capture.mm +++ b/clang/test/SemaObjCXX/block-capture.mm @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -std=c++2b -fsyntax-only -fobjc-arc -fblocks -verify=cxx98_2b,cxx20_2b,cxx2b %s -// RUN: %clang_cc1 -std=c++20 -fsyntax-only -fobjc-arc -fblocks -verify=cxx98_2b,cxx20_2b %s -// RUN: %clang_cc1 -std=c++11 -fsyntax-only -fobjc-arc -fblocks -verify=cxx98_2b,cxx98_11 %s -// RUN: %clang_cc1 -std=c++98 -fsyntax-only -fobjc-arc -fblocks -Wno-c++11-extensions -verify=cxx98_2b,cxx98_11 %s +// RUN: %clang_cc1 -std=c++2b -fsyntax-only -fobjc-arc -fblocks -verify=cxx98_2b,cxx11_2b,cxx2b %s +// RUN: %clang_cc1 -std=c++20 -fsyntax-only -fobjc-arc -fblocks -verify=cxx98_2b,cxx11_2b %s +// RUN: %clang_cc1 -std=c++11 -fsyntax-only -fobjc-arc -fblocks -verify=cxx98_2b,cxx11_2b %s +// RUN: %clang_cc1 -std=c++98 -fsyntax-only -fobjc-arc -fblocks -Wno-c++11-extensions -verify=cxx98_2b,cxx98 %s #define TEST(T) void test_##T() { \ __block T x; \ @@ -14,54 +14,68 @@ }; TEST(CopyOnly); // cxx2b-error {{no matching constructor}} +struct ConstCopyOnly { + ConstCopyOnly(); + ConstCopyOnly(ConstCopyOnly &) = delete; // cxx98-note {{marked deleted here}} + ConstCopyOnly(const ConstCopyOnly &); +}; +TEST(ConstCopyOnly); // cxx98-error {{call to deleted constructor}} + +struct NonConstCopyOnly { + NonConstCopyOnly(); + NonConstCopyOnly(NonConstCopyOnly &); + NonConstCopyOnly(const NonConstCopyOnly &) = delete; // cxx11_2b-note {{marked deleted here}} +}; +TEST(NonConstCopyOnly); // cxx11_2b-error {{call to deleted constructor}} + struct CopyNoMove { CopyNoMove(); CopyNoMove(CopyNoMove &); - CopyNoMove(CopyNoMove &&) = delete; // cxx98_2b-note {{marked deleted here}} + CopyNoMove(CopyNoMove &&) = delete; // cxx11_2b-note {{marked deleted here}} }; -TEST(CopyNoMove); // cxx98_2b-error {{call to deleted constructor}} +TEST(CopyNoMove); // cxx11_2b-error {{call to deleted constructor}} struct MoveOnly { MoveOnly(); - MoveOnly(MoveOnly &) = delete; + MoveOnly(MoveOnly &) = delete; // cxx98-note {{marked deleted here}} MoveOnly(MoveOnly &&); }; -TEST(MoveOnly); +TEST(MoveOnly); // cxx98-error {{call to deleted constructor}} struct NoCopyNoMove { NoCopyNoMove(); - NoCopyNoMove(NoCopyNoMove &) = delete; - NoCopyNoMove(NoCopyNoMove &&) = delete; // cxx98_2b-note {{marked deleted here}} + NoCopyNoMove(NoCopyNoMove &) = delete; // cxx98-note {{marked deleted here}} + NoCopyNoMove(NoCopyNoMove &&) = delete; // cxx11_2b-note {{marked deleted here}} }; TEST(NoCopyNoMove); // cxx98_2b-error {{call to deleted constructor}} struct ConvertingRVRef { ConvertingRVRef(); - ConvertingRVRef(ConvertingRVRef &) = delete; // cxx98_11-note {{marked deleted here}} + ConvertingRVRef(ConvertingRVRef &) = delete; // cxx98-note {{marked deleted here}} struct X {}; ConvertingRVRef(X &&); operator X() const & = delete; operator X() &&; }; -TEST(ConvertingRVRef); // cxx98_11-error {{call to deleted constructor}} +TEST(ConvertingRVRef); // cxx98-error {{call to deleted constructor}} struct ConvertingCLVRef { ConvertingCLVRef(); ConvertingCLVRef(ConvertingCLVRef &); struct X {}; - ConvertingCLVRef(X &&); // cxx20_2b-note {{passing argument to parameter here}} + ConvertingCLVRef(X &&); // cxx11_2b-note {{passing argument to parameter here}} operator X() const &; - operator X() && = delete; // cxx20_2b-note {{marked deleted here}} + operator X() && = delete; // cxx11_2b-note {{marked deleted here}} }; -TEST(ConvertingCLVRef); // cxx20_2b-error {{invokes a deleted function}} +TEST(ConvertingCLVRef); // cxx11_2b-error {{invokes a deleted function}} struct SubSubMove {}; struct SubMove : SubSubMove { SubMove(); - SubMove(SubMove &) = delete; // cxx98_11-note {{marked deleted here}} + SubMove(SubMove &) = delete; // cxx98-note {{marked deleted here}} SubMove(SubSubMove &&); }; -TEST(SubMove); // cxx98_11-error {{call to deleted constructor}} +TEST(SubMove); // cxx98-error {{call to deleted constructor}} diff --git a/clang/test/SemaTemplate/class-template-id.cpp b/clang/test/SemaTemplate/class-template-id.cpp index b32a03e478d91..50cb3ef59ea41 100644 --- a/clang/test/SemaTemplate/class-template-id.cpp +++ b/clang/test/SemaTemplate/class-template-id.cpp @@ -9,9 +9,9 @@ A *foo(A *ptr, A const *ptr2, A *ptr3) { if (ptr) return ptr; // okay else if (ptr2) - return ptr2; // expected-error{{cannot initialize return object of type 'A *' with an lvalue of type 'const A *'}} + return ptr2; // expected-error{{cannot initialize return object of type 'A *' (aka 'A *') with an lvalue of type 'const A *'}} else { - return ptr3; // expected-error{{cannot initialize return object of type 'A *' with an lvalue of type 'A *'}} + return ptr3; // expected-error{{cannot initialize return object of type 'A *' (aka 'A *') with an lvalue of type 'A *'}} } } diff --git a/clang/test/SemaTemplate/default-arguments-ast-print.cpp b/clang/test/SemaTemplate/default-arguments-ast-print.cpp index 9ed17a79de0d6..4623f0a8cdf46 100644 --- a/clang/test/SemaTemplate/default-arguments-ast-print.cpp +++ b/clang/test/SemaTemplate/default-arguments-ast-print.cpp @@ -10,3 +10,15 @@ int Foo::method1() { // CHECK: int Foo::method1() return 10; } + +int test_typedef() { + typedef Foo TypedefArg; + // CHECK: typedef Foo TypedefArg; + return 10; +} + +int test_typedef2() { + typedef Foo TypedefArg; + // CHECK: typedef Foo TypedefArg; + return 10; +} diff --git a/clang/tools/clang-import-test/clang-import-test.cpp b/clang/tools/clang-import-test/clang-import-test.cpp index df173cf49f35e..fa5d7a54f53b4 100644 --- a/clang/tools/clang-import-test/clang-import-test.cpp +++ b/clang/tools/clang-import-test/clang-import-test.cpp @@ -208,7 +208,7 @@ std::unique_ptr BuildCompilerInstance() { TargetInfo *TI = TargetInfo::CreateTargetInfo( Ins->getDiagnostics(), Ins->getInvocation().TargetOpts); Ins->setTarget(TI); - Ins->getTarget().adjust(Ins->getLangOpts()); + Ins->getTarget().adjust(Ins->getDiagnostics(), Ins->getLangOpts()); Ins->createFileManager(); Ins->createSourceManager(Ins->getFileManager()); Ins->createPreprocessor(TU_Complete); diff --git a/clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp b/clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp index 55eb0f4be16e7..f62b53418d54f 100644 --- a/clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp +++ b/clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp @@ -32,10 +32,12 @@ #include "llvm/Object/ObjectFile.h" #include "llvm/Support/Casting.h" #include "llvm/Support/CommandLine.h" +#include "llvm/Support/Debug.h" #include "llvm/Support/Errc.h" #include "llvm/Support/Error.h" #include "llvm/Support/ErrorOr.h" #include "llvm/Support/FileSystem.h" +#include "llvm/Support/Host.h" #include "llvm/Support/MemoryBuffer.h" #include "llvm/Support/Path.h" #include "llvm/Support/Program.h" @@ -148,26 +150,58 @@ static bool AllowNoHost = false; /// Path to the current binary. static std::string BundlerExecutable; -/// Obtain the offload kind and real machine triple out of the target -/// information specified by the user. -static void getOffloadKindAndTriple(StringRef Target, StringRef &OffloadKind, - StringRef &Triple) { - auto KindTriplePair = Target.split('-'); - OffloadKind = KindTriplePair.first; - Triple = KindTriplePair.second; -} -static bool hasHostKind(StringRef Target) { +/// Obtain the offload kind, real machine triple, and an optional GPUArch +/// out of the target information specified by the user. +/// Bundle Entry ID (or, Offload Target String) has following components: +/// * Offload Kind - Host, OpenMP, or HIP +/// * Triple - Standard LLVM Triple +/// * GPUArch (Optional) - Processor name, like gfx906 or sm_30 +/// In presence of Proc, the Triple should contain separator "-" for all +/// standard four components, even if they are empty. +struct OffloadTargetInfo { StringRef OffloadKind; - StringRef Triple; - getOffloadKindAndTriple(Target, OffloadKind, Triple); - return OffloadKind == "host"; -} + llvm::Triple Triple; + StringRef GPUArch; + + OffloadTargetInfo(const StringRef Target) { + SmallVector Components; + Target.split(Components, '-', 5); + Components.resize(6); + this->OffloadKind = Components[0]; + this->Triple = llvm::Triple(Components[1], Components[2], Components[3], + Components[4]); + this->GPUArch = Components[5]; + } + + bool hasHostKind() const { return this->OffloadKind == "host"; } + + bool isOffloadKindValid() const { + return OffloadKind == "host" || OffloadKind == "openmp" || + OffloadKind == "sycl" || OffloadKind == "fpga" || + OffloadKind == "hip" || OffloadKind == "hipv4"; + } + + bool isTripleValid() const { + return !Triple.str().empty() && Triple.getArch() != Triple::UnknownArch; + } + + bool operator==(const OffloadTargetInfo &Target) const { + return OffloadKind == Target.OffloadKind && + Triple.isCompatibleWith(Target.Triple) && GPUArch == Target.GPUArch; + } + + std::string str() { + return Twine(OffloadKind + "-" + Triple.str() + "-" + GPUArch).str(); + } + + llvm::Triple getTriple() { + return Triple; + } +}; static Triple getTargetTriple(StringRef Target) { - StringRef OffloadKind; - StringRef TargetTriple; - getOffloadKindAndTriple(Target, OffloadKind, TargetTriple); - return Triple(TargetTriple); + auto OffloadInfo = OffloadTargetInfo(Target); + return Triple(OffloadInfo.getTriple()); } /// Generic file handler interface. @@ -1041,7 +1075,8 @@ class ArchiveFileHandler final : public FileHandler { "device objects; use 'aoo' instead"); // For 'host' archive bundle just copy input data to the output stream. - if (Mode == OutputType::Archive && hasHostKind(CurrBundle->first())) { + if (Mode == OutputType::Archive && + OffloadTargetInfo(CurrBundle->first()).hasHostKind()) { OS << Input.getBuffer(); return Error::success(); } @@ -1216,6 +1251,8 @@ CreateFileHandler(MemoryBuffer &FirstInput) { return std::make_unique(/*Comment=*/"#"); if (FilesType == "o") return CreateObjectFileHandler(FirstInput); + if (FilesType == "a") + return CreateObjectFileHandler(FirstInput); if (FilesType == "gch") return std::make_unique(); if (FilesType == "ast") @@ -1369,7 +1406,8 @@ static Error UnbundleFiles() { Worklist.erase(Output); // Record if we found the host bundle. - if (hasHostKind(CurTriple)) + auto OffloadInfo = OffloadTargetInfo(CurTriple); + if (OffloadInfo.hasHostKind()) FoundHostBundle = true; } @@ -1403,7 +1441,8 @@ static Error UnbundleFiles() { // If this entry has a host kind, copy the input file to the output file // except for the archive unbundling where output is a list file. - if (hasHostKind(E.first()) && !FilesTypeIsArchiveToList()) + auto OffloadInfo = OffloadTargetInfo(E.getKey()); + if (OffloadInfo.hasHostKind() && !FilesTypeIsArchiveToList()) OutputFile.write(Input.getBufferStart(), Input.getBufferSize()); } return Error::success(); @@ -1475,6 +1514,241 @@ static Expected CheckBundledSection() { return found; } +static Archive::Kind getDefaultArchiveKindForHost() { + return Triple(sys::getDefaultTargetTriple()).isOSDarwin() ? Archive::K_DARWIN + : Archive::K_GNU; +} + +/// @brief Checks if a code object \p CodeObjectInfo is compatible with a given +/// target \p TargetInfo. +/// @link https://clang.llvm.org/docs/ClangOffloadBundler.html#bundle-entry-id +bool isCodeObjectCompatible(OffloadTargetInfo &CodeObjectInfo, + OffloadTargetInfo &TargetInfo) { + + // Compatible in case of exact match. + if (CodeObjectInfo == TargetInfo) { + DEBUG_WITH_TYPE( + "CodeObjectCompatibility", + dbgs() << "Compatible: Exact match: " << CodeObjectInfo.str() << "\n"); + return true; + } + + // Incompatible if Kinds or Triples mismatch. + if (CodeObjectInfo.OffloadKind != TargetInfo.OffloadKind || + !CodeObjectInfo.Triple.isCompatibleWith(TargetInfo.Triple)) { + DEBUG_WITH_TYPE( + "CodeObjectCompatibility", + dbgs() << "Incompatible: Kind/Triple mismatch \t[CodeObject: " + << CodeObjectInfo.str() << "]\t:\t[Target: " << TargetInfo.str() + << "]\n"); + return false; + } + + // Incompatible if GPUArch mismatch. + if (CodeObjectInfo.GPUArch != TargetInfo.GPUArch) { + DEBUG_WITH_TYPE("CodeObjectCompatibility", + dbgs() << "Incompatible: GPU Arch mismatch \t[CodeObject: " + << CodeObjectInfo.str() + << "]\t:\t[Target: " << TargetInfo.str() << "]\n"); + return false; + } + + DEBUG_WITH_TYPE( + "CodeObjectCompatibility", + dbgs() << "Compatible: Code Objects are compatible \t[CodeObject: " + << CodeObjectInfo.str() << "]\t:\t[Target: " << TargetInfo.str() + << "]\n"); + return true; +} + +/// @brief Computes a list of targets among all given targets which are +/// compatible with this code object +/// @param [in] Code Object \p CodeObject +/// @param [out] List of all compatible targets \p CompatibleTargets among all +/// given targets +/// @return false, if no compatible target is found. +static bool +getCompatibleOffloadTargets(OffloadTargetInfo &CodeObjectInfo, + SmallVectorImpl &CompatibleTargets) { + if (!CompatibleTargets.empty()) { + DEBUG_WITH_TYPE("CodeObjectCompatibility", + dbgs() << "CompatibleTargets list should be empty\n"); + return false; + } + for (auto &Target : TargetNames) { + auto TargetInfo = OffloadTargetInfo(Target); + if (isCodeObjectCompatible(CodeObjectInfo, TargetInfo)) + CompatibleTargets.push_back(Target); + } + return !CompatibleTargets.empty(); +} + +/// UnbundleArchive takes an archive file (".a") as input containing bundled +/// code object files, and a list of offload targets (not host), and extracts +/// the code objects into a new archive file for each offload target. Each +/// resulting archive file contains all code object files corresponding to that +/// particular offload target. The created archive file does not +/// contain an index of the symbols and code object files are named as +/// <->, with ':' replaced with '_'. +static Error UnbundleArchive() { + std::vector> ArchiveBuffers; + + /// Map of target names with list of object files that will form the device + /// specific archive for that target + StringMap> OutputArchivesMap; + + // Map of target names and output archive filenames + StringMap TargetOutputFileNameMap; + + auto Output = OutputFileNames.begin(); + for (auto &Target : TargetNames) { + TargetOutputFileNameMap[Target] = *Output; + ++Output; + } + + StringRef IFName = InputFileNames.front(); + ErrorOr> BufOrErr = + MemoryBuffer::getFileOrSTDIN(IFName, -1, false); + if (std::error_code EC = BufOrErr.getError()) + return createFileError(InputFileNames.front(), EC); + + ArchiveBuffers.push_back(std::move(*BufOrErr)); + Expected> LibOrErr = + Archive::create(ArchiveBuffers.back()->getMemBufferRef()); + if (!LibOrErr) + return LibOrErr.takeError(); + + auto Archive = std::move(*LibOrErr); + + Error ArchiveErr = Error::success(); + auto ChildEnd = Archive->child_end(); + + /// Iterate over all bundled code object files in the input archive. + for (auto ArchiveIter = Archive->child_begin(ArchiveErr); + ArchiveIter != ChildEnd; ++ArchiveIter) { + if (ArchiveErr) + return ArchiveErr; + auto ArchiveChildNameOrErr = (*ArchiveIter).getName(); + if (!ArchiveChildNameOrErr) + return ArchiveChildNameOrErr.takeError(); + + StringRef BundledObjectFile = sys::path::filename(*ArchiveChildNameOrErr); + + auto CodeObjectBufferRefOrErr = (*ArchiveIter).getMemoryBufferRef(); + if (!CodeObjectBufferRefOrErr) + return CodeObjectBufferRefOrErr.takeError(); + + auto CodeObjectBuffer = + MemoryBuffer::getMemBuffer(*CodeObjectBufferRefOrErr, false); + + Expected> FileHandlerOrErr = + CreateFileHandler(*CodeObjectBuffer); + if (!FileHandlerOrErr) + return FileHandlerOrErr.takeError(); + + std::unique_ptr &FileHandler = *FileHandlerOrErr; + assert(FileHandler && + "FileHandle creation failed for file in the archive!"); + + if (Error ReadErr = FileHandler.get()->ReadHeader(*CodeObjectBuffer)) + return ReadErr; + + Expected> CurBundleIDOrErr = + FileHandler->ReadBundleStart(*CodeObjectBuffer); + if (!CurBundleIDOrErr) + return CurBundleIDOrErr.takeError(); + + Optional OptionalCurBundleID = *CurBundleIDOrErr; + // No device code in this child, skip. + if (!OptionalCurBundleID.hasValue()) + continue; + StringRef CodeObject = *OptionalCurBundleID; + + // Process all bundle entries (CodeObjects) found in this child of input + // archive. + while (!CodeObject.empty()) { + SmallVector CompatibleTargets; + auto CodeObjectInfo = OffloadTargetInfo(CodeObject); + if (CodeObjectInfo.hasHostKind()) { + // Do nothing, we don't extract host code yet. + } else if (getCompatibleOffloadTargets(CodeObjectInfo, + CompatibleTargets)) { + std::string BundleData; + raw_string_ostream DataStream(BundleData); + if (Error Err = + FileHandler.get()->ReadBundle(DataStream, *CodeObjectBuffer)) + return Err; + + for (auto &CompatibleTarget : CompatibleTargets) { + SmallString<128> BundledObjectFileName; + BundledObjectFileName.assign(BundledObjectFile); + auto OutputBundleName = + Twine(llvm::sys::path::stem(BundledObjectFileName) + "-" + + CodeObject) + .str(); + // Replace ':' in optional target feature list with '_' to ensure + // cross-platform validity. + std::replace(OutputBundleName.begin(), OutputBundleName.end(), ':', + '_'); + + std::unique_ptr MemBuf = MemoryBuffer::getMemBufferCopy( + DataStream.str(), OutputBundleName); + ArchiveBuffers.push_back(std::move(MemBuf)); + llvm::MemoryBufferRef MemBufRef = + MemoryBufferRef(*(ArchiveBuffers.back())); + + // For inserting > entry in + // OutputArchivesMap. + if (OutputArchivesMap.find(CompatibleTarget) == + OutputArchivesMap.end()) { + + std::vector ArchiveMembers; + ArchiveMembers.push_back(NewArchiveMember(MemBufRef)); + OutputArchivesMap.insert_or_assign(CompatibleTarget, + std::move(ArchiveMembers)); + } else { + OutputArchivesMap[CompatibleTarget].push_back( + NewArchiveMember(MemBufRef)); + } + } + } + + if (Error Err = FileHandler.get()->ReadBundleEnd(*CodeObjectBuffer)) + return Err; + + Expected> NextTripleOrErr = + FileHandler->ReadBundleStart(*CodeObjectBuffer); + if (!NextTripleOrErr) + return NextTripleOrErr.takeError(); + + CodeObject = ((*NextTripleOrErr).hasValue()) ? **NextTripleOrErr : ""; + } // End of processing of all bundle entries of this child of input archive. + } // End of while over children of input archive. + + assert(!ArchiveErr && "Error occured while reading archive!"); + + /// Write out an archive for each target + for (auto &Target : TargetNames) { + StringRef FileName = TargetOutputFileNameMap[Target]; + StringMapIterator> CurArchiveMembers = + OutputArchivesMap.find(Target); + if (CurArchiveMembers != OutputArchivesMap.end()) { + if (Error WriteErr = writeArchive(FileName, CurArchiveMembers->getValue(), + true, getDefaultArchiveKindForHost(), + true, false, nullptr)) + return WriteErr; + } else if (!AllowMissingBundles) { + std::string ErrMsg = + Twine("no compatible code object found for the target '" + Target + + "' in heterogenous archive library: " + IFName) + .str(); + return createStringError(inconvertibleErrorCode(), ErrMsg); + } + } + + return Error::success(); +} + static void PrintVersion(raw_ostream &OS) { OS << clang::getClangToolFullVersion("clang-offload-bundler") << '\n'; } @@ -1592,6 +1866,11 @@ int main(int argc, const char **argv) { } // no explicit option: bundle else { + if (FilesType == "a") { + reportError(createStringError(errc::invalid_argument, + "Archive files are only supported " + "for unbundling")); + } if (OutputFileNames.size() != 1) { reportError(createStringError( errc::invalid_argument, @@ -1617,42 +1896,28 @@ int main(int argc, const char **argv) { } ParsedTargets.insert(Target); - StringRef Kind; - StringRef Triple; - getOffloadKindAndTriple(Target, Kind, Triple); - - bool KindIsValid = !Kind.empty(); - KindIsValid = KindIsValid && StringSwitch(Kind) - .Case("host", true) - .Case("openmp", true) - .Case("hip", true) - .Case("sycl", true) - .Case("fpga", true) - .Case("hipv4", true) - .Default(false); - - bool TripleIsValid = !Triple.empty(); - llvm::Triple T(Triple); - TripleIsValid &= T.getArch() != Triple::UnknownArch; + auto OffloadInfo = OffloadTargetInfo(Target); + bool KindIsValid = OffloadInfo.isOffloadKindValid(); + bool TripleIsValid = OffloadInfo.isTripleValid(); if (!KindIsValid || !TripleIsValid) { SmallVector Buf; raw_svector_ostream Msg(Buf); Msg << "invalid target '" << Target << "'"; if (!KindIsValid) - Msg << ", unknown offloading kind '" << Kind << "'"; + Msg << ", unknown offloading kind '" << OffloadInfo.OffloadKind << "'"; if (!TripleIsValid) - Msg << ", unknown target triple '" << Triple << "'"; + Msg << ", unknown target triple '" << OffloadInfo.Triple.str() << "'"; reportError(createStringError(errc::invalid_argument, Msg.str())); } - if (KindIsValid && Kind == "host") { + if (KindIsValid && OffloadInfo.hasHostKind()) { ++HostTargetNum; // Save the index of the input that refers to the host. HostInputIndex = Index; } - if (Kind != "hip" && Kind != "hipv4") + if (OffloadInfo.OffloadKind != "hip" && OffloadInfo.OffloadKind != "hipv4") HIPOnly = false; ++Index; @@ -1681,6 +1946,14 @@ int main(int argc, const char **argv) { Twine(HostTargetNum))); } - doWork([]() { return Unbundle ? UnbundleFiles() : BundleFiles(); }); + doWork([]() { + if (Unbundle) { + if (FilesType == "a") + return UnbundleArchive(); + else + return UnbundleFiles(); + } else + return BundleFiles(); + }); return 0; } diff --git a/clang/tools/clang-shlib/CMakeLists.txt b/clang/tools/clang-shlib/CMakeLists.txt index d08cf89383282..9c1f8ea452b36 100644 --- a/clang/tools/clang-shlib/CMakeLists.txt +++ b/clang/tools/clang-shlib/CMakeLists.txt @@ -50,6 +50,6 @@ add_clang_library(clang-cpp ${_DEPS}) # Optimize function calls for default visibility definitions to avoid PLT and # reduce dynamic relocations. -if (NOT APPLE) +if (NOT APPLE AND NOT MINGW) target_link_options(clang-cpp PRIVATE LINKER:-Bsymbolic-functions) endif() diff --git a/clang/unittests/AST/ASTImporterTest.cpp b/clang/unittests/AST/ASTImporterTest.cpp index da4bce16d23b8..3536b1cfcbffc 100644 --- a/clang/unittests/AST/ASTImporterTest.cpp +++ b/clang/unittests/AST/ASTImporterTest.cpp @@ -3679,6 +3679,52 @@ TEST_P(ImportVariables, InitAndDefinitionAreInTheFromContext) { EXPECT_TRUE(ImportedD->getDefinition()); } +TEST_P(ImportVariables, ImportBindingDecl) { + Decl *From, *To; + std::tie(From, To) = getImportedDecl( + R"( + void declToImport() { + int a[2] = {1,2}; + auto [x1,y1] = a; + auto& [x2,y2] = a; + + struct S { + mutable int x1 : 2; + volatile double y1; + }; + S b; + const auto [x3, y3] = b; + }; + )", + Lang_CXX17, "", Lang_CXX17); + + TranslationUnitDecl *FromTU = From->getTranslationUnitDecl(); + auto *FromF = FirstDeclMatcher().match( + FromTU, functionDecl(hasName("declToImport"))); + auto *ToF = Import(FromF, Lang_CXX17); + EXPECT_TRUE(ToF); + + auto VerifyImport = [&](llvm::StringRef BindName) { + auto *FromB = FirstDeclMatcher().match( + FromF, bindingDecl(hasName(BindName))); + ASSERT_TRUE(FromB); + auto *ToB = Import(FromB, Lang_CXX17); + EXPECT_TRUE(ToB); + EXPECT_EQ(FromB->getBinding() != nullptr, ToB->getBinding() != nullptr); + EXPECT_EQ(FromB->getDecomposedDecl() != nullptr, + ToB->getDecomposedDecl() != nullptr); + EXPECT_EQ(FromB->getHoldingVar() != nullptr, + ToB->getHoldingVar() != nullptr); + }; + + VerifyImport("x1"); + VerifyImport("y1"); + VerifyImport("x2"); + VerifyImport("y2"); + VerifyImport("x3"); + VerifyImport("y3"); +} + struct ImportClasses : ASTImporterOptionSpecificTestBase {}; TEST_P(ImportClasses, ImportDefinitionWhenProtoIsInNestedToContext) { diff --git a/clang/unittests/Format/FormatTestCSharp.cpp b/clang/unittests/Format/FormatTestCSharp.cpp index 651b54cd342a7..3c990339cf748 100644 --- a/clang/unittests/Format/FormatTestCSharp.cpp +++ b/clang/unittests/Format/FormatTestCSharp.cpp @@ -640,6 +640,122 @@ class MyClass }; })", MicrosoftStyle); + + verifyFormat("void bar()\n" + "{\n" + " Function(Val, (Action)(() =>\n" + " {\n" + " lock (mylock)\n" + " {\n" + " if (true)\n" + " {\n" + " A.Remove(item);\n" + " }\n" + " }\n" + " }));\n" + "}", + MicrosoftStyle); + + verifyFormat("void baz()\n" + "{\n" + " Function(Val, (Action)(() =>\n" + " {\n" + " using (var a = new Lock())\n" + " {\n" + " if (true)\n" + " {\n" + " A.Remove(item);\n" + " }\n" + " }\n" + " }));\n" + "}", + MicrosoftStyle); + + verifyFormat("void baz()\n" + "{\n" + " Function(Val, (Action)(() =>\n" + " {\n" + " if (true)\n" + " {\n" + " A.Remove(item);\n" + " }\n" + " }));\n" + "}", + MicrosoftStyle); + + verifyFormat("void baz()\n" + "{\n" + " Function(Val, (Action)(() =>\n" + " {\n" + " do\n" + " {\n" + " A.Remove(item);\n" + " } while (true)\n" + " }));\n" + "}", + MicrosoftStyle); + + verifyFormat("void baz()\n" + "{\n" + " Function(Val, (Action)(() =>\n" + " { A.Remove(item); }));\n" + "}", + MicrosoftStyle); + + verifyFormat("void bar()\n" + "{\n" + " Function(Val, (() =>\n" + " {\n" + " lock (mylock)\n" + " {\n" + " if (true)\n" + " {\n" + " A.Remove(item);\n" + " }\n" + " }\n" + " }));\n" + "}", + MicrosoftStyle); + verifyFormat("void bar()\n" + "{\n" + " Function((() =>\n" + " {\n" + " lock (mylock)\n" + " {\n" + " if (true)\n" + " {\n" + " A.Remove(item);\n" + " }\n" + " }\n" + " }));\n" + "}", + MicrosoftStyle); + + MicrosoftStyle.IndentWidth = 2; + verifyFormat("void bar()\n" + "{\n" + " Function((() =>\n" + " {\n" + " lock (mylock)\n" + " {\n" + " if (true)\n" + " {\n" + " A.Remove(item);\n" + " }\n" + " }\n" + " }));\n" + "}", + MicrosoftStyle); + verifyFormat("void bar() {\n" + " Function((() => {\n" + " lock (mylock) {\n" + " if (true) {\n" + " A.Remove(item);\n" + " }\n" + " }\n" + " }));\n" + "}", + GoogleStyle); } TEST_F(FormatTestCSharp, CSharpObjectInitializers) { diff --git a/clang/unittests/Lex/PPCallbacksTest.cpp b/clang/unittests/Lex/PPCallbacksTest.cpp index 5581f9fb82f34..f92587af8dc5e 100644 --- a/clang/unittests/Lex/PPCallbacksTest.cpp +++ b/clang/unittests/Lex/PPCallbacksTest.cpp @@ -112,6 +112,20 @@ class PragmaOpenCLExtensionCallbacks : public PPCallbacks { unsigned State; }; +class PragmaMarkCallbacks : public PPCallbacks { +public: + struct Mark { + SourceLocation Location; + std::string Trivia; + }; + + std::vector Marks; + + void PragmaMark(SourceLocation Loc, StringRef Trivia) override { + Marks.emplace_back(Mark{Loc, Trivia.str()}); + } +}; + // PPCallbacks test fixture. class PPCallbacksTest : public ::testing::Test { protected: @@ -256,6 +270,36 @@ class PPCallbacksTest : public ::testing::Test { return Callbacks->Results; } + std::vector + PragmaMarkCall(const char *SourceText) { + std::unique_ptr SourceBuf = + llvm::MemoryBuffer::getMemBuffer(SourceText, "test.c"); + SourceMgr.setMainFileID(SourceMgr.createFileID(std::move(SourceBuf))); + + HeaderSearch HeaderInfo(std::make_shared(), SourceMgr, + Diags, LangOpts, Target.get()); + TrivialModuleLoader ModLoader; + + Preprocessor PP(std::make_shared(), Diags, LangOpts, + SourceMgr, HeaderInfo, ModLoader, /*IILookup=*/nullptr, + /*OwnsHeaderSearch=*/false); + PP.Initialize(*Target); + + auto *Callbacks = new PragmaMarkCallbacks; + PP.addPPCallbacks(std::unique_ptr(Callbacks)); + + // Lex source text. + PP.EnterMainSourceFile(); + while (true) { + Token Tok; + PP.Lex(Tok); + if (Tok.is(tok::eof)) + break; + } + + return Callbacks->Marks; + } + PragmaOpenCLExtensionCallbacks::CallbackParameters PragmaOpenCLExtensionCall(const char *SourceText) { LangOptions OpenCLLangOpts; @@ -424,6 +468,24 @@ TEST_F(PPCallbacksTest, OpenCLExtensionPragmaDisabled) { ASSERT_EQ(ExpectedState, Parameters.State); } +TEST_F(PPCallbacksTest, CollectMarks) { + const char *Source = + "#pragma mark\n" + "#pragma mark\r\n" + "#pragma mark - trivia\n" + "#pragma mark - trivia\r\n"; + + auto Marks = PragmaMarkCall(Source); + + ASSERT_EQ(4u, Marks.size()); + ASSERT_TRUE(Marks[0].Trivia.empty()); + ASSERT_TRUE(Marks[1].Trivia.empty()); + ASSERT_FALSE(Marks[2].Trivia.empty()); + ASSERT_FALSE(Marks[3].Trivia.empty()); + ASSERT_EQ(" - trivia", Marks[2].Trivia); + ASSERT_EQ(" - trivia", Marks[3].Trivia); +} + TEST_F(PPCallbacksTest, DirectiveExprRanges) { const auto &Results1 = DirectiveExprRange("#if FLUZZY_FLOOF\n#endif\n"); EXPECT_EQ(Results1.size(), 1U); diff --git a/clang/unittests/StaticAnalyzer/CMakeLists.txt b/clang/unittests/StaticAnalyzer/CMakeLists.txt index 0e6d8763d96d2..4de6bec4d2167 100644 --- a/clang/unittests/StaticAnalyzer/CMakeLists.txt +++ b/clang/unittests/StaticAnalyzer/CMakeLists.txt @@ -11,8 +11,9 @@ add_clang_unittest(StaticAnalysisTests ParamRegionTest.cpp RangeSetTest.cpp RegisterCustomCheckersTest.cpp - StoreTest.cpp + StoreTest.cpp SymbolReaperTest.cpp + SValTest.cpp TestReturnValueUnderConstruction.cpp ) diff --git a/clang/unittests/StaticAnalyzer/SValTest.cpp b/clang/unittests/StaticAnalyzer/SValTest.cpp new file mode 100644 index 0000000000000..ea10d69d2804e --- /dev/null +++ b/clang/unittests/StaticAnalyzer/SValTest.cpp @@ -0,0 +1,366 @@ +//===- unittests/StaticAnalyzer/SvalTest.cpp ------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "CheckerRegistration.h" + +#include "clang/AST/ASTContext.h" +#include "clang/AST/Decl.h" +#include "clang/AST/DeclGroup.h" +#include "clang/AST/RecursiveASTVisitor.h" +#include "clang/AST/Stmt.h" +#include "clang/AST/Type.h" +#include "clang/StaticAnalyzer/Core/Checker.h" +#include "clang/StaticAnalyzer/Core/CheckerManager.h" +#include "clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h" +#include "clang/StaticAnalyzer/Core/PathSensitive/MemRegion.h" +#include "clang/StaticAnalyzer/Core/PathSensitive/SVals.h" +#include "clang/StaticAnalyzer/Frontend/AnalysisConsumer.h" +#include "clang/StaticAnalyzer/Frontend/CheckerRegistry.h" +#include "clang/Tooling/Tooling.h" +#include "llvm/ADT/STLExtras.h" +#include "llvm/ADT/StringRef.h" +#include "llvm/Support/Casting.h" +#include "llvm/Support/raw_ostream.h" +#include "gtest/gtest.h" + +namespace clang { + +// getType() tests include whole bunch of type comparisons, +// so when something is wrong, it's good to have gtest telling us +// what are those types. +LLVM_ATTRIBUTE_UNUSED std::ostream &operator<<(std::ostream &OS, + const QualType &T) { + return OS << T.getAsString(); +} + +LLVM_ATTRIBUTE_UNUSED std::ostream &operator<<(std::ostream &OS, + const CanQualType &T) { + return OS << QualType{T}; +} + +namespace ento { +namespace { + +//===----------------------------------------------------------------------===// +// Testing framework implementation +//===----------------------------------------------------------------------===// + +/// A simple map from variable names to symbolic values used to init them. +using SVals = llvm::StringMap; + +/// SValCollector is the barebone of all tests. +/// +/// It is implemented as a checker and reacts to binds, so we find +/// symbolic values of interest, and to end analysis, where we actually +/// can test whatever we gathered. +class SValCollector : public Checker { +public: + void checkBind(SVal Loc, SVal Val, const Stmt *S, CheckerContext &C) const { + // Skip instantly if we finished testing. + // Also, we care only for binds happening in variable initializations. + if (Tested || !isa(S)) + return; + + if (const auto *VR = llvm::dyn_cast_or_null(Loc.getAsRegion())) { + CollectedSVals[VR->getDescriptiveName(false)] = Val; + } + } + + void checkEndAnalysis(ExplodedGraph &G, BugReporter &B, + ExprEngine &Engine) const { + if (!Tested) { + test(Engine, Engine.getContext()); + Tested = true; + CollectedSVals.clear(); + } + } + + /// Helper function for tests to access bound symbolic values. + SVal getByName(StringRef Name) const { return CollectedSVals[Name]; } + +private: + /// Entry point for tests. + virtual void test(ExprEngine &Engine, const ASTContext &Context) const = 0; + + mutable bool Tested = false; + mutable SVals CollectedSVals; +}; + +// SVAL_TEST is a combined way of providing a short code snippet and +// to test some programmatic predicates on symbolic values produced by the +// engine for the actual code. +// +// Each test has a NAME. One can think of it as a name for normal gtests. +// +// Each test should provide a CODE snippet. Code snippets might contain any +// valid C/C++, but have ONLY ONE defined function. There are no requirements +// about function's name or parameters. It can even be a class method. The +// body of the function must contain a set of variable declarations. Each +// variable declaration gets bound to a symbolic value, so for the following +// example: +// +// int x = ; +// +// `x` will be bound to whatever symbolic value the engine produced for . +// LIVENESS and REASSIGNMENTS don't affect this binding. +// +// During the test the actual values can be accessed via `getByName` function, +// and, for the `x`-bound value, one must use "x" as its name. +// +// Example: +// SVAL_TEST(SimpleSValTest, R"( +// void foo() { +// int x = 42; +// })") { +// SVal X = getByName("x"); +// EXPECT_TRUE(X.isConstant(42)); +// } +#define SVAL_TEST(NAME, CODE) \ + class NAME##SValCollector final : public SValCollector { \ + public: \ + void test(ExprEngine &Engine, const ASTContext &Context) const override; \ + }; \ + \ + void add##NAME##SValCollector(AnalysisASTConsumer &AnalysisConsumer, \ + AnalyzerOptions &AnOpts) { \ + AnOpts.CheckersAndPackages = {{"test.##NAME##SValCollector", true}}; \ + AnalysisConsumer.AddCheckerRegistrationFn([](CheckerRegistry &Registry) { \ + Registry.addChecker("test.##NAME##SValCollector", \ + "Description", ""); \ + }); \ + } \ + \ + TEST(SValTest, NAME) { runCheckerOnCode(CODE); } \ + void NAME##SValCollector::test(ExprEngine &Engine, \ + const ASTContext &Context) const + +//===----------------------------------------------------------------------===// +// Actual tests +//===----------------------------------------------------------------------===// + +SVAL_TEST(GetConstType, R"( +void foo() { + int x = 42; + int *y = nullptr; +})") { + SVal X = getByName("x"); + ASSERT_FALSE(X.getType(Context).isNull()); + EXPECT_EQ(Context.IntTy, X.getType(Context)); + + SVal Y = getByName("y"); + ASSERT_FALSE(Y.getType(Context).isNull()); + EXPECT_EQ(Context.getUIntPtrType(), Y.getType(Context)); +} + +SVAL_TEST(GetLocAsIntType, R"( +void foo(int *x) { + long int a = (long int)x; + unsigned b = (long unsigned)&a; + int c = (long int)nullptr; +})") { + SVal A = getByName("a"); + ASSERT_FALSE(A.getType(Context).isNull()); + // TODO: Turn it into signed long + EXPECT_EQ(Context.getUIntPtrType(), A.getType(Context)); + + SVal B = getByName("b"); + ASSERT_FALSE(B.getType(Context).isNull()); + EXPECT_EQ(Context.UnsignedIntTy, B.getType(Context)); + + SVal C = getByName("c"); + ASSERT_FALSE(C.getType(Context).isNull()); + EXPECT_EQ(Context.IntTy, C.getType(Context)); +} + +SVAL_TEST(GetSymExprType, R"( +void foo(int a, int b) { + int x = a; + int y = a + b; + long z = a; +})") { + QualType Int = Context.IntTy; + + SVal X = getByName("x"); + ASSERT_FALSE(X.getType(Context).isNull()); + EXPECT_EQ(Int, X.getType(Context)); + + SVal Y = getByName("y"); + ASSERT_FALSE(Y.getType(Context).isNull()); + EXPECT_EQ(Int, Y.getType(Context)); + + // TODO: Change to Long when we support symbolic casts + SVal Z = getByName("z"); + ASSERT_FALSE(Z.getType(Context).isNull()); + EXPECT_EQ(Int, Z.getType(Context)); +} + +SVAL_TEST(GetPointerType, R"( +int *bar(); +int &foobar(); +struct Z { + int a; + int *b; +}; +void foo(int x, int *y, Z z) { + int &a = x; + int &b = *y; + int &c = *bar(); + int &d = foobar(); + int &e = z.a; + int &f = *z.b; +})") { + QualType Int = Context.IntTy; + + SVal A = getByName("a"); + ASSERT_FALSE(A.getType(Context).isNull()); + const auto *APtrTy = dyn_cast(A.getType(Context)); + ASSERT_NE(APtrTy, nullptr); + EXPECT_EQ(Int, APtrTy->getPointeeType()); + + SVal B = getByName("b"); + ASSERT_FALSE(B.getType(Context).isNull()); + const auto *BPtrTy = dyn_cast(B.getType(Context)); + ASSERT_NE(BPtrTy, nullptr); + EXPECT_EQ(Int, BPtrTy->getPointeeType()); + + SVal C = getByName("c"); + ASSERT_FALSE(C.getType(Context).isNull()); + const auto *CPtrTy = dyn_cast(C.getType(Context)); + ASSERT_NE(CPtrTy, nullptr); + EXPECT_EQ(Int, CPtrTy->getPointeeType()); + + SVal D = getByName("d"); + ASSERT_FALSE(D.getType(Context).isNull()); + const auto *DRefTy = dyn_cast(D.getType(Context)); + ASSERT_NE(DRefTy, nullptr); + EXPECT_EQ(Int, DRefTy->getPointeeType()); + + SVal E = getByName("e"); + ASSERT_FALSE(E.getType(Context).isNull()); + const auto *EPtrTy = dyn_cast(E.getType(Context)); + ASSERT_NE(EPtrTy, nullptr); + EXPECT_EQ(Int, EPtrTy->getPointeeType()); + + SVal F = getByName("f"); + ASSERT_FALSE(F.getType(Context).isNull()); + const auto *FPtrTy = dyn_cast(F.getType(Context)); + ASSERT_NE(FPtrTy, nullptr); + EXPECT_EQ(Int, FPtrTy->getPointeeType()); +} + +SVAL_TEST(GetCompoundType, R"( +struct TestStruct { + int a, b; +}; +union TestUnion { + int a; + float b; + TestStruct c; +}; +void foo(int x) { + int a[] = {1, x, 2}; + TestStruct b = {x, 42}; + TestUnion c = {42}; + TestUnion d = {.c=b}; +} +)") { + SVal A = getByName("a"); + ASSERT_FALSE(A.getType(Context).isNull()); + const auto *AArrayType = dyn_cast(A.getType(Context)); + ASSERT_NE(AArrayType, nullptr); + EXPECT_EQ(Context.IntTy, AArrayType->getElementType()); + + SVal B = getByName("b"); + ASSERT_FALSE(B.getType(Context).isNull()); + const auto *BRecordType = dyn_cast(B.getType(Context)); + ASSERT_NE(BRecordType, nullptr); + EXPECT_EQ("TestStruct", BRecordType->getDecl()->getName()); + + SVal C = getByName("c"); + ASSERT_FALSE(C.getType(Context).isNull()); + const auto *CRecordType = dyn_cast(C.getType(Context)); + ASSERT_NE(CRecordType, nullptr); + EXPECT_EQ("TestUnion", CRecordType->getDecl()->getName()); + + auto D = getByName("d").getAs(); + ASSERT_TRUE(D.hasValue()); + auto Begin = D->begin(); + ASSERT_NE(D->end(), Begin); + ++Begin; + ASSERT_EQ(D->end(), Begin); + auto LD = D->begin()->getAs(); + ASSERT_TRUE(LD.hasValue()); + auto LDT = LD->getType(Context); + ASSERT_FALSE(LDT.isNull()); + const auto *DRecordType = dyn_cast(LDT); + ASSERT_NE(DRecordType, nullptr); + EXPECT_EQ("TestStruct", DRecordType->getDecl()->getName()); +} + +SVAL_TEST(GetStringType, R"( +void foo() { + const char *a = "Hello, world!"; +} +)") { + SVal A = getByName("a"); + ASSERT_FALSE(A.getType(Context).isNull()); + const auto *APtrTy = dyn_cast(A.getType(Context)); + ASSERT_NE(APtrTy, nullptr); + EXPECT_EQ(Context.CharTy, APtrTy->getPointeeType()); +} + +SVAL_TEST(GetThisType, R"( +class TestClass { + void foo(); +}; +void TestClass::foo() { + const auto *a = this; +} +)") { + SVal A = getByName("a"); + ASSERT_FALSE(A.getType(Context).isNull()); + const auto *APtrTy = dyn_cast(A.getType(Context)); + ASSERT_NE(APtrTy, nullptr); + const auto *ARecordType = dyn_cast(APtrTy->getPointeeType()); + ASSERT_NE(ARecordType, nullptr); + EXPECT_EQ("TestClass", ARecordType->getDecl()->getName()); +} + +SVAL_TEST(GetFunctionPtrType, R"( +void bar(); +void foo() { + auto *a = &bar; +} +)") { + SVal A = getByName("a"); + ASSERT_FALSE(A.getType(Context).isNull()); + const auto *APtrTy = dyn_cast(A.getType(Context)); + ASSERT_NE(APtrTy, nullptr); + ASSERT_TRUE(isa(APtrTy->getPointeeType())); +} + +SVAL_TEST(GetLabelType, R"( +void foo() { + entry: + void *a = &&entry; + char *b = (char *)&&entry; +} +)") { + SVal A = getByName("a"); + ASSERT_FALSE(A.getType(Context).isNull()); + EXPECT_EQ(Context.VoidPtrTy, A.getType(Context)); + + SVal B = getByName("a"); + ASSERT_FALSE(B.getType(Context).isNull()); + // TODO: Change to CharTy when we support symbolic casts + EXPECT_EQ(Context.VoidPtrTy, B.getType(Context)); +} + +} // namespace +} // namespace ento +} // namespace clang diff --git a/clang/unittests/Tooling/CompilationDatabaseTest.cpp b/clang/unittests/Tooling/CompilationDatabaseTest.cpp index 9a04de32c852d..218a352f86f06 100644 --- a/clang/unittests/Tooling/CompilationDatabaseTest.cpp +++ b/clang/unittests/Tooling/CompilationDatabaseTest.cpp @@ -700,6 +700,10 @@ class MemDBTest : public ::testing::Test { SmallVector Argv = {Clang, File, "-D", File}; llvm::SplitString(Flags, Argv); + // Trim double quotation from the argumnets if any. + for (auto *It = Argv.begin(); It != Argv.end(); ++It) + *It = It->trim("\""); + SmallString<32> Dir; llvm::sys::path::system_temp_directory(false, Dir); @@ -962,5 +966,12 @@ TEST_F(ExpandResponseFilesTest, ExpandResponseFiles) { EXPECT_EQ(getCommand("bar.cpp"), "clang bar.cpp -D bar.cpp -Dflag"); } +TEST_F(ExpandResponseFilesTest, ExpandResponseFilesEmptyArgument) { + addFile(path(StringRef("rsp1.rsp")), "-Dflag"); + + add("foo.cpp", "clang", "@rsp1.rsp \"\""); + EXPECT_EQ(getCommand("foo.cpp"), "clang foo.cpp -D foo.cpp -Dflag "); +} + } // end namespace tooling } // end namespace clang diff --git a/clang/utils/analyzer/Dockerfile b/clang/utils/analyzer/Dockerfile index f74ff8aa95c25..bb1dd60eeb9b8 100644 --- a/clang/utils/analyzer/Dockerfile +++ b/clang/utils/analyzer/Dockerfile @@ -13,16 +13,16 @@ RUN apt-add-repository -y 'deb https://apt.kitware.com/ubuntu/ bionic main' # test system dependencies RUN apt-get update && apt-get install -y \ - git=1:2.17.1-1ubuntu0.7 \ - gettext=0.19.8.1-6ubuntu0.3 \ + git=1:2.17.1* \ + gettext=0.19.8.1* \ python3=3.6.7-1~18.04 \ - python3-pip=9.0.1-2.3~ubuntu1.18.04.1 \ - cmake=3.17.3-0kitware1 \ + python3-pip=9.0.1-2.3* \ + cmake=3.20.5* \ ninja-build=1.8.2-1 # box2d dependencies RUN apt-get install -y \ - libx11-dev=2:1.6.4-3ubuntu0.2 \ + libx11-dev=2:1.6.4-3* \ libxrandr-dev=2:1.5.1-1 \ libxinerama-dev=2:1.1.3-1 \ libxcursor-dev=1:1.1.15-1 \ @@ -35,22 +35,22 @@ RUN apt-get install -y \ # simbody dependencies RUN apt-get install -y \ - liblapack-dev=3.7.1-4ubuntu1 + liblapack-dev=3.7.1-4* # drogon dependencies RUN apt-get install -y \ - libjsonrpccpp-dev=0.7.0-1build2 \ - uuid-dev=2.31.1-0.4ubuntu3.6 + libjsonrpccpp-dev=0.7.0-1* \ + uuid-dev=2.31.1-0.4* # tmux dependencies RUN apt-get install -y \ autotools-dev=20180224.1 \ - automake=1:1.15.1-3ubuntu2 \ - libncurses5-dev=6.1-1ubuntu1.18.04 \ - libevent-dev=2.1.8-stable-4build1 \ - pkg-config=0.29.1-0ubuntu2 \ + automake=1:1.15.1-3* \ + libncurses5-dev=6.1-1* \ + libevent-dev=2.1.8* \ + pkg-config=0.29.1-0* \ flex=2.6.4-6 \ - bison=2:3.0.4.dfsg-1build1 + bison=2:3.0.4.* RUN update-alternatives --install /usr/bin/python python /usr/bin/python3 1 diff --git a/clang/www/cxx_status.html b/clang/www/cxx_status.html index a478a4487d150..8de688189e297 100755 --- a/clang/www/cxx_status.html +++ b/clang/www/cxx_status.html @@ -1011,7 +1011,7 @@

C++20 implementation status

Lambdas in unevaluated contexts P0315R4 - No + Clang 13 @@ -1283,6 +1283,41 @@

C++2b implementation status

P2266R1 Clang 13 + + if consteval + P1938R3 + No + + + Allow duplicate attributes + P2156R1 + Clang 13 + + + Narrowing contextual conversions to bool + P1401R5 + No + + + Trimming whitespaces before line splicing + P2223R2 + Yes + + + Make declaration order layout mandated + P1874R4 + Yes + + + C++ identifier syntax using UAX 31 + P1949R7 + No + + + Mixed string literal concatenation + P2201R1 + Yes + diff --git a/compiler-rt/cmake/Modules/CompilerRTAIXUtils.cmake b/compiler-rt/cmake/Modules/CompilerRTAIXUtils.cmake index 983d97df2d295..3b61430f471ec 100644 --- a/compiler-rt/cmake/Modules/CompilerRTAIXUtils.cmake +++ b/compiler-rt/cmake/Modules/CompilerRTAIXUtils.cmake @@ -57,8 +57,16 @@ macro(archive_aix_libatomic name) if(shared_libraries_to_archive) set(output_dir "") set(install_dir "") - get_compiler_rt_output_dir(${COMPILER_RT_DEFAULT_TARGET_ARCH} output_dir) - get_compiler_rt_install_dir(${COMPILER_RT_DEFAULT_TARGET_ARCH} install_dir) + # If LLVM defines top level library directory, we want to deliver + # libatomic.a at top level. See `llvm/cmake/modules/AddLLVM.cmake' + # setting _install_rpath on AIX for reference. + if(LLVM_LIBRARY_OUTPUT_INTDIR AND CMAKE_INSTALL_PREFIX) + set(output_dir "${LLVM_LIBRARY_OUTPUT_INTDIR}") + set(install_dir "${CMAKE_INSTALL_PREFIX}/lib${LLVM_LIBDIR_SUFFIX}") + else() + get_compiler_rt_output_dir(${COMPILER_RT_DEFAULT_TARGET_ARCH} output_dir) + get_compiler_rt_install_dir(${COMPILER_RT_DEFAULT_TARGET_ARCH} install_dir) + endif() add_custom_command(OUTPUT "${output_dir}/libatomic.a" COMMAND ${CMAKE_AR} -X32_64 r "${output_dir}/libatomic.a" ${shared_libraries_to_archive} diff --git a/compiler-rt/cmake/config-ix.cmake b/compiler-rt/cmake/config-ix.cmake index 39e0a4b662c7b..9b27631f4af9b 100644 --- a/compiler-rt/cmake/config-ix.cmake +++ b/compiler-rt/cmake/config-ix.cmake @@ -318,7 +318,7 @@ else() set(ALL_FUZZER_SUPPORTED_ARCH ${X86_64} ${ARM64}) endif() -set(ALL_GWP_ASAN_SUPPORTED_ARCH ${X86} ${X86_64}) +set(ALL_GWP_ASAN_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM32} ${ARM64}) if(APPLE) set(ALL_LSAN_SUPPORTED_ARCH ${X86} ${X86_64} ${MIPS64} ${ARM64}) else() diff --git a/compiler-rt/include/sanitizer/dfsan_interface.h b/compiler-rt/include/sanitizer/dfsan_interface.h index ea2283284e096..cd3b6d6e2b163 100644 --- a/compiler-rt/include/sanitizer/dfsan_interface.h +++ b/compiler-rt/include/sanitizer/dfsan_interface.h @@ -141,6 +141,12 @@ size_t dfsan_sprint_stack_trace(char *out_buf, size_t out_buf_size); /// Retrieves the very first origin associated with the data at the given /// address. dfsan_origin dfsan_get_init_origin(const void *addr); + +/// Returns the value of -dfsan-track-origins. +/// * 0: do not track origins. +/// * 1: track origins at memory store operations. +/// * 2: track origins at memory load and store operations. +int dfsan_get_track_origins(void); #ifdef __cplusplus } // extern "C" diff --git a/compiler-rt/lib/dfsan/dfsan.cpp b/compiler-rt/lib/dfsan/dfsan.cpp index a029500c5fa13..6f9ae141d7ab6 100644 --- a/compiler-rt/lib/dfsan/dfsan.cpp +++ b/compiler-rt/lib/dfsan/dfsan.cpp @@ -55,10 +55,11 @@ SANITIZER_INTERFACE_ATTRIBUTE THREADLOCAL u32 // Instrumented code may set this value in terms of -dfsan-track-origins. // * undefined or 0: do not track origins. // * 1: track origins at memory store operations. -// * 2: TODO: track origins at memory store operations and callsites. +// * 2: track origins at memory load and store operations. +// TODO: track callsites. extern "C" SANITIZER_WEAK_ATTRIBUTE const int __dfsan_track_origins; -int __dfsan_get_track_origins() { +extern "C" SANITIZER_INTERFACE_ATTRIBUTE int dfsan_get_track_origins() { return &__dfsan_track_origins ? __dfsan_track_origins : 0; } @@ -446,7 +447,7 @@ void dfsan_copy_memory(void *dst, const void *src, uptr size) { internal_memcpy(dst, src, size); internal_memcpy((void *)shadow_for(dst), (const void *)shadow_for(src), size * sizeof(dfsan_label)); - if (__dfsan_get_track_origins()) + if (dfsan_get_track_origins()) dfsan_mem_origin_transfer(dst, src, size); } @@ -514,12 +515,12 @@ void SetShadow(dfsan_label label, void *addr, uptr size, dfsan_origin origin) { if (0 != label) { const uptr beg_shadow_addr = (uptr)__dfsan::shadow_for(addr); WriteShadowWithSize(label, beg_shadow_addr, size); - if (__dfsan_get_track_origins()) + if (dfsan_get_track_origins()) SetOrigin(addr, size, origin); return; } - if (__dfsan_get_track_origins()) + if (dfsan_get_track_origins()) ReleaseOrigins(addr, size); ReleaseOrClearShadows(addr, size); @@ -533,7 +534,7 @@ extern "C" SANITIZER_INTERFACE_ATTRIBUTE void __dfsan_set_label( SANITIZER_INTERFACE_ATTRIBUTE void dfsan_set_label(dfsan_label label, void *addr, uptr size) { dfsan_origin init_origin = 0; - if (label && __dfsan_get_track_origins()) { + if (label && dfsan_get_track_origins()) { GET_CALLER_PC_BP; GET_STORE_STACK_TRACE_PC_BP(pc, bp); init_origin = ChainOrigin(0, &stack, true); @@ -546,7 +547,7 @@ void dfsan_add_label(dfsan_label label, void *addr, uptr size) { if (0 == label) return; - if (__dfsan_get_track_origins()) { + if (dfsan_get_track_origins()) { GET_CALLER_PC_BP; GET_STORE_STACK_TRACE_PC_BP(pc, bp); dfsan_origin init_origin = ChainOrigin(0, &stack, true); @@ -648,7 +649,7 @@ void PrintInvalidOriginWarning(dfsan_label label, const void *address) { bool PrintOriginTraceToStr(const void *addr, const char *description, InternalScopedString *out) { CHECK(out); - CHECK(__dfsan_get_track_origins()); + CHECK(dfsan_get_track_origins()); Decorator d; const dfsan_label label = *__dfsan::shadow_for(addr); @@ -687,7 +688,7 @@ bool PrintOriginTraceToStr(const void *addr, const char *description, extern "C" SANITIZER_INTERFACE_ATTRIBUTE void dfsan_print_origin_trace( const void *addr, const char *description) { - if (!__dfsan_get_track_origins()) { + if (!dfsan_get_track_origins()) { PrintNoOriginTrackingWarning(); return; } @@ -713,7 +714,7 @@ dfsan_sprint_origin_trace(const void *addr, const char *description, char *out_buf, size_t out_buf_size) { CHECK(out_buf); - if (!__dfsan_get_track_origins()) { + if (!dfsan_get_track_origins()) { PrintNoOriginTrackingWarning(); return 0; } @@ -742,7 +743,7 @@ dfsan_sprint_origin_trace(const void *addr, const char *description, extern "C" SANITIZER_INTERFACE_ATTRIBUTE dfsan_origin dfsan_get_init_origin(const void *addr) { - if (!__dfsan_get_track_origins()) + if (!dfsan_get_track_origins()) return 0; const dfsan_label label = *__dfsan::shadow_for(addr); @@ -829,7 +830,7 @@ void dfsan_clear_thread_local_state() { internal_memset(__dfsan_arg_tls, 0, sizeof(__dfsan_arg_tls)); internal_memset(__dfsan_retval_tls, 0, sizeof(__dfsan_retval_tls)); - if (__dfsan_get_track_origins()) { + if (dfsan_get_track_origins()) { internal_memset(__dfsan_arg_origin_tls, 0, sizeof(__dfsan_arg_origin_tls)); internal_memset(&__dfsan_retval_origin_tls, 0, sizeof(__dfsan_retval_origin_tls)); @@ -995,7 +996,7 @@ static void DFsanInit(int argc, char **argv, char **envp) { CheckASLR(); - InitShadow(__dfsan_get_track_origins()); + InitShadow(dfsan_get_track_origins()); initialize_interceptors(); diff --git a/compiler-rt/lib/dfsan/done_abilist.txt b/compiler-rt/lib/dfsan/done_abilist.txt index ca26eab406b03..111c7d581e0ab 100644 --- a/compiler-rt/lib/dfsan/done_abilist.txt +++ b/compiler-rt/lib/dfsan/done_abilist.txt @@ -38,7 +38,8 @@ fun:dfsan_get_origin=uninstrumented fun:dfsan_get_origin=custom fun:dfsan_get_init_origin=uninstrumented fun:dfsan_get_init_origin=discard - +fun:dfsan_get_track_origins=uninstrumented +fun:dfsan_get_track_origins=discard ############################################################################### # glibc diff --git a/compiler-rt/lib/gwp_asan/scripts/symbolize.sh b/compiler-rt/lib/gwp_asan/scripts/symbolize.sh index fad9620a676e3..6974ee816701b 100755 --- a/compiler-rt/lib/gwp_asan/scripts/symbolize.sh +++ b/compiler-rt/lib/gwp_asan/scripts/symbolize.sh @@ -25,7 +25,7 @@ while read -r line; do if [ -z "$function_name" ]; then # If the offset is binary-relative, just resolve that. - symbolized="$(echo $function_offset | addr2line -e $binary_name)" + symbolized="$(echo $function_offset | addr2line -ie $binary_name)" else # Otherwise, the offset is function-relative. Get the address of the # function, and add it to the offset, then symbolize. @@ -41,7 +41,7 @@ while read -r line; do # Add the function address and offset to get the offset into the binary. binary_offset="$(printf "0x%X" "$((function_addr+function_offset))")" - symbolized="$(echo $binary_offset | addr2line -e $binary_name)" + symbolized="$(echo $binary_offset | addr2line -ie $binary_name)" fi # Check that it symbolized properly. If it didn't, output the old line. @@ -52,4 +52,4 @@ while read -r line; do else echo "${frame_number}${symbolized}" fi -done +done 2> >(grep -v "addr2line: DWARF error: could not find variable specification") diff --git a/compiler-rt/lib/gwp_asan/tests/backtrace.cpp b/compiler-rt/lib/gwp_asan/tests/backtrace.cpp index 95150653ff61a..4f6364891bfcc 100644 --- a/compiler-rt/lib/gwp_asan/tests/backtrace.cpp +++ b/compiler-rt/lib/gwp_asan/tests/backtrace.cpp @@ -30,7 +30,7 @@ __attribute__((optnone)) void TouchMemory(void *Ptr) { *(reinterpret_cast(Ptr)) = 7; } -TEST_F(BacktraceGuardedPoolAllocator, DoubleFree) { +TEST_F(BacktraceGuardedPoolAllocatorDeathTest, DoubleFree) { void *Ptr = AllocateMemory(GPA); DeallocateMemory(GPA, Ptr); @@ -45,7 +45,7 @@ TEST_F(BacktraceGuardedPoolAllocator, DoubleFree) { ASSERT_DEATH(DeallocateMemory2(GPA, Ptr), DeathRegex); } -TEST_F(BacktraceGuardedPoolAllocator, UseAfterFree) { +TEST_F(BacktraceGuardedPoolAllocatorDeathTest, UseAfterFree) { void *Ptr = AllocateMemory(GPA); DeallocateMemory(GPA, Ptr); diff --git a/compiler-rt/lib/gwp_asan/tests/enable_disable.cpp b/compiler-rt/lib/gwp_asan/tests/enable_disable.cpp index 2c6ba514f49f1..98da591c40d62 100644 --- a/compiler-rt/lib/gwp_asan/tests/enable_disable.cpp +++ b/compiler-rt/lib/gwp_asan/tests/enable_disable.cpp @@ -10,7 +10,7 @@ constexpr size_t Size = 100; -TEST_F(DefaultGuardedPoolAllocator, Fork) { +TEST_F(DefaultGuardedPoolAllocatorDeathTest, Fork) { void *P; pid_t Pid = fork(); EXPECT_GE(Pid, 0); diff --git a/compiler-rt/lib/gwp_asan/tests/harness.h b/compiler-rt/lib/gwp_asan/tests/harness.h index a61b856c6a38a..ed91e642de70e 100644 --- a/compiler-rt/lib/gwp_asan/tests/harness.h +++ b/compiler-rt/lib/gwp_asan/tests/harness.h @@ -106,4 +106,9 @@ class BacktraceGuardedPoolAllocator : public Test { gwp_asan::GuardedPoolAllocator GPA; }; +// https://github.com/google/googletest/blob/master/docs/advanced.md#death-tests-and-threads +using DefaultGuardedPoolAllocatorDeathTest = DefaultGuardedPoolAllocator; +using CustomGuardedPoolAllocatorDeathTest = CustomGuardedPoolAllocator; +using BacktraceGuardedPoolAllocatorDeathTest = BacktraceGuardedPoolAllocator; + #endif // GWP_ASAN_TESTS_HARNESS_H_ diff --git a/compiler-rt/lib/hwasan/hwasan.cpp b/compiler-rt/lib/hwasan/hwasan.cpp index 0401783281015..0cae96f35d35b 100644 --- a/compiler-rt/lib/hwasan/hwasan.cpp +++ b/compiler-rt/lib/hwasan/hwasan.cpp @@ -228,6 +228,14 @@ void HwasanTagMismatch(uptr addr, uptr access_info, uptr *registers_frame, __builtin_unreachable(); } +Thread *GetCurrentThread() { + uptr *ThreadLongPtr = GetCurrentThreadLongPtr(); + if (UNLIKELY(*ThreadLongPtr == 0)) + return nullptr; + auto *R = (StackAllocationsRingBuffer *)ThreadLongPtr; + return hwasanThreadList().GetThreadByBufferAddress((uptr)R->Next()); +} + } // namespace __hwasan using namespace __hwasan; diff --git a/compiler-rt/lib/hwasan/hwasan_allocator.cpp b/compiler-rt/lib/hwasan/hwasan_allocator.cpp index 21563be36ebef..e53de53e46d5c 100644 --- a/compiler-rt/lib/hwasan/hwasan_allocator.cpp +++ b/compiler-rt/lib/hwasan/hwasan_allocator.cpp @@ -196,6 +196,7 @@ static void HwasanDeallocate(StackTrace *stack, void *tagged_ptr) { : tagged_ptr; void *aligned_ptr = reinterpret_cast( RoundDownTo(reinterpret_cast(untagged_ptr), kShadowAlignment)); + tag_t pointer_tag = GetTagFromPointer(reinterpret_cast(tagged_ptr)); Metadata *meta = reinterpret_cast(allocator.GetMetaData(aligned_ptr)); uptr orig_size = meta->get_requested_size(); @@ -236,7 +237,8 @@ static void HwasanDeallocate(StackTrace *stack, void *tagged_ptr) { // The tag can be zero if tagging is disabled on this thread. do { tag = t->GenerateRandomTag(/*num_bits=*/8); - } while (UNLIKELY(tag < kShadowAlignment && tag != 0)); + } while ( + UNLIKELY((tag < kShadowAlignment || tag == pointer_tag) && tag != 0)); } else { static_assert(kFallbackFreeTag >= kShadowAlignment, "fallback tag must not be a short granule tag."); diff --git a/compiler-rt/lib/hwasan/hwasan_linux.cpp b/compiler-rt/lib/hwasan/hwasan_linux.cpp index 12bea5ca08444..02672030886ca 100644 --- a/compiler-rt/lib/hwasan/hwasan_linux.cpp +++ b/compiler-rt/lib/hwasan/hwasan_linux.cpp @@ -338,14 +338,6 @@ void AndroidTestTlsSlot() { void AndroidTestTlsSlot() {} #endif -Thread *GetCurrentThread() { - uptr *ThreadLongPtr = GetCurrentThreadLongPtr(); - if (UNLIKELY(*ThreadLongPtr == 0)) - return nullptr; - auto *R = (StackAllocationsRingBuffer *)ThreadLongPtr; - return hwasanThreadList().GetThreadByBufferAddress((uptr)R->Next()); -} - static AccessInfo GetAccessInfo(siginfo_t *info, ucontext_t *uc) { // Access type is passed in a platform dependent way (see below) and encoded // as 0xXY, where X&1 is 1 for store, 0 for load, and X&2 is 1 if the error is diff --git a/compiler-rt/lib/hwasan/hwasan_report.cpp b/compiler-rt/lib/hwasan/hwasan_report.cpp index b39dade11347a..d4d836bd48940 100644 --- a/compiler-rt/lib/hwasan/hwasan_report.cpp +++ b/compiler-rt/lib/hwasan/hwasan_report.cpp @@ -296,6 +296,75 @@ static uptr GetGlobalSizeFromDescriptor(uptr ptr) { return 0; } +static void ShowCandidate(uptr untagged_addr, tag_t *candidate, tag_t *left, + tag_t *right) { + Decorator d; + uptr mem = ShadowToMem(reinterpret_cast(candidate)); + HwasanChunkView chunk = FindHeapChunkByAddress(mem); + if (chunk.IsAllocated()) { + uptr offset; + const char *whence; + if (untagged_addr < chunk.End() && untagged_addr >= chunk.Beg()) { + offset = untagged_addr - chunk.Beg(); + whence = "inside"; + } else if (candidate == left) { + offset = untagged_addr - chunk.End(); + whence = "to the right of"; + } else { + offset = chunk.Beg() - untagged_addr; + whence = "to the left of"; + } + Printf("%s", d.Error()); + Printf("\nCause: heap-buffer-overflow\n"); + Printf("%s", d.Default()); + Printf("%s", d.Location()); + Printf("%p is located %zd bytes %s %zd-byte region [%p,%p)\n", + untagged_addr, offset, whence, chunk.UsedSize(), chunk.Beg(), + chunk.End()); + Printf("%s", d.Allocation()); + Printf("allocated here:\n"); + Printf("%s", d.Default()); + GetStackTraceFromId(chunk.GetAllocStackId()).Print(); + return; + } + // Check whether the address points into a loaded library. If so, this is + // most likely a global variable. + const char *module_name; + uptr module_address; + Symbolizer *sym = Symbolizer::GetOrInit(); + if (sym->GetModuleNameAndOffsetForPC(mem, &module_name, &module_address)) { + Printf("%s", d.Error()); + Printf("\nCause: global-overflow\n"); + Printf("%s", d.Default()); + DataInfo info; + Printf("%s", d.Location()); + if (sym->SymbolizeData(mem, &info) && info.start) { + Printf( + "%p is located %zd bytes to the %s of %zd-byte global variable " + "%s [%p,%p) in %s\n", + untagged_addr, + candidate == left ? untagged_addr - (info.start + info.size) + : info.start - untagged_addr, + candidate == left ? "right" : "left", info.size, info.name, + info.start, info.start + info.size, module_name); + } else { + uptr size = GetGlobalSizeFromDescriptor(mem); + if (size == 0) + // We couldn't find the size of the global from the descriptors. + Printf("%p is located to the %s of a global variable in (%s+0x%x)\n", + untagged_addr, candidate == left ? "right" : "left", module_name, + module_address); + else + Printf( + "%p is located to the %s of a %zd-byte global variable in " + "(%s+0x%x)\n", + untagged_addr, candidate == left ? "right" : "left", size, + module_name, module_address); + } + Printf("%s", d.Default()); + } +} + void PrintAddressDescription( uptr tagged_addr, uptr access_size, StackAllocationsRingBuffer *current_stack_allocations) { @@ -324,7 +393,8 @@ void PrintAddressDescription( tag_t addr_tag = GetTagFromPointer(tagged_addr); tag_t *tag_ptr = reinterpret_cast(MemToShadow(untagged_addr)); tag_t *candidate = nullptr, *left = tag_ptr, *right = tag_ptr; - for (int i = 0; i < 1000; i++) { + uptr candidate_distance = 0; + for (; candidate_distance < 1000; candidate_distance++) { if (TagsEqual(addr_tag, left)) { candidate = left; break; @@ -337,68 +407,32 @@ void PrintAddressDescription( ++right; } - if (candidate) { - uptr mem = ShadowToMem(reinterpret_cast(candidate)); - HwasanChunkView chunk = FindHeapChunkByAddress(mem); - if (chunk.IsAllocated()) { - uptr offset; - const char *whence; - if (untagged_addr < chunk.End() && untagged_addr >= chunk.Beg()) { - offset = untagged_addr - chunk.Beg(); - whence = "inside"; - } else if (candidate == left) { - offset = untagged_addr - chunk.End(); - whence = "to the right of"; - } else { - offset = chunk.Beg() - untagged_addr; - whence = "to the left of"; - } + constexpr auto kCloseCandidateDistance = 1; + + if (candidate && candidate_distance <= kCloseCandidateDistance) { + ShowCandidate(untagged_addr, candidate, left, right); + num_descriptions_printed++; + } + + hwasanThreadList().VisitAllLiveThreads([&](Thread *t) { + if (t->AddrIsInStack(untagged_addr)) { + // TODO(fmayer): figure out how to distinguish use-after-return and + // stack-buffer-overflow. + Printf("%s", d.Error()); + Printf("\nCause: stack tag-mismatch\n"); Printf("%s", d.Location()); - Printf("%p is located %zd bytes %s %zd-byte region [%p,%p)\n", - untagged_addr, offset, whence, chunk.UsedSize(), chunk.Beg(), - chunk.End()); - Printf("%s", d.Allocation()); - Printf("allocated here:\n"); + Printf("Address %p is located in stack of thread T%zd\n", untagged_addr, + t->unique_id()); Printf("%s", d.Default()); - GetStackTraceFromId(chunk.GetAllocStackId()).Print(); + t->Announce(); + + auto *sa = (t == GetCurrentThread() && current_stack_allocations) + ? current_stack_allocations + : t->stack_allocations(); + PrintStackAllocations(sa, addr_tag, untagged_addr); num_descriptions_printed++; - } else { - // Check whether the address points into a loaded library. If so, this is - // most likely a global variable. - const char *module_name; - uptr module_address; - Symbolizer *sym = Symbolizer::GetOrInit(); - if (sym->GetModuleNameAndOffsetForPC(mem, &module_name, - &module_address)) { - DataInfo info; - if (sym->SymbolizeData(mem, &info) && info.start) { - Printf( - "%p is located %zd bytes to the %s of %zd-byte global variable " - "%s [%p,%p) in %s\n", - untagged_addr, - candidate == left ? untagged_addr - (info.start + info.size) - : info.start - untagged_addr, - candidate == left ? "right" : "left", info.size, info.name, - info.start, info.start + info.size, module_name); - } else { - uptr size = GetGlobalSizeFromDescriptor(mem); - if (size == 0) - // We couldn't find the size of the global from the descriptors. - Printf( - "%p is located to the %s of a global variable in (%s+0x%x)\n", - untagged_addr, candidate == left ? "right" : "left", - module_name, module_address); - else - Printf( - "%p is located to the %s of a %zd-byte global variable in " - "(%s+0x%x)\n", - untagged_addr, candidate == left ? "right" : "left", size, - module_name, module_address); - } - num_descriptions_printed++; - } } - } + }); hwasanThreadList().VisitAllLiveThreads([&](Thread *t) { // Scan all threads' ring buffers to find if it's a heap-use-after-free. @@ -407,6 +441,8 @@ void PrintAddressDescription( if (FindHeapAllocation(t->heap_allocations(), tagged_addr, &har, &ring_index, &num_matching_addrs, &num_matching_addrs_4b)) { + Printf("%s", d.Error()); + Printf("\nCause: use-after-free\n"); Printf("%s", d.Location()); Printf("%p is located %zd bytes inside of %zd-byte region [%p,%p)\n", untagged_addr, untagged_addr - UntagAddr(har.tagged_addr), @@ -433,29 +469,25 @@ void PrintAddressDescription( t->Announce(); num_descriptions_printed++; } - - // Very basic check for stack memory. - if (t->AddrIsInStack(untagged_addr)) { - Printf("%s", d.Location()); - Printf("Address %p is located in stack of thread T%zd\n", untagged_addr, - t->unique_id()); - Printf("%s", d.Default()); - t->Announce(); - - auto *sa = (t == GetCurrentThread() && current_stack_allocations) - ? current_stack_allocations - : t->stack_allocations(); - PrintStackAllocations(sa, addr_tag, untagged_addr); - num_descriptions_printed++; - } }); + if (candidate && num_descriptions_printed == 0) { + ShowCandidate(untagged_addr, candidate, left, right); + num_descriptions_printed++; + } + // Print the remaining threads, as an extra information, 1 line per thread. hwasanThreadList().VisitAllLiveThreads([&](Thread *t) { t->Announce(); }); if (!num_descriptions_printed) // We exhausted our possibilities. Bail out. Printf("HWAddressSanitizer can not describe address in more detail.\n"); + if (num_descriptions_printed > 1) { + Printf( + "There are %d potential causes, printed above in order " + "of likeliness.\n", + num_descriptions_printed); + } } void ReportStats() {} @@ -672,8 +704,10 @@ void ReportRegisters(uptr *frame, uptr pc) { frame[20], frame[21], frame[22], frame[23]); Printf(" x24 %016llx x25 %016llx x26 %016llx x27 %016llx\n", frame[24], frame[25], frame[26], frame[27]); - Printf(" x28 %016llx x29 %016llx x30 %016llx\n", - frame[28], frame[29], frame[30]); + // hwasan_check* reduces the stack pointer by 256, then __hwasan_tag_mismatch + // passes it to this function. + Printf(" x28 %016llx x29 %016llx x30 %016llx sp %016llx\n", frame[28], + frame[29], frame[30], reinterpret_cast(frame) + 256); } } // namespace __hwasan diff --git a/compiler-rt/lib/hwasan/hwasan_thread_list.h b/compiler-rt/lib/hwasan/hwasan_thread_list.h index 8e6c8adf1e598..15916a802d6ee 100644 --- a/compiler-rt/lib/hwasan/hwasan_thread_list.h +++ b/compiler-rt/lib/hwasan/hwasan_thread_list.h @@ -171,6 +171,8 @@ class HwasanThreadList { return stats_; } + uptr GetRingBufferSize() const { return ring_buffer_size_; } + private: Thread *AllocThread() { SpinMutexLock l(&free_space_mutex_); diff --git a/compiler-rt/lib/sanitizer_common/sanitizer_mutex.h b/compiler-rt/lib/sanitizer_common/sanitizer_mutex.h index 40a65914299ea..742cd6562a226 100644 --- a/compiler-rt/lib/sanitizer_common/sanitizer_mutex.h +++ b/compiler-rt/lib/sanitizer_common/sanitizer_mutex.h @@ -66,8 +66,8 @@ class SpinMutex : public StaticSpinMutex { } private: - SpinMutex(const SpinMutex&); - void operator=(const SpinMutex&); + SpinMutex(const SpinMutex &) = delete; + void operator=(const SpinMutex &) = delete; }; class BlockingMutex { @@ -171,8 +171,8 @@ class RWMutex { } } - RWMutex(const RWMutex&); - void operator = (const RWMutex&); + RWMutex(const RWMutex &) = delete; + void operator=(const RWMutex &) = delete; }; template @@ -190,8 +190,8 @@ class GenericScopedLock { private: MutexType *mu_; - GenericScopedLock(const GenericScopedLock&); - void operator=(const GenericScopedLock&); + GenericScopedLock(const GenericScopedLock &) = delete; + void operator=(const GenericScopedLock &) = delete; }; template @@ -209,8 +209,8 @@ class GenericScopedReadLock { private: MutexType *mu_; - GenericScopedReadLock(const GenericScopedReadLock&); - void operator=(const GenericScopedReadLock&); + GenericScopedReadLock(const GenericScopedReadLock &) = delete; + void operator=(const GenericScopedReadLock &) = delete; }; typedef GenericScopedLock SpinMutexLock; diff --git a/compiler-rt/lib/scudo/standalone/combined.h b/compiler-rt/lib/scudo/standalone/combined.h index 079edab1875b7..fd5360ce0f55a 100644 --- a/compiler-rt/lib/scudo/standalone/combined.h +++ b/compiler-rt/lib/scudo/standalone/combined.h @@ -569,9 +569,6 @@ class Allocator { reportAllocationSizeTooBig(NewSize, 0, MaxAllowedMallocSize); } - void *OldTaggedPtr = OldPtr; - OldPtr = getHeaderTaggedPointer(OldPtr); - // The following cases are handled by the C wrappers. DCHECK_NE(OldPtr, nullptr); DCHECK_NE(NewSize, 0); @@ -591,6 +588,9 @@ class Allocator { } #endif // GWP_ASAN_HOOKS + void *OldTaggedPtr = OldPtr; + OldPtr = getHeaderTaggedPointer(OldPtr); + if (UNLIKELY(!isAligned(reinterpret_cast(OldPtr), MinAlignment))) reportMisalignedPointer(AllocatorAction::Reallocating, OldPtr); @@ -639,7 +639,7 @@ class Allocator { if (ClassId) { resizeTaggedChunk(reinterpret_cast(OldTaggedPtr) + OldSize, reinterpret_cast(OldTaggedPtr) + NewSize, - NewSize, BlockEnd); + NewSize, untagPointer(BlockEnd)); storePrimaryAllocationStackMaybe(Options, OldPtr); } else { storeSecondaryAllocationStackMaybe(Options, OldPtr, NewSize); @@ -1154,6 +1154,7 @@ class Allocator { // address tags against chunks. To allow matching in this case we store the // address tag in the first byte of the chunk. void storeEndMarker(uptr End, uptr Size, uptr BlockEnd) { + DCHECK_EQ(BlockEnd, untagPointer(BlockEnd)); uptr UntaggedEnd = untagPointer(End); if (UntaggedEnd != BlockEnd) { storeTag(UntaggedEnd); diff --git a/compiler-rt/lib/scudo/standalone/linux.cpp b/compiler-rt/lib/scudo/standalone/linux.cpp index dedab61631bc5..c77c1bb600d93 100644 --- a/compiler-rt/lib/scudo/standalone/linux.cpp +++ b/compiler-rt/lib/scudo/standalone/linux.cpp @@ -58,11 +58,8 @@ void *map(void *Addr, uptr Size, UNUSED const char *Name, uptr Flags, if (Flags & MAP_MEMTAG) MmapProt |= PROT_MTE; #endif - if (Addr) { - // Currently no scenario for a noaccess mapping with a fixed address. - DCHECK_EQ(Flags & MAP_NOACCESS, 0); + if (Addr) MmapFlags |= MAP_FIXED; - } void *P = mmap(Addr, Size, MmapProt, MmapFlags, -1, 0); if (P == MAP_FAILED) { if (!(Flags & MAP_ALLOWNOMEM) || errno != ENOMEM) diff --git a/compiler-rt/lib/scudo/standalone/tests/chunk_test.cpp b/compiler-rt/lib/scudo/standalone/tests/chunk_test.cpp index 6458e23e1423a..7a29f3c11b70f 100644 --- a/compiler-rt/lib/scudo/standalone/tests/chunk_test.cpp +++ b/compiler-rt/lib/scudo/standalone/tests/chunk_test.cpp @@ -21,7 +21,7 @@ static void initChecksum(void) { scudo::HashAlgorithm = scudo::Checksum::HardwareCRC32; } -TEST(ScudoChunkTest, ChunkBasic) { +TEST(ScudoChunkDeathTest, ChunkBasic) { initChecksum(); const scudo::uptr Size = 0x100U; scudo::Chunk::UnpackedHeader Header = {}; @@ -60,7 +60,7 @@ TEST(ScudoChunkTest, ChunkCmpXchg) { free(Block); } -TEST(ScudoChunkTest, CorruptHeader) { +TEST(ScudoChunkDeathTest, CorruptHeader) { initChecksum(); const scudo::uptr Size = 0x100U; scudo::Chunk::UnpackedHeader Header = {}; diff --git a/compiler-rt/lib/scudo/standalone/tests/combined_test.cpp b/compiler-rt/lib/scudo/standalone/tests/combined_test.cpp index 6716d5df1e022..a2461c53cd950 100644 --- a/compiler-rt/lib/scudo/standalone/tests/combined_test.cpp +++ b/compiler-rt/lib/scudo/standalone/tests/combined_test.cpp @@ -103,6 +103,8 @@ template struct ScudoCombinedTest : public Test { std::unique_ptr Allocator; }; +template using ScudoCombinedDeathTest = ScudoCombinedTest; + #if SCUDO_FUCHSIA #define SCUDO_TYPED_TEST_ALL_TYPES(FIXTURE, NAME) \ SCUDO_TYPED_TEST_TYPE(FIXTURE, NAME, AndroidSvelteConfig) \ @@ -166,7 +168,7 @@ void ScudoCombinedTest::BasicTest(scudo::uptr SizeLog) { } #define SCUDO_MAKE_BASIC_TEST(SizeLog) \ - SCUDO_TYPED_TEST(ScudoCombinedTest, BasicCombined##SizeLog) { \ + SCUDO_TYPED_TEST(ScudoCombinedDeathTest, BasicCombined##SizeLog) { \ this->BasicTest(SizeLog); \ } @@ -314,7 +316,7 @@ SCUDO_TYPED_TEST(ScudoCombinedTest, ReallocateLargeDecreasing) { Allocator->deallocate(P, Origin); } -SCUDO_TYPED_TEST(ScudoCombinedTest, ReallocateSame) { +SCUDO_TYPED_TEST(ScudoCombinedDeathTest, ReallocateSame) { auto *Allocator = this->Allocator.get(); // Check that reallocating a chunk to a slightly smaller or larger size @@ -365,7 +367,7 @@ SCUDO_TYPED_TEST(ScudoCombinedTest, IterateOverChunks) { } } -SCUDO_TYPED_TEST(ScudoCombinedTest, UseAfterFree) { +SCUDO_TYPED_TEST(ScudoCombinedDeathTest, UseAfterFree) { auto *Allocator = this->Allocator.get(); // Check that use-after-free is detected. @@ -392,7 +394,7 @@ SCUDO_TYPED_TEST(ScudoCombinedTest, UseAfterFree) { } } -SCUDO_TYPED_TEST(ScudoCombinedTest, DisableMemoryTagging) { +SCUDO_TYPED_TEST(ScudoCombinedDeathTest, DisableMemoryTagging) { auto *Allocator = this->Allocator.get(); if (Allocator->useMemoryTaggingTestOnly()) { @@ -490,7 +492,7 @@ SCUDO_TYPED_TEST(ScudoCombinedTest, ThreadedCombined) { // Test that multiple instantiations of the allocator have not messed up the // process's signal handlers (GWP-ASan used to do this). -TEST(ScudoCombinedTest, SKIP_ON_FUCHSIA(testSEGV)) { +TEST(ScudoCombinedDeathTest, SKIP_ON_FUCHSIA(testSEGV)) { const scudo::uptr Size = 4 * scudo::getPageSizeCached(); scudo::MapPlatformData Data = {}; void *P = scudo::map(nullptr, Size, "testSEGV", MAP_NOACCESS, &Data); @@ -528,7 +530,7 @@ struct DeathConfig { template using TSDRegistryT = scudo::TSDRegistrySharedT; }; -TEST(ScudoCombinedTest, DeathCombined) { +TEST(ScudoCombinedDeathTest, DeathCombined) { using AllocatorT = TestAllocator; auto Allocator = std::unique_ptr(new AllocatorT()); diff --git a/compiler-rt/lib/scudo/standalone/tests/map_test.cpp b/compiler-rt/lib/scudo/standalone/tests/map_test.cpp index 149a704e4ddde..095e1b6a5d2a0 100644 --- a/compiler-rt/lib/scudo/standalone/tests/map_test.cpp +++ b/compiler-rt/lib/scudo/standalone/tests/map_test.cpp @@ -20,7 +20,7 @@ TEST(ScudoMapTest, PageSize) { static_cast(getpagesize())); } -TEST(ScudoMapTest, MapNoAccessUnmap) { +TEST(ScudoMapDeathTest, MapNoAccessUnmap) { const scudo::uptr Size = 4 * scudo::getPageSizeCached(); scudo::MapPlatformData Data = {}; void *P = scudo::map(nullptr, Size, MappingName, MAP_NOACCESS, &Data); @@ -29,7 +29,7 @@ TEST(ScudoMapTest, MapNoAccessUnmap) { scudo::unmap(P, Size, UNMAP_ALL, &Data); } -TEST(ScudoMapTest, MapUnmap) { +TEST(ScudoMapDeathTest, MapUnmap) { const scudo::uptr Size = 4 * scudo::getPageSizeCached(); EXPECT_DEATH( { @@ -46,7 +46,7 @@ TEST(ScudoMapTest, MapUnmap) { ""); } -TEST(ScudoMapTest, MapWithGuardUnmap) { +TEST(ScudoMapDeathTest, MapWithGuardUnmap) { const scudo::uptr PageSize = scudo::getPageSizeCached(); const scudo::uptr Size = 4 * PageSize; scudo::MapPlatformData Data = {}; diff --git a/compiler-rt/lib/scudo/standalone/tests/memtag_test.cpp b/compiler-rt/lib/scudo/standalone/tests/memtag_test.cpp index 50ba0fc82cedf..72c9de36b8bd5 100644 --- a/compiler-rt/lib/scudo/standalone/tests/memtag_test.cpp +++ b/compiler-rt/lib/scudo/standalone/tests/memtag_test.cpp @@ -14,7 +14,7 @@ #if SCUDO_LINUX namespace scudo { -TEST(MemtagBasicTest, Unsupported) { +TEST(MemtagBasicDeathTest, Unsupported) { if (archSupportsMemoryTagging()) GTEST_SKIP(); @@ -63,6 +63,8 @@ class MemtagTest : public ::testing::Test { uptr Addr = 0; }; +using MemtagDeathTest = MemtagTest; + TEST_F(MemtagTest, ArchMemoryTagGranuleSize) { EXPECT_GT(archMemoryTagGranuleSize(), 1u); EXPECT_TRUE(isPowerOfTwo(archMemoryTagGranuleSize())); @@ -77,7 +79,7 @@ TEST_F(MemtagTest, ExtractTag) { EXPECT_EQ(0xffffull, Tags); } -TEST_F(MemtagTest, AddFixedTag) { +TEST_F(MemtagDeathTest, AddFixedTag) { for (uptr Tag = 0; Tag < 0x10; ++Tag) EXPECT_EQ(Tag, extractTag(addFixedTag(Addr, Tag))); if (SCUDO_DEBUG) { @@ -94,7 +96,7 @@ TEST_F(MemtagTest, UntagPointer) { } } -TEST_F(MemtagTest, ScopedDisableMemoryTagChecks) { +TEST_F(MemtagDeathTest, ScopedDisableMemoryTagChecks) { u8 *P = reinterpret_cast(addFixedTag(Addr, 1)); EXPECT_NE(P, Buffer); @@ -120,7 +122,7 @@ TEST_F(MemtagTest, SelectRandomTagWithMask) { } } -TEST_F(MemtagTest, SKIP_NO_DEBUG(LoadStoreTagUnaligned)) { +TEST_F(MemtagDeathTest, SKIP_NO_DEBUG(LoadStoreTagUnaligned)) { for (uptr P = Addr; P < Addr + 4 * archMemoryTagGranuleSize(); ++P) { if (P % archMemoryTagGranuleSize() == 0) continue; @@ -141,7 +143,7 @@ TEST_F(MemtagTest, LoadStoreTag) { loadTag(Base + archMemoryTagGranuleSize())); } -TEST_F(MemtagTest, SKIP_NO_DEBUG(StoreTagsUnaligned)) { +TEST_F(MemtagDeathTest, SKIP_NO_DEBUG(StoreTagsUnaligned)) { for (uptr P = Addr; P < Addr + 4 * archMemoryTagGranuleSize(); ++P) { uptr Tagged = addFixedTag(P, 5); if (Tagged % archMemoryTagGranuleSize() == 0) diff --git a/compiler-rt/lib/scudo/standalone/tests/report_test.cpp b/compiler-rt/lib/scudo/standalone/tests/report_test.cpp index 374b6b8de3436..81587bae6b5a8 100644 --- a/compiler-rt/lib/scudo/standalone/tests/report_test.cpp +++ b/compiler-rt/lib/scudo/standalone/tests/report_test.cpp @@ -10,14 +10,14 @@ #include "report.h" -TEST(ScudoReportTest, Check) { +TEST(ScudoReportDeathTest, Check) { CHECK_LT(-1, 1); EXPECT_DEATH(CHECK_GT(-1, 1), "\\(-1\\) > \\(1\\) \\(\\(u64\\)op1=18446744073709551615, " "\\(u64\\)op2=1"); } -TEST(ScudoReportTest, Generic) { +TEST(ScudoReportDeathTest, Generic) { // Potentially unused if EXPECT_DEATH isn't defined. UNUSED void *P = reinterpret_cast(0x42424242U); EXPECT_DEATH(scudo::reportError("TEST123"), "Scudo ERROR.*TEST123"); @@ -45,7 +45,7 @@ TEST(ScudoReportTest, Generic) { "Scudo ERROR.*42424242.*123.*456"); } -TEST(ScudoReportTest, CSpecific) { +TEST(ScudoReportDeathTest, CSpecific) { EXPECT_DEATH(scudo::reportAlignmentNotPowerOfTwo(123), "Scudo ERROR.*123"); EXPECT_DEATH(scudo::reportCallocOverflow(123, 456), "Scudo ERROR.*123.*456"); EXPECT_DEATH(scudo::reportInvalidPosixMemalignAlignment(789), diff --git a/compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp b/compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp index 2dc041b94a8c0..723679228cbab 100644 --- a/compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp +++ b/compiler-rt/lib/scudo/standalone/tests/secondary_test.cpp @@ -6,32 +6,43 @@ // //===----------------------------------------------------------------------===// +#include "memtag.h" #include "tests/scudo_unit_test.h" #include "allocator_config.h" #include "secondary.h" -#include - #include +#include #include #include +#include #include #include +template static scudo::Options getOptionsForConfig() { + if (!Config::MaySupportMemoryTagging || !scudo::archSupportsMemoryTagging() || + !scudo::systemSupportsMemoryTagging()) + return {}; + scudo::AtomicOptions AO; + AO.set(scudo::OptionBit::UseMemoryTagging); + return AO.load(); +} + template static void testSecondaryBasic(void) { using SecondaryT = scudo::MapAllocator; + scudo::Options Options = getOptionsForConfig(); scudo::GlobalStats S; S.init(); std::unique_ptr L(new SecondaryT); L->init(&S); const scudo::uptr Size = 1U << 16; - void *P = L->allocate(scudo::Options{}, Size); + void *P = L->allocate(Options, Size); EXPECT_NE(P, nullptr); memset(P, 'A', Size); EXPECT_GE(SecondaryT::getBlockSize(P), Size); - L->deallocate(scudo::Options{}, P); + L->deallocate(Options, P); // If the Secondary can't cache that pointer, it will be unmapped. if (!L->canCache(Size)) { @@ -40,8 +51,8 @@ template static void testSecondaryBasic(void) { // Repeat few time to avoid missing crash if it's mmaped by unrelated // code. for (int i = 0; i < 10; ++i) { - P = L->allocate(scudo::Options{}, Size); - L->deallocate(scudo::Options{}, P); + P = L->allocate(Options, Size); + L->deallocate(Options, P); memset(P, 'A', Size); } }, @@ -49,19 +60,19 @@ template static void testSecondaryBasic(void) { } const scudo::uptr Align = 1U << 16; - P = L->allocate(scudo::Options{}, Size + Align, Align); + P = L->allocate(Options, Size + Align, Align); EXPECT_NE(P, nullptr); void *AlignedP = reinterpret_cast( scudo::roundUpTo(reinterpret_cast(P), Align)); memset(AlignedP, 'A', Size); - L->deallocate(scudo::Options{}, P); + L->deallocate(Options, P); std::vector V; for (scudo::uptr I = 0; I < 32U; I++) - V.push_back(L->allocate(scudo::Options{}, Size)); + V.push_back(L->allocate(Options, Size)); std::shuffle(V.begin(), V.end(), std::mt19937(std::random_device()())); while (!V.empty()) { - L->deallocate(scudo::Options{}, V.back()); + L->deallocate(Options, V.back()); V.pop_back(); } scudo::ScopedString Str; @@ -92,16 +103,25 @@ TEST(ScudoSecondaryTest, SecondaryBasic) { testSecondaryBasic(); } -using LargeAllocator = scudo::MapAllocator; +struct MapAllocatorTest : public Test { + using Config = scudo::DefaultConfig; + using LargeAllocator = scudo::MapAllocator; + + void SetUp() override { Allocator->init(nullptr); } + + void TearDown() override { Allocator->unmapTestOnly(); } + + std::unique_ptr Allocator = + std::make_unique(); + scudo::Options Options = getOptionsForConfig(); +}; // This exercises a variety of combinations of size and alignment for the // MapAllocator. The size computation done here mimic the ones done by the // combined allocator. -TEST(ScudoSecondaryTest, SecondaryCombinations) { +TEST_F(MapAllocatorTest, SecondaryCombinations) { constexpr scudo::uptr MinAlign = FIRST_32_SECOND_64(8, 16); constexpr scudo::uptr HeaderSize = scudo::roundUpTo(8, MinAlign); - std::unique_ptr L(new LargeAllocator); - L->init(nullptr); for (scudo::uptr SizeLog = 0; SizeLog <= 20; SizeLog++) { for (scudo::uptr AlignLog = FIRST_32_SECOND_64(3, 4); AlignLog <= 16; AlignLog++) { @@ -113,103 +133,102 @@ TEST(ScudoSecondaryTest, SecondaryCombinations) { scudo::roundUpTo((1U << SizeLog) + Delta, MinAlign); const scudo::uptr Size = HeaderSize + UserSize + (Align > MinAlign ? Align - HeaderSize : 0); - void *P = L->allocate(scudo::Options{}, Size, Align); + void *P = Allocator->allocate(Options, Size, Align); EXPECT_NE(P, nullptr); void *AlignedP = reinterpret_cast( scudo::roundUpTo(reinterpret_cast(P), Align)); memset(AlignedP, 0xff, UserSize); - L->deallocate(scudo::Options{}, P); + Allocator->deallocate(Options, P); } } } scudo::ScopedString Str; - L->getStats(&Str); + Allocator->getStats(&Str); Str.output(); - L->unmapTestOnly(); } -TEST(ScudoSecondaryTest, SecondaryIterate) { - std::unique_ptr L(new LargeAllocator); - L->init(nullptr); +TEST_F(MapAllocatorTest, SecondaryIterate) { std::vector V; const scudo::uptr PageSize = scudo::getPageSizeCached(); for (scudo::uptr I = 0; I < 32U; I++) - V.push_back(L->allocate(scudo::Options{}, (std::rand() % 16) * PageSize)); + V.push_back(Allocator->allocate(Options, (std::rand() % 16) * PageSize)); auto Lambda = [V](scudo::uptr Block) { EXPECT_NE(std::find(V.begin(), V.end(), reinterpret_cast(Block)), V.end()); }; - L->disable(); - L->iterateOverBlocks(Lambda); - L->enable(); + Allocator->disable(); + Allocator->iterateOverBlocks(Lambda); + Allocator->enable(); while (!V.empty()) { - L->deallocate(scudo::Options{}, V.back()); + Allocator->deallocate(Options, V.back()); V.pop_back(); } scudo::ScopedString Str; - L->getStats(&Str); + Allocator->getStats(&Str); Str.output(); - L->unmapTestOnly(); } -TEST(ScudoSecondaryTest, SecondaryOptions) { - std::unique_ptr L(new LargeAllocator); - L->init(nullptr); +TEST_F(MapAllocatorTest, SecondaryOptions) { // Attempt to set a maximum number of entries higher than the array size. - EXPECT_FALSE(L->setOption(scudo::Option::MaxCacheEntriesCount, 4096U)); + EXPECT_FALSE( + Allocator->setOption(scudo::Option::MaxCacheEntriesCount, 4096U)); // A negative number will be cast to a scudo::u32, and fail. - EXPECT_FALSE(L->setOption(scudo::Option::MaxCacheEntriesCount, -1)); - if (L->canCache(0U)) { + EXPECT_FALSE(Allocator->setOption(scudo::Option::MaxCacheEntriesCount, -1)); + if (Allocator->canCache(0U)) { // Various valid combinations. - EXPECT_TRUE(L->setOption(scudo::Option::MaxCacheEntriesCount, 4U)); - EXPECT_TRUE(L->setOption(scudo::Option::MaxCacheEntrySize, 1UL << 20)); - EXPECT_TRUE(L->canCache(1UL << 18)); - EXPECT_TRUE(L->setOption(scudo::Option::MaxCacheEntrySize, 1UL << 17)); - EXPECT_FALSE(L->canCache(1UL << 18)); - EXPECT_TRUE(L->canCache(1UL << 16)); - EXPECT_TRUE(L->setOption(scudo::Option::MaxCacheEntriesCount, 0U)); - EXPECT_FALSE(L->canCache(1UL << 16)); - EXPECT_TRUE(L->setOption(scudo::Option::MaxCacheEntriesCount, 4U)); - EXPECT_TRUE(L->setOption(scudo::Option::MaxCacheEntrySize, 1UL << 20)); - EXPECT_TRUE(L->canCache(1UL << 16)); + EXPECT_TRUE(Allocator->setOption(scudo::Option::MaxCacheEntriesCount, 4U)); + EXPECT_TRUE( + Allocator->setOption(scudo::Option::MaxCacheEntrySize, 1UL << 20)); + EXPECT_TRUE(Allocator->canCache(1UL << 18)); + EXPECT_TRUE( + Allocator->setOption(scudo::Option::MaxCacheEntrySize, 1UL << 17)); + EXPECT_FALSE(Allocator->canCache(1UL << 18)); + EXPECT_TRUE(Allocator->canCache(1UL << 16)); + EXPECT_TRUE(Allocator->setOption(scudo::Option::MaxCacheEntriesCount, 0U)); + EXPECT_FALSE(Allocator->canCache(1UL << 16)); + EXPECT_TRUE(Allocator->setOption(scudo::Option::MaxCacheEntriesCount, 4U)); + EXPECT_TRUE( + Allocator->setOption(scudo::Option::MaxCacheEntrySize, 1UL << 20)); + EXPECT_TRUE(Allocator->canCache(1UL << 16)); } - L->unmapTestOnly(); } -static std::mutex Mutex; -static std::condition_variable Cv; -static bool Ready; +struct MapAllocatorWithReleaseTest : public MapAllocatorTest { + void SetUp() override { Allocator->init(nullptr, /*ReleaseToOsInterval=*/0); } -static void performAllocations(LargeAllocator *L) { - std::vector V; - const scudo::uptr PageSize = scudo::getPageSizeCached(); - { - std::unique_lock Lock(Mutex); - while (!Ready) - Cv.wait(Lock); - } - for (scudo::uptr I = 0; I < 128U; I++) { - // Deallocate 75% of the blocks. - const bool Deallocate = (rand() & 3) != 0; - void *P = L->allocate(scudo::Options{}, (std::rand() % 16) * PageSize); - if (Deallocate) - L->deallocate(scudo::Options{}, P); - else - V.push_back(P); - } - while (!V.empty()) { - L->deallocate(scudo::Options{}, V.back()); - V.pop_back(); + void performAllocations() { + std::vector V; + const scudo::uptr PageSize = scudo::getPageSizeCached(); + { + std::unique_lock Lock(Mutex); + while (!Ready) + Cv.wait(Lock); + } + for (scudo::uptr I = 0; I < 128U; I++) { + // Deallocate 75% of the blocks. + const bool Deallocate = (rand() & 3) != 0; + void *P = Allocator->allocate(Options, (std::rand() % 16) * PageSize); + if (Deallocate) + Allocator->deallocate(Options, P); + else + V.push_back(P); + } + while (!V.empty()) { + Allocator->deallocate(Options, V.back()); + V.pop_back(); + } } -} -TEST(ScudoSecondaryTest, SecondaryThreadsRace) { - Ready = false; - std::unique_ptr L(new LargeAllocator); - L->init(nullptr, /*ReleaseToOsInterval=*/0); + std::mutex Mutex; + std::condition_variable Cv; + bool Ready = false; +}; + +TEST_F(MapAllocatorWithReleaseTest, SecondaryThreadsRace) { std::thread Threads[16]; for (scudo::uptr I = 0; I < ARRAY_SIZE(Threads); I++) - Threads[I] = std::thread(performAllocations, L.get()); + Threads[I] = + std::thread(&MapAllocatorWithReleaseTest::performAllocations, this); { std::unique_lock Lock(Mutex); Ready = true; @@ -218,7 +237,6 @@ TEST(ScudoSecondaryTest, SecondaryThreadsRace) { for (auto &T : Threads) T.join(); scudo::ScopedString Str; - L->getStats(&Str); + Allocator->getStats(&Str); Str.output(); - L->unmapTestOnly(); } diff --git a/compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp b/compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp index b82b5fb4b5158..f607ba70ab47a 100644 --- a/compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp +++ b/compiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp @@ -38,7 +38,7 @@ void *pvalloc(size_t size); static const size_t Size = 100U; -TEST(ScudoWrappersCTest, Malloc) { +TEST(ScudoWrappersCDeathTest, Malloc) { void *P = malloc(Size); EXPECT_NE(P, nullptr); EXPECT_LE(Size, malloc_usable_size(P)); @@ -154,7 +154,7 @@ TEST(ScudoWrappersCTest, AlignedAlloc) { EXPECT_EQ(errno, EINVAL); } -TEST(ScudoWrappersCTest, Realloc) { +TEST(ScudoWrappersCDeathTest, Realloc) { // realloc(nullptr, N) is malloc(N) void *P = realloc(nullptr, 0U); EXPECT_NE(P, nullptr); @@ -333,7 +333,7 @@ TEST(ScudoWrappersCTest, MallocIterateBoundary) { // Fuchsia doesn't have alarm, fork or malloc_info. #if !SCUDO_FUCHSIA -TEST(ScudoWrappersCTest, MallocDisableDeadlock) { +TEST(ScudoWrappersCDeathTest, MallocDisableDeadlock) { // We expect heap operations within a disable/enable scope to deadlock. EXPECT_DEATH( { @@ -368,7 +368,7 @@ TEST(ScudoWrappersCTest, MallocInfo) { free(P2); } -TEST(ScudoWrappersCTest, Fork) { +TEST(ScudoWrappersCDeathTest, Fork) { void *P; pid_t Pid = fork(); EXPECT_GE(Pid, 0) << strerror(errno); diff --git a/compiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp b/compiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp index eb098c7f4d21e..114196778a973 100644 --- a/compiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp +++ b/compiler-rt/lib/scudo/standalone/tests/wrappers_cpp_test.cpp @@ -67,7 +67,7 @@ class Pixel { Color C = Color::Red; }; -TEST(ScudoWrappersCppTest, New) { +TEST(ScudoWrappersCppDeathTest, New) { if (getenv("SKIP_TYPE_MISMATCH")) { printf("Skipped type mismatch tests.\n"); return; diff --git a/compiler-rt/test/asan/TestCases/Linux/odr-violation.cpp b/compiler-rt/test/asan/TestCases/Linux/odr-violation.cpp index 1a9b39f89b522..478568cd122c2 100644 --- a/compiler-rt/test/asan/TestCases/Linux/odr-violation.cpp +++ b/compiler-rt/test/asan/TestCases/Linux/odr-violation.cpp @@ -43,6 +43,8 @@ // GNU driver doesn't handle .so files properly. // REQUIRES: Clang +// REQUIRES: fast-unwinder-works + #ifndef SZ # define SZ 4 #endif diff --git a/compiler-rt/test/asan/TestCases/Linux/recvfrom.cpp b/compiler-rt/test/asan/TestCases/Linux/recvfrom.cpp index 46aa202c2ad86..11ac93cda11d1 100644 --- a/compiler-rt/test/asan/TestCases/Linux/recvfrom.cpp +++ b/compiler-rt/test/asan/TestCases/Linux/recvfrom.cpp @@ -4,7 +4,8 @@ // RUN: %clangxx_asan %s -DSENDTO -o %t && not %run %t 2>&1 | FileCheck %s --check-prefix=CHECK-SENDTO // RUN: %clangxx_asan %s -DSENDTO -o %t && %env_asan_opts=intercept_send=0 %run %t 2>&1 // -// UNSUPPORTED: android +// This will try to fast unwind on Arm Thumb, where fast unwinding does not work. +// UNSUPPORTED: android, !fast-unwinder-works #include #include diff --git a/compiler-rt/test/asan/TestCases/Posix/unpoison-alternate-stack.cpp b/compiler-rt/test/asan/TestCases/Posix/unpoison-alternate-stack.cpp index 50d28ddf84c2f..a2082ed082154 100644 --- a/compiler-rt/test/asan/TestCases/Posix/unpoison-alternate-stack.cpp +++ b/compiler-rt/test/asan/TestCases/Posix/unpoison-alternate-stack.cpp @@ -6,6 +6,9 @@ // RUN: %clangxx_asan -std=c++20 -fexceptions -O0 %s -o %t -pthread // RUN: %run %t +// longjmp from signal handler is unportable. +// XFAIL: solaris + #include #include #include diff --git a/compiler-rt/test/dfsan/dfsan_get_track_origins.c b/compiler-rt/test/dfsan/dfsan_get_track_origins.c new file mode 100644 index 0000000000000..4013fed5bdaa2 --- /dev/null +++ b/compiler-rt/test/dfsan/dfsan_get_track_origins.c @@ -0,0 +1,13 @@ +// RUN: %clang_dfsan -DTRACK_ORIGINS=2 -mllvm -dfsan-track-origins=2 %s -o %t && %run %t +// RUN: %clang_dfsan -DTRACK_ORIGINS=1 -mllvm -dfsan-track-origins=1 %s -o %t && %run %t +// RUN: %clang_dfsan -DTRACK_ORIGINS=0 %s -o %t && %run %t +// +// REQUIRES: x86_64-target-arch + +#include + +#include + +int main(int argc, char *argv[]) { + assert(dfsan_get_track_origins() == TRACK_ORIGINS); +} diff --git a/compiler-rt/test/hwasan/TestCases/global.c b/compiler-rt/test/hwasan/TestCases/global.c index e1a7fd72f2b88..82fca892c23ab 100644 --- a/compiler-rt/test/hwasan/TestCases/global.c +++ b/compiler-rt/test/hwasan/TestCases/global.c @@ -10,6 +10,7 @@ int x = 1; int main(int argc, char **argv) { + // CHECK: Cause: global-overflow // RSYM: is located 0 bytes to the right of 4-byte global variable x {{.*}} in {{.*}}global.c.tmp // RNOSYM: is located to the right of a 4-byte global variable in ({{.*}}global.c.tmp+{{.*}}) // LSYM: is located 4 bytes to the left of 4-byte global variable x {{.*}} in {{.*}}global.c.tmp diff --git a/compiler-rt/test/hwasan/TestCases/heap-buffer-overflow.c b/compiler-rt/test/hwasan/TestCases/heap-buffer-overflow.c index 67398141209af..8d41ac51dd1e4 100644 --- a/compiler-rt/test/hwasan/TestCases/heap-buffer-overflow.c +++ b/compiler-rt/test/hwasan/TestCases/heap-buffer-overflow.c @@ -31,6 +31,7 @@ int main(int argc, char **argv) { if (size == 1000000) { fprintf(stderr, "is a large allocated heap chunk; size: 1003520 offset: %d\n", offset); + fprintf(stderr, "Cause: heap-buffer-overflow\n"); fprintf(stderr, "is located %s of 1000000-byte region\n", offset == -30 ? "30 bytes to the left" : "0 bytes to the right"); return -1; @@ -38,26 +39,33 @@ int main(int argc, char **argv) { #endif // CHECK40: allocated heap chunk; size: 32 offset: 8 +// CHECK40: Cause: heap-buffer-overflow // CHECK40: is located 10 bytes to the right of 30-byte region // // CHECK80: allocated heap chunk; size: 32 offset: 16 +// CHECK80: Cause: heap-buffer-overflow // CHECK80: is located 50 bytes to the right of 30-byte region // +// CHECKm30: Cause: heap-buffer-overflow // CHECKm30: is located 30 bytes to the left of 30-byte region // // CHECKMm30: is a large allocated heap chunk; size: 1003520 offset: -30 +// CHECKMm30: Cause: heap-buffer-overflow // CHECKMm30: is located 30 bytes to the left of 1000000-byte region // // CHECKM: is a large allocated heap chunk; size: 1003520 offset: 1000000 +// CHECKM: Cause: heap-buffer-overflow // CHECKM: is located 0 bytes to the right of 1000000-byte region // // CHECK31: tags: [[TAG:..]]/0e (ptr/mem) +// CHECK31: Cause: heap-buffer-overflow // CHECK31: is located 1 bytes to the right of 30-byte region // CHECK31: Memory tags around the buggy address // CHECK31: [0e] // CHECK31: Tags for short granules around the buggy address // CHECK31: {{\[}}[[TAG]]] // +// CHECK20: Cause: heap-buffer-overflow // CHECK20: is located 10 bytes to the right of 20-byte region [0x{{.*}}0,0x{{.*}}4) free(x); } diff --git a/compiler-rt/test/hwasan/TestCases/register-dump-read.c b/compiler-rt/test/hwasan/TestCases/register-dump-read.c index 002c5dd5e1f9e..17a340a94b425 100644 --- a/compiler-rt/test/hwasan/TestCases/register-dump-read.c +++ b/compiler-rt/test/hwasan/TestCases/register-dump-read.c @@ -1,11 +1,11 @@ -// RUN: %clang_hwasan -ffixed-x10 -ffixed-x23 -ffixed-x27 -O0 %s -o %t && not %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK -// RUN: %clang_hwasan -ffixed-x10 -ffixed-x23 -ffixed-x27 -O1 %s -o %t && not %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK -// RUN: %clang_hwasan -ffixed-x10 -ffixed-x23 -ffixed-x27 -O2 %s -o %t && not %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK -// RUN: %clang_hwasan -ffixed-x10 -ffixed-x23 -ffixed-x27 -O3 %s -o %t && not %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK +// RUN: %clang_hwasan -ffixed-x10 -ffixed-x11 -ffixed-x23 -ffixed-x27 -O0 %s -o %t && not %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK +// RUN: %clang_hwasan -ffixed-x10 -ffixed-x11 -ffixed-x23 -ffixed-x27 -O1 %s -o %t && not %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK +// RUN: %clang_hwasan -ffixed-x10 -ffixed-x11 -ffixed-x23 -ffixed-x27 -O2 %s -o %t && not %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK +// RUN: %clang_hwasan -ffixed-x10 -ffixed-x11 -ffixed-x23 -ffixed-x27 -O3 %s -o %t && not %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK // REQUIRES: aarch64-target-arch -// RUN: %clang_hwasan -ffixed-x10 -ffixed-x23 -ffixed-x27 -O2 %s -o %t && not %env_hwasan_opts=fast_unwind_on_fatal=true %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK -// RUN: %clang_hwasan -ffixed-x10 -ffixed-x23 -ffixed-x27 -O2 %s -o %t && not %env_hwasan_opts=fast_unwind_on_fatal=false %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK +// RUN: %clang_hwasan -ffixed-x10 -ffixed-x11 -ffixed-x23 -ffixed-x27 -O2 %s -o %t && not %env_hwasan_opts=fast_unwind_on_fatal=true %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK +// RUN: %clang_hwasan -ffixed-x10 -ffixed-x11 -ffixed-x23 -ffixed-x27 -O2 %s -o %t && not %env_hwasan_opts=fast_unwind_on_fatal=false %run %t 2>&1 | FileCheck %s --check-prefixes=CHECK #include #include @@ -16,7 +16,8 @@ int main() { char * volatile x = (char*) malloc(10); asm volatile("mov x10, #0x2222\n" "mov x23, #0x3333\n" - "mov x27, #0x4444\n"); + "mov x27, #0x4444\n" + "mov x11, sp\n"); return x[16]; // CHECK: ERROR: HWAddressSanitizer: @@ -32,12 +33,13 @@ int main() { // CHECK-NEXT: x4{{[ ]+[0-9a-f]{16}[ ]}}x5{{[ ]+[0-9a-f]{16}[ ]}}x6{{[ ]+[0-9a-f]{16}[ ]}}x7{{[ ]+[0-9a-f]{16}$}} // CHECK-NEXT: x8{{[ ]+[0-9a-f]{16}[ ]}}x9{{[ ]+[0-9a-f]{16}[ ]}} // CHECK-SAME: x10 0000000000002222 - // CHECK-SAME: x11{{[ ]+[0-9a-f]{16}$}} + // CHECK-SAME: x11[[STACK:[ ]+[0-9a-f]{16}$]] // CHECK-NEXT: x12{{[ ]+[0-9a-f]{16}[ ]}}x13{{[ ]+[0-9a-f]{16}[ ]}}x14{{[ ]+[0-9a-f]{16}[ ]}}x15{{[ ]+[0-9a-f]{16}$}} // CHECK-NEXT: x16{{[ ]+[0-9a-f]{16}[ ]}}x17{{[ ]+[0-9a-f]{16}[ ]}}x18{{[ ]+[0-9a-f]{16}[ ]}}x19{{[ ]+[0-9a-f]{16}$}} // CHECK-NEXT: x20{{[ ]+[0-9a-f]{16}[ ]}}x21{{[ ]+[0-9a-f]{16}[ ]}}x22{{[ ]+[0-9a-f]{16}[ ]}} // CHECK-SAME: x23 0000000000003333{{$}} // CHECK-NEXT: x24{{[ ]+[0-9a-f]{16}[ ]}}x25{{[ ]+[0-9a-f]{16}[ ]}}x26{{[ ]+[0-9a-f]{16}[ ]}} // CHECK-SAME: x27 0000000000004444 - // CHECK-NEXT: x28{{[ ]+[0-9a-f]{16}[ ]}}x29{{[ ]+[0-9a-f]{16}[ ]}}x30{{[ ]+[0-9a-f]{16}$}} + // CHECK-NEXT: x28{{[ ]+[0-9a-f]{16}[ ]}}x29{{[ ]+[0-9a-f]{16}[ ]}}x30{{[ ]+[0-9a-f]{16}[ ]}} + // CHECK-SAME: sp{{.*}}[[STACK]] } diff --git a/compiler-rt/test/hwasan/TestCases/stack-oob.c b/compiler-rt/test/hwasan/TestCases/stack-oob.c index 1088300c74bc1..7dfd7deb2767e 100644 --- a/compiler-rt/test/hwasan/TestCases/stack-oob.c +++ b/compiler-rt/test/hwasan/TestCases/stack-oob.c @@ -27,6 +27,7 @@ int main() { // CHECK: READ of size 1 at // CHECK: #0 {{.*}} in f{{.*}}stack-oob.c:[[@LINE-6]] + // CHECK: Cause: stack tag-mismatch // CHECK: is located in stack of threa // CHECK: SUMMARY: HWAddressSanitizer: tag-mismatch {{.*}} in f diff --git a/compiler-rt/test/hwasan/TestCases/stack-uar.c b/compiler-rt/test/hwasan/TestCases/stack-uar.c index 113f36c319204..9a81dfc3d6bce 100644 --- a/compiler-rt/test/hwasan/TestCases/stack-uar.c +++ b/compiler-rt/test/hwasan/TestCases/stack-uar.c @@ -30,9 +30,10 @@ int main() { return *p; // CHECK: READ of size 1 at // CHECK: #0 {{.*}} in main{{.*}}stack-uar.c:[[@LINE-2]] + // CHECK: Cause: stack tag-mismatch // CHECK: is located in stack of thread // CHECK: Potentially referenced stack objects: - // CHECK-NEXT: zzz in buggy {{.*}}stack-uar.c:[[@LINE-19]] + // CHECK-NEXT: zzz in buggy {{.*}}stack-uar.c:[[@LINE-20]] // CHECK-NEXT: Memory tags around the buggy address // NOSYM: Previously allocated frames: diff --git a/compiler-rt/test/hwasan/TestCases/thread-uaf.c b/compiler-rt/test/hwasan/TestCases/thread-uaf.c index 7051b2632e606..c368882f45896 100644 --- a/compiler-rt/test/hwasan/TestCases/thread-uaf.c +++ b/compiler-rt/test/hwasan/TestCases/thread-uaf.c @@ -30,6 +30,7 @@ void *Use(void *arg) { // CHECK: ERROR: HWAddressSanitizer: tag-mismatch on address // CHECK: WRITE of size 1 {{.*}} in thread T3 // CHECK: thread-uaf.c:[[@LINE-3]] + // CHECK: Cause: use-after-free // CHECK: freed by thread T2 here // CHECK: in Deallocate // CHECK: previously allocated here: diff --git a/compiler-rt/test/hwasan/TestCases/use-after-free-and-overflow.c b/compiler-rt/test/hwasan/TestCases/use-after-free-and-overflow.c new file mode 100644 index 0000000000000..c08b00fc35ace --- /dev/null +++ b/compiler-rt/test/hwasan/TestCases/use-after-free-and-overflow.c @@ -0,0 +1,61 @@ +// Checks that we do not print a faraway buffer overrun if we find a +// use-after-free. +// RUN: %clang_hwasan -O0 %s -o %t +// RUN: not %run %t 2>&1 | FileCheck %s --check-prefix=CHECK +// REQUIRES: stable-runtime + +#include +#include +#include + +#define ALLOC_ATTEMPTS 256 + +char *Untag(void *x) { + return (char *)__hwasan_tag_pointer(x, 0); +} + +void *FindMatch(void *ptrs[ALLOC_ATTEMPTS], void *value) { + for (int i = 0; i < ALLOC_ATTEMPTS; ++i) { + if (!ptrs[i]) + return NULL; + int distance = Untag(value) - Untag(ptrs[i]); + // Leave at least one granule of gap to the allocation. + if (abs(distance) < 1000 && abs(distance) > 32) + return ptrs[i]; + } + return NULL; +} + +int main(int argc, char **argv) { + __hwasan_enable_allocator_tagging(); + void *ptrs[ALLOC_ATTEMPTS] = {}; + // Find two allocations that are close enough so that they would be + // candidates as buffer overflows for each other. + void *one; + void *other; + for (int i = 0; i < ALLOC_ATTEMPTS; ++i) { + one = malloc(16); + other = FindMatch(ptrs, one); + ptrs[i] = one; + if (other) + break; + } + if (!other) { + fprintf(stderr, "Could not find closeby allocations.\n"); + abort(); + } + __hwasan_tag_memory(Untag(one), 3, 16); + __hwasan_tag_memory(Untag(other), 3, 16); + // Tag potential adjaceant allocations with a mismatching tag, otherwise this + // test would flake. + __hwasan_tag_memory(Untag(one) + 16, 4, 16); + __hwasan_tag_memory(Untag(one) - 16, 4, 16); + void *retagged_one = __hwasan_tag_pointer(one, 3); + free(retagged_one); + volatile char *ptr = (char *)retagged_one; + *ptr = 1; +} + +// CHECK-NOT: Cause: heap-buffer-overflow +// CHECK: Cause: use-after-free +// CHECK-NOT: Cause: heap-buffer-overflow diff --git a/compiler-rt/test/hwasan/TestCases/use-after-free.c b/compiler-rt/test/hwasan/TestCases/use-after-free.c index ed4512387cc84..608f588944536 100644 --- a/compiler-rt/test/hwasan/TestCases/use-after-free.c +++ b/compiler-rt/test/hwasan/TestCases/use-after-free.c @@ -24,15 +24,16 @@ int main() { // CHECK: #{{[0-9]}} {{.*}} in main {{.*}}use-after-free.c:[[@LINE-2]] // Offset is 5 or 11 depending on left/right alignment. // CHECK: is a small unallocated heap chunk; size: 32 offset: {{5|11}} + // CHECK: Cause: use-after-free // CHECK: is located 5 bytes inside of 10-byte region // // CHECK: freed by thread {{.*}} here: // CHECK: #0 {{.*}} in {{.*}}free{{.*}} {{.*}}hwasan_allocation_functions.cpp - // CHECK: #1 {{.*}} in main {{.*}}use-after-free.c:[[@LINE-14]] + // CHECK: #1 {{.*}} in main {{.*}}use-after-free.c:[[@LINE-15]] // CHECK: previously allocated here: // CHECK: #0 {{.*}} in {{.*}}malloc{{.*}} {{.*}}hwasan_allocation_functions.cpp - // CHECK: #1 {{.*}} in main {{.*}}use-after-free.c:[[@LINE-19]] + // CHECK: #1 {{.*}} in main {{.*}}use-after-free.c:[[@LINE-20]] // CHECK: Memory tags around the buggy address (one tag corresponds to 16 bytes): // CHECK: =>{{.*}}[[MEM_TAG]] // CHECK: SUMMARY: HWAddressSanitizer: tag-mismatch diff --git a/cross-project-tests/CMakeLists.txt b/cross-project-tests/CMakeLists.txt new file mode 100644 index 0000000000000..f3345099190b2 --- /dev/null +++ b/cross-project-tests/CMakeLists.txt @@ -0,0 +1,87 @@ +# Cross project tests, for tests that require access to multiple projects across +# LLVM (e.g. clang, lld and lldb). +# The subset inside debuginfo-tests invoke clang to generate programs with +# various types of debug info, and then run those programs under a debugger +# such as GDB or LLDB to verify the results. + +find_package(Python3 COMPONENTS Interpreter) + +add_llvm_executable(check-gdb-llvm-support + debuginfo-tests/llvm-prettyprinters/gdb/llvm-support.cpp +) +target_link_libraries(check-gdb-llvm-support PRIVATE LLVMSupport) + +set(CROSS_PROJECT_TESTS_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}) +set(CROSS_PROJECT_TESTS_BINARY_DIR ${CMAKE_CURRENT_BINARY_DIR}) + +set(CROSS_PROJECT_TEST_DEPS + FileCheck + count + llvm-config + llvm-objdump + check-gdb-llvm-support + not + ) + +if ("clang" IN_LIST LLVM_ENABLE_PROJECTS) + list(APPEND CROSS_PROJECT_TEST_DEPS clang) +endif() + +if ("mlir" IN_LIST LLVM_ENABLE_PROJECTS) + add_llvm_executable(check-gdb-mlir-support + debuginfo-tests/llvm-prettyprinters/gdb/mlir-support.cpp + ) + target_include_directories(check-gdb-mlir-support PRIVATE + ${LLVM_EXTERNAL_MLIR_SOURCE_DIR}/include + ${LLVM_BINARY_DIR}/tools/mlir/include) + target_link_libraries(check-gdb-mlir-support PRIVATE MLIRIR) + list(APPEND CROSS_PROJECT_TEST_DEPS check-gdb-mlir-support) + set(MLIR_SOURCE_DIR ${LLVM_EXTERNAL_MLIR_SOURCE_DIR}) +endif() + +if("compiler-rt" IN_LIST LLVM_ENABLE_PROJECTS) + # llgdb-tests/asan.c and other asan* files. + if(TARGET asan) + list(APPEND CROSS_PROJECT_TEST_DEPS asan) + endif() + # llgdb-tests/safestack.c + if(TARGET safestack) + list(APPEND CROSS_PROJECT_TEST_DEPS safestack) + endif() +endif() +# Many dexter tests depend on lldb. +if("lldb" IN_LIST LLVM_ENABLE_PROJECTS) + list(APPEND CROSS_PROJECT_TEST_DEPS lldb lldb-server) +endif() + +# The Windows builder scripts pass -fuse-ld=lld. +if (WIN32 OR "lld" IN_LIST LLVM_ENABLE_PROJECTS) + list(APPEND CROSS_PROJECT_TEST_DEPS lld) +endif() + +configure_lit_site_cfg( + ${CMAKE_CURRENT_SOURCE_DIR}/lit.site.cfg.py.in + ${CMAKE_CURRENT_BINARY_DIR}/lit.site.cfg.py + MAIN_CONFIG + ${CMAKE_CURRENT_SOURCE_DIR}/lit.cfg.py + ) + +add_lit_testsuite(check-cross-project "Running cross-project tests" + ${CMAKE_CURRENT_BINARY_DIR} + DEPENDS ${CROSS_PROJECT_TEST_DEPS} + ) + +# Add alias for debuginfo test subset. +add_lit_testsuite(check-debuginfo "Running debuginfo tests" + ${CMAKE_CURRENT_BINARY_DIR}/debuginfo-tests + EXCLUDE_FROM_CHECK_ALL + DEPENDS ${CROSS_PROJECT_TEST_DEPS} + ) + +# Add check-cross-project-* targets. +add_lit_testsuites(CROSS_PROJECT ${CMAKE_CURRENT_SOURCE_DIR} + DEPENDS ${CROSS_PROJECT_TEST_DEPS} + ) + +set_target_properties(check-cross-project PROPERTIES FOLDER "Tests") +set_target_properties(check-debuginfo PROPERTIES FOLDER "Tests") diff --git a/debuginfo-tests/README.txt b/cross-project-tests/debuginfo-tests/README.txt similarity index 100% rename from debuginfo-tests/README.txt rename to cross-project-tests/debuginfo-tests/README.txt diff --git a/debuginfo-tests/dexter-tests/aggregate-indirect-arg.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/aggregate-indirect-arg.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/aggregate-indirect-arg.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/aggregate-indirect-arg.cpp diff --git a/debuginfo-tests/dexter-tests/asan-deque.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/asan-deque.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/asan-deque.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/asan-deque.cpp diff --git a/debuginfo-tests/dexter-tests/asan.c b/cross-project-tests/debuginfo-tests/dexter-tests/asan.c similarity index 100% rename from debuginfo-tests/dexter-tests/asan.c rename to cross-project-tests/debuginfo-tests/dexter-tests/asan.c diff --git a/debuginfo-tests/dexter-tests/ctor.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/ctor.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/ctor.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/ctor.cpp diff --git a/debuginfo-tests/dexter-tests/dbg-arg.c b/cross-project-tests/debuginfo-tests/dexter-tests/dbg-arg.c similarity index 100% rename from debuginfo-tests/dexter-tests/dbg-arg.c rename to cross-project-tests/debuginfo-tests/dexter-tests/dbg-arg.c diff --git a/debuginfo-tests/dexter-tests/deferred_globals.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/deferred_globals.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/deferred_globals.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/deferred_globals.cpp diff --git a/debuginfo-tests/dexter-tests/global-constant.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/global-constant.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/global-constant.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/global-constant.cpp diff --git a/debuginfo-tests/dexter-tests/hello.c b/cross-project-tests/debuginfo-tests/dexter-tests/hello.c similarity index 100% rename from debuginfo-tests/dexter-tests/hello.c rename to cross-project-tests/debuginfo-tests/dexter-tests/hello.c diff --git a/debuginfo-tests/dexter-tests/inline-line-gap.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/inline-line-gap.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/inline-line-gap.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/inline-line-gap.cpp diff --git a/debuginfo-tests/dexter-tests/lit.local.cfg b/cross-project-tests/debuginfo-tests/dexter-tests/lit.local.cfg similarity index 100% rename from debuginfo-tests/dexter-tests/lit.local.cfg rename to cross-project-tests/debuginfo-tests/dexter-tests/lit.local.cfg diff --git a/debuginfo-tests/dexter-tests/memvars/bitcast.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/bitcast.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/bitcast.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/bitcast.c diff --git a/debuginfo-tests/dexter-tests/memvars/const-branch.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/const-branch.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/const-branch.c diff --git a/debuginfo-tests/dexter-tests/memvars/ctrl-flow.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/ctrl-flow.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/ctrl-flow.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/ctrl-flow.c diff --git a/debuginfo-tests/dexter-tests/memvars/implicit-ptr.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/implicit-ptr.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/implicit-ptr.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/implicit-ptr.c diff --git a/debuginfo-tests/dexter-tests/memvars/inline-escaping-function.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/inline-escaping-function.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/inline-escaping-function.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/inline-escaping-function.c diff --git a/debuginfo-tests/dexter-tests/memvars/inlining-dse.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/inlining-dse.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/inlining-dse.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/inlining-dse.c diff --git a/debuginfo-tests/dexter-tests/memvars/inlining.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/inlining.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/inlining.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/inlining.c diff --git a/debuginfo-tests/dexter-tests/memvars/loop.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/loop.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/loop.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/loop.c diff --git a/debuginfo-tests/dexter-tests/memvars/merged-store.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/merged-store.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/merged-store.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/merged-store.c diff --git a/debuginfo-tests/dexter-tests/memvars/ptr-to.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/ptr-to.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/ptr-to.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/ptr-to.c diff --git a/debuginfo-tests/dexter-tests/memvars/struct-dse.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/struct-dse.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/struct-dse.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/struct-dse.c diff --git a/debuginfo-tests/dexter-tests/memvars/unused-merged-value.c b/cross-project-tests/debuginfo-tests/dexter-tests/memvars/unused-merged-value.c similarity index 100% rename from debuginfo-tests/dexter-tests/memvars/unused-merged-value.c rename to cross-project-tests/debuginfo-tests/dexter-tests/memvars/unused-merged-value.c diff --git a/debuginfo-tests/dexter-tests/namespace.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/namespace.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/namespace.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/namespace.cpp diff --git a/debuginfo-tests/dexter-tests/nrvo-string.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/nrvo-string.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/nrvo-string.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/nrvo-string.cpp diff --git a/debuginfo-tests/dexter-tests/nrvo.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/nrvo.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/nrvo.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/nrvo.cpp diff --git a/debuginfo-tests/dexter-tests/optnone-fastmath.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/optnone-fastmath.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/optnone-fastmath.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/optnone-fastmath.cpp diff --git a/debuginfo-tests/dexter-tests/optnone-loops.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/optnone-loops.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/optnone-loops.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/optnone-loops.cpp diff --git a/debuginfo-tests/dexter-tests/optnone-simple-functions.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/optnone-simple-functions.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/optnone-simple-functions.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/optnone-simple-functions.cpp diff --git a/debuginfo-tests/dexter-tests/optnone-struct-and-methods.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/optnone-struct-and-methods.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/optnone-struct-and-methods.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/optnone-struct-and-methods.cpp diff --git a/debuginfo-tests/dexter-tests/optnone-vectors-and-functions.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/optnone-vectors-and-functions.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/optnone-vectors-and-functions.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/optnone-vectors-and-functions.cpp diff --git a/debuginfo-tests/dexter-tests/realigned-frame.cpp b/cross-project-tests/debuginfo-tests/dexter-tests/realigned-frame.cpp similarity index 100% rename from debuginfo-tests/dexter-tests/realigned-frame.cpp rename to cross-project-tests/debuginfo-tests/dexter-tests/realigned-frame.cpp diff --git a/debuginfo-tests/dexter-tests/stack-var.c b/cross-project-tests/debuginfo-tests/dexter-tests/stack-var.c similarity index 100% rename from debuginfo-tests/dexter-tests/stack-var.c rename to cross-project-tests/debuginfo-tests/dexter-tests/stack-var.c diff --git a/debuginfo-tests/dexter-tests/vla.c b/cross-project-tests/debuginfo-tests/dexter-tests/vla.c similarity index 100% rename from debuginfo-tests/dexter-tests/vla.c rename to cross-project-tests/debuginfo-tests/dexter-tests/vla.c diff --git a/debuginfo-tests/dexter/.gitignore b/cross-project-tests/debuginfo-tests/dexter/.gitignore similarity index 100% rename from debuginfo-tests/dexter/.gitignore rename to cross-project-tests/debuginfo-tests/dexter/.gitignore diff --git a/debuginfo-tests/dexter/Commands.md b/cross-project-tests/debuginfo-tests/dexter/Commands.md similarity index 100% rename from debuginfo-tests/dexter/Commands.md rename to cross-project-tests/debuginfo-tests/dexter/Commands.md diff --git a/debuginfo-tests/dexter/LICENSE.txt b/cross-project-tests/debuginfo-tests/dexter/LICENSE.txt similarity index 100% rename from debuginfo-tests/dexter/LICENSE.txt rename to cross-project-tests/debuginfo-tests/dexter/LICENSE.txt diff --git a/debuginfo-tests/dexter/README.md b/cross-project-tests/debuginfo-tests/dexter/README.md similarity index 100% rename from debuginfo-tests/dexter/README.md rename to cross-project-tests/debuginfo-tests/dexter/README.md diff --git a/debuginfo-tests/dexter/dex/__init__.py b/cross-project-tests/debuginfo-tests/dexter/dex/__init__.py similarity index 100% rename from debuginfo-tests/dexter/dex/__init__.py rename to cross-project-tests/debuginfo-tests/dexter/dex/__init__.py diff --git a/debuginfo-tests/dexter/dex/builder/Builder.py b/cross-project-tests/debuginfo-tests/dexter/dex/builder/Builder.py similarity index 100% rename from debuginfo-tests/dexter/dex/builder/Builder.py rename to cross-project-tests/debuginfo-tests/dexter/dex/builder/Builder.py diff --git a/debuginfo-tests/dexter/dex/builder/ParserOptions.py b/cross-project-tests/debuginfo-tests/dexter/dex/builder/ParserOptions.py similarity index 100% rename from debuginfo-tests/dexter/dex/builder/ParserOptions.py rename to cross-project-tests/debuginfo-tests/dexter/dex/builder/ParserOptions.py diff --git a/debuginfo-tests/dexter/dex/builder/__init__.py b/cross-project-tests/debuginfo-tests/dexter/dex/builder/__init__.py similarity index 100% rename from debuginfo-tests/dexter/dex/builder/__init__.py rename to cross-project-tests/debuginfo-tests/dexter/dex/builder/__init__.py diff --git a/debuginfo-tests/dexter/dex/builder/scripts/posix/clang-c.sh b/cross-project-tests/debuginfo-tests/dexter/dex/builder/scripts/posix/clang-c.sh similarity index 100% rename from debuginfo-tests/dexter/dex/builder/scripts/posix/clang-c.sh rename to cross-project-tests/debuginfo-tests/dexter/dex/builder/scripts/posix/clang-c.sh diff --git a/debuginfo-tests/dexter/dex/builder/scripts/posix/clang.sh b/cross-project-tests/debuginfo-tests/dexter/dex/builder/scripts/posix/clang.sh similarity index 100% rename from debuginfo-tests/dexter/dex/builder/scripts/posix/clang.sh rename to cross-project-tests/debuginfo-tests/dexter/dex/builder/scripts/posix/clang.sh diff --git a/debuginfo-tests/dexter/dex/builder/scripts/posix/gcc.sh b/cross-project-tests/debuginfo-tests/dexter/dex/builder/scripts/posix/gcc.sh similarity index 100% rename from debuginfo-tests/dexter/dex/builder/scripts/posix/gcc.sh rename to cross-project-tests/debuginfo-tests/dexter/dex/builder/scripts/posix/gcc.sh diff --git a/debuginfo-tests/dexter/dex/builder/scripts/windows/clang-cl_vs2015.bat b/cross-project-tests/debuginfo-tests/dexter/dex/builder/scripts/windows/clang-cl_vs2015.bat similarity index 100% rename from debuginfo-tests/dexter/dex/builder/scripts/windows/clang-cl_vs2015.bat rename to cross-project-tests/debuginfo-tests/dexter/dex/builder/scripts/windows/clang-cl_vs2015.bat diff --git a/debuginfo-tests/dexter/dex/builder/scripts/windows/clang.bat b/cross-project-tests/debuginfo-tests/dexter/dex/builder/scripts/windows/clang.bat similarity index 100% rename from debuginfo-tests/dexter/dex/builder/scripts/windows/clang.bat rename to cross-project-tests/debuginfo-tests/dexter/dex/builder/scripts/windows/clang.bat diff --git a/debuginfo-tests/dexter/dex/command/CommandBase.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/CommandBase.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/CommandBase.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/CommandBase.py diff --git a/debuginfo-tests/dexter/dex/command/ParseCommand.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/ParseCommand.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/ParseCommand.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/ParseCommand.py diff --git a/debuginfo-tests/dexter/dex/command/StepValueInfo.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/StepValueInfo.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/StepValueInfo.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/StepValueInfo.py diff --git a/debuginfo-tests/dexter/dex/command/__init__.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/__init__.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/__init__.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/__init__.py diff --git a/debuginfo-tests/dexter/dex/command/commands/DexDeclareFile.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexDeclareFile.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/commands/DexDeclareFile.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexDeclareFile.py diff --git a/debuginfo-tests/dexter/dex/command/commands/DexExpectProgramState.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectProgramState.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/commands/DexExpectProgramState.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectProgramState.py diff --git a/debuginfo-tests/dexter/dex/command/commands/DexExpectStepKind.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectStepKind.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/commands/DexExpectStepKind.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectStepKind.py diff --git a/debuginfo-tests/dexter/dex/command/commands/DexExpectStepOrder.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectStepOrder.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/commands/DexExpectStepOrder.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectStepOrder.py diff --git a/debuginfo-tests/dexter/dex/command/commands/DexExpectWatchBase.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectWatchBase.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/commands/DexExpectWatchBase.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectWatchBase.py diff --git a/debuginfo-tests/dexter/dex/command/commands/DexExpectWatchType.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectWatchType.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/commands/DexExpectWatchType.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectWatchType.py diff --git a/debuginfo-tests/dexter/dex/command/commands/DexExpectWatchValue.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectWatchValue.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/commands/DexExpectWatchValue.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexExpectWatchValue.py diff --git a/debuginfo-tests/dexter/dex/command/commands/DexLabel.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexLabel.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/commands/DexLabel.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexLabel.py diff --git a/debuginfo-tests/dexter/dex/command/commands/DexLimitSteps.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexLimitSteps.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/commands/DexLimitSteps.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexLimitSteps.py diff --git a/debuginfo-tests/dexter/dex/command/commands/DexUnreachable.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexUnreachable.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/commands/DexUnreachable.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexUnreachable.py diff --git a/debuginfo-tests/dexter/dex/command/commands/DexWatch.py b/cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexWatch.py similarity index 100% rename from debuginfo-tests/dexter/dex/command/commands/DexWatch.py rename to cross-project-tests/debuginfo-tests/dexter/dex/command/commands/DexWatch.py diff --git a/debuginfo-tests/dexter/dex/debugger/DebuggerBase.py b/cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerBase.py similarity index 100% rename from debuginfo-tests/dexter/dex/debugger/DebuggerBase.py rename to cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerBase.py diff --git a/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ConditionalController.py b/cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ConditionalController.py similarity index 100% rename from debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ConditionalController.py rename to cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ConditionalController.py diff --git a/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ControllerHelpers.py b/cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ControllerHelpers.py similarity index 100% rename from debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ControllerHelpers.py rename to cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/ControllerHelpers.py diff --git a/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/DebuggerControllerBase.py b/cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/DebuggerControllerBase.py similarity index 100% rename from debuginfo-tests/dexter/dex/debugger/DebuggerControllers/DebuggerControllerBase.py rename to cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/DebuggerControllerBase.py diff --git a/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/DefaultController.py b/cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/DefaultController.py similarity index 100% rename from debuginfo-tests/dexter/dex/debugger/DebuggerControllers/DefaultController.py rename to cross-project-tests/debuginfo-tests/dexter/dex/debugger/DebuggerControllers/DefaultController.py diff --git a/debuginfo-tests/dexter/dex/debugger/Debuggers.py b/cross-project-tests/debuginfo-tests/dexter/dex/debugger/Debuggers.py similarity index 100% rename from debuginfo-tests/dexter/dex/debugger/Debuggers.py rename to cross-project-tests/debuginfo-tests/dexter/dex/debugger/Debuggers.py diff --git a/debuginfo-tests/dexter/dex/debugger/__init__.py b/cross-project-tests/debuginfo-tests/dexter/dex/debugger/__init__.py similarity index 100% rename from debuginfo-tests/dexter/dex/debugger/__init__.py rename to cross-project-tests/debuginfo-tests/dexter/dex/debugger/__init__.py diff --git a/debuginfo-tests/dexter/dex/debugger/dbgeng/README.md b/cross-project-tests/debuginfo-tests/dexter/dex/debugger/dbgeng/README.md similarity index 100% rename from debuginfo-tests/dexter/dex/debugger/dbgeng/README.md rename to cross-project-tests/debuginfo-tests/dexter/dex/debugger/dbgeng/README.md diff --git a/debuginfo-tests/dexter/dex/debugger/dbgeng/__init__.py b/cross-project-tests/debuginfo-tests/dexter/dex/debugger/dbgeng/__init__.py similarity index 100% rename from debuginfo-tests/dexter/dex/debugger/dbgeng/__init__.py rename to cross-project-tests/debuginfo-tests/dexter/dex/debugger/dbgeng/__init__.py diff --git a/debuginfo-tests/dexter/dex/debugger/dbgeng/breakpoint.py b/cross-project-tests/debuginfo-tests/dexter/dex/debugger/dbgeng/breakpoint.py similarity index 100% rename from debuginfo-tests/dexter/dex/debugger/dbgeng/breakpoint.py rename to cross-project-tests/debuginfo-tests/dexter/dex/debugger/dbgeng/breakpoint.py diff --git a/debuginfo-tests/dexter/dex/debugger/dbgeng/client.py b/cross-project-tests/debuginfo-tests/dexter/dex/debugger/dbgeng/client.py similarity index 100% rename from debuginfo-tests/dexter/dex/debugger/dbgeng/client.py rename to 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cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_program_state.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_step_kinds.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_step_kinds.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/penalty/expect_step_kinds.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_step_kinds.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_step_order.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_step_order.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/penalty/expect_step_order.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_step_order.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_watch_type.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_watch_type.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/penalty/expect_watch_type.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_watch_type.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_watch_value.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_watch_value.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/penalty/expect_watch_value.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/expect_watch_value.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/penalty/unreachable.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/unreachable.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/penalty/unreachable.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/penalty/unreachable.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/commands.dex b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/commands.dex similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/commands.dex rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/commands.dex diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/lit.local.cfg.py b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/lit.local.cfg.py similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/lit.local.cfg.py rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/lit.local.cfg.py diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/test.cfg b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/test.cfg similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/test.cfg rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/test.cfg diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/test.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/test.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/test.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/dex_and_source/test.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/commands.dex b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/commands.dex similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/commands.dex rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/commands.dex diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/lit.local.cfg.py b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/lit.local.cfg.py similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/lit.local.cfg.py rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/lit.local.cfg.py diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/test.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/test.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/test.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary/test.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/dex_commands/commands.dex b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/dex_commands/commands.dex similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/dex_commands/commands.dex rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/dex_commands/commands.dex diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/dex_commands/source_root_dir.dex b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/dex_commands/source_root_dir.dex similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/dex_commands/source_root_dir.dex rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/dex_commands/source_root_dir.dex diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/lit.local.cfg.py b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/lit.local.cfg.py similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/lit.local.cfg.py rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/lit.local.cfg.py diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/source/test.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/source/test.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/source/test.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/precompiled_binary_different_dir/source/test.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/lit.local.cfg.py b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/lit.local.cfg.py similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/lit.local.cfg.py rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/lit.local.cfg.py diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/source/test file.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/source/test file.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/source/test file.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/source/test file.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/test.cfg b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/test.cfg similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/test.cfg rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/test.cfg diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/test.dex b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/test.dex similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/test.dex rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/dex_declare_file/windows_noncanonical_path/test.dex diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_program_state.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_program_state.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/expect_program_state.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_program_state.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/direction.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/direction.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/direction.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/direction.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/func.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/func.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/func.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/func.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/func_external.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/func_external.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/func_external.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/func_external.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/recursive.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/recursive.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/recursive.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/recursive.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/small_loop.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/small_loop.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/small_loop.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_kind/small_loop.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_order.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_order.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_order.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_step_order.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_watch_type.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_watch_type.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/expect_watch_type.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_watch_type.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_watch_value.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_watch_value.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/expect_watch_value.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/expect_watch_value.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/hit_count.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/hit_count.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/hit_count.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/hit_count.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_check_json_step_count.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_check_json_step_count.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_check_json_step_count.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_check_json_step_count.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_expect_loop.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_expect_loop.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_expect_loop.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_expect_loop.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_expect_value.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_expect_value.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_expect_value.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_expect_value.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_line_mismatch.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_line_mismatch.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_line_mismatch.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_line_mismatch.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_overlapping_ranges.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_overlapping_ranges.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_overlapping_ranges.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_overlapping_ranges.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_same_line_conditional.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_same_line_conditional.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_same_line_conditional.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/limit_steps_same_line_conditional.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/unconditional.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/unconditional.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/unconditional.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/limit_steps/unconditional.cpp diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/lit.local.cfg b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/lit.local.cfg similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/lit.local.cfg rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/lit.local.cfg diff --git a/debuginfo-tests/dexter/feature_tests/commands/perfect/unreachable.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/unreachable.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/commands/perfect/unreachable.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/commands/perfect/unreachable.cpp diff --git a/debuginfo-tests/dexter/feature_tests/lit.local.cfg b/cross-project-tests/debuginfo-tests/dexter/feature_tests/lit.local.cfg similarity index 100% rename from debuginfo-tests/dexter/feature_tests/lit.local.cfg rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/lit.local.cfg diff --git a/debuginfo-tests/dexter/feature_tests/subtools/clang-opt-bisect/clang-opt-bisect.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/clang-opt-bisect/clang-opt-bisect.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/clang-opt-bisect/clang-opt-bisect.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/clang-opt-bisect/clang-opt-bisect.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/help/help.test b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/help/help.test similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/help/help.test rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/help/help.test diff --git a/debuginfo-tests/dexter/feature_tests/subtools/list-debuggers/list-debuggers.test b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/list-debuggers/list-debuggers.test similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/list-debuggers/list-debuggers.test rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/list-debuggers/list-debuggers.test diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/err_bad_label_ref.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_bad_label_ref.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/err_bad_label_ref.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_bad_label_ref.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/err_duplicate_label.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_duplicate_label.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/err_duplicate_label.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_duplicate_label.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/err_label_kwarg.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_label_kwarg.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/err_label_kwarg.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_label_kwarg.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/err_limit_steps_no_values.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_limit_steps_no_values.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/err_limit_steps_no_values.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_limit_steps_no_values.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/err_paren.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_paren.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/err_paren.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_paren.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/err_paren_mline.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_paren_mline.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/err_paren_mline.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_paren_mline.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/err_syntax.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_syntax.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/err_syntax.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_syntax.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/err_syntax_mline.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_syntax_mline.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/err_syntax_mline.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_syntax_mline.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/err_type.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_type.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/err_type.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_type.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/err_type_mline.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_type_mline.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/err_type_mline.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/err_type_mline.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/label_another_line.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/label_another_line.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/label_another_line.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/label_another_line.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/label_offset.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/label_offset.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/label_offset.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/label_offset.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/test/source-root-dir.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/source-root-dir.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/test/source-root-dir.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/test/source-root-dir.cpp diff --git a/debuginfo-tests/dexter/feature_tests/subtools/view.cpp b/cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/view.cpp similarity index 100% rename from debuginfo-tests/dexter/feature_tests/subtools/view.cpp rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/subtools/view.cpp diff --git a/debuginfo-tests/dexter/feature_tests/unittests/run.test b/cross-project-tests/debuginfo-tests/dexter/feature_tests/unittests/run.test similarity index 100% rename from debuginfo-tests/dexter/feature_tests/unittests/run.test rename to cross-project-tests/debuginfo-tests/dexter/feature_tests/unittests/run.test diff --git a/cross-project-tests/debuginfo-tests/lit.local.cfg b/cross-project-tests/debuginfo-tests/lit.local.cfg new file mode 100644 index 0000000000000..62f90a181d630 --- /dev/null +++ b/cross-project-tests/debuginfo-tests/lit.local.cfg @@ -0,0 +1,2 @@ +if 'clang' not in config.available_features: + config.unsupported = True diff --git a/debuginfo-tests/llgdb-tests/apple-accel.cpp b/cross-project-tests/debuginfo-tests/llgdb-tests/apple-accel.cpp similarity index 100% rename from debuginfo-tests/llgdb-tests/apple-accel.cpp rename to cross-project-tests/debuginfo-tests/llgdb-tests/apple-accel.cpp diff --git a/debuginfo-tests/llgdb-tests/asan-blocks.c b/cross-project-tests/debuginfo-tests/llgdb-tests/asan-blocks.c similarity index 100% rename from debuginfo-tests/llgdb-tests/asan-blocks.c rename to cross-project-tests/debuginfo-tests/llgdb-tests/asan-blocks.c diff --git a/debuginfo-tests/llgdb-tests/asan-deque.cpp b/cross-project-tests/debuginfo-tests/llgdb-tests/asan-deque.cpp similarity index 100% rename from debuginfo-tests/llgdb-tests/asan-deque.cpp rename to cross-project-tests/debuginfo-tests/llgdb-tests/asan-deque.cpp diff --git a/debuginfo-tests/llgdb-tests/asan.c b/cross-project-tests/debuginfo-tests/llgdb-tests/asan.c similarity index 100% rename from debuginfo-tests/llgdb-tests/asan.c rename to cross-project-tests/debuginfo-tests/llgdb-tests/asan.c diff --git a/debuginfo-tests/llgdb-tests/block_var.m b/cross-project-tests/debuginfo-tests/llgdb-tests/block_var.m similarity index 100% rename from debuginfo-tests/llgdb-tests/block_var.m rename to cross-project-tests/debuginfo-tests/llgdb-tests/block_var.m diff --git a/debuginfo-tests/llgdb-tests/blocks.m b/cross-project-tests/debuginfo-tests/llgdb-tests/blocks.m similarity index 100% rename from debuginfo-tests/llgdb-tests/blocks.m rename to cross-project-tests/debuginfo-tests/llgdb-tests/blocks.m diff --git a/debuginfo-tests/llgdb-tests/foreach.m b/cross-project-tests/debuginfo-tests/llgdb-tests/foreach.m similarity index 100% rename from debuginfo-tests/llgdb-tests/foreach.m rename to cross-project-tests/debuginfo-tests/llgdb-tests/foreach.m diff --git a/debuginfo-tests/llgdb-tests/forward-declare-class.cpp b/cross-project-tests/debuginfo-tests/llgdb-tests/forward-declare-class.cpp similarity index 100% rename from debuginfo-tests/llgdb-tests/forward-declare-class.cpp rename to cross-project-tests/debuginfo-tests/llgdb-tests/forward-declare-class.cpp diff --git a/debuginfo-tests/llgdb-tests/lit.local.cfg b/cross-project-tests/debuginfo-tests/llgdb-tests/lit.local.cfg similarity index 100% rename from debuginfo-tests/llgdb-tests/lit.local.cfg rename to cross-project-tests/debuginfo-tests/llgdb-tests/lit.local.cfg diff --git a/debuginfo-tests/llgdb-tests/llgdb.py b/cross-project-tests/debuginfo-tests/llgdb-tests/llgdb.py similarity index 100% rename from debuginfo-tests/llgdb-tests/llgdb.py rename to cross-project-tests/debuginfo-tests/llgdb-tests/llgdb.py diff --git a/debuginfo-tests/llgdb-tests/nested-struct.cpp b/cross-project-tests/debuginfo-tests/llgdb-tests/nested-struct.cpp similarity index 100% rename from debuginfo-tests/llgdb-tests/nested-struct.cpp rename to cross-project-tests/debuginfo-tests/llgdb-tests/nested-struct.cpp diff --git a/debuginfo-tests/llgdb-tests/nrvo-string.cpp b/cross-project-tests/debuginfo-tests/llgdb-tests/nrvo-string.cpp similarity index 100% rename from debuginfo-tests/llgdb-tests/nrvo-string.cpp rename to cross-project-tests/debuginfo-tests/llgdb-tests/nrvo-string.cpp diff --git a/debuginfo-tests/llgdb-tests/safestack.c b/cross-project-tests/debuginfo-tests/llgdb-tests/safestack.c similarity index 100% rename from debuginfo-tests/llgdb-tests/safestack.c rename to cross-project-tests/debuginfo-tests/llgdb-tests/safestack.c diff --git a/debuginfo-tests/llgdb-tests/sret.cpp b/cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp similarity index 100% rename from debuginfo-tests/llgdb-tests/sret.cpp rename to cross-project-tests/debuginfo-tests/llgdb-tests/sret.cpp diff --git a/debuginfo-tests/llgdb-tests/static-member-2.cpp b/cross-project-tests/debuginfo-tests/llgdb-tests/static-member-2.cpp similarity index 100% rename from debuginfo-tests/llgdb-tests/static-member-2.cpp rename to cross-project-tests/debuginfo-tests/llgdb-tests/static-member-2.cpp diff --git a/debuginfo-tests/llgdb-tests/static-member.cpp b/cross-project-tests/debuginfo-tests/llgdb-tests/static-member.cpp similarity index 100% rename from debuginfo-tests/llgdb-tests/static-member.cpp rename to cross-project-tests/debuginfo-tests/llgdb-tests/static-member.cpp diff --git a/debuginfo-tests/llgdb-tests/test_debuginfo.pl b/cross-project-tests/debuginfo-tests/llgdb-tests/test_debuginfo.pl similarity index 100% rename from debuginfo-tests/llgdb-tests/test_debuginfo.pl rename to cross-project-tests/debuginfo-tests/llgdb-tests/test_debuginfo.pl diff --git a/debuginfo-tests/llvm-prettyprinters/gdb/lit.local.cfg b/cross-project-tests/debuginfo-tests/llvm-prettyprinters/gdb/lit.local.cfg similarity index 100% rename from debuginfo-tests/llvm-prettyprinters/gdb/lit.local.cfg rename to cross-project-tests/debuginfo-tests/llvm-prettyprinters/gdb/lit.local.cfg diff --git a/debuginfo-tests/llvm-prettyprinters/gdb/llvm-support.cpp b/cross-project-tests/debuginfo-tests/llvm-prettyprinters/gdb/llvm-support.cpp similarity index 100% rename from debuginfo-tests/llvm-prettyprinters/gdb/llvm-support.cpp rename to cross-project-tests/debuginfo-tests/llvm-prettyprinters/gdb/llvm-support.cpp diff --git a/debuginfo-tests/llvm-prettyprinters/gdb/llvm-support.gdb b/cross-project-tests/debuginfo-tests/llvm-prettyprinters/gdb/llvm-support.gdb similarity index 100% rename from debuginfo-tests/llvm-prettyprinters/gdb/llvm-support.gdb rename to cross-project-tests/debuginfo-tests/llvm-prettyprinters/gdb/llvm-support.gdb diff --git a/debuginfo-tests/llvm-prettyprinters/gdb/mlir-support.cpp b/cross-project-tests/debuginfo-tests/llvm-prettyprinters/gdb/mlir-support.cpp similarity index 100% rename from debuginfo-tests/llvm-prettyprinters/gdb/mlir-support.cpp rename to cross-project-tests/debuginfo-tests/llvm-prettyprinters/gdb/mlir-support.cpp diff --git a/debuginfo-tests/llvm-prettyprinters/gdb/mlir-support.gdb b/cross-project-tests/debuginfo-tests/llvm-prettyprinters/gdb/mlir-support.gdb similarity index 100% rename from debuginfo-tests/llvm-prettyprinters/gdb/mlir-support.gdb rename to cross-project-tests/debuginfo-tests/llvm-prettyprinters/gdb/mlir-support.gdb diff --git a/debuginfo-tests/win_cdb-tests/README.txt b/cross-project-tests/debuginfo-tests/win_cdb-tests/README.txt similarity index 100% rename from debuginfo-tests/win_cdb-tests/README.txt rename to cross-project-tests/debuginfo-tests/win_cdb-tests/README.txt diff --git a/debuginfo-tests/win_cdb-tests/lit.local.cfg.py b/cross-project-tests/debuginfo-tests/win_cdb-tests/lit.local.cfg.py similarity index 100% rename from debuginfo-tests/win_cdb-tests/lit.local.cfg.py rename to cross-project-tests/debuginfo-tests/win_cdb-tests/lit.local.cfg.py diff --git a/debuginfo-tests/lit.cfg.py b/cross-project-tests/lit.cfg.py similarity index 89% rename from debuginfo-tests/lit.cfg.py rename to cross-project-tests/lit.cfg.py index ac46e27d41cbf..9af7361a6633b 100644 --- a/debuginfo-tests/lit.cfg.py +++ b/cross-project-tests/lit.cfg.py @@ -1,5 +1,3 @@ -# -*- Python -*- - import os import platform import re @@ -15,12 +13,9 @@ # Configuration file for the 'lit' test runner. # name: The name of this test suite. -config.name = 'debuginfo-tests' +config.name = 'cross-project-tests' # testFormat: The test format to use to interpret tests. -# -# For now we require '&&' between commands, until they get globally killed and -# the test runner updated. config.test_format = lit.formats.ShTest(not llvm_config.use_lit_shell) # suffixes: A list of file extensions to treat as test files. @@ -32,16 +27,17 @@ config.excludes = ['Inputs'] # test_source_root: The root path where tests are located. -config.test_source_root = os.path.join(config.debuginfo_tests_src_root) +config.test_source_root = config.cross_project_tests_src_root # test_exec_root: The root path where tests should be run. -config.test_exec_root = config.debuginfo_tests_obj_root +config.test_exec_root = config.cross_project_tests_obj_root llvm_config.use_default_substitutions() tools = [ ToolSubst('%test_debuginfo', command=os.path.join( - config.debuginfo_tests_src_root, 'llgdb-tests', 'test_debuginfo.pl')), + config.cross_project_tests_src_root, 'debuginfo-tests', + 'llgdb-tests', 'test_debuginfo.pl')), ToolSubst("%llvm_src_root", config.llvm_src_root), ToolSubst("%llvm_tools_dir", config.llvm_tools_dir), ] @@ -71,11 +67,15 @@ def get_required_attr(config, attr_name): tools.append(ToolSubst('%cdb', '"%s"' % os.path.join(win_sdk, 'Debuggers', arch, 'cdb.exe'))) -# clang_src_dir is not used by these tests, but is required by -# use_clang(), so set it to "". +# clang_src_dir and lld_src_dir are not used by these tests, but are required by +# use_clang() and use_lld() respectively, so set them to "", if needed. if not hasattr(config, 'clang_src_dir'): config.clang_src_dir = "" -llvm_config.use_clang() +llvm_config.use_clang(required=('clang' in config.llvm_enabled_projects)) + +if not hasattr(config, 'lld_src_dir'): + config.lld_src_dir = "" +llvm_config.use_lld(required=('lld' in config.llvm_enabled_projects)) if config.llvm_use_sanitizer: # Propagate path to symbolizer for ASan/MSan. @@ -125,8 +125,8 @@ def can_target_host(): # Produce dexter path, lldb path, and combine into the %dexter substitution # for running a test. -dexter_path = os.path.join(config.debuginfo_tests_src_root, - 'dexter', 'dexter.py') +dexter_path = os.path.join(config.cross_project_tests_src_root, + 'debuginfo-tests', 'dexter', 'dexter.py') dexter_test_cmd = '"{}" "{}" test'.format(sys.executable, dexter_path) if lldb_path is not None: dexter_test_cmd += ' --lldb-executable "{}"'.format(lldb_path) @@ -172,7 +172,6 @@ def can_target_host(): lit.util.usePlatformSdkOnDarwin(config, lit_config) -# available_features: REQUIRES/UNSUPPORTED lit commands look at this list. if platform.system() == 'Darwin': xcode_lldb_vers = subprocess.check_output(['xcrun', 'lldb', '--version']).decode("utf-8") match = re.search('lldb-(\d+)', xcode_lldb_vers) diff --git a/debuginfo-tests/lit.site.cfg.py.in b/cross-project-tests/lit.site.cfg.py.in similarity index 79% rename from debuginfo-tests/lit.site.cfg.py.in rename to cross-project-tests/lit.site.cfg.py.in index bd2cadc71d063..ae009ea04b228 100644 --- a/debuginfo-tests/lit.site.cfg.py.in +++ b/cross-project-tests/lit.site.cfg.py.in @@ -10,11 +10,12 @@ config.llvm_libs_dir = "@LLVM_LIBS_DIR@" config.llvm_shlib_dir = "@SHLIBDIR@" config.lit_tools_dir = "@LLVM_LIT_TOOLS_DIR@" config.llvm_plugin_ext = "@LLVM_PLUGIN_EXT@" -config.debuginfo_tests_obj_root = "@DEBUGINFO_TESTS_BINARY_DIR@" -config.debuginfo_tests_src_root = "@DEBUGINFO_TESTS_SOURCE_DIR@" +config.cross_project_tests_obj_root = "@CROSS_PROJECT_TESTS_BINARY_DIR@" +config.cross_project_tests_src_root = "@CROSS_PROJECT_TESTS_SOURCE_DIR@" config.host_triple = "@LLVM_HOST_TRIPLE@" config.target_triple = "@TARGET_TRIPLE@" config.is_msvc = lit.util.pythonize_bool("@MSVC@") +config.llvm_enabled_projects = "@LLVM_ENABLE_PROJECTS@".split(";") config.mlir_src_root = "@MLIR_SOURCE_DIR@" @@ -34,4 +35,4 @@ import lit.llvm lit.llvm.initialize(lit_config, config) # Let the main config do the real work. -lit_config.load_config(config, "@DEBUGINFO_TESTS_SOURCE_DIR@/lit.cfg.py") +lit_config.load_config(config, "@CROSS_PROJECT_TESTS_SOURCE_DIR@/lit.cfg.py") diff --git a/debuginfo-tests/CMakeLists.txt b/debuginfo-tests/CMakeLists.txt deleted file mode 100644 index 0b01202a0bd0e..0000000000000 --- a/debuginfo-tests/CMakeLists.txt +++ /dev/null @@ -1,74 +0,0 @@ -# Debug Info tests. These tests invoke clang to generate programs with -# various types of debug info, and then run those programs under a debugger -# such as GDB or LLDB to verify the results. - -find_package(Python3 COMPONENTS Interpreter) - -add_llvm_executable(check-gdb-llvm-support - llvm-prettyprinters/gdb/llvm-support.cpp -) -target_link_libraries(check-gdb-llvm-support PRIVATE LLVMSupport) - -set(DEBUGINFO_TESTS_SOURCE_DIR ${CMAKE_CURRENT_SOURCE_DIR}) -set(DEBUGINFO_TESTS_BINARY_DIR ${CMAKE_CURRENT_BINARY_DIR}) - -set(DEBUGINFO_TEST_DEPS - clang - FileCheck - count - llvm-config - llvm-objdump - check-gdb-llvm-support - not - ) - -if ("mlir" IN_LIST LLVM_ENABLE_PROJECTS) - add_llvm_executable(check-gdb-mlir-support - llvm-prettyprinters/gdb/mlir-support.cpp - ) - target_include_directories(check-gdb-mlir-support PRIVATE - ${LLVM_EXTERNAL_MLIR_SOURCE_DIR}/include - ${LLVM_BINARY_DIR}/tools/mlir/include) - target_link_libraries(check-gdb-mlir-support PRIVATE MLIRIR) - list(APPEND DEBUGINFO_TEST_DEPS check-gdb-mlir-support) - set(MLIR_SOURCE_DIR ${LLVM_EXTERNAL_MLIR_SOURCE_DIR}) -endif() - -if("compiler-rt" IN_LIST LLVM_ENABLE_PROJECTS) - # llgdb-tests/asan.c and other asan* files. - if(TARGET asan) - list(APPEND DEBUGINFO_TEST_DEPS asan) - endif() - # llgdb-tests/safestack.c - if(TARGET safestack) - list(APPEND DEBUGINFO_TEST_DEPS safestack) - endif() -endif() -# Many dexter tests depend on lldb. -if("lldb" IN_LIST LLVM_ENABLE_PROJECTS) - list(APPEND DEBUGINFO_TEST_DEPS lldb lldb-server) -endif() - -# The Windows builder scripts pass -fuse-ld=lld. -if (WIN32) - set(DEBUGINFO_TEST_DEPS ${DEBUGINFO_TEST_DEPS} lld) -endif() - -configure_lit_site_cfg( - ${CMAKE_CURRENT_SOURCE_DIR}/lit.site.cfg.py.in - ${CMAKE_CURRENT_BINARY_DIR}/lit.site.cfg.py - MAIN_CONFIG - ${CMAKE_CURRENT_SOURCE_DIR}/lit.cfg.py - ) - -add_lit_testsuite(check-debuginfo "Running debug info integration tests" - ${CMAKE_CURRENT_BINARY_DIR} - DEPENDS ${DEBUGINFO_TEST_DEPS} - ) - -# Add check-debuginfo-* targets. -add_lit_testsuites(DEBUGINFO ${CMAKE_CURRENT_SOURCE_DIR} - DEPENDS ${DEBUGINFO_TEST_DEPS} - ) - -set_target_properties(check-debuginfo PROPERTIES FOLDER "Debug info tests") diff --git a/flang/docs/FlangDriver.md b/flang/docs/FlangDriver.md new file mode 100644 index 0000000000000..514cf47d25682 --- /dev/null +++ b/flang/docs/FlangDriver.md @@ -0,0 +1,247 @@ + + +# Flang drivers + +```eval_rst +.. contents:: + :local: +``` + +There are two main drivers in Flang: +* the compiler driver, `flang-new` +* the frontend driver, `flang-new -fc1` + +The compiler driver will allow you to control all compilation phases (i.e. +preprocessing, frontend code-generation, middlend/backend code-optimisation and +lowering, linking). For frontend specific tasks, the compiler driver creates a +Fortran compilation job and delegates it to `flang-new -fc1`, the frontend driver. + +The frontend driver glues all of the frontend libraries together and provides +an easy-to-use and intuitive interface to the frontend. It accepts many +frontend-specific options not available in `flang-new` and as such it provides a +finer control over the frontend. Similarly to `-Xclang` in `clang`, you can use +`-Xflang` to forward the frontend specific flags from the compiler directly to +the frontend driver. + +## Compiler Driver + +The main entry point for Flang's compiler driver is implemented in +`flang/tools/flang-driver/driver.cpp`. Flang's compiler driver is implemented +in terms of Clang's driver library, `clangDriver`. This approach allows us to: +* benefit from Clang's support for various targets, platforms and operating systems +* leverage Clang's ability to drive various backends available in LLVM, as well + as linkers and assemblers. +One implication of this dependency on Clang is that all of Flang's compiler +options are defined alongside Clang's options in +`clang/include/clang/Driver/Options.td`. For options that are common for both +Flang and Clang, the corresponding definitions are shared. + +Internally, a `clangDriver` based compiler driver works by creating actions +that correspond to various compilation phases, e.g. `PreprocessJobClass`, +`CompileJobClass`, `BackendJobClass` or `LinkJobClass` from the +`clang::driver::Action::ActionClass` enum. There are also other, more +specialised actions, e.g. `MigrateJobClass` or `InputClass`, that do not map +directly to common compilation steps. The actions to run are determined from +the supplied compiler flags, e.g. + +* `-E` for `PreprocessJobClass`, +* `-c` for `CompileJobClass`. + +In most cases, the driver creates a chain of actions/jobs/phases where the +output from one action is the input for the subsequent one. You can use the +`-ccc-print-phases` flag to see the sequence of actions that the driver will +create for your compiler invocation: +```bash +flang-new -ccc-print-phases -E file.f ++- 0: input, "file.f", f95-cpp-input +1: preprocessor, {0}, f95 +``` +As you can see, for `-E` the driver creates only two jobs and stops immediately +after preprocessing. The first job simply prepares the input. For `-c`, the +pipeline of the created jobs is more complex: +```bash +flang-new -ccc-print-phases -c file.f + +- 0: input, "file.f", f95-cpp-input + +- 1: preprocessor, {0}, f95 + +- 2: compiler, {1}, ir ++- 3: backend, {2}, assembler +4: assembler, {3}, object +``` +Note that currently Flang does not support code-generation and `flang-new` will +fail during the second step above with the following error: +```bash +error: code-generation is not available yet +``` +The other phases are printed nonetheless when using `-ccc-print-phases`, as +that reflects what `clangDriver`, the library, will try to create and run. + +For actions specific to the frontend (e.g. preprocessing or code generation), a +command to call the frontend driver is generated (more specifically, an +instance of `clang::driver::Command`). Every command is bound to an instance of +`clang::driver::Tool`. For Flang we introduced a specialisation of this class: +`clang::driver::Flang`. This class implements the logic to either translate or +forward compiler options to the frontend driver, `flang-new -fc1`. + +You can read more on the design of `clangDriver` in Clang's [Driver Design & +Internals](https://clang.llvm.org/docs/DriverInternals.html). + +## Frontend Driver +Flang's frontend driver is the main interface between end-users and the Flang +frontend. The high-level design is similar to Clang's frontend driver, `clang +-cc1` and consists of the following classes: +* `CompilerInstance`, which is a helper class that encapsulates and manages + various objects that are always required by the frontend (e.g. `AllSources`, + `AllCookedSources, `Parsing`, `CompilerInvocation`, etc.). In most cases + `CompilerInstance` owns these objects, but it also can share them with its + clients when required. It also implements utility methods to construct and + manipulate them. +* `CompilerInvocation` encapsulates the configuration of the current + invocation of the compiler as derived from the command-line options and the + input files (in particular, file extensions). Among other things, it holds an + instance of `FrontendOptions`. Like `CompilerInstance`, it owns the objects + that it manages. It can share them with its clients that want to access them + even after the corresponding `CompilerInvocation` has been destructed. +* `FrontendOptions` holds options that control the behaviour of the frontend, + as well as e.g. the list of the input files. These options come either + directly from the users (through command-line flags) or are derived from + e.g. the host system configuration. +* `FrontendAction` and `FrontendActions` (the former being the base class for + the latter) implement the actual actions to perform by the frontend. Usually + there is one specialisation of `FrontendActions` for every compiler action flag + (e.g. `-E`, `-fdebug-unparse`). These classes also contain various hooks that + allow you to e.g. fine-tune the configuration of the frontend based on the + input. + +This list is not exhaustive and only covers the main classes that implement the +driver. The main entry point for the frontend driver, `fc1_main`, is +implemented in `flang/tools/flang-driver/driver.cpp`. It can be accessed by +invoking the compiler driver, `flang-new`, with the `-fc1` flag. + +The frontend driver will only run one action at a time. If you specify multiple +action flags, only the last one will be taken into account. The default action +is `ParseSyntaxOnlyAction`, which corresponds to `-fsyntax-only`. In other +words, `flang-new -fc1 ` is equivalent to `flang-new -fc1 -fsyntax-only +`. + +## Adding new Compiler Options +Adding a new compiler option in Flang consists of two steps: +* define the new option in a dedicated TableGen file, +* parse and implement the option in the relevant drivers that support it. + +### Option Definition +All of Flang's compiler and frontend driver options are defined in +`clang/include/clang/Driver/Options.td` in Clang. When adding a new option to +Flang, you will either: + * extend the existing definition for an option that is already available + in one of Clang's drivers (e.g. `clang`), but not yet available in Flang, or + * add a completely new definition if the option that you are adding has not + been defined yet. + +There are many predefined TableGen classes and records that you can use to fine +tune your new option. The list of available configurations can be overwhelming +at times. Sometimes the easiest approach is to find an existing option that has +similar semantics to your new option and start by copying that. + +For every new option, you will also have to define the visibility of the new +option. This is controlled through the `Flags` field. You can use the following +Flang specific option flags to control this: + * `FlangOption` - this option will be available in the `flang-new` compiler driver, + * `FC1Option` - this option will be available in the `flang-new -fc1` frontend driver, + * `FlangOnlyOption` - this option will not be visible in Clang drivers. + +Please make sure that options that you add are only visible in drivers that can +support it. For example, options that only make sense for Fortran input files +(e.g. `-ffree-form`) should not be visible in Clang and be marked as +`FlangOnlyOption`. + +When deciding what `OptionGroup` to use when defining a new option in the +`Options.td` file, many new options fall into one of the following two +categories: + * `Action_Group` - options that define an action to run (e.g. + `-fsyntax-only`, `-E`) + * `f_Group` - target independent compiler flags (e.g. `-ffixed-form`, + `-fopenmp`) +There are also other groups and occasionally you will use them instead of the +groups listed above. + +### Option Implementation +First, every option needs to be parsed. Flang compiler options are parsed in +two different places, depending on which driver they belong to: + +* frontend driver: `flang/lib/Frontend/CompilerInvocation.cpp`, +* compiler driver: `clang/lib/Driver/ToolChains/Flang.cpp`. + +The parsing will depend on the semantics encoded in the TableGen definition. + +When adding a compiler driver option (i.e. an option that contains +`FlangOption` among its `Flags`) that you also intend to be understood by the +frontend, make sure that it is either forwarded to `flang-new -fc1` or translated +into some other option that is accepted by the frontend driver. In the case of +options that contain both `FlangOption` and `FC1Option` among its flags, we +usually just forward from `flang-new` to `flang-new -fc1`. This is then tested in +`flang/test/Driver/frontend-forward.F90`. + +What follows is usually very dependant on the meaning of the corresponding +option. In general, regular compiler flags (e.g. `-ffree-form`) are mapped to +some state within the driver. A lot of this state is stored within an instance +of `FrontendOptions`, but there are other more specialised classes too. Action +flags (e.g. `-fsyntax-only`) are usually more complex overall, but also more +structured in terms of the implementation. + +### Action Options +For options that correspond to an action (i.e. marked as `Action_Group`), you +will have to define a dedicated instance of `FrontendActions` in +`flang/include/flang/Frontend/FrontendOptions.h`. For example, for +`-fsyntax-only` we defined: +```cpp +class ParseSyntaxOnlyAction : public PrescanAndSemaAction { + void ExecuteAction() override; +}; +``` +Command line options are mapped to frontend actions through the +`Fortran::frontend::ActionKind` enum. For every new action option that you +add, you will have to add a dedicated entry in that enum (e.g. +`ParseSyntaxOnly` for `-fsyntax-only`) and a corresponding `case` in +`ParseFrontendArgs` function in the `CompilerInvocation.cpp` file, e.g.: +```cpp + case clang::driver::options::OPT_fsyntax_only: + opts.programAction_ = ParseSyntaxOnly; + break; +``` +Note that this simply sets the program/frontend action within the frontend +driver. You still have make sure that the corresponding frontend action class +is instantiated when your new action option is used. The relevant `switch` +statement is implemented in `Fortran::frontend::CreatedFrontendBaseAction` in +the `ExecuteCompilerInvocation.cpp` file. Here's an example for +`-fsyntax-only`: +```cpp + case ParseSyntaxOnly: + return std::make_unique(); +``` +At this point you should be able to trigger that frontend action that you have +just added using your new frontend option. + +# Testing +In LIT, we define two variables that you can use to invoke Flang's drivers: +* `%flang` is expanded as `flang-new` (i.e. the compiler driver) +* `%flang_fc1` is expanded as `flang-new -fc1` (i.e. the frontend driver) + +For most regression tests for the frontend, you will want to use `%flang_fc1`. +In some cases, the observable behaviour will be identical regardless of whether +`%flang` or `%flang_fc1` is used. However, when you are using `%flang` instead +of `%flang_fc1`, the compiler driver will add extra flags to the frontend +driver invocation (i.e. `flang-new -fc1 -`). In some cases that might +be exactly what you want to test. In fact, you can check these additional +flags by using the `-###` compiler driver command line option. + +Lastly, you can use `! REQUIRES: ` for tests that will only work when +`` is available. For example, you can use`! REQUIRES: shell` to mark a +test as only available on Unix-like systems (i.e. systems that contain a Unix +shell). In practice this means that the corresponding test is skipped on +Windows. diff --git a/flang/docs/FortranLLVMTestSuite.md b/flang/docs/FortranLLVMTestSuite.md index ee7ce42928103..46a8fe4f63424 100644 --- a/flang/docs/FortranLLVMTestSuite.md +++ b/flang/docs/FortranLLVMTestSuite.md @@ -21,18 +21,18 @@ code-generation capabilities. Fortran support can be enabled by setting the following CMake variables: ``` -% cmake -DCMAKE_Fortran_COMPILER= \ - -DTEST_SUITE_FORTRAN:STRING=ON \ - -C../test-suite/cmake/caches/O3.cmake \ - ../test-suite +cmake -G "Ninja" -DCMAKE_C_COMPILER= \ + -DCMAKE_CXX_COMPILER= \ + -DCMAKE_Fortran_COMPILER= \ + -DTEST_SUITE_COLLECT_CODE_SIZE:STRING=OFF \ + -DTEST_SUITE_SUBDIRS:STRING="Fortran" \ + -DTEST_SUITE_FORTRAN:STRING=ON .. ``` -At the moment, there is only a "hello world" Fortran test. A current -shortcoming in the design of the test suite is that building the C/C++ -tests is conflated with building and running the Fortran tests, -i.e. it is not possible to only build and run the Fortran tests with -the exception of the [External -tests](https://llvm.org/docs/TestSuiteGuide.html#external-suites). +This will configure the test-suite to run only the Fortran tests which +are found in the Fortran subdirectory. To run the C/C++ tests +alongside the Fortran tests omit the `-DTEST_SUITE_SUBDIRS` CMake +variable. ## Running the SPEC CPU 2017 diff --git a/flang/include/flang/Common/format.h b/flang/include/flang/Common/format.h index 99b8cbe41d7cf..e38ea6b0dfedf 100644 --- a/flang/include/flang/Common/format.h +++ b/flang/include/flang/Common/format.h @@ -136,11 +136,11 @@ template class FormatValidator { const CHAR *cursor_{}; // current location in format_ const CHAR *laCursor_{}; // lookahead cursor Token token_{}; // current token + TokenKind previousTokenKind_{TokenKind::None}; int64_t integerValue_{-1}; // value of UnsignedInteger token Token knrToken_{}; // k, n, or r UnsignedInteger token int64_t knrValue_{-1}; // -1 ==> not present int64_t wValue_{-1}; - bool previousTokenWasInt_{false}; char argString_[3]{}; // 1-2 character msg arg; usually edit descriptor name bool formatHasErrors_{false}; bool unterminatedFormatError_{false}; @@ -179,7 +179,7 @@ template void FormatValidator::NextToken() { // At entry, cursor_ points before the start of the next token. // At exit, cursor_ points to last CHAR of token_. - previousTokenWasInt_ = token_.kind() == TokenKind::UnsignedInteger; + previousTokenKind_ = token_.kind(); CHAR c{NextChar()}; token_.set_kind(TokenKind::None); token_.set_offset(cursor_ - format_); @@ -416,7 +416,8 @@ template void FormatValidator::NextToken() { } } SetLength(); - if (stmt_ == IoStmtKind::Read) { // 13.3.2p6 + if (stmt_ == IoStmtKind::Read && + previousTokenKind_ != TokenKind::DT) { // 13.3.2p6 ReportError("String edit descriptor in READ format expression"); } else if (token_.kind() != TokenKind::String) { ReportError("Unterminated string"); @@ -829,7 +830,8 @@ template bool FormatValidator::Check() { // Possible first token of the next format item; token not yet processed. if (commaRequired) { const char *s{"Expected ',' or ')' in format expression"}; // C1302 - if (previousTokenWasInt_ && itemsWithLeadingInts_.test(token_.kind())) { + if (previousTokenKind_ == TokenKind::UnsignedInteger && + itemsWithLeadingInts_.test(token_.kind())) { ReportError(s); } else { ReportWarning(s); diff --git a/flang/lib/Evaluate/intrinsics.cpp b/flang/lib/Evaluate/intrinsics.cpp index c8d8b02d58abc..5e305055b6913 100644 --- a/flang/lib/Evaluate/intrinsics.cpp +++ b/flang/lib/Evaluate/intrinsics.cpp @@ -1355,6 +1355,7 @@ std::optional IntrinsicInterface::Match( // Check the ranks of the arguments against the intrinsic's interface. const ActualArgument *arrayArg{nullptr}; + const char *arrayArgName{nullptr}; const ActualArgument *knownArg{nullptr}; std::optional shapeArgSize; int elementalRank{0}; @@ -1411,6 +1412,7 @@ std::optional IntrinsicInterface::Match( argOk = rank > 0; if (!arrayArg) { arrayArg = arg; + arrayArgName = d.keyword; } else { argOk &= rank == arrayArg->Rank(); } @@ -1424,9 +1426,22 @@ std::optional IntrinsicInterface::Match( case Rank::anyOrAssumedRank: argOk = true; break; - case Rank::conformable: + case Rank::conformable: // arg must be conformable with previous arrayArg CHECK(arrayArg); - argOk = rank == 0 || rank == arrayArg->Rank(); + CHECK(arrayArgName); + if (const std::optional &arrayArgShape{ + GetShape(context, *arrayArg)}) { + if (const std::optional &argShape{GetShape(context, *arg)}) { + std::string arrayArgMsg{"'"}; + arrayArgMsg = arrayArgMsg + arrayArgName + "='" + " argument"; + std::string argMsg{"'"}; + argMsg = argMsg + d.keyword + "='" + " argument"; + CheckConformance(context.messages(), *arrayArgShape, *argShape, + CheckConformanceFlags::RightScalarExpandable, + arrayArgMsg.c_str(), argMsg.c_str()); + } + } + argOk = true; // Avoid an additional error message break; case Rank::dimReduced: case Rank::dimRemovedOrScalar: diff --git a/flang/lib/Frontend/FrontendActions.cpp b/flang/lib/Frontend/FrontendActions.cpp index 8ee42d73c6e46..fae058468275b 100644 --- a/flang/lib/Frontend/FrontendActions.cpp +++ b/flang/lib/Frontend/FrontendActions.cpp @@ -257,8 +257,12 @@ void DebugUnparseAction::ExecuteAction() { auto &invoc = this->instance().invocation(); auto &parseTree{instance().parsing().parseTree()}; + CompilerInstance &ci = this->instance(); + auto os{ci.CreateDefaultOutputFile( + /*Binary=*/false, /*InFile=*/GetCurrentFileOrBufferName())}; + // TODO: Options should come from CompilerInvocation - Unparse(llvm::outs(), *parseTree, + Unparse(*os, *parseTree, /*encoding=*/Fortran::parser::Encoding::UTF_8, /*capitalizeKeywords=*/true, /*backslashEscapes=*/false, /*preStatement=*/nullptr, diff --git a/flang/lib/Semantics/check-declarations.cpp b/flang/lib/Semantics/check-declarations.cpp index 5d063f14499a3..b57d19b8a62e5 100644 --- a/flang/lib/Semantics/check-declarations.cpp +++ b/flang/lib/Semantics/check-declarations.cpp @@ -1797,9 +1797,15 @@ void CheckHelper::CheckAlreadySeenDefinedIo(const DerivedTypeSpec *derivedType, void CheckHelper::CheckDioDummyIsDerived( const Symbol &subp, const Symbol &arg, GenericKind::DefinedIo ioKind) { if (const DeclTypeSpec * type{arg.GetType()}) { - const DerivedTypeSpec *derivedType{type->AsDerived()}; - if (derivedType) { + if (const DerivedTypeSpec * derivedType{type->AsDerived()}) { CheckAlreadySeenDefinedIo(derivedType, ioKind, subp); + bool isPolymorphic{type->IsPolymorphic()}; + if (isPolymorphic != IsExtensibleType(derivedType)) { + messages_.Say(arg.name(), + "Dummy argument '%s' of a defined input/output procedure must be %s when the derived type is %s"_err_en_US, + arg.name(), isPolymorphic ? "TYPE()" : "CLASS()", + isPolymorphic ? "not extensible" : "extensible"); + } } else { messages_.Say(arg.name(), "Dummy argument '%s' of a defined input/output procedure must have a" diff --git a/flang/runtime/CMakeLists.txt b/flang/runtime/CMakeLists.txt index 5f4bbc73c23d2..1f7e3d14728a4 100644 --- a/flang/runtime/CMakeLists.txt +++ b/flang/runtime/CMakeLists.txt @@ -40,6 +40,7 @@ add_flang_library(FortranRuntime connection.cpp derived.cpp descriptor.cpp + descriptor-io.cpp dot-product.cpp edit-input.cpp edit-output.cpp diff --git a/flang/runtime/connection.h b/flang/runtime/connection.h index 6eb6b62ccab7e..6d0678f18abfa 100644 --- a/flang/runtime/connection.h +++ b/flang/runtime/connection.h @@ -49,7 +49,6 @@ struct ConnectionState : public ConnectionAttributes { std::int64_t currentRecordNumber{1}; // 1 is first std::int64_t positionInRecord{0}; // offset in current record std::int64_t furthestPositionInRecord{0}; // max(position+bytes) - bool nonAdvancing{false}; // ADVANCE='NO' // Set at end of non-advancing I/O data transfer std::optional leftTabLimit; // offset in current record diff --git a/flang/runtime/derived.cpp b/flang/runtime/derived.cpp index ef4bddc8a4669..4875ef2a4bc57 100644 --- a/flang/runtime/derived.cpp +++ b/flang/runtime/derived.cpp @@ -20,9 +20,9 @@ static const typeInfo::SpecialBinding *FindFinal( for (std::size_t j{0}; j < totalSpecialBindings; ++j) { const auto &special{ *specialDesc.ZeroBasedIndexedElement(j)}; - switch (special.which) { + switch (special.which()) { case typeInfo::SpecialBinding::Which::Final: - if (special.rank == rank) { + if (special.rank() == rank) { return &special; } break; @@ -40,20 +40,20 @@ static const typeInfo::SpecialBinding *FindFinal( static void CallFinalSubroutine( const Descriptor &descriptor, const typeInfo::DerivedType &derived) { if (const auto *special{FindFinal(derived, descriptor.rank())}) { - if (special->which == typeInfo::SpecialBinding::Which::ElementalFinal) { + if (special->which() == typeInfo::SpecialBinding::Which::ElementalFinal) { std::size_t byteStride{descriptor.ElementBytes()}; - auto p{reinterpret_cast(special->proc)}; + auto *p{special->GetProc()}; // Finalizable objects must be contiguous. std::size_t elements{descriptor.Elements()}; for (std::size_t j{0}; j < elements; ++j) { p(descriptor.OffsetElement(j * byteStride)); } - } else if (special->isArgDescriptorSet & 1) { - auto p{reinterpret_cast(special->proc)}; + } else if (special->IsArgDescriptor(0)) { + auto *p{special->GetProc()}; p(descriptor); } else { // Finalizable objects must be contiguous. - auto p{reinterpret_cast(special->proc)}; + auto *p{special->GetProc()}; p(descriptor.OffsetElement()); } } diff --git a/flang/runtime/descriptor-io.cpp b/flang/runtime/descriptor-io.cpp new file mode 100644 index 0000000000000..2e552b7c5228e --- /dev/null +++ b/flang/runtime/descriptor-io.cpp @@ -0,0 +1,106 @@ +//===-- runtime/descriptor-io.cpp -----------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "descriptor-io.h" + +namespace Fortran::runtime::io::descr { + +// User-defined derived type formatted I/O (maybe) +std::optional DefinedFormattedIo(IoStatementState &io, + const Descriptor &descriptor, const typeInfo::SpecialBinding &special) { + std::optional peek{io.GetNextDataEdit(0 /*to peek at it*/)}; + if (peek && + (peek->descriptor == DataEdit::DefinedDerivedType || + peek->descriptor == DataEdit::ListDirected)) { + // User-defined derived type formatting + IoErrorHandler &handler{io.GetIoErrorHandler()}; + DataEdit edit{*io.GetNextDataEdit()}; // consume it this time + RUNTIME_CHECK(handler, edit.descriptor == peek->descriptor); + char ioType[2 + edit.maxIoTypeChars]; + auto ioTypeLen{std::size_t{2} /*"DT"*/ + edit.ioTypeChars}; + if (edit.descriptor == DataEdit::DefinedDerivedType) { + ioType[0] = 'D'; + ioType[1] = 'T'; + std::memcpy(ioType + 2, edit.ioType, edit.ioTypeChars); + } else { + std::strcpy( + ioType, io.mutableModes().inNamelist ? "NAMELIST" : "LISTDIRECTED"); + ioTypeLen = std::strlen(ioType); + } + StaticDescriptor<0, true> statDesc; + Descriptor &vListDesc{statDesc.descriptor()}; + vListDesc.Establish(TypeCategory::Integer, sizeof(int), nullptr, 1); + vListDesc.set_base_addr(edit.vList); + vListDesc.GetDimension(0).SetBounds(1, edit.vListEntries); + vListDesc.GetDimension(0).SetByteStride( + static_cast(sizeof(int))); + ExternalFileUnit *actualExternal{io.GetExternalFileUnit()}; + ExternalFileUnit *external{actualExternal}; + if (!external) { + // Create a new unit to service defined I/O for an + // internal I/O parent. + external = &ExternalFileUnit::NewUnit(handler, true); + } + ChildIo &child{external->PushChildIo(io)}; + int unit{external->unitNumber()}; + int ioStat{IostatOk}; + char ioMsg[100]; + if (special.IsArgDescriptor(0)) { + auto *p{special.GetProc()}; + p(descriptor, unit, ioType, vListDesc, ioStat, ioMsg, ioTypeLen, + sizeof ioMsg); + } else { + auto *p{special.GetProc()}; + p(descriptor.raw().base_addr, unit, ioType, vListDesc, ioStat, ioMsg, + ioTypeLen, sizeof ioMsg); + } + handler.Forward(ioStat, ioMsg, sizeof ioMsg); + external->PopChildIo(child); + if (!actualExternal) { + // Close unit created for internal I/O above. + auto *closing{external->LookUpForClose(external->unitNumber())}; + RUNTIME_CHECK(handler, external == closing); + external->DestroyClosed(); + } + return handler.GetIoStat() == IostatOk; + } else { + // There's a user-defined I/O subroutine, but there's a FORMAT present and + // it does not have a DT data edit descriptor, so apply default formatting + // to the components of the derived type as usual. + return std::nullopt; + } +} + +// User-defined derived type unformatted I/O +bool DefinedUnformattedIo(IoStatementState &io, const Descriptor &descriptor, + const typeInfo::SpecialBinding &special) { + // Unformatted I/O must have an external unit (or child thereof). + IoErrorHandler &handler{io.GetIoErrorHandler()}; + ExternalFileUnit *external{io.GetExternalFileUnit()}; + RUNTIME_CHECK(handler, external != nullptr); + ChildIo &child{external->PushChildIo(io)}; + int unit{external->unitNumber()}; + int ioStat{IostatOk}; + char ioMsg[100]; + if (special.IsArgDescriptor(0)) { + auto *p{special.GetProc()}; + p(descriptor, unit, ioStat, ioMsg, sizeof ioMsg); + } else { + auto *p{special.GetProc()}; + p(descriptor.raw().base_addr, unit, ioStat, ioMsg, sizeof ioMsg); + } + handler.Forward(ioStat, ioMsg, sizeof ioMsg); + external->PopChildIo(child); + return handler.GetIoStat() == IostatOk; +} + +} // namespace Fortran::runtime::io::descr diff --git a/flang/runtime/descriptor-io.h b/flang/runtime/descriptor-io.h index 09d068612325b..2ebb449e46d11 100644 --- a/flang/runtime/descriptor-io.h +++ b/flang/runtime/descriptor-io.h @@ -10,6 +10,9 @@ #define FORTRAN_RUNTIME_DESCRIPTOR_IO_H_ // Implementation of I/O data list item transfers based on descriptors. +// (All I/O items come through here so that the code is exercised for test; +// some scalar I/O data transfer APIs could be changed to bypass their use +// of descriptors in the future for better efficiency.) #include "cpp-type.h" #include "descriptor.h" @@ -18,6 +21,7 @@ #include "io-stmt.h" #include "terminator.h" #include "type-info.h" +#include "unit.h" #include "flang/Common/uint128.h" namespace Fortran::runtime::io::descr { @@ -243,92 +247,130 @@ static bool DefaultFormattedComponentIO(IoStatementState &io, } } +std::optional DefinedFormattedIo( + IoStatementState &, const Descriptor &, const typeInfo::SpecialBinding &); + template static bool FormattedDerivedTypeIO( IoStatementState &io, const Descriptor &descriptor) { - Terminator &terminator{io.GetIoErrorHandler()}; + IoErrorHandler &handler{io.GetIoErrorHandler()}; + // Derived type information must be present for formatted I/O. const DescriptorAddendum *addendum{descriptor.Addendum()}; - RUNTIME_CHECK(terminator, addendum != nullptr); + RUNTIME_CHECK(handler, addendum != nullptr); const typeInfo::DerivedType *type{addendum->derivedType()}; - RUNTIME_CHECK(terminator, type != nullptr); - if (false) { - // TODO: user-defined derived type formatted I/O - } else { - // Default derived type formatting - const Descriptor &compArray{type->component()}; - RUNTIME_CHECK(terminator, compArray.rank() == 1); - std::size_t numComponents{compArray.Elements()}; - std::size_t numElements{descriptor.Elements()}; - SubscriptValue subscripts[maxRank]; - descriptor.GetLowerBounds(subscripts); - for (std::size_t j{0}; j < numElements; - ++j, descriptor.IncrementSubscripts(subscripts)) { - SubscriptValue at[maxRank]; - compArray.GetLowerBounds(at); - for (std::size_t k{0}; k < numComponents; - ++k, compArray.IncrementSubscripts(at)) { - const typeInfo::Component &component{ - *compArray.Element(at)}; - if (!DefaultFormattedComponentIO( - io, component, descriptor, subscripts, terminator)) { - return false; - } + RUNTIME_CHECK(handler, type != nullptr); + if (const typeInfo::SpecialBinding * + special{type->FindSpecialBinding(DIR == Direction::Input + ? typeInfo::SpecialBinding::Which::ReadFormatted + : typeInfo::SpecialBinding::Which::WriteFormatted)}) { + if (std::optional wasDefined{ + DefinedFormattedIo(io, descriptor, *special)}) { + return *wasDefined; // user-defined I/O was applied + } + } + // Default componentwise derived type formatting + const Descriptor &compArray{type->component()}; + RUNTIME_CHECK(handler, compArray.rank() == 1); + std::size_t numComponents{compArray.Elements()}; + std::size_t numElements{descriptor.Elements()}; + SubscriptValue subscripts[maxRank]; + descriptor.GetLowerBounds(subscripts); + for (std::size_t j{0}; j < numElements; + ++j, descriptor.IncrementSubscripts(subscripts)) { + SubscriptValue at[maxRank]; + compArray.GetLowerBounds(at); + for (std::size_t k{0}; k < numComponents; + ++k, compArray.IncrementSubscripts(at)) { + const typeInfo::Component &component{ + *compArray.Element(at)}; + if (!DefaultFormattedComponentIO( + io, component, descriptor, subscripts, handler)) { + return false; } } } return true; } +bool DefinedUnformattedIo( + IoStatementState &, const Descriptor &, const typeInfo::SpecialBinding &); + +// Unformatted I/O template -static bool DescriptorIO(IoStatementState &io, const Descriptor &descriptor) { - if (!io.get_if>()) { - io.GetIoErrorHandler().Crash( - "DescriptorIO() called for wrong I/O direction"); - return false; - } - if constexpr (DIR == Direction::Input) { - if (!io.BeginReadingRecord()) { - return false; - } - } - if (auto *unf{io.get_if>()}) { +static bool UnformattedDescriptorIO( + IoStatementState &io, const Descriptor &descriptor) { + IoErrorHandler &handler{io.GetIoErrorHandler()}; + const DescriptorAddendum *addendum{descriptor.Addendum()}; + const typeInfo::DerivedType *type{ + addendum ? addendum->derivedType() : nullptr}; + if (const typeInfo::SpecialBinding * + special{type + ? type->FindSpecialBinding(DIR == Direction::Input + ? typeInfo::SpecialBinding::Which::ReadUnformatted + : typeInfo::SpecialBinding::Which::WriteUnformatted) + : nullptr}) { + // User-defined derived type unformatted I/O + return DefinedUnformattedIo(io, descriptor, *special); + } else { + // Regular derived type unformatted I/O, not user-defined + auto *externalUnf{io.get_if>()}; + auto *childUnf{io.get_if>()}; + RUNTIME_CHECK(handler, externalUnf != nullptr || childUnf != nullptr); std::size_t elementBytes{descriptor.ElementBytes()}; + std::size_t numElements{descriptor.Elements()}; SubscriptValue subscripts[maxRank]; descriptor.GetLowerBounds(subscripts); - std::size_t numElements{descriptor.Elements()}; - if (false) { - // TODO: user-defined derived type unformatted I/O - } else if (descriptor.IsContiguous()) { // contiguous unformatted I/O - char &x{ExtractElement(io, descriptor, subscripts)}; - auto totalBytes{numElements * elementBytes}; + using CharType = + std::conditional_t; + auto Transfer{[=](CharType &x, std::size_t totalBytes, + std::size_t elementBytes) -> bool { if constexpr (DIR == Direction::Output) { - return unf->Emit(&x, totalBytes, elementBytes); + return externalUnf ? externalUnf->Emit(&x, totalBytes, elementBytes) + : childUnf->Emit(&x, totalBytes, elementBytes); } else { - return unf->Receive(&x, totalBytes, elementBytes); + return externalUnf ? externalUnf->Receive(&x, totalBytes, elementBytes) + : childUnf->Receive(&x, totalBytes, elementBytes); } + }}; + if (descriptor.IsContiguous()) { // contiguous unformatted I/O + char &x{ExtractElement(io, descriptor, subscripts)}; + return Transfer(x, numElements * elementBytes, elementBytes); } else { // non-contiguous unformatted I/O for (std::size_t j{0}; j < numElements; ++j) { char &x{ExtractElement(io, descriptor, subscripts)}; - if constexpr (DIR == Direction::Output) { - if (!unf->Emit(&x, elementBytes, elementBytes)) { - return false; - } - } else { - if (!unf->Receive(&x, elementBytes, elementBytes)) { - return false; - } + if (!Transfer(x, elementBytes, elementBytes)) { + return false; } if (!descriptor.IncrementSubscripts(subscripts) && j + 1 < numElements) { - io.GetIoErrorHandler().Crash( - "DescriptorIO: subscripts out of bounds"); + handler.Crash("DescriptorIO: subscripts out of bounds"); } } return true; } - } else if (auto catAndKind{descriptor.type().GetCategoryAndKind()}) { + } +} + +template +static bool DescriptorIO(IoStatementState &io, const Descriptor &descriptor) { + if (!io.get_if>()) { + io.GetIoErrorHandler().Crash( + "DescriptorIO() called for wrong I/O direction"); + return false; + } + if constexpr (DIR == Direction::Input) { + if (!io.BeginReadingRecord()) { + return false; + } + } + if (!io.get_if()) { + return UnformattedDescriptorIO(io, descriptor); + } + IoErrorHandler &handler{io.GetIoErrorHandler()}; + if (auto catAndKind{descriptor.type().GetCategoryAndKind()}) { + TypeCategory cat{catAndKind->first}; int kind{catAndKind->second}; - switch (catAndKind->first) { + switch (cat) { case TypeCategory::Integer: switch (kind) { case 1: @@ -347,7 +389,7 @@ static bool DescriptorIO(IoStatementState &io, const Descriptor &descriptor) { return FormattedIntegerIO, DIR>( io, descriptor); default: - io.GetIoErrorHandler().Crash( + handler.Crash( "DescriptorIO: Unimplemented INTEGER kind (%d) in descriptor", kind); return false; @@ -368,7 +410,7 @@ static bool DescriptorIO(IoStatementState &io, const Descriptor &descriptor) { case 16: return FormattedRealIO<16, DIR>(io, descriptor); default: - io.GetIoErrorHandler().Crash( + handler.Crash( "DescriptorIO: Unimplemented REAL kind (%d) in descriptor", kind); return false; } @@ -388,7 +430,7 @@ static bool DescriptorIO(IoStatementState &io, const Descriptor &descriptor) { case 16: return FormattedComplexIO<16, DIR>(io, descriptor); default: - io.GetIoErrorHandler().Crash( + handler.Crash( "DescriptorIO: Unimplemented COMPLEX kind (%d) in descriptor", kind); return false; @@ -399,7 +441,7 @@ static bool DescriptorIO(IoStatementState &io, const Descriptor &descriptor) { return FormattedCharacterIO(io, descriptor); // TODO cases 2, 4 default: - io.GetIoErrorHandler().Crash( + handler.Crash( "DescriptorIO: Unimplemented CHARACTER kind (%d) in descriptor", kind); return false; @@ -419,7 +461,7 @@ static bool DescriptorIO(IoStatementState &io, const Descriptor &descriptor) { return FormattedLogicalIO, DIR>( io, descriptor); default: - io.GetIoErrorHandler().Crash( + handler.Crash( "DescriptorIO: Unimplemented LOGICAL kind (%d) in descriptor", kind); return false; @@ -428,7 +470,7 @@ static bool DescriptorIO(IoStatementState &io, const Descriptor &descriptor) { return FormattedDerivedTypeIO(io, descriptor); } } - io.GetIoErrorHandler().Crash("DescriptorIO: Bad type code (%d) in descriptor", + handler.Crash("DescriptorIO: Bad type code (%d) in descriptor", static_cast(descriptor.type().raw())); return false; } diff --git a/flang/runtime/format-implementation.h b/flang/runtime/format-implementation.h index 91d80a7336019..8c41a984693fa 100644 --- a/flang/runtime/format-implementation.h +++ b/flang/runtime/format-implementation.h @@ -338,10 +338,12 @@ int FormatControl::CueUpNextDataEdit(Context &context, bool stop) { ++offset_; } } - if (ch == 'E' || - (!next && - (ch == 'A' || ch == 'I' || ch == 'B' || ch == 'O' || ch == 'Z' || - ch == 'F' || ch == 'D' || ch == 'G' || ch == 'L'))) { + if ((!next && + (ch == 'A' || ch == 'I' || ch == 'B' || ch == 'E' || ch == 'D' || + ch == 'O' || ch == 'Z' || ch == 'F' || ch == 'G' || + ch == 'L')) || + (ch == 'E' && (next == 'N' || next == 'S' || next == 'X')) || + (ch == 'D' && next == 'T')) { // Data edit descriptor found offset_ = start; return repeat && *repeat > 0 ? *repeat : 1; @@ -355,6 +357,8 @@ int FormatControl::CueUpNextDataEdit(Context &context, bool stop) { } } else if (ch == '/') { context.AdvanceRecord(repeat && *repeat > 0 ? *repeat : 1); + } else if (ch == '$' || ch == '\\') { + context.mutableModes().nonAdvancing = true; } else { context.SignalError(IostatErrorInFormat, "Invalid character '%c' in FORMAT", static_cast(ch)); @@ -363,34 +367,86 @@ int FormatControl::CueUpNextDataEdit(Context &context, bool stop) { } } +// Returns the next data edit descriptor template DataEdit FormatControl::GetNextDataEdit( Context &context, int maxRepeat) { - - // TODO: DT editing - - // Return the next data edit descriptor int repeat{CueUpNextDataEdit(context)}; auto start{offset_}; DataEdit edit; edit.descriptor = static_cast(Capitalize(GetNextChar(context))); if (edit.descriptor == 'E') { - edit.variation = static_cast(Capitalize(PeekNext())); - if (edit.variation >= 'A' && edit.variation <= 'Z') { + if (auto next{static_cast(Capitalize(PeekNext()))}; + next == 'N' || next == 'S' || next == 'X') { + edit.variation = next; ++offset_; } + } else if (edit.descriptor == 'D' && Capitalize(PeekNext()) == 'T') { + // DT'iotype'(v_list) user-defined derived type I/O + edit.descriptor = DataEdit::DefinedDerivedType; + ++offset_; + if (auto quote{static_cast(PeekNext())}; + quote == '\'' || quote == '"') { + // Capture the quoted 'iotype' + bool ok{false}, tooLong{false}; + for (++offset_; offset_ < formatLength_;) { + auto ch{static_cast(format_[offset_++])}; + if (ch == quote && + (offset_ == formatLength_ || + static_cast(format_[offset_]) != quote)) { + ok = true; + break; // that was terminating quote + } else if (edit.ioTypeChars >= edit.maxIoTypeChars) { + tooLong = true; + } else { + edit.ioType[edit.ioTypeChars++] = ch; + if (ch == quote) { + ++offset_; + } + } + } + if (!ok) { + context.SignalError( + IostatErrorInFormat, "Unclosed DT'iotype' in FORMAT"); + } else if (tooLong) { + context.SignalError( + IostatErrorInFormat, "Excessive DT'iotype' in FORMAT"); + } + } + if (PeekNext() == '(') { + // Capture the v_list arguments + bool ok{false}, tooLong{false}; + for (++offset_; offset_ < formatLength_;) { + int n{GetIntField(context)}; + if (edit.vListEntries >= edit.maxVListEntries) { + tooLong = true; + } else { + edit.vList[edit.vListEntries++] = n; + } + auto ch{static_cast(GetNextChar(context))}; + if (ch != ',') { + ok = ch == ')'; + break; + } + } + if (!ok) { + context.SignalError( + IostatErrorInFormat, "Unclosed DT(v_list) in FORMAT"); + } else if (tooLong) { + context.SignalError( + IostatErrorInFormat, "Excessive DT(v_list) in FORMAT"); + } + } } - if (edit.descriptor == 'A') { // width is optional for A[w] auto ch{PeekNext()}; if (ch >= '0' && ch <= '9') { edit.width = GetIntField(context); } - } else { + } else if (edit.descriptor != DataEdit::DefinedDerivedType) { edit.width = GetIntField(context); } - edit.modes = context.mutableModes(); - if (PeekNext() == '.') { + if (edit.descriptor != DataEdit::DefinedDerivedType && PeekNext() == '.') { ++offset_; edit.digits = GetIntField(context); CharType ch{PeekNext()}; @@ -399,14 +455,15 @@ DataEdit FormatControl::GetNextDataEdit( edit.expoDigits = GetIntField(context); } } + edit.modes = context.mutableModes(); // Handle repeated nonparenthesized edit descriptors - if (repeat > 1) { + if (repeat > maxRepeat) { stack_[height_].start = start; // after repeat count stack_[height_].remaining = repeat; // full count ++height_; } - edit.repeat = 1; + edit.repeat = std::min(1, maxRepeat); // 0 if maxRepeat==0 if (height_ > 1) { // Subtle: stack_[0].start doesn't necessarily point to '(' int start{stack_[height_ - 1].start}; if (format_[start] != '(') { diff --git a/flang/runtime/format.cpp b/flang/runtime/format.cpp index 65ed12447bb58..e46cada81aa6c 100644 --- a/flang/runtime/format.cpp +++ b/flang/runtime/format.cpp @@ -9,50 +9,6 @@ #include "format-implementation.h" namespace Fortran::runtime::io { - -DataEdit DefaultFormatControlCallbacks::GetNextDataEdit(int) { - Crash("DefaultFormatControlCallbacks::GetNextDataEdit() called for " - "non-formatted I/O statement"); - return {}; -} -bool DefaultFormatControlCallbacks::Emit( - const char *, std::size_t, std::size_t) { - Crash("DefaultFormatControlCallbacks::Emit(char) called for non-output I/O " - "statement"); - return {}; -} -bool DefaultFormatControlCallbacks::Emit(const char16_t *, std::size_t) { - Crash("DefaultFormatControlCallbacks::Emit(char16_t) called for non-output " - "I/O statement"); - return {}; -} -bool DefaultFormatControlCallbacks::Emit(const char32_t *, std::size_t) { - Crash("DefaultFormatControlCallbacks::Emit(char32_t) called for non-output " - "I/O statement"); - return {}; -} -std::optional DefaultFormatControlCallbacks::GetCurrentChar() { - Crash("DefaultFormatControlCallbacks::GetCurrentChar() called for non-input " - "I/O " - "statement"); - return {}; -} -bool DefaultFormatControlCallbacks::AdvanceRecord(int) { - Crash("DefaultFormatControlCallbacks::AdvanceRecord() called unexpectedly"); - return {}; -} -void DefaultFormatControlCallbacks::BackspaceRecord() { - Crash("DefaultFormatControlCallbacks::BackspaceRecord() called unexpectedly"); -} -void DefaultFormatControlCallbacks::HandleAbsolutePosition(std::int64_t) { - Crash("DefaultFormatControlCallbacks::HandleAbsolutePosition() called for " - "non-formatted I/O statement"); -} -void DefaultFormatControlCallbacks::HandleRelativePosition(std::int64_t) { - Crash("DefaultFormatControlCallbacks::HandleRelativePosition() called for " - "non-formatted I/O statement"); -} - template class FormatControl< InternalFormattedIoStatementState>; template class FormatControl< @@ -61,4 +17,6 @@ template class FormatControl< ExternalFormattedIoStatementState>; template class FormatControl< ExternalFormattedIoStatementState>; +template class FormatControl>; +template class FormatControl>; } // namespace Fortran::runtime::io diff --git a/flang/runtime/format.h b/flang/runtime/format.h index 9dcd59a54a8bc..1989aa79a98ee 100644 --- a/flang/runtime/format.h +++ b/flang/runtime/format.h @@ -35,6 +35,7 @@ struct MutableModes { char delim{'\0'}; // DELIM= short scale{0}; // kP bool inNamelist{false}; // skip ! comments + bool nonAdvancing{false}; // ADVANCE='NO', or $ or \ in FORMAT }; // A single edit descriptor extracted from a FORMAT @@ -51,32 +52,28 @@ struct DataEdit { descriptor == ListDirectedImaginaryPart; } + static constexpr char DefinedDerivedType{'d'}; // DT user-defined derived type + char variation{'\0'}; // N, S, or X for EN, ES, EX std::optional width; // the 'w' field; optional for A std::optional digits; // the 'm' or 'd' field std::optional expoDigits; // 'Ee' field MutableModes modes; int repeat{1}; -}; -// FormatControl requires that A have these member functions; -// these default implementations just crash if called. -struct DefaultFormatControlCallbacks : public IoErrorHandler { - using IoErrorHandler::IoErrorHandler; - DataEdit GetNextDataEdit(int = 1); - bool Emit(const char *, std::size_t, std::size_t elementBytes = 0); - bool Emit(const char16_t *, std::size_t); - bool Emit(const char32_t *, std::size_t); - std::optional GetCurrentChar(); - bool AdvanceRecord(int = 1); - void BackspaceRecord(); - void HandleAbsolutePosition(std::int64_t); - void HandleRelativePosition(std::int64_t); + // "iotype" &/or "v_list" values for a DT'iotype'(v_list) + // user-defined derived type data edit descriptor + static constexpr std::size_t maxIoTypeChars{32}; + static constexpr std::size_t maxVListEntries{4}; + std::uint8_t ioTypeChars{0}; + std::uint8_t vListEntries{0}; + char ioType[maxIoTypeChars]; + int vList[maxVListEntries]; }; // Generates a sequence of DataEdits from a FORMAT statement or // default-CHARACTER string. Driven by I/O item list processing. -// Errors are fatal. See clause 13.4 in Fortran 2018 for background. +// Errors are fatal. See subclause 13.4 in Fortran 2018 for background. template class FormatControl { public: using Context = CONTEXT; @@ -98,7 +95,8 @@ template class FormatControl { } // Extracts the next data edit descriptor, handling control edit descriptors - // along the way. + // along the way. If maxRepeat==0, this is a peek at the next data edit + // descriptor. DataEdit GetNextDataEdit(Context &, int maxRepeat = 1); // Emit any remaining character literals after the last data item (on output) diff --git a/flang/runtime/io-api.cpp b/flang/runtime/io-api.cpp index 8754cd666ae7a..8996b44669dda 100644 --- a/flang/runtime/io-api.cpp +++ b/flang/runtime/io-api.cpp @@ -156,22 +156,29 @@ Cookie BeginExternalListIO(const char *what, int unitNumber, } ExternalFileUnit &unit{ExternalFileUnit::LookUpOrCreateAnonymous( unitNumber, DIR, false /*!unformatted*/, terminator)}; - if (unit.access == Access::Direct) { - terminator.Crash("%s attempted on direct access file", what); - return nullptr; - } - if (!unit.isUnformatted.has_value()) { - unit.isUnformatted = false; - } - if (*unit.isUnformatted) { - terminator.Crash("%s attempted on unformatted file", what); - return nullptr; + if (ChildIo * child{unit.GetChildIo()}) { + return child->CheckFormattingAndDirection(terminator, what, false, DIR) + ? &child->BeginIoStatement>( + *child, sourceFile, sourceLine) + : nullptr; + } else { + if (unit.access == Access::Direct) { + terminator.Crash("%s attempted on direct access file", what); + return nullptr; + } + if (!unit.isUnformatted.has_value()) { + unit.isUnformatted = false; + } + if (*unit.isUnformatted) { + terminator.Crash("%s attempted on unformatted file", what); + return nullptr; + } + IoErrorHandler handler{terminator}; + unit.SetDirection(DIR, handler); + IoStatementState &io{unit.BeginIoStatement>( + std::forward(xs)..., unit, sourceFile, sourceLine)}; + return &io; } - IoErrorHandler handler{terminator}; - unit.SetDirection(DIR, handler); - IoStatementState &io{unit.BeginIoStatement>( - std::forward(xs)..., unit, sourceFile, sourceLine)}; - return &io; } Cookie IONAME(BeginExternalListOutput)( @@ -195,19 +202,29 @@ Cookie BeginExternalFormattedIO(const char *format, std::size_t formatLength, } ExternalFileUnit &unit{ExternalFileUnit::LookUpOrCreateAnonymous( unitNumber, DIR, false /*!unformatted*/, terminator)}; - if (!unit.isUnformatted.has_value()) { - unit.isUnformatted = false; - } - if (*unit.isUnformatted) { - terminator.Crash("Formatted I/O attempted on unformatted file"); - return nullptr; + if (ChildIo * child{unit.GetChildIo()}) { + return child->CheckFormattingAndDirection(terminator, + DIR == Direction::Output ? "formatted output" + : "formatted input", + false, DIR) + ? &child->BeginIoStatement>( + *child, sourceFile, sourceLine) + : nullptr; + } else { + if (!unit.isUnformatted.has_value()) { + unit.isUnformatted = false; + } + if (*unit.isUnformatted) { + terminator.Crash("Formatted I/O attempted on unformatted file"); + return nullptr; + } + IoErrorHandler handler{terminator}; + unit.SetDirection(DIR, handler); + IoStatementState &io{ + unit.BeginIoStatement>( + unit, format, formatLength, sourceFile, sourceLine)}; + return &io; } - IoErrorHandler handler{terminator}; - unit.SetDirection(DIR, handler); - IoStatementState &io{ - unit.BeginIoStatement>( - unit, format, formatLength, sourceFile, sourceLine)}; - return &io; } Cookie IONAME(BeginExternalFormattedOutput)(const char *format, @@ -230,25 +247,36 @@ Cookie BeginUnformattedIO( Terminator terminator{sourceFile, sourceLine}; ExternalFileUnit &unit{ExternalFileUnit::LookUpOrCreateAnonymous( unitNumber, DIR, true /*unformatted*/, terminator)}; - if (!unit.isUnformatted.has_value()) { - unit.isUnformatted = true; - } - if (!*unit.isUnformatted) { - terminator.Crash("Unformatted I/O attempted on formatted file"); - } - IoStatementState &io{unit.BeginIoStatement>( - unit, sourceFile, sourceLine)}; - IoErrorHandler handler{terminator}; - unit.SetDirection(DIR, handler); - if constexpr (DIR == Direction::Output) { - if (unit.access == Access::Sequential && !unit.isFixedRecordLength) { - // Create space for (sub)record header to be completed by - // UnformattedIoStatementState::EndIoStatement() - unit.recordLength.reset(); // in case of prior BACKSPACE - io.Emit("\0\0\0\0", 4); // placeholder for record length header + if (ChildIo * child{unit.GetChildIo()}) { + return child->CheckFormattingAndDirection(terminator, + DIR == Direction::Output ? "unformatted output" + : "unformatted input", + true, DIR) + ? &child->BeginIoStatement>( + *child, sourceFile, sourceLine) + : nullptr; + } else { + if (!unit.isUnformatted.has_value()) { + unit.isUnformatted = true; + } + if (!*unit.isUnformatted) { + terminator.Crash("Unformatted I/O attempted on formatted file"); + } + IoStatementState &io{ + unit.BeginIoStatement>( + unit, sourceFile, sourceLine)}; + IoErrorHandler handler{terminator}; + unit.SetDirection(DIR, handler); + if constexpr (DIR == Direction::Output) { + if (unit.access == Access::Sequential && !unit.isFixedRecordLength) { + // Create space for (sub)record header to be completed by + // ExternalUnformattedIoStatementState::EndIoStatement() + unit.recordLength.reset(); // in case of prior BACKSPACE + io.Emit("\0\0\0\0", 4); // placeholder for record length header + } } + return &io; } - return &io; } Cookie IONAME(BeginUnformattedOutput)( @@ -276,9 +304,7 @@ Cookie IONAME(BeginOpenUnit)( // OPEN(without NEWUNIT=) Cookie IONAME(BeginOpenNewUnit)( // OPEN(NEWUNIT=j) const char *sourceFile, int sourceLine) { Terminator terminator{sourceFile, sourceLine}; - bool ignored{false}; - ExternalFileUnit &unit{ExternalFileUnit::LookUpOrCreate( - ExternalFileUnit::NewUnit(terminator), terminator, ignored)}; + ExternalFileUnit &unit{ExternalFileUnit::NewUnit(terminator)}; return &unit.BeginIoStatement( unit, false /*was an existing file*/, sourceFile, sourceLine); } @@ -411,12 +437,13 @@ static bool YesOrNo(const char *keyword, std::size_t length, const char *what, bool IONAME(SetAdvance)( Cookie cookie, const char *keyword, std::size_t length) { IoStatementState &io{*cookie}; - ConnectionState &connection{io.GetConnectionState()}; - connection.nonAdvancing = - !YesOrNo(keyword, length, "ADVANCE", io.GetIoErrorHandler()); - if (connection.nonAdvancing && connection.access == Access::Direct) { + bool nonAdvancing{ + !YesOrNo(keyword, length, "ADVANCE", io.GetIoErrorHandler())}; + if (nonAdvancing && io.GetConnectionState().access == Access::Direct) { io.GetIoErrorHandler().SignalError( "Non-advancing I/O attempted on direct access file"); + } else { + io.mutableModes().nonAdvancing = nonAdvancing; } return true; } @@ -895,7 +922,8 @@ bool IONAME(InputDescriptor)(Cookie cookie, const Descriptor &descriptor) { bool IONAME(OutputUnformattedBlock)(Cookie cookie, const char *x, std::size_t length, std::size_t elementBytes) { IoStatementState &io{*cookie}; - if (auto *unf{io.get_if>()}) { + if (auto *unf{io.get_if< + ExternalUnformattedIoStatementState>()}) { return unf->Emit(x, length, elementBytes); } io.GetIoErrorHandler().Crash("OutputUnformattedBlock() called for an I/O " @@ -910,7 +938,8 @@ bool IONAME(InputUnformattedBlock)( if (io.GetIoErrorHandler().InError()) { return false; } - if (auto *unf{io.get_if>()}) { + if (auto *unf{ + io.get_if>()}) { return unf->Receive(x, length, elementBytes); } io.GetIoErrorHandler().Crash("InputUnformattedBlock() called for an I/O " diff --git a/flang/runtime/io-error.cpp b/flang/runtime/io-error.cpp index bc835bad1dc13..19342c5aa427b 100644 --- a/flang/runtime/io-error.cpp +++ b/flang/runtime/io-error.cpp @@ -57,6 +57,14 @@ void IoErrorHandler::SignalError(int iostatOrErrno) { SignalError(iostatOrErrno, nullptr); } +void IoErrorHandler::Forward( + int ioStatOrErrno, const char *msg, std::size_t length) { + SignalError(ioStatOrErrno); + if (ioStat_ != IostatOk && (flags_ & hasIoMsg)) { + ioMsg_ = SaveDefaultCharacter(msg, length, *this); + } +} + void IoErrorHandler::SignalErrno() { SignalError(errno); } void IoErrorHandler::SignalEnd() { SignalError(IostatEnd); } diff --git a/flang/runtime/io-error.h b/flang/runtime/io-error.h index e51df9b5be866..dd2a269fef89a 100644 --- a/flang/runtime/io-error.h +++ b/flang/runtime/io-error.h @@ -32,6 +32,9 @@ class IoErrorHandler : public Terminator { void HasEndLabel() { flags_ |= hasEnd; } void HasEorLabel() { flags_ |= hasEor; } void HasIoMsg() { flags_ |= hasIoMsg; } + void HandleAnything() { + flags_ = hasIoStat | hasErr | hasEnd | hasEor | hasIoMsg; + } bool InError() const { return ioStat_ != IostatOk; } @@ -41,6 +44,8 @@ class IoErrorHandler : public Terminator { SignalError(IostatGenericError, msg, std::forward(xs)...); } + void Forward(int iostatOrErrno, const char *, std::size_t); + void SignalErrno(); // SignalError(errno) void SignalEnd(); // input only; EOF on internal write is an error void SignalEor(); // non-advancing input only; EOR on write is an error diff --git a/flang/runtime/io-stmt.cpp b/flang/runtime/io-stmt.cpp index 099d9038a8acd..56ea6129d5501 100644 --- a/flang/runtime/io-stmt.cpp +++ b/flang/runtime/io-stmt.cpp @@ -21,32 +21,64 @@ namespace Fortran::runtime::io { int IoStatementBase::EndIoStatement() { return GetIoStat(); } +bool IoStatementBase::Emit(const char *, std::size_t, std::size_t) { + return false; +} + +bool IoStatementBase::Emit(const char *, std::size_t) { + return false; +} + +bool IoStatementBase::Emit(const char16_t *, std::size_t) { + return false; +} + +bool IoStatementBase::Emit(const char32_t *, std::size_t) { + return false; +} + +std::optional IoStatementBase::GetCurrentChar() { + return std::nullopt; +} + +bool IoStatementBase::AdvanceRecord(int) { return false; } + +void IoStatementBase::BackspaceRecord() {} + +bool IoStatementBase::Receive(char *, std::size_t, std::size_t) { + return false; +} + std::optional IoStatementBase::GetNextDataEdit( IoStatementState &, int) { return std::nullopt; } +ExternalFileUnit *IoStatementBase::GetExternalFileUnit() const { + return nullptr; +} + +bool IoStatementBase::BeginReadingRecord() { return true; } + +void IoStatementBase::FinishReadingRecord() {} + +void IoStatementBase::HandleAbsolutePosition(std::int64_t) {} + +void IoStatementBase::HandleRelativePosition(std::int64_t) {} + bool IoStatementBase::Inquire(InquiryKeywordHash, char *, std::size_t) { - Crash( - "IoStatementBase::Inquire() called for I/O statement other than INQUIRE"); return false; } bool IoStatementBase::Inquire(InquiryKeywordHash, bool &) { - Crash( - "IoStatementBase::Inquire() called for I/O statement other than INQUIRE"); return false; } bool IoStatementBase::Inquire(InquiryKeywordHash, std::int64_t, bool &) { - Crash( - "IoStatementBase::Inquire() called for I/O statement other than INQUIRE"); return false; } bool IoStatementBase::Inquire(InquiryKeywordHash, std::int64_t &) { - Crash( - "IoStatementBase::Inquire() called for I/O statement other than INQUIRE"); return false; } @@ -69,12 +101,12 @@ InternalIoStatementState::InternalIoStatementState( template bool InternalIoStatementState::Emit( - const CharType *data, std::size_t chars, std::size_t /*elementBytes*/) { + const CharType *data, std::size_t chars) { if constexpr (DIR == Direction::Input) { Crash("InternalIoStatementState::Emit() called"); return false; } - return unit_.Emit(data, chars, *this); + return unit_.Emit(data, chars * sizeof(CharType), *this); } template @@ -171,9 +203,8 @@ MutableModes &ExternalIoStatementBase::mutableModes() { return unit_.modes; } ConnectionState &ExternalIoStatementBase::GetConnectionState() { return unit_; } int ExternalIoStatementBase::EndIoStatement() { - if (unit_.nonAdvancing) { + if (mutableModes().nonAdvancing) { unit_.leftTabLimit = unit_.furthestPositionInRecord; - unit_.nonAdvancing = false; } else { unit_.leftTabLimit.reset(); } @@ -228,14 +259,20 @@ int NoUnitIoStatementState::EndIoStatement() { return result; } +template +ExternalIoStatementState::ExternalIoStatementState( + ExternalFileUnit &unit, const char *sourceFile, int sourceLine) + : ExternalIoStatementBase{unit, sourceFile, sourceLine}, mutableModes_{ + unit.modes} {} + template int ExternalIoStatementState::EndIoStatement() { if constexpr (DIR == Direction::Input) { BeginReadingRecord(); // in case there were no I/O items - if (!unit().nonAdvancing) { + if (!mutableModes().nonAdvancing) { FinishReadingRecord(); } } else { - if (!unit().nonAdvancing) { + if (!mutableModes().nonAdvancing) { unit().AdvanceRecord(*this); } unit().FlushIfTerminal(*this); @@ -252,6 +289,14 @@ bool ExternalIoStatementState::Emit( return unit().Emit(data, bytes, elementBytes, *this); } +template +bool ExternalIoStatementState::Emit(const char *data, std::size_t bytes) { + if constexpr (DIR == Direction::Input) { + Crash("ExternalIoStatementState::Emit(char) called for input statement"); + } + return unit().Emit(data, bytes, 0, *this); +} + template bool ExternalIoStatementState::Emit( const char16_t *data, std::size_t chars) { @@ -261,7 +306,7 @@ bool ExternalIoStatementState::Emit( } // TODO: UTF-8 encoding return unit().Emit(reinterpret_cast(data), chars * sizeof *data, - static_cast(sizeof *data), *this); + sizeof *data, *this); } template @@ -273,7 +318,7 @@ bool ExternalIoStatementState::Emit( } // TODO: UTF-8 encoding return unit().Emit(reinterpret_cast(data), chars * sizeof *data, - static_cast(sizeof *data), *this); + sizeof *data, *this); } template @@ -335,7 +380,7 @@ ExternalFormattedIoStatementState::ExternalFormattedIoStatementState( ExternalFileUnit &unit, const CHAR *format, std::size_t formatLength, const char *sourceFile, int sourceLine) : ExternalIoStatementState{unit, sourceFile, sourceLine}, - mutableModes_{unit.modes}, format_{*this, format, formatLength} {} + format_{*this, format, formatLength} {} template int ExternalFormattedIoStatementState::EndIoStatement() { @@ -354,6 +399,24 @@ bool IoStatementState::Emit( [=](auto &x) { return x.get().Emit(data, n, elementBytes); }, u_); } +bool IoStatementState::Emit(const char *data, std::size_t n) { + return std::visit([=](auto &x) { return x.get().Emit(data, n); }, u_); +} + +bool IoStatementState::Emit(const char16_t *data, std::size_t chars) { + return std::visit([=](auto &x) { return x.get().Emit(data, chars); }, u_); +} + +bool IoStatementState::Emit(const char32_t *data, std::size_t chars) { + return std::visit([=](auto &x) { return x.get().Emit(data, chars); }, u_); +} + +bool IoStatementState::Receive( + char *data, std::size_t n, std::size_t elementBytes) { + return std::visit( + [=](auto &x) { return x.get().Receive(data, n, elementBytes); }, u_); +} + std::optional IoStatementState::GetCurrentChar() { return std::visit([&](auto &x) { return x.get().GetCurrentChar(); }, u_); } @@ -370,6 +433,10 @@ void IoStatementState::HandleRelativePosition(std::int64_t n) { std::visit([=](auto &x) { x.get().HandleRelativePosition(n); }, u_); } +void IoStatementState::HandleAbsolutePosition(std::int64_t n) { + std::visit([=](auto &x) { x.get().HandleAbsolutePosition(n); }, u_); +} + int IoStatementState::EndIoStatement() { return std::visit([](auto &x) { return x.get().EndIoStatement(); }, u_); } @@ -496,7 +563,7 @@ std::optional IoStatementState::NextInField( return std::optional{' '}; } IoErrorHandler &handler{GetIoErrorHandler()}; - if (connection.nonAdvancing) { + if (mutableModes().nonAdvancing) { handler.SignalEor(); } else { handler.SignalError(IostatRecordReadOverrun); @@ -682,23 +749,100 @@ ListDirectedStatementState::GetNextDataEdit( } template -bool UnformattedIoStatementState::Receive( +bool ExternalUnformattedIoStatementState::Receive( char *data, std::size_t bytes, std::size_t elementBytes) { if constexpr (DIR == Direction::Output) { - this->Crash( - "UnformattedIoStatementState::Receive() called for output statement"); + this->Crash("ExternalUnformattedIoStatementState::Receive() called for " + "output statement"); } return this->unit().Receive(data, bytes, elementBytes, *this); } template -bool UnformattedIoStatementState::Emit( +ChildIoStatementState::ChildIoStatementState( + ChildIo &child, const char *sourceFile, int sourceLine) + : IoStatementBase{sourceFile, sourceLine}, child_{child} {} + +template +MutableModes &ChildIoStatementState::mutableModes() { + return child_.parent().mutableModes(); +} + +template +ConnectionState &ChildIoStatementState::GetConnectionState() { + return child_.parent().GetConnectionState(); +} + +template +ExternalFileUnit *ChildIoStatementState::GetExternalFileUnit() const { + return child_.parent().GetExternalFileUnit(); +} + +template int ChildIoStatementState::EndIoStatement() { + auto result{IoStatementBase::EndIoStatement()}; + child_.EndIoStatement(); // annihilates *this in child_.u_ + return result; +} + +template +bool ChildIoStatementState::Emit( const char *data, std::size_t bytes, std::size_t elementBytes) { - if constexpr (DIR == Direction::Input) { - this->Crash( - "UnformattedIoStatementState::Emit() called for input statement"); - } - return ExternalIoStatementState::Emit(data, bytes, elementBytes); + return child_.parent().Emit(data, bytes, elementBytes); +} + +template +bool ChildIoStatementState::Emit(const char *data, std::size_t bytes) { + return child_.parent().Emit(data, bytes); +} + +template +bool ChildIoStatementState::Emit(const char16_t *data, std::size_t chars) { + return child_.parent().Emit(data, chars); +} + +template +bool ChildIoStatementState::Emit(const char32_t *data, std::size_t chars) { + return child_.parent().Emit(data, chars); +} + +template +std::optional ChildIoStatementState::GetCurrentChar() { + return child_.parent().GetCurrentChar(); +} + +template +void ChildIoStatementState::HandleAbsolutePosition(std::int64_t n) { + return child_.parent().HandleAbsolutePosition(n); +} + +template +void ChildIoStatementState::HandleRelativePosition(std::int64_t n) { + return child_.parent().HandleRelativePosition(n); +} + +template +ChildFormattedIoStatementState::ChildFormattedIoStatementState( + ChildIo &child, const CHAR *format, std::size_t formatLength, + const char *sourceFile, int sourceLine) + : ChildIoStatementState{child, sourceFile, sourceLine}, + mutableModes_{child.parent().mutableModes()}, format_{*this, format, + formatLength} {} + +template +int ChildFormattedIoStatementState::EndIoStatement() { + format_.Finish(*this); + return ChildIoStatementState::EndIoStatement(); +} + +template +bool ChildFormattedIoStatementState::AdvanceRecord(int) { + return false; // no can do in a child I/O +} + +template +bool ChildUnformattedIoStatementState::Receive( + char *data, std::size_t bytes, std::size_t elementBytes) { + return this->child().parent().Receive(data, bytes, elementBytes); } template class InternalIoStatementState; @@ -713,14 +857,22 @@ template class ExternalFormattedIoStatementState; template class ExternalFormattedIoStatementState; template class ExternalListIoStatementState; template class ExternalListIoStatementState; -template class UnformattedIoStatementState; -template class UnformattedIoStatementState; +template class ExternalUnformattedIoStatementState; +template class ExternalUnformattedIoStatementState; +template class ChildIoStatementState; +template class ChildIoStatementState; +template class ChildFormattedIoStatementState; +template class ChildFormattedIoStatementState; +template class ChildListIoStatementState; +template class ChildListIoStatementState; +template class ChildUnformattedIoStatementState; +template class ChildUnformattedIoStatementState; int ExternalMiscIoStatementState::EndIoStatement() { ExternalFileUnit &ext{unit()}; switch (which_) { case Flush: - ext.Flush(*this); + ext.FlushOutput(*this); std::fflush(nullptr); // flushes C stdio output streams (12.9(2)) break; case Backspace: @@ -742,6 +894,12 @@ InquireUnitState::InquireUnitState( bool InquireUnitState::Inquire( InquiryKeywordHash inquiry, char *result, std::size_t length) { + if (unit().createdForInternalChildIo()) { + SignalError(IostatInquireInternalUnit, + "INQUIRE of unit created for defined derived type I/O of an internal " + "unit"); + return false; + } const char *str{nullptr}; switch (inquiry) { case HashInquiryKeyword("ACCESS"): @@ -1161,10 +1319,4 @@ InquireIOLengthState::InquireIOLengthState( const char *sourceFile, int sourceLine) : NoUnitIoStatementState{sourceFile, sourceLine, *this} {} -bool InquireIOLengthState::Emit( - const char *, std::size_t n, std::size_t /*elementBytes*/) { - bytes_ += n; - return true; -} - } // namespace Fortran::runtime::io diff --git a/flang/runtime/io-stmt.h b/flang/runtime/io-stmt.h index b76c5202619b7..49964359a48ba 100644 --- a/flang/runtime/io-stmt.h +++ b/flang/runtime/io-stmt.h @@ -25,6 +25,7 @@ namespace Fortran::runtime::io { class ExternalFileUnit; +class ChildIo; class OpenStatementState; class InquireUnitState; @@ -41,7 +42,10 @@ template class InternalListIoStatementState; template class ExternalFormattedIoStatementState; template class ExternalListIoStatementState; -template class UnformattedIoStatementState; +template class ExternalUnformattedIoStatementState; +template class ChildFormattedIoStatementState; +template class ChildListIoStatementState; +template class ChildUnformattedIoStatementState; struct InputStatementState {}; struct OutputStatementState {}; @@ -60,17 +64,19 @@ class IoStatementState { // to interact with the state of the I/O statement in progress. // This design avoids virtual member functions and function pointers, // which may not have good support in some runtime environments. - std::optional GetNextDataEdit(int = 1); - bool Emit(const char *, std::size_t, std::size_t elementBytes = 0); + int EndIoStatement(); + bool Emit(const char *, std::size_t, std::size_t elementBytes); + bool Emit(const char *, std::size_t); + bool Emit(const char16_t *, std::size_t chars); + bool Emit(const char32_t *, std::size_t chars); + bool Receive(char *, std::size_t, std::size_t elementBytes = 0); std::optional GetCurrentChar(); // vacant after end of record bool AdvanceRecord(int = 1); void BackspaceRecord(); void HandleRelativePosition(std::int64_t); - int EndIoStatement(); - ConnectionState &GetConnectionState(); - IoErrorHandler &GetIoErrorHandler() const; + void HandleAbsolutePosition(std::int64_t); // for r* in list I/O + std::optional GetNextDataEdit(int = 1); ExternalFileUnit *GetExternalFileUnit() const; // null if internal unit - MutableModes &mutableModes(); bool BeginReadingRecord(); void FinishReadingRecord(); bool Inquire(InquiryKeywordHash, char *, std::size_t); @@ -78,6 +84,10 @@ class IoStatementState { bool Inquire(InquiryKeywordHash, std::int64_t, bool &); // PENDING= bool Inquire(InquiryKeywordHash, std::int64_t &); + MutableModes &mutableModes(); + ConnectionState &GetConnectionState(); + IoErrorHandler &GetIoErrorHandler() const; + // N.B.: this also works with base classes template A *get_if() const { return std::visit( @@ -129,8 +139,18 @@ class IoStatementState { ExternalFormattedIoStatementState>, std::reference_wrapper>, std::reference_wrapper>, - std::reference_wrapper>, - std::reference_wrapper>, + std::reference_wrapper< + ExternalUnformattedIoStatementState>, + std::reference_wrapper< + ExternalUnformattedIoStatementState>, + std::reference_wrapper>, + std::reference_wrapper>, + std::reference_wrapper>, + std::reference_wrapper>, + std::reference_wrapper< + ChildUnformattedIoStatementState>, + std::reference_wrapper< + ChildUnformattedIoStatementState>, std::reference_wrapper, std::reference_wrapper, std::reference_wrapper, @@ -140,18 +160,30 @@ class IoStatementState { }; // Base class for all per-I/O statement state classes. -// Inherits IoErrorHandler from its base. -struct IoStatementBase : public DefaultFormatControlCallbacks { - using DefaultFormatControlCallbacks::DefaultFormatControlCallbacks; +struct IoStatementBase : public IoErrorHandler { + using IoErrorHandler::IoErrorHandler; + + // These are default no-op backstops that can be overridden by descendants. int EndIoStatement(); + bool Emit(const char *, std::size_t, std::size_t elementBytes); + bool Emit(const char *, std::size_t); + bool Emit(const char16_t *, std::size_t chars); + bool Emit(const char32_t *, std::size_t chars); + bool Receive(char *, std::size_t, std::size_t elementBytes = 0); + std::optional GetCurrentChar(); + bool AdvanceRecord(int); + void BackspaceRecord(); + void HandleRelativePosition(std::int64_t); + void HandleAbsolutePosition(std::int64_t); std::optional GetNextDataEdit(IoStatementState &, int = 1); - ExternalFileUnit *GetExternalFileUnit() const { return nullptr; } - bool BeginReadingRecord() { return true; } - void FinishReadingRecord() {} + ExternalFileUnit *GetExternalFileUnit() const; + bool BeginReadingRecord(); + void FinishReadingRecord(); bool Inquire(InquiryKeywordHash, char *, std::size_t); bool Inquire(InquiryKeywordHash, bool &); bool Inquire(InquiryKeywordHash, std::int64_t, bool &); bool Inquire(InquiryKeywordHash, std::int64_t &); + void BadInquiryKeywordHashCrash(InquiryKeywordHash); }; @@ -207,8 +239,11 @@ class InternalIoStatementState : public IoStatementBase, InternalIoStatementState( const Descriptor &, const char *sourceFile = nullptr, int sourceLine = 0); int EndIoStatement(); - bool Emit(const CharType *, std::size_t chars /* not necessarily bytes */, - std::size_t elementBytes = 0); + + using IoStatementBase::Emit; + bool Emit( + const CharType *data, std::size_t chars /* not necessarily bytes */); + std::optional GetCurrentChar(); bool AdvanceRecord(int = 1); void BackspaceRecord(); @@ -275,7 +310,7 @@ class ExternalIoStatementBase : public IoStatementBase { MutableModes &mutableModes(); ConnectionState &GetConnectionState(); int EndIoStatement(); - ExternalFileUnit *GetExternalFileUnit() { return &unit_; } + ExternalFileUnit *GetExternalFileUnit() const { return &unit_; } private: ExternalFileUnit &unit_; @@ -285,9 +320,12 @@ template class ExternalIoStatementState : public ExternalIoStatementBase, public IoDirectionState { public: - using ExternalIoStatementBase::ExternalIoStatementBase; + ExternalIoStatementState( + ExternalFileUnit &, const char *sourceFile = nullptr, int sourceLine = 0); + MutableModes &mutableModes() { return mutableModes_; } int EndIoStatement(); - bool Emit(const char *, std::size_t, std::size_t elementBytes = 0); + bool Emit(const char *, std::size_t, std::size_t elementBytes); + bool Emit(const char *, std::size_t); bool Emit(const char16_t *, std::size_t chars /* not bytes */); bool Emit(const char32_t *, std::size_t chars /* not bytes */); std::optional GetCurrentChar(); @@ -297,6 +335,12 @@ class ExternalIoStatementState : public ExternalIoStatementBase, void HandleAbsolutePosition(std::int64_t); bool BeginReadingRecord(); void FinishReadingRecord(); + +private: + // These are forked from ConnectionState's modes at the beginning + // of each formatted I/O statement so they may be overridden by control + // edit descriptors during the statement. + MutableModes mutableModes_; }; template @@ -307,7 +351,6 @@ class ExternalFormattedIoStatementState : public ExternalIoStatementState, ExternalFormattedIoStatementState(ExternalFileUnit &, const CharType *format, std::size_t formatLength, const char *sourceFile = nullptr, int sourceLine = 0); - MutableModes &mutableModes() { return mutableModes_; } int EndIoStatement(); std::optional GetNextDataEdit( IoStatementState &, int maxRepeat = 1) { @@ -315,10 +358,6 @@ class ExternalFormattedIoStatementState : public ExternalIoStatementState, } private: - // These are forked from ConnectionState's modes at the beginning - // of each formatted I/O statement so they may be overridden by control - // edit descriptors during the statement. - MutableModes mutableModes_; FormatControl format_; }; @@ -331,13 +370,73 @@ class ExternalListIoStatementState : public ExternalIoStatementState, }; template -class UnformattedIoStatementState : public ExternalIoStatementState { +class ExternalUnformattedIoStatementState + : public ExternalIoStatementState { public: using ExternalIoStatementState::ExternalIoStatementState; bool Receive(char *, std::size_t, std::size_t elementBytes = 0); - bool Emit(const char *, std::size_t, std::size_t elementBytes = 0); }; +template +class ChildIoStatementState : public IoStatementBase, + public IoDirectionState { +public: + ChildIoStatementState( + ChildIo &, const char *sourceFile = nullptr, int sourceLine = 0); + ChildIo &child() { return child_; } + MutableModes &mutableModes(); + ConnectionState &GetConnectionState(); + ExternalFileUnit *GetExternalFileUnit() const; + int EndIoStatement(); + bool Emit(const char *, std::size_t, std::size_t elementBytes); + bool Emit(const char *, std::size_t); + bool Emit(const char16_t *, std::size_t chars /* not bytes */); + bool Emit(const char32_t *, std::size_t chars /* not bytes */); + std::optional GetCurrentChar(); + void HandleRelativePosition(std::int64_t); + void HandleAbsolutePosition(std::int64_t); + +private: + ChildIo &child_; +}; + +template +class ChildFormattedIoStatementState : public ChildIoStatementState, + public FormattedIoStatementState { +public: + using CharType = CHAR; + ChildFormattedIoStatementState(ChildIo &, const CharType *format, + std::size_t formatLength, const char *sourceFile = nullptr, + int sourceLine = 0); + MutableModes &mutableModes() { return mutableModes_; } + int EndIoStatement(); + bool AdvanceRecord(int = 1); + std::optional GetNextDataEdit( + IoStatementState &, int maxRepeat = 1) { + return format_.GetNextDataEdit(*this, maxRepeat); + } + +private: + MutableModes mutableModes_; + FormatControl format_; +}; + +template +class ChildListIoStatementState : public ChildIoStatementState, + public ListDirectedStatementState { +public: + using ChildIoStatementState::ChildIoStatementState; + using ListDirectedStatementState::GetNextDataEdit; +}; + +template +class ChildUnformattedIoStatementState : public ChildIoStatementState { +public: + using ChildIoStatementState::ChildIoStatementState; + bool Receive(char *, std::size_t, std::size_t elementBytes = 0); +}; + +// OPEN class OpenStatementState : public ExternalIoStatementBase { public: OpenStatementState(ExternalFileUnit &unit, bool wasExtant, @@ -415,8 +514,17 @@ extern template class ExternalFormattedIoStatementState; extern template class ExternalFormattedIoStatementState; extern template class ExternalListIoStatementState; extern template class ExternalListIoStatementState; -extern template class UnformattedIoStatementState; -extern template class UnformattedIoStatementState; +extern template class ExternalUnformattedIoStatementState; +extern template class ExternalUnformattedIoStatementState; +extern template class ChildIoStatementState; +extern template class ChildIoStatementState; +extern template class ChildFormattedIoStatementState; +extern template class ChildFormattedIoStatementState; +extern template class ChildListIoStatementState; +extern template class ChildListIoStatementState; +extern template class ChildUnformattedIoStatementState; +extern template class ChildUnformattedIoStatementState; + extern template class FormatControl< InternalFormattedIoStatementState>; extern template class FormatControl< @@ -425,6 +533,10 @@ extern template class FormatControl< ExternalFormattedIoStatementState>; extern template class FormatControl< ExternalFormattedIoStatementState>; +extern template class FormatControl< + ChildFormattedIoStatementState>; +extern template class FormatControl< + ChildFormattedIoStatementState>; class InquireUnitState : public ExternalIoStatementBase { public: @@ -463,7 +575,6 @@ class InquireIOLengthState : public NoUnitIoStatementState, public: InquireIOLengthState(const char *sourceFile = nullptr, int sourceLine = 0); std::size_t bytes() const { return bytes_; } - bool Emit(const char *, std::size_t, std::size_t elementBytes = 0); private: std::size_t bytes_{0}; diff --git a/flang/runtime/time-intrinsic.h b/flang/runtime/time-intrinsic.h index 835f24c0b324e..391d72cef18fa 100644 --- a/flang/runtime/time-intrinsic.h +++ b/flang/runtime/time-intrinsic.h @@ -22,6 +22,12 @@ extern "C" { // real kind. double RTNAME(CpuTime)(); +// Interface for the SYSTEM_CLOCK intrinsic. We break it up into 3 distinct +// function calls, one for each of SYSTEM_CLOCK's optional output arguments. +// Lowering will have to cast the results to whatever type it prefers. +CppTypeFor RTNAME(SystemClockCount)(); +CppTypeFor RTNAME(SystemClockCountRate)(); +CppTypeFor RTNAME(SystemClockCountMax)(); } // extern "C" } // namespace Fortran::runtime #endif // FORTRAN_RUNTIME_TIME_INTRINSIC_H_ diff --git a/flang/runtime/tools.cpp b/flang/runtime/tools.cpp index c67da77e0c118..07f38cdf3efa5 100644 --- a/flang/runtime/tools.cpp +++ b/flang/runtime/tools.cpp @@ -71,9 +71,11 @@ int IdentifyValue( void ToFortranDefaultCharacter( char *to, std::size_t toLength, const char *from) { std::size_t len{std::strlen(from)}; - std::memcpy(to, from, std::max(toLength, len)); if (len < toLength) { + std::memcpy(to, from, len); std::memset(to + len, ' ', toLength - len); + } else { + std::memcpy(to, from, toLength); } } diff --git a/flang/runtime/type-info.cpp b/flang/runtime/type-info.cpp index df72fc466a29b..9385eabf2dc84 100644 --- a/flang/runtime/type-info.cpp +++ b/flang/runtime/type-info.cpp @@ -82,6 +82,21 @@ const Component *DerivedType::FindDataComponent( : nullptr; } +const SpecialBinding *DerivedType::FindSpecialBinding( + SpecialBinding::Which which) const { + const Descriptor &specialDesc{special()}; + std::size_t n{specialDesc.Elements()}; + SubscriptValue at[maxRank]; + specialDesc.GetLowerBounds(at); + for (std::size_t j{0}; j < n; ++j, specialDesc.IncrementSubscripts(at)) { + const SpecialBinding &special{*specialDesc.Element(at)}; + if (special.which() == which) { + return &special; + } + } + return nullptr; +} + static void DumpScalarCharacter( FILE *f, const Descriptor &desc, const char *what) { if (desc.raw().version == CFI_VERSION && @@ -103,7 +118,7 @@ FILE *DerivedType::Dump(FILE *f) const { int offset{j * static_cast(sizeof *uints)}; std::fprintf(f, " [+%3d](0x%p) %#016jx", offset, reinterpret_cast(&uints[j]), - static_cast(uints[j])); + static_cast(uints[j])); if (offset == offsetof(DerivedType, binding_)) { std::fputs(" <-- binding_\n", f); } else if (offset == offsetof(DerivedType, name_)) { @@ -151,6 +166,15 @@ FILE *DerivedType::Dump(FILE *f) const { std::fputs(" bad descriptor: ", f); compDesc.Dump(f); } + const Descriptor &specialDesc{special()}; + std::fprintf( + f, "\n special descriptor (byteSize 0x%zx): ", special_.byteSize); + specialDesc.Dump(f); + std::size_t specials{specialDesc.Elements()}; + for (std::size_t j{0}; j < specials; ++j) { + std::fprintf(f, " [%3zd] ", j); + specialDesc.ZeroBasedIndexedElement(j)->Dump(f); + } return f; } @@ -174,4 +198,46 @@ FILE *Component::Dump(FILE *f) const { return f; } +FILE *SpecialBinding::Dump(FILE *f) const { + std::fprintf( + f, "SpecialBinding @ 0x%p:\n", reinterpret_cast(this)); + switch (which_) { + case Which::Assignment: + std::fputs(" Assignment", f); + break; + case Which::ElementalAssignment: + std::fputs(" ElementalAssignment", f); + break; + case Which::Final: + std::fputs(" Final", f); + break; + case Which::ElementalFinal: + std::fputs(" ElementalFinal", f); + break; + case Which::AssumedRankFinal: + std::fputs(" AssumedRankFinal", f); + break; + case Which::ReadFormatted: + std::fputs(" ReadFormatted", f); + break; + case Which::ReadUnformatted: + std::fputs(" ReadUnformatted", f); + break; + case Which::WriteFormatted: + std::fputs(" WriteFormatted", f); + break; + case Which::WriteUnformatted: + std::fputs(" WriteUnformatted", f); + break; + default: + std::fprintf( + f, " Unknown which: 0x%x", static_cast(which_)); + break; + } + std::fprintf(f, "\n rank: %d\n", rank_); + std::fprintf(f, " isArgDescriptoSetr: 0x%x\n", isArgDescriptorSet_); + std::fprintf(f, " proc: 0x%p\n", reinterpret_cast(proc_)); + return f; +} + } // namespace Fortran::runtime::typeInfo diff --git a/flang/runtime/type-info.h b/flang/runtime/type-info.h index 05a4c41a34997..0dfb4b64ffd35 100644 --- a/flang/runtime/type-info.h +++ b/flang/runtime/type-info.h @@ -20,81 +20,7 @@ namespace Fortran::runtime::typeInfo { -class Component; - -class DerivedType { -public: - ~DerivedType(); // never defined - - const Descriptor &binding() const { return binding_.descriptor(); } - const Descriptor &name() const { return name_.descriptor(); } - std::uint64_t sizeInBytes() const { return sizeInBytes_; } - const Descriptor &parent() const { return parent_.descriptor(); } - std::uint64_t typeHash() const { return typeHash_; } - const Descriptor &uninstatiated() const { - return uninstantiated_.descriptor(); - } - const Descriptor &kindParameter() const { - return kindParameter_.descriptor(); - } - const Descriptor &lenParameterKind() const { - return lenParameterKind_.descriptor(); - } - const Descriptor &component() const { return component_.descriptor(); } - const Descriptor &procPtr() const { return procPtr_.descriptor(); } - const Descriptor &special() const { return special_.descriptor(); } - - std::size_t LenParameters() const { return lenParameterKind().Elements(); } - - // Finds a data component by name in this derived type or tis ancestors. - const Component *FindDataComponent( - const char *name, std::size_t nameLen) const; - - FILE *Dump(FILE * = stdout) const; - -private: - // This member comes first because it's used like a vtable by generated code. - // It includes all of the ancestor types' bindings, if any, first, - // with any overrides from descendants already applied to them. Local - // bindings then follow in alphabetic order of binding name. - StaticDescriptor<1, true> - binding_; // TYPE(BINDING), DIMENSION(:), POINTER, CONTIGUOUS - - StaticDescriptor<0> name_; // CHARACTER(:), POINTER - - std::uint64_t sizeInBytes_{0}; - StaticDescriptor<0, true> parent_; // TYPE(DERIVEDTYPE), POINTER - - // Instantiations of a parameterized derived type with KIND type - // parameters will point this data member to the description of - // the original uninstantiated type, which may be shared from a - // module via use association. The original uninstantiated derived - // type description will point to itself. Derived types that have - // no KIND type parameters will have a null pointer here. - StaticDescriptor<0, true> uninstantiated_; // TYPE(DERIVEDTYPE), POINTER - - // TODO: flags for SEQUENCE, BIND(C), any PRIVATE component(? see 7.5.2) - std::uint64_t typeHash_{0}; - - // These pointer targets include all of the items from the parent, if any. - StaticDescriptor<1> kindParameter_; // pointer to rank-1 array of INTEGER(8) - StaticDescriptor<1> - lenParameterKind_; // pointer to rank-1 array of INTEGER(1) - - // This array of local data components includes the parent component. - // Components are in component order, not collation order of their names. - // It does not include procedure pointer components. - StaticDescriptor<1, true> - component_; // TYPE(COMPONENT), POINTER, DIMENSION(:), CONTIGUOUS - - // Procedure pointer components - StaticDescriptor<1, true> - procPtr_; // TYPE(PROCPTR), POINTER, DIMENSION(:), CONTIGUOUS - - // Does not include special bindings from ancestral types. - StaticDescriptor<1, true> - special_; // TYPE(SPECIALBINDING), POINTER, DIMENSION(:), CONTIGUOUS -}; +class DerivedType; using ProcedurePointer = void (*)(); // TYPE(C_FUNPTR) @@ -177,7 +103,8 @@ struct ProcPtrComponent { ProcedurePointer procInitialization; // for Genre::Procedure }; -struct SpecialBinding { +class SpecialBinding { +public: enum class Which : std::uint8_t { None = 0, Assignment = 4, @@ -189,13 +116,27 @@ struct SpecialBinding { ReadUnformatted = 17, WriteFormatted = 18, WriteUnformatted = 19 - } which{Which::None}; + }; + + Which which() const { return which_; } + int rank() const { return rank_; } + bool IsArgDescriptor(int zeroBasedArg) const { + return (isArgDescriptorSet_ >> zeroBasedArg) & 1; + } + template PROC GetProc() const { + return reinterpret_cast(proc_); + } + + FILE *Dump(FILE *) const; + +private: + Which which_{Which::None}; // Used for Which::Final only. Which::Assignment always has rank 0, as // type-bound defined assignment for rank > 0 must be elemental // due to the required passed object dummy argument, which are scalar. // User defined derived type I/O is always scalar. - std::uint8_t rank{0}; + std::uint8_t rank_{0}; // The following little bit-set identifies which dummy arguments are // passed via descriptors for their derived type arguments. @@ -222,9 +163,86 @@ struct SpecialBinding { // the case when and only when the derived type is extensible. // When false, the user derived type I/O subroutine must have been // called via a generic interface, not a generic TBP. - std::uint8_t isArgDescriptorSet{0}; + std::uint8_t isArgDescriptorSet_{0}; + + ProcedurePointer proc_{nullptr}; +}; + +class DerivedType { +public: + ~DerivedType(); // never defined + + const Descriptor &binding() const { return binding_.descriptor(); } + const Descriptor &name() const { return name_.descriptor(); } + std::uint64_t sizeInBytes() const { return sizeInBytes_; } + const Descriptor &parent() const { return parent_.descriptor(); } + std::uint64_t typeHash() const { return typeHash_; } + const Descriptor &uninstatiated() const { + return uninstantiated_.descriptor(); + } + const Descriptor &kindParameter() const { + return kindParameter_.descriptor(); + } + const Descriptor &lenParameterKind() const { + return lenParameterKind_.descriptor(); + } + const Descriptor &component() const { return component_.descriptor(); } + const Descriptor &procPtr() const { return procPtr_.descriptor(); } + const Descriptor &special() const { return special_.descriptor(); } + + std::size_t LenParameters() const { return lenParameterKind().Elements(); } + + // Finds a data component by name in this derived type or tis ancestors. + const Component *FindDataComponent( + const char *name, std::size_t nameLen) const; + + const SpecialBinding *FindSpecialBinding(SpecialBinding::Which) const; + + FILE *Dump(FILE * = stdout) const; + +private: + // This member comes first because it's used like a vtable by generated code. + // It includes all of the ancestor types' bindings, if any, first, + // with any overrides from descendants already applied to them. Local + // bindings then follow in alphabetic order of binding name. + StaticDescriptor<1, true> + binding_; // TYPE(BINDING), DIMENSION(:), POINTER, CONTIGUOUS + + StaticDescriptor<0> name_; // CHARACTER(:), POINTER + + std::uint64_t sizeInBytes_{0}; + StaticDescriptor<0, true> parent_; // TYPE(DERIVEDTYPE), POINTER + + // Instantiations of a parameterized derived type with KIND type + // parameters will point this data member to the description of + // the original uninstantiated type, which may be shared from a + // module via use association. The original uninstantiated derived + // type description will point to itself. Derived types that have + // no KIND type parameters will have a null pointer here. + StaticDescriptor<0, true> uninstantiated_; // TYPE(DERIVEDTYPE), POINTER + + // TODO: flags for SEQUENCE, BIND(C), any PRIVATE component(? see 7.5.2) + std::uint64_t typeHash_{0}; + + // These pointer targets include all of the items from the parent, if any. + StaticDescriptor<1> kindParameter_; // pointer to rank-1 array of INTEGER(8) + StaticDescriptor<1> + lenParameterKind_; // pointer to rank-1 array of INTEGER(1) + + // This array of local data components includes the parent component. + // Components are in component order, not collation order of their names. + // It does not include procedure pointer components. + StaticDescriptor<1, true> + component_; // TYPE(COMPONENT), POINTER, DIMENSION(:), CONTIGUOUS + + // Procedure pointer components + StaticDescriptor<1, true> + procPtr_; // TYPE(PROCPTR), POINTER, DIMENSION(:), CONTIGUOUS - ProcedurePointer proc{nullptr}; + // Does not include special bindings from ancestral types. + StaticDescriptor<1, true> + special_; // TYPE(SPECIALBINDING), POINTER, DIMENSION(:), CONTIGUOUS }; + } // namespace Fortran::runtime::typeInfo #endif // FORTRAN_RUNTIME_TYPE_INFO_H_ diff --git a/flang/runtime/unit-map.cpp b/flang/runtime/unit-map.cpp index 1cd2115f4aa1b..2a7e414b3facc 100644 --- a/flang/runtime/unit-map.cpp +++ b/flang/runtime/unit-map.cpp @@ -67,7 +67,7 @@ void UnitMap::FlushAll(IoErrorHandler &handler) { CriticalSection critical{lock_}; for (int j{0}; j < buckets_; ++j) { for (Chain *p{bucket_[j].get()}; p; p = p->next.get()) { - p->unit.Flush(handler); + p->unit.FlushOutput(handler); } } } @@ -92,4 +92,5 @@ ExternalFileUnit &UnitMap::Create(int n, const Terminator &terminator) { bucket_[Hash(n)].swap(chain.next); // pushes new node as list head return chain.unit; } + } // namespace Fortran::runtime::io diff --git a/flang/runtime/unit.cpp b/flang/runtime/unit.cpp index 79f3722fb7aba..e1ff6e7fd2930 100644 --- a/flang/runtime/unit.cpp +++ b/flang/runtime/unit.cpp @@ -32,7 +32,7 @@ void FlushOutputOnCrash(const Terminator &terminator) { if (defaultOutput) { IoErrorHandler handler{terminator}; handler.HasIoStat(); // prevent nested crash if flush has error - defaultOutput->Flush(handler); + defaultOutput->FlushOutput(handler); } } @@ -87,8 +87,11 @@ ExternalFileUnit *ExternalFileUnit::LookUpForClose(int unit) { return GetUnitMap().LookUpForClose(unit); } -int ExternalFileUnit::NewUnit(const Terminator &terminator) { - return GetUnitMap().NewUnit(terminator).unitNumber(); +ExternalFileUnit &ExternalFileUnit::NewUnit( + const Terminator &terminator, bool forChildIo) { + ExternalFileUnit &unit{GetUnitMap().NewUnit(terminator)}; + unit.createdForInternalChildIo_ = forChildIo; + return unit; } void ExternalFileUnit::OpenUnit(std::optional status, @@ -115,7 +118,7 @@ void ExternalFileUnit::OpenUnit(std::optional status, } // Otherwise, OPEN on open unit with new FILE= implies CLOSE DoImpliedEndfile(handler); - Flush(handler); + FlushOutput(handler); Close(CloseStatus::Keep, handler); } set_path(std::move(newPath), newPathLength); @@ -165,7 +168,7 @@ void ExternalFileUnit::OpenAnonymousUnit(std::optional status, void ExternalFileUnit::CloseUnit(CloseStatus status, IoErrorHandler &handler) { DoImpliedEndfile(handler); - Flush(handler); + FlushOutput(handler); Close(status, handler); } @@ -459,12 +462,9 @@ bool ExternalFileUnit::AdvanceRecord(IoErrorHandler &handler) { ok = ok && Emit("\n", 1, 1, handler); // TODO: Windows CR+LF } } - frameOffsetInFile_ += - recordOffsetInFrame_ + recordLength.value_or(furthestPositionInRecord); - recordOffsetInFrame_ = 0; + CommitWrites(); impliedEndfile_ = true; ++currentRecordNumber; - BeginRecord(); return ok; } } @@ -496,9 +496,24 @@ void ExternalFileUnit::BackspaceRecord(IoErrorHandler &handler) { } } +void ExternalFileUnit::FlushOutput(IoErrorHandler &handler) { + if (!mayPosition()) { + auto frameAt{FrameAt()}; + if (frameOffsetInFile_ >= frameAt && + frameOffsetInFile_ < + static_cast(frameAt + FrameLength())) { + // A Flush() that's about to happen to a non-positionable file + // needs to advance frameOffsetInFile_ to prevent attempts at + // impossible seeks + CommitWrites(); + } + } + Flush(handler); +} + void ExternalFileUnit::FlushIfTerminal(IoErrorHandler &handler) { if (isTerminal()) { - Flush(handler); + FlushOutput(handler); } } @@ -530,8 +545,6 @@ void ExternalFileUnit::Rewind(IoErrorHandler &handler) { } void ExternalFileUnit::EndIoStatement() { - frameOffsetInFile_ += recordOffsetInFrame_; - recordOffsetInFrame_ = 0; io_.reset(); u_.emplace(); lock_.Drop(); @@ -582,7 +595,7 @@ void ExternalFileUnit::BeginSequentialVariableUnformattedInputRecord( void ExternalFileUnit::BeginSequentialVariableFormattedInputRecord( IoErrorHandler &handler) { if (this == defaultInput && defaultOutput) { - defaultOutput->Flush(handler); + defaultOutput->FlushOutput(handler); } std::size_t length{0}; do { @@ -697,4 +710,50 @@ void ExternalFileUnit::DoEndfile(IoErrorHandler &handler) { BeginRecord(); impliedEndfile_ = false; } + +void ExternalFileUnit::CommitWrites() { + frameOffsetInFile_ += + recordOffsetInFrame_ + recordLength.value_or(furthestPositionInRecord); + recordOffsetInFrame_ = 0; + BeginRecord(); +} + +ChildIo &ExternalFileUnit::PushChildIo(IoStatementState &parent) { + OwningPtr current{std::move(child_)}; + Terminator &terminator{parent.GetIoErrorHandler()}; + OwningPtr next{New{terminator}(parent, std::move(current))}; + child_.reset(next.release()); + return *child_; +} + +void ExternalFileUnit::PopChildIo(ChildIo &child) { + if (child_.get() != &child) { + child.parent().GetIoErrorHandler().Crash( + "ChildIo being popped is not top of stack"); + } + child_.reset(child.AcquirePrevious().release()); // deletes top child +} + +void ChildIo::EndIoStatement() { + io_.reset(); + u_.emplace(); +} + +bool ChildIo::CheckFormattingAndDirection(Terminator &terminator, + const char *what, bool unformatted, Direction direction) { + bool parentIsUnformatted{!parent_.get_if()}; + bool parentIsInput{!parent_.get_if>()}; + if (unformatted != parentIsUnformatted) { + terminator.Crash("Child %s attempted on %s parent I/O unit", what, + parentIsUnformatted ? "unformatted" : "formatted"); + return false; + } else if (parentIsInput != (direction == Direction::Input)) { + terminator.Crash("Child %s attempted on %s parent I/O unit", what, + parentIsInput ? "input" : "output"); + return false; + } else { + return true; + } +} + } // namespace Fortran::runtime::io diff --git a/flang/runtime/unit.h b/flang/runtime/unit.h index 9634f1a95804e..99ba05d78bee6 100644 --- a/flang/runtime/unit.h +++ b/flang/runtime/unit.h @@ -28,6 +28,7 @@ namespace Fortran::runtime::io { class UnitMap; +class ChildIo; class ExternalFileUnit : public ConnectionState, public OpenFile, @@ -36,6 +37,7 @@ class ExternalFileUnit : public ConnectionState, explicit ExternalFileUnit(int unitNumber) : unitNumber_{unitNumber} {} int unitNumber() const { return unitNumber_; } bool swapEndianness() const { return swapEndianness_; } + bool createdForInternalChildIo() const { return createdForInternalChildIo_; } static ExternalFileUnit *LookUp(int unit); static ExternalFileUnit &LookUpOrCrash(int unit, const Terminator &); @@ -46,7 +48,7 @@ class ExternalFileUnit : public ConnectionState, static ExternalFileUnit *LookUp(const char *path); static ExternalFileUnit &CreateNew(int unit, const Terminator &); static ExternalFileUnit *LookUpForClose(int unit); - static int NewUnit(const Terminator &); + static ExternalFileUnit &NewUnit(const Terminator &, bool forChildIo = false); static void CloseAll(IoErrorHandler &); static void FlushAll(IoErrorHandler &); @@ -62,7 +64,6 @@ class ExternalFileUnit : public ConnectionState, template IoStatementState &BeginIoStatement(X &&...xs) { - // TODO: Child data transfer statements vs. locking lock_.Take(); // dropped in EndIoStatement() A &state{u_.emplace(std::forward(xs)...)}; if constexpr (!std::is_same_v) { @@ -81,6 +82,7 @@ class ExternalFileUnit : public ConnectionState, void FinishReadingRecord(IoErrorHandler &); bool AdvanceRecord(IoErrorHandler &); void BackspaceRecord(IoErrorHandler &); + void FlushOutput(IoErrorHandler &); void FlushIfTerminal(IoErrorHandler &); void Endfile(IoErrorHandler &); void Rewind(IoErrorHandler &); @@ -91,6 +93,10 @@ class ExternalFileUnit : public ConnectionState, BeginRecord(); } + ChildIo *GetChildIo() { return child_.get(); } + ChildIo &PushChildIo(IoStatementState &); + void PopChildIo(ChildIo &); + private: static UnitMap &GetUnitMap(); const char *FrameNextInput(IoErrorHandler &, std::size_t); @@ -102,6 +108,7 @@ class ExternalFileUnit : public ConnectionState, bool SetSequentialVariableFormattedRecordLength(); void DoImpliedEndfile(IoErrorHandler &); void DoEndfile(IoErrorHandler &); + void CommitWrites(); int unitNumber_{-1}; Direction direction_{Direction::Output}; @@ -116,8 +123,8 @@ class ExternalFileUnit : public ConnectionState, ExternalFormattedIoStatementState, ExternalListIoStatementState, ExternalListIoStatementState, - UnformattedIoStatementState, - UnformattedIoStatementState, InquireUnitState, + ExternalUnformattedIoStatementState, + ExternalUnformattedIoStatementState, InquireUnitState, ExternalMiscIoStatementState> u_; @@ -132,6 +139,50 @@ class ExternalFileUnit : public ConnectionState, std::size_t recordOffsetInFrame_{0}; // of currentRecordNumber bool swapEndianness_{false}; + + bool createdForInternalChildIo_{false}; + + // A stack of child I/O pseudo-units for user-defined derived type + // I/O that have this unit number. + OwningPtr child_; +}; + +// A pseudo-unit for child I/O statements in user-defined derived type +// I/O subroutines; it forwards operations to the parent I/O statement, +// which can also be a child I/O statement. +class ChildIo { +public: + ChildIo(IoStatementState &parent, OwningPtr &&previous) + : parent_{parent}, previous_{std::move(previous)} {} + + IoStatementState &parent() const { return parent_; } + + void EndIoStatement(); + + template + IoStatementState &BeginIoStatement(X &&...xs) { + A &state{u_.emplace(std::forward(xs)...)}; + io_.emplace(state); + return *io_; + } + + OwningPtr AcquirePrevious() { return std::move(previous_); } + + bool CheckFormattingAndDirection( + Terminator &, const char *what, bool unformatted, Direction); + +private: + IoStatementState &parent_; + OwningPtr previous_; + std::variant, + ChildFormattedIoStatementState, + ChildListIoStatementState, + ChildListIoStatementState, + ChildUnformattedIoStatementState, + ChildUnformattedIoStatementState> + u_; + std::optional io_; }; } // namespace Fortran::runtime::io diff --git a/flang/test/Semantics/typeinfo01.f90 b/flang/test/Semantics/typeinfo01.f90 index a68c392ad7513..088c6e56b6b76 100644 --- a/flang/test/Semantics/typeinfo01.f90 +++ b/flang/test/Semantics/typeinfo01.f90 @@ -171,7 +171,7 @@ subroutine wu(x,u,iostat,iomsg) end module module m10 - type :: t + type, bind(c) :: t ! non-extensible end type interface read(formatted) procedure :: rf diff --git a/flang/test/Semantics/unpack.f90 b/flang/test/Semantics/unpack.f90 new file mode 100644 index 0000000000000..71bd21c7fb008 --- /dev/null +++ b/flang/test/Semantics/unpack.f90 @@ -0,0 +1,16 @@ +! RUN: %S/test_errors.sh %s %t %flang_fc1 +! REQUIRES: shell +! UNPACK() intrinsic function error tests +program test_unpack + integer, dimension(2) :: vector = [343, 512] + logical, dimension(2, 2) :: mask = & + reshape([.true., .false., .true., .false.], [2, 2]) + integer, dimension(2, 2) :: field = reshape([1, 2, 3, 4, 5, 6], [2, 2]) + integer, dimension(2, 1) :: bad_field = reshape([1, 2], [2, 1]) + integer :: scalar_field + integer, dimension(2, 2) :: result + result = unpack(vector, mask, field) + !ERROR: Dimension 2 of 'mask=' argument has extent 2, but 'field=' argument has extent 1 + result = unpack(vector, mask, bad_field) + result = unpack(vector, mask, scalar_field) +end program diff --git a/flang/tools/f18/CMakeLists.txt b/flang/tools/f18/CMakeLists.txt index fc84bbf09c59d..239859b5e5b9d 100644 --- a/flang/tools/f18/CMakeLists.txt +++ b/flang/tools/f18/CMakeLists.txt @@ -62,10 +62,13 @@ add_custom_target(module_files ALL DEPENDS ${MODULE_FILES}) install(TARGETS f18 DESTINATION bin) +set(FLANG_DEFAULT_DRIVER "flang-new") +if (NOT FLANG_BUILD_NEW_DRIVER) + set(FLANG_DEFAULT_DRIVER "f18") +endif() + # This flang shell script will only work in a POSIX shell. if (NOT WIN32) - file(COPY ${CMAKE_CURRENT_SOURCE_DIR}/flang - DESTINATION ${CMAKE_BINARY_DIR}/bin - FILE_PERMISSIONS OWNER_EXECUTE OWNER_READ OWNER_WRITE) + configure_file(${CMAKE_CURRENT_SOURCE_DIR}/flang.in ${CMAKE_BINARY_DIR}/bin/flang @ONLY) install(PROGRAMS ${CMAKE_BINARY_DIR}/bin/flang DESTINATION bin) endif() diff --git a/flang/tools/f18/f18.cpp b/flang/tools/f18/f18.cpp index 71f7673c84075..4fe5d1a99a3f0 100644 --- a/flang/tools/f18/f18.cpp +++ b/flang/tools/f18/f18.cpp @@ -319,7 +319,22 @@ std::string CompileFortran(std::string path, Fortran::parser::Options options, Fortran::parser::DumpTree(llvm::outs(), parseTree, &asFortran); } if (driver.dumpUnparse) { - Unparse(llvm::outs(), parseTree, driver.encoding, true /*capitalize*/, + // Prepare the output stream + std::unique_ptr os; + std::string outputFile = "-"; + if (!driver.outputPath.empty()) { + outputFile = driver.outputPath; + } + + std::error_code EC; + os.reset(new llvm::raw_fd_ostream( + outputFile, EC, llvm::sys::fs::OF_TextWithCRLF)); + if (EC) { + llvm::errs() << EC.message() << "\n"; + std::exit(EXIT_FAILURE); + } + + Unparse(*os, parseTree, driver.encoding, true /*capitalize*/, options.features.IsEnabled( Fortran::common::LanguageFeature::BackslashEscapes), nullptr /* action before each statement */, diff --git a/flang/tools/f18/flang b/flang/tools/f18/flang deleted file mode 100644 index 846be4a18fdd8..0000000000000 --- a/flang/tools/f18/flang +++ /dev/null @@ -1,16 +0,0 @@ -#!/bin/bash -#===-- tools/f18/flang.sh -----------------------------------------*- sh -*-===# -# -# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -# See https://llvm.org/LICENSE.txt for license information. -# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -# -#===------------------------------------------------------------------------===# - -wd=$(cd $(dirname "$0")/.. && pwd) -opts="-fno-analyzed-objects-for-unparse -module-suffix .f18.mod " -if ! $wd/bin/f18 $opts "$@" -then status=$? - echo flang: in $PWD, f18 failed with exit status $status: $wd/bin/f18 $opts "$@" >&2 - exit $status -fi diff --git a/flang/tools/f18/flang.in b/flang/tools/f18/flang.in new file mode 100755 index 0000000000000..9620821dc1d35 --- /dev/null +++ b/flang/tools/f18/flang.in @@ -0,0 +1,385 @@ +#! /usr/bin/env bash +#===-- tools/f18/flang.sh -----------------------------------------*- sh -*-===# +# +# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +# See https://llvm.org/LICENSE.txt for license information. +# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +# +#===------------------------------------------------------------------------===# +# A wrapper script for Flang's compiler driver that was developed for testing and +# experimenting. You should be able to use it as a regular compiler driver. It +# will: +# * run Flang's compiler driver to unparse the input source files +# * use the external compiler (defined via F18_FC environment variable) to +# compile the unparsed source files +#===------------------------------------------------------------------------===# +set -euo pipefail + +# Global variables to make the parsing of input arguments a bit easier +INPUT_FILES=() +OPTIONS=() +OUTPUT_FILE="" +MODULE_DIR="" +INTRINSICS_MOD_DIR="" +COMPILE_ONLY="False" +PREPROCESS_ONLY="False" +TEMP_OUTPUT="flang_temp_out_" +PRINT_VERSION="False" + +# === parse_args ============================================================== +# +# Parse the input arguments passed to this script. Sets the global variables +# declared at the top. +# +# INPUTS: +# $1 - all input arguments +# OUTPUTS: +# Saved in the global variables for this script +# ============================================================================= +parse_args() +{ + while [ "${1:-}" != "" ]; do + # CASE 1: Compiler option + if [[ "${1:0:1}" == "-" ]] ; then + # Output file - extract it into a global variable + if [[ "$1" == "-o" ]] ; then + shift + OUTPUT_FILE="$1" + shift + continue + fi + + # Module directory - extract it into a global variable + if [[ "$1" == "-module-dir" ]]; then + shift + MODULE_DIR="$1" + shift + continue + fi + + # Intrinsics module dir - extract it into a global var + if [[ "$1" == "-intrinsics-module-directory" ]]; then shift + INTRINSICS_MOD_DIR=$1 + shift + continue + fi + + # Module suffix cannot be modified - this script defines it before + # calling the driver. + if [[ "$1" == "-module-suffix" ]]; then + echo "ERROR: \'-module-suffix\' is not available when using the \'flang\' script" + exit 1 + fi + + # Special treatment for `J ` and `-I `. We translate these + # into `J` and `-I` respectively. + if [[ "$1" == "-J" ]] || [[ "$1" == "-I" ]]; then + opt=$1 + shift + OPTIONS+=("$opt$1") + shift + continue + fi + + # This is a regular option - just add it to the list. + OPTIONS+=($1) + if [[ $1 == "-c" ]]; then + COMPILE_ONLY="True" + fi + + if [[ $1 == "-E" ]]; then + PREPROCESS_ONLY="True" + fi + + if [[ $1 == "-v" || $1 == "--version" ]]; then + PRINT_VERSION="True" + fi + + shift + continue + + # CASE 2: A regular file (either source or a library file) + elif [[ -f "$1" ]]; then + INPUT_FILES+=($1) + shift + continue + + else + # CASE 3: Unsupported + echo "ERROR: unrecognised option format $1" + exit 1 + fi + done +} + +# === categorise_files ======================================================== +# +# Categorises input files into: +# * Fortran source files (to be compiled) +# * library files (to be linked into the final executable) +# +# INPUTS: +# $1 - all input files to be categorised (array, name reference) +# OUTPUTS: +# $2 - Fortran source files extracted from $1 (array, name reference) +# $3 - other source files extracted from $1 (array, name reference) +# $4 - object files extracted from $1 (array, name reference) +# $4 - lib files extracted from $1 (array, name reference) +# ============================================================================= +categorise_files() +{ + local -n -r all_files=$1 + local -n fortran_sources=$2 + local -n other_sources=$3 + local -n libs=$4 + + for current_file in "${all_files[@]}"; do + file_ext=${current_file##*.} + if [[ $file_ext == "f" ]] || [[ $file_ext == "f90" ]] || + [[ $file_ext == "f" ]] || [[ $file_ext == "F" ]] || [[ $file_ext == "ff" ]] || + [[ $file_ext == "f90" ]] || [[ $file_ext == "F90" ]] || [[ $file_ext == "ff90" ]] || + [[ $file_ext == "f95" ]] || [[ $file_ext == "F95" ]] || [[ $file_ext == "ff95" ]] || + [[ $file_ext == "cuf" ]] || [[ $file_ext == "CUF" ]] || [[ $file_ext == "f18" ]] || + [[ $file_ext == "F18" ]] || [[ $file_ext == "ff18" ]]; then + fortran_sources+=($current_file) + elif [[ $file_ext == "a" ]] || [[ $file_ext == "so" ]]; then + libs+=($current_file) + elif [[ $file_ext == "o" ]]; then + object_files+=($current_file) + else + other_sources+=($current_file) + fi + done +} + +# === categorise_opts ========================================================== +# +# Categorises compiler options into options for: +# * the Flang driver (either new or the "throwaway" driver) +# * the external Fortran driver that will generate the code +# Most options accepted by Flang will be claimed by it. The only exceptions are +# `-I` and `-J`. +# +# INPUTS: +# $1 - all compiler options (array, name reference) +# OUTPUTS: +# $2 - compiler options for the Flang driver (array, name reference) +# $3 - compiler options for the external driver (array, name reference) +# ============================================================================= +categorise_opts() +{ + local -n all_opts=$1 + local -n flang_opts=$2 + local -n fc_opts=$3 + + for opt in "${all_opts[@]}"; do + # These options are claimed by Flang, but should've been dealt with in parse_args. + if [[ $opt == "-module-dir" ]] || + [[ $opt == "-o" ]] || + [[ $opt == "-fintrinsic-modules-path" ]] ; then + echo "ERROR: $opt should've been fully processed by \`parse_args\`" + exit 1 + fi + + if + # The options claimed by Flang. This list needs to be compatible with + # what's supported by Flang's compiler driver (i.e. `flang-new` and f18). + [[ $opt == "-cpp" ]] || + [[ $opt =~ ^-D.* ]] || + [[ $opt == "-E" ]] || + [[ $opt == "-falternative-parameter-statement" ]] || + [[ $opt == "-fbackslash" ]] || + [[ $opt == "-fcolor-diagnostics" ]] || + [[ $opt == "-fdefault-double-8" ]] || + [[ $opt == "-fdefault-integer-8" ]] || + [[ $opt == "-fdefault-real-8" ]] || + [[ $opt == "-ffixed-form" ]] || + [[ $opt =~ ^-ffixed-line-length=.* ]] || + [[ $opt == "-ffree-form" ]] || + [[ $opt == "-fimplicit-none" ]] || + [[ $opt =~ ^-finput-charset=.* ]] || + [[ $opt == "-flarge-sizes" ]] || + [[ $opt == "-flogical-abbreviations" ]] || + [[ $opt == "-fno-color-diagnostics" ]] || + [[ $opt == "-fopenacc" ]] || + [[ $opt == "-fopenmp" ]] || + [[ $opt == "-fxor-operator" ]] || + [[ $opt == "-help" ]] || + [[ $opt == "-nocpp" ]] || + [[ $opt == "-pedantic" ]] || + [[ $opt =~ ^-std=.* ]] || + [[ $opt =~ ^-U.* ]] || + [[ $opt == "-Werror" ]]; then + flang_opts+=($opt) + elif [[ $opt =~ -I.* ]] || [[ $opt =~ -J.* ]]; then + # Options that are needed for both Flang and the external driver. + flang_opts+=($opt) + fc_opts+=($opt) + else + # All other options are claimed for the external driver. + fc_opts+=($opt) + fi + done +} + +# === preprocess ============================================================== +# +# Runs the preprocessing. Fortran files are preprocessed using Flang. Other +# files are preprocessed using the external Fortran compiler. +# +# INPUTS: +# $1 - Fortran source files (array, name reference) +# $2 - other source files (array, name reference) +# $3 - compiler flags (array, name reference) +# ============================================================================= +preprocess() { + local -n fortran_srcs=$1 + local -n other_srcs=$2 + local -n opts=$3 + + local -r ext_fc="${F18_FC:-gfortran}" + local -r wd=$(cd "$(dirname "$0")/.." && pwd) + + # Use the provided output file name. + if [[ ! -z ${OUTPUT_FILE:+x} ]]; then + output_definition="-o $OUTPUT_FILE" + fi + + # Preprocess fortran sources using Flang + for idx in "${!fortran_srcs[@]}"; do + if ! "$wd/bin/@FLANG_DEFAULT_DRIVER@" -E "${opts[@]}" "${fortran_srcs[$idx]}" ${output_definition:+$output_definition} + then status=$? + echo flang: in "$PWD", @FLANG_DEFAULT_DRIVER@ failed with exit status $status: "$wd/bin/@FLANG_DEFAULT_DRIVER@" "${opts[@]}" "$@" >&2 + exit $status + fi + done + + # Preprocess other sources using Flang + for idx in "${!other_srcs[@]}"; do + if ! $ext_fc -E "${opts[@]}" "${other_srcs[$idx]}" ${output_definition:+$output_definition} + then status=$? + echo flang: in "$PWD", flang-new failed with exit status $status: "$wd/bin/flang-new" "${flang_options[@]}" "$@" >&2 + exit $status + fi + done +} + +# === main ==================================================================== +# Main entry point for this script +# ============================================================================= +main() { + parse_args "$@" + + if [[ $PRINT_VERSION == "True" ]]; then + echo "flang version @FLANG_VERSION@" + exit 0 + fi + + fortran_source_files=() + other_source_files=() + object_files=() + lib_files=() + categorise_files INPUT_FILES fortran_source_files other_source_files object_files lib_files + + if [[ $PREPROCESS_ONLY == "True" ]]; then + preprocess fortran_source_files other_source_files OPTIONS + exit 0 + fi + + # Options for the Flang driver. + # NOTE: We need `-fc1` to make sure that the frontend driver rather than + # compiler driver is used. We also need to make sure that that's the first + # flag that the driver will see (otherwise it assumes compiler/toolchain + # driver mode).`f18` will just ignore this flag when uparsing, so it's fine + # to add it here unconditionally. + flang_options=("-fc1") + # Options for the external Fortran Compiler + ext_fc_options=() + categorise_opts OPTIONS flang_options ext_fc_options + + local -r wd=$(cd "$(dirname "$0")/.." && pwd) + + # STEP 1: Unparse + local -r unparsed_file="flang_unparsed_source_file" + flang_options+=("-module-suffix") + flang_options+=(".f18.mod") + flang_options+=("-fdebug-unparse") + flang_options+=("-fno-analyzed-objects-for-unparse") + + [[ ! -z ${MODULE_DIR} ]] && flang_options+=("-module-dir ${MODULE_DIR}") + [[ ! -z ${INTRINSICS_MOD_DIR} ]] && flang_options+=("-intrinsics-module-directory ${INTRINSICS_MOD_DIR}") + for idx in "${!fortran_source_files[@]}"; do + if ! "$wd/bin/@FLANG_DEFAULT_DRIVER@" "${flang_options[@]}" "${fortran_source_files[$idx]}" -o "${unparsed_file}_${idx}.f90" + then status=$? + echo flang: in "$PWD", @FLANG_DEFAULT_DRIVER@ failed with exit status $status: "$wd/bin/@FLANG_DEFAULT_DRIVER@" "${flang_options[@]}" "$@" >&2 + exit $status + fi + done + + # STEP 2: Compile Fortran Source Files + readonly ext_fc="${F18_FC:-gfortran}" + for idx in "${!fortran_source_files[@]}"; do + # Use the value of $OUTPUT_FILE for the output file iff `-c` was used. + if [[ ! -z ${OUTPUT_FILE:+x} ]] && [[ $COMPILE_ONLY == "True" ]]; then + output_definition="-o $OUTPUT_FILE" + elif [[ $COMPILE_ONLY == "False" ]]; then + output_definition="-o ${TEMP_OUTPUT}_${idx}" + fi + + if ! $ext_fc -c "${ext_fc_options[@]}" "${unparsed_file}_${idx}.f90" ${output_definition:+$output_definition} + then status=$? + echo flang: in "$PWD", "$ext_fc" failed with exit status $status: "$ext_fc" "${ext_fc_options[@]}" "$@" >&2 + exit $status + fi + object_files+=(${TEMP_OUTPUT}_${idx}) + done + + # Delete the unparsed files + for idx in "${!fortran_source_files[@]}"; do + rm "${unparsed_file}_${idx}.f90" + done + + # STEP 3: Compile Other Source Files + for idx in "${!other_source_files[@]}"; do + # Use the value of $OUTPUT_FILE for the output file iff `-c` was used. + if [[ ! -z ${OUTPUT_FILE:+x} ]] && [[ $COMPILE_ONLY == "True" ]]; then + output_definition="-o $OUTPUT_FILE" + elif [[ $COMPILE_ONLY == "False" ]]; then + output_definition="-o ${TEMP_OUTPUT}_${idx}" + fi + + if ! $ext_fc -c "${ext_fc_options[@]}" "${other_source_files[${idx}]}" ${output_definition:+$output_definition} + then status=$? + echo flang: in "$PWD", "$ext_fc" failed with exit status $status: "$ext_fc" "${ext_fc_options[@]}" "$@" >&2 + exit $status + fi + object_files+=(${TEMP_OUTPUT}_${idx}) + done + + # STEP 4: Link + if [[ $COMPILE_ONLY == "True" ]]; then + exit 0; + fi + + if [[ ${#object_files[@]} -ge 1 ]]; then + # If $OUTPUT_FILE was specified, use it for the output name. + if [[ ! -z ${OUTPUT_FILE:+x} ]]; then + output_definition="-o $OUTPUT_FILE" + else + output_definition="" + fi + + if ! $ext_fc "${ext_fc_options[@]}" "${object_files[@]}" "${lib_files[@]}" ${output_definition:+$output_definition} + then status=$? + echo flang: in "$PWD", "$ext_fc" failed with exit status $status: "$ext_fc" "${ext_fc_options[@]}" "$@" >&2 + exit $status + fi + fi + + # Delete intermediate object files + for idx in "${!fortran_source_files[@]}"; do + rm "${TEMP_OUTPUT}_${idx}" + done +} + +main "${@}" diff --git a/libc/CMakeLists.txt b/libc/CMakeLists.txt index 30ffa35111db9..5f891510fbb5a 100644 --- a/libc/CMakeLists.txt +++ b/libc/CMakeLists.txt @@ -77,8 +77,20 @@ include(CMakeParseArguments) include(LLVMLibCRules) include(LLVMLibCCheckCpuFeatures) -include("${LIBC_SOURCE_DIR}/config/${LIBC_TARGET_OS}/${LIBC_TARGET_ARCHITECTURE}/entrypoints.txt") -include("${LIBC_SOURCE_DIR}/config/${LIBC_TARGET_OS}/${LIBC_TARGET_ARCHITECTURE}/headers.txt") +if(EXISTS "${LIBC_SOURCE_DIR}/config/${LIBC_TARGET_OS}/${LIBC_TARGET_ARCHITECTURE}/entrypoints.txt") + set(entrypoint_file "${LIBC_SOURCE_DIR}/config/${LIBC_TARGET_OS}/${LIBC_TARGET_ARCHITECTURE}/entrypoints.txt") +elseif(EXISTS "${LIBC_SOURCE_DIR}/config/${LIBC_TARGET_OS}/entrypoints.txt") + set(entrypoint_file "${LIBC_SOURCE_DIR}/config/${LIBC_TARGET_OS}/entrypoints.txt") +else() + message(FATAL_ERROR "entrypoints.txt file for the target platform not found.") +endif() +include(${entrypoint_file}) + +if(EXISTS "${LIBC_SOURCE_DIR}/config/${LIBC_TARGET_OS}/${LIBC_TARGET_ARCHITECTURE}/headers.txt") + include("${LIBC_SOURCE_DIR}/config/${LIBC_TARGET_OS}/${LIBC_TARGET_ARCHITECTURE}/headers.txt") +elseif(EXISTS "${LIBC_SOURCE_DIR}/config/${LIBC_TARGET_OS}/headers.txt") + include("${LIBC_SOURCE_DIR}/config/${LIBC_TARGET_OS}//headers.txt") +endif() set(TARGET_ENTRYPOINT_NAME_LIST "") foreach(entrypoint IN LISTS TARGET_LLVMLIBC_ENTRYPOINTS) diff --git a/libc/config/windows/README.md b/libc/config/windows/README.md new file mode 100644 index 0000000000000..8e01a409f9247 --- /dev/null +++ b/libc/config/windows/README.md @@ -0,0 +1,76 @@ +# Building and Testing LLVM libc on Windows + +## Setting Up Environment + +To build LLVM libc on Windows, first build Clang using the following steps. + +1. Open Command Prompt in Windows +2. Set TEMP and TMP to a directory. Creating this path is necessary for a + successful clang build. + 1. Create tmp under your preferred directory or under `C:\src`: + + ``` + cd C:\src + mkdir tmp + ``` + + 2. In the start menu, search for "environment variables for your account". + Set TEMP and TMP to `C:\src\tmp` or the corresponding path elsewhere. +3. Download [Visual Studio Community](https://visualstudio.microsoft.com/downloads/). +4. Install [CMake](https://cmake.org/download/) and + [Ninja](https://github.com/ninja-build/ninja/releases). (Optional, included + in Visual Studio). +5. Load the Visual Studio environment variables using this command. This is + crucial as it allows you to use build tools like CMake and Ninja: + + ``` + "C:\Program Files (x86)\Microsoft Visual Studio\2019\Community\VC\Auxiliary\Build\vcvarsall.bat" amd64 + ``` + + Note: **Rerun this command every time you open a new Command Prompt + window.** + +6. If you have not used Git before, install + [Git](https://git-scm.com/download/win) for Windows. Check out the LLVM + source tree from Github using: + + ``` + git clone https://github.com/llvm/llvm-project.git + ``` + +7. Ensure you have access to Clang, either by downloading from + [LLVM Download](https://releases.llvm.org/download.html) or + [building it yourself](https://clang.llvm.org/get_started.html). + +## Building LLVM libc + +In this section, Clang will be used to compile LLVM +libc, and finally, build and test the libc. + +8. Create a empty build directory in `C:\src` or your preferred directory and + cd to it using: + + ``` + mkdir libc-build + cd libc-build + ``` + +9. Run the following CMake command to generate build files. LLVM libc must be built + by Clang, so ensure Clang is specified as the C and C++ compiler. + + ``` + cmake -G Ninja ../llvm-project/llvm -DCMAKE_C_COMPILER=C:/src/clang-build/bin/clang-cl.exe -DCMAKE_CXX_COMPILER=C:/src/clang-build/bin/clang-cl.exe -DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_FORCE_BUILD_RUNTIME=libc -DLLVM_ENABLE_PROJECTS=libc -DLLVM_NATIVE_ARCH=x86_64 -DLLVM_HOST_TRIPLE=x86_64-window-x86-gnu + ``` + +10. Build LLVM libc using: + + ``` + ninja llvmlibc + + ``` + +11. Run tests using: + + ``` + ninja checklibc + ``` diff --git a/libc/config/windows/entrypoints.txt b/libc/config/windows/entrypoints.txt new file mode 100644 index 0000000000000..390f2fdf12146 --- /dev/null +++ b/libc/config/windows/entrypoints.txt @@ -0,0 +1,44 @@ +set(TARGET_LIBC_ENTRYPOINTS + # ctype.h entrypoints + libc.src.ctype.isalnum + libc.src.ctype.isalpha + libc.src.ctype.isascii + libc.src.ctype.isblank + libc.src.ctype.iscntrl + libc.src.ctype.isdigit + libc.src.ctype.isgraph + libc.src.ctype.islower + libc.src.ctype.isprint + libc.src.ctype.ispunct + libc.src.ctype.isspace + libc.src.ctype.isupper + libc.src.ctype.isxdigit + libc.src.ctype.toascii + libc.src.ctype.tolower + libc.src.ctype.toupper + # string.h entrypoints + libc.src.string.bzero + libc.src.string.memchr + libc.src.string.memcmp + libc.src.string.memcpy + libc.src.string.memmove + libc.src.string.memset + libc.src.string.memrchr + libc.src.string.strcat + libc.src.string.strchr + libc.src.string.strcpy + libc.src.string.strcmp + libc.src.string.strcspn + libc.src.string.strlen + libc.src.string.strncpy + libc.src.string.strnlen + libc.src.string.strpbrk + libc.src.string.strrchr + libc.src.string.strspn + libc.src.string.strstr + libc.src.string.strtok + libc.src.string.strtok_r +) +set(TARGET_LLVMLIBC_ENTRYPOINTS + ${TARGET_LIBC_ENTRYPOINTS} +) diff --git a/libc/src/fenv/fesetexceptflag.cpp b/libc/src/fenv/fesetexceptflag.cpp index 1968ebea5a60b..9ee6205d3a6cc 100644 --- a/libc/src/fenv/fesetexceptflag.cpp +++ b/libc/src/fenv/fesetexceptflag.cpp @@ -21,6 +21,7 @@ LLVM_LIBC_FUNCTION(int, fesetexceptflag, static_assert(sizeof(int) >= sizeof(fexcept_t), "fexcept_t value cannot fit in an int value."); int excepts_to_set = static_cast(*flagp) & excepts; + fputil::clearExcept(FE_ALL_EXCEPT); return fputil::setExcept(excepts_to_set); } diff --git a/libc/test/src/fenv/CMakeLists.txt b/libc/test/src/fenv/CMakeLists.txt index 851db03985698..1fa3e687e5cbb 100644 --- a/libc/test/src/fenv/CMakeLists.txt +++ b/libc/test/src/fenv/CMakeLists.txt @@ -60,6 +60,17 @@ add_libc_unittest( libc.utils.FPUtil.fputil ) +add_libc_unittest( + feclearexcept_test + SUITE + libc_fenv_unittests + SRCS + feclearexcept_test.cpp + DEPENDS + libc.src.fenv.feclearexcept + libc.utils.FPUtil.fputil +) + if (NOT LLVM_USE_SANITIZER) # Sanitizers don't like SIGFPE. So, we will run the # tests which raise SIGFPE only in non-sanitizer builds. diff --git a/libc/test/src/fenv/exception_flags_test.cpp b/libc/test/src/fenv/exception_flags_test.cpp index e492a21c1b1e2..855ba7c9248d2 100644 --- a/libc/test/src/fenv/exception_flags_test.cpp +++ b/libc/test/src/fenv/exception_flags_test.cpp @@ -18,6 +18,7 @@ TEST(LlvmLibcFenvTest, GetExceptFlagAndSetExceptFlag) { // We will disable all exceptions to prevent invocation of the exception // handler. __llvm_libc::fputil::disableExcept(FE_ALL_EXCEPT); + __llvm_libc::fputil::clearExcept(FE_ALL_EXCEPT); int excepts[] = {FE_DIVBYZERO, FE_INVALID, FE_INEXACT, FE_OVERFLOW, FE_UNDERFLOW}; @@ -39,7 +40,19 @@ TEST(LlvmLibcFenvTest, GetExceptFlagAndSetExceptFlag) { ASSERT_EQ(__llvm_libc::fesetexceptflag(&eflags, FE_ALL_EXCEPT), 0); ASSERT_NE(__llvm_libc::fputil::testExcept(FE_ALL_EXCEPT) & e, 0); - // Cleanup - __llvm_libc::fputil::clearExcept(e); + // Cleanup. We clear all excepts as raising excepts like FE_OVERFLOW + // can also raise FE_INEXACT. + __llvm_libc::fputil::clearExcept(FE_ALL_EXCEPT); } + + // Next, we will raise one exception and save the flags. + __llvm_libc::fputil::raiseExcept(FE_INVALID); + fexcept_t eflags; + __llvm_libc::fegetexceptflag(&eflags, FE_ALL_EXCEPT); + // Clear all exceptions and raise two other exceptions. + __llvm_libc::fputil::clearExcept(FE_ALL_EXCEPT); + __llvm_libc::fputil::raiseExcept(FE_OVERFLOW | FE_INEXACT); + // When we set the flags and test, we should only see FE_INVALID. + __llvm_libc::fesetexceptflag(&eflags, FE_ALL_EXCEPT); + EXPECT_EQ(__llvm_libc::fputil::testExcept(FE_ALL_EXCEPT), FE_INVALID); } diff --git a/libc/test/src/fenv/feclearexcept_test.cpp b/libc/test/src/fenv/feclearexcept_test.cpp new file mode 100644 index 0000000000000..dfdc29dc85fba --- /dev/null +++ b/libc/test/src/fenv/feclearexcept_test.cpp @@ -0,0 +1,83 @@ +//===-- Unittests for feclearexcept with exceptions enabled ---------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/fenv/feclearexcept.h" + +#include "utils/FPUtil/FEnv.h" +#include "utils/UnitTest/Test.h" + +#include +#include + +TEST(LlvmLibcFEnvTest, ClearTest) { + uint16_t excepts[] = {FE_DIVBYZERO, FE_INVALID, FE_INEXACT, FE_OVERFLOW, + FE_UNDERFLOW}; + __llvm_libc::fputil::disableExcept(FE_ALL_EXCEPT); + __llvm_libc::fputil::clearExcept(FE_ALL_EXCEPT); + + for (uint16_t e : excepts) + ASSERT_EQ(__llvm_libc::fputil::testExcept(e), 0); + + __llvm_libc::fputil::raiseExcept(FE_ALL_EXCEPT); + for (uint16_t e : excepts) { + // We clear one exception and test to verify that it was cleared. + __llvm_libc::feclearexcept(e); + ASSERT_EQ(uint16_t(__llvm_libc::fputil::testExcept(FE_ALL_EXCEPT)), + uint16_t(FE_ALL_EXCEPT & ~e)); + // After clearing, we raise the exception again. + __llvm_libc::fputil::raiseExcept(e); + } + + for (uint16_t e1 : excepts) { + for (uint16_t e2 : excepts) { + __llvm_libc::feclearexcept(e1 | e2); + ASSERT_EQ(uint16_t(__llvm_libc::fputil::testExcept(FE_ALL_EXCEPT)), + uint16_t(FE_ALL_EXCEPT & ~(e1 | e2))); + __llvm_libc::fputil::raiseExcept(e1 | e2); + } + } + + for (uint16_t e1 : excepts) { + for (uint16_t e2 : excepts) { + for (uint16_t e3 : excepts) { + __llvm_libc::feclearexcept(e1 | e2 | e3); + ASSERT_EQ(uint16_t(__llvm_libc::fputil::testExcept(FE_ALL_EXCEPT)), + uint16_t(FE_ALL_EXCEPT & ~(e1 | e2 | e3))); + __llvm_libc::fputil::raiseExcept(e1 | e2 | e3); + } + } + } + + for (uint16_t e1 : excepts) { + for (uint16_t e2 : excepts) { + for (uint16_t e3 : excepts) { + for (uint16_t e4 : excepts) { + __llvm_libc::feclearexcept(e1 | e2 | e3 | e4); + ASSERT_EQ(uint16_t(__llvm_libc::fputil::testExcept(FE_ALL_EXCEPT)), + uint16_t(FE_ALL_EXCEPT & ~(e1 | e2 | e3 | e4))); + __llvm_libc::fputil::raiseExcept(e1 | e2 | e3 | e4); + } + } + } + } + + for (uint16_t e1 : excepts) { + for (uint16_t e2 : excepts) { + for (uint16_t e3 : excepts) { + for (uint16_t e4 : excepts) { + for (uint16_t e5 : excepts) { + __llvm_libc::feclearexcept(e1 | e2 | e3 | e4 | e5); + ASSERT_EQ(uint16_t(__llvm_libc::fputil::testExcept(FE_ALL_EXCEPT)), + uint16_t(FE_ALL_EXCEPT & ~(e1 | e2 | e3 | e4 | e5))); + __llvm_libc::fputil::raiseExcept(e1 | e2 | e3 | e4 | e5); + } + } + } + } + } +} diff --git a/libc/test/src/math/CMakeLists.txt b/libc/test/src/math/CMakeLists.txt index be0683932520a..44cdb7afe089d 100644 --- a/libc/test/src/math/CMakeLists.txt +++ b/libc/test/src/math/CMakeLists.txt @@ -656,6 +656,8 @@ add_fp_unittest( libc_math_unittests SRCS frexp_test.cpp + HDRS + FrexpTest.h DEPENDS libc.include.math libc.src.math.frexp @@ -669,6 +671,8 @@ add_fp_unittest( libc_math_unittests SRCS frexpf_test.cpp + HDRS + FrexpTest.h DEPENDS libc.include.math libc.src.math.frexpf @@ -682,6 +686,8 @@ add_fp_unittest( libc_math_unittests SRCS frexpl_test.cpp + HDRS + FrexpTest.h DEPENDS libc.include.math libc.src.math.frexpl @@ -802,6 +808,8 @@ add_fp_unittest( libc_math_unittests SRCS logbl_test.cpp + HDRS + LogbTest.h DEPENDS libc.include.math libc.src.math.logbl @@ -814,6 +822,8 @@ add_fp_unittest( libc_math_unittests SRCS modf_test.cpp + HDRS + ModfTest.h DEPENDS libc.include.math libc.src.math.modf @@ -826,6 +836,8 @@ add_fp_unittest( libc_math_unittests SRCS modff_test.cpp + HDRS + ModfTest.h DEPENDS libc.include.math libc.src.math.modff @@ -838,6 +850,8 @@ add_fp_unittest( libc_math_unittests SRCS modfl_test.cpp + HDRS + ModfTest.h DEPENDS libc.include.math libc.src.math.modfl diff --git a/libc/test/src/math/FrexpTest.h b/libc/test/src/math/FrexpTest.h new file mode 100644 index 0000000000000..e6c31f2fc4406 --- /dev/null +++ b/libc/test/src/math/FrexpTest.h @@ -0,0 +1,118 @@ +//===-- Utility class to test frexp[f|l] ------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "utils/FPUtil/BasicOperations.h" +#include "utils/FPUtil/TestHelpers.h" +#include "utils/MPFRWrapper/MPFRUtils.h" +#include "utils/UnitTest/Test.h" + +#include + +namespace mpfr = __llvm_libc::testing::mpfr; + +template class FrexpTest : public __llvm_libc::testing::Test { + + DECLARE_SPECIAL_CONSTANTS(T) + + static constexpr UIntType HiddenBit = + UIntType(1) << __llvm_libc::fputil::MantissaWidth::value; + +public: + typedef T (*FrexpFunc)(T, int *); + + void testSpecialNumbers(FrexpFunc func) { + int exponent; + ASSERT_FP_EQ(aNaN, func(aNaN, &exponent)); + ASSERT_FP_EQ(inf, func(inf, &exponent)); + ASSERT_FP_EQ(negInf, func(negInf, &exponent)); + + ASSERT_FP_EQ(0.0, func(0.0, &exponent)); + ASSERT_EQ(exponent, 0); + + ASSERT_FP_EQ(-0.0, func(-0.0, &exponent)); + ASSERT_EQ(exponent, 0); + } + + void testPowersOfTwo(FrexpFunc func) { + int exponent; + + EXPECT_FP_EQ(T(0.5), func(T(1.0), &exponent)); + EXPECT_EQ(exponent, 1); + EXPECT_FP_EQ(T(-0.5), func(T(-1.0), &exponent)); + EXPECT_EQ(exponent, 1); + + EXPECT_FP_EQ(T(0.5), func(T(2.0), &exponent)); + EXPECT_EQ(exponent, 2); + EXPECT_FP_EQ(T(-0.5), func(T(-2.0), &exponent)); + EXPECT_EQ(exponent, 2); + + EXPECT_FP_EQ(T(0.5), func(T(4.0), &exponent)); + EXPECT_EQ(exponent, 3); + EXPECT_FP_EQ(T(-0.5), func(T(-4.0), &exponent)); + EXPECT_EQ(exponent, 3); + + EXPECT_FP_EQ(T(0.5), func(T(8.0), &exponent)); + EXPECT_EQ(exponent, 4); + EXPECT_FP_EQ(T(-0.5), func(T(-8.0), &exponent)); + EXPECT_EQ(exponent, 4); + + EXPECT_FP_EQ(T(0.5), func(T(16.0), &exponent)); + EXPECT_EQ(exponent, 5); + EXPECT_FP_EQ(T(-0.5), func(T(-16.0), &exponent)); + EXPECT_EQ(exponent, 5); + + EXPECT_FP_EQ(T(0.5), func(T(32.0), &exponent)); + EXPECT_EQ(exponent, 6); + EXPECT_FP_EQ(T(-0.5), func(T(-32.0), &exponent)); + EXPECT_EQ(exponent, 6); + } + + void testSomeIntegers(FrexpFunc func) { + int exponent; + + EXPECT_FP_EQ(T(0.75), func(T(24.0), &exponent)); + EXPECT_EQ(exponent, 5); + EXPECT_FP_EQ(T(-0.75), func(T(-24.0), &exponent)); + EXPECT_EQ(exponent, 5); + + EXPECT_FP_EQ(T(0.625), func(T(40.0), &exponent)); + EXPECT_EQ(exponent, 6); + EXPECT_FP_EQ(T(-0.625), func(T(-40.0), &exponent)); + EXPECT_EQ(exponent, 6); + + EXPECT_FP_EQ(T(0.78125), func(T(800.0), &exponent)); + EXPECT_EQ(exponent, 10); + EXPECT_FP_EQ(T(-0.78125), func(T(-800.0), &exponent)); + EXPECT_EQ(exponent, 10); + } + + void testRange(FrexpFunc func) { + using UIntType = typename FPBits::UIntType; + constexpr UIntType count = 10000000; + constexpr UIntType step = UIntType(-1) / count; + for (UIntType i = 0, v = 0; i <= count; ++i, v += step) { + T x = static_cast(FPBits(v)); + if (isnan(x) || isinf(x) || x == 0.0l) + continue; + + mpfr::BinaryOutput result; + result.f = func(x, &result.i); + + ASSERT_TRUE(__llvm_libc::fputil::abs(result.f) < 1.0); + ASSERT_TRUE(__llvm_libc::fputil::abs(result.f) >= 0.5); + ASSERT_MPFR_MATCH(mpfr::Operation::Frexp, x, result, 0.0); + } + } +}; + +#define LIST_FREXP_TESTS(T, func) \ + using LlvmLibcFrexpTest = FrexpTest; \ + TEST_F(LlvmLibcFrexpTest, SpecialNumbers) { testSpecialNumbers(&func); } \ + TEST_F(LlvmLibcFrexpTest, PowersOfTwo) { testPowersOfTwo(&func); } \ + TEST_F(LlvmLibcFrexpTest, SomeIntegers) { testSomeIntegers(&func); } \ + TEST_F(LlvmLibcFrexpTest, InRange) { testRange(&func); } diff --git a/libc/test/src/math/LogbTest.h b/libc/test/src/math/LogbTest.h new file mode 100644 index 0000000000000..e993eca35e079 --- /dev/null +++ b/libc/test/src/math/LogbTest.h @@ -0,0 +1,94 @@ +//===-- Utility class to test logb[f|l] -------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "utils/FPUtil/ManipulationFunctions.h" +#include "utils/FPUtil/TestHelpers.h" +#include "utils/MPFRWrapper/MPFRUtils.h" +#include "utils/UnitTest/Test.h" + +#include + +namespace mpfr = __llvm_libc::testing::mpfr; + +template class LogbTest : public __llvm_libc::testing::Test { + + DECLARE_SPECIAL_CONSTANTS(T) + + static constexpr UIntType HiddenBit = + UIntType(1) << __llvm_libc::fputil::MantissaWidth::value; + +public: + typedef T (*LogbFunc)(T); + + void testSpecialNumbers(LogbFunc func) { + ASSERT_FP_EQ(aNaN, func(aNaN)); + ASSERT_FP_EQ(inf, func(inf)); + ASSERT_FP_EQ(inf, func(negInf)); + ASSERT_FP_EQ(negInf, func(0.0)); + ASSERT_FP_EQ(negInf, func(-0.0)); + } + + void testPowersOfTwo(LogbFunc func) { + EXPECT_FP_EQ(T(0.0), func(T(1.0))); + EXPECT_FP_EQ(T(0.0), func(T(-1.0))); + + EXPECT_FP_EQ(T(1.0), func(T(2.0))); + EXPECT_FP_EQ(T(1.0), func(T(-2.0))); + + EXPECT_FP_EQ(T(2.0), func(T(4.0))); + EXPECT_FP_EQ(T(2.0), func(T(-4.0))); + + EXPECT_FP_EQ(T(3.0), func(T(8.0))); + EXPECT_FP_EQ(T(3.0), func(T(-8.0))); + + EXPECT_FP_EQ(T(4.0), func(T(16.0))); + EXPECT_FP_EQ(T(4.0), func(T(-16.0))); + + EXPECT_FP_EQ(T(5.0), func(T(32.0))); + EXPECT_FP_EQ(T(5.0), func(T(-32.0))); + } + + void testSomeIntegers(LogbFunc func) { + EXPECT_FP_EQ(T(1.0), func(T(3.0))); + EXPECT_FP_EQ(T(1.0), func(T(-3.0))); + + EXPECT_FP_EQ(T(2.0), func(T(7.0))); + EXPECT_FP_EQ(T(2.0), func(T(-7.0))); + + EXPECT_FP_EQ(T(3.0), func(T(10.0))); + EXPECT_FP_EQ(T(3.0), func(T(-10.0))); + + EXPECT_FP_EQ(T(4.0), func(T(31.0))); + EXPECT_FP_EQ(T(4.0), func(T(-31.0))); + + EXPECT_FP_EQ(T(5.0), func(T(55.0))); + EXPECT_FP_EQ(T(5.0), func(T(-55.0))); + } + + void testRange(LogbFunc func) { + using UIntType = typename FPBits::UIntType; + constexpr UIntType count = 10000000; + constexpr UIntType step = UIntType(-1) / count; + for (UIntType i = 0, v = 0; i <= count; ++i, v += step) { + T x = static_cast(FPBits(v)); + if (isnan(x) || isinf(x) || x == 0.0l) + continue; + + int exponent; + __llvm_libc::fputil::frexp(x, exponent); + ASSERT_FP_EQ(T(exponent), func(x) + T(1.0)); + } + } +}; + +#define LIST_LOGB_TESTS(T, func) \ + using LlvmLibcLogbTest = LogbTest; \ + TEST_F(LlvmLibcLogbTest, SpecialNumbers) { testSpecialNumbers(&func); } \ + TEST_F(LlvmLibcLogbTest, PowersOfTwo) { testPowersOfTwo(&func); } \ + TEST_F(LlvmLibcLogbTest, SomeIntegers) { testSomeIntegers(&func); } \ + TEST_F(LlvmLibcLogbTest, InRange) { testRange(&func); } diff --git a/libc/test/src/math/ModfTest.h b/libc/test/src/math/ModfTest.h new file mode 100644 index 0000000000000..4c8f519083af7 --- /dev/null +++ b/libc/test/src/math/ModfTest.h @@ -0,0 +1,108 @@ +//===-- Utility class to test floor[f|l] ------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "utils/FPUtil/BasicOperations.h" +#include "utils/FPUtil/NearestIntegerOperations.h" +#include "utils/FPUtil/TestHelpers.h" +#include "utils/MPFRWrapper/MPFRUtils.h" +#include "utils/UnitTest/Test.h" + +#include + +namespace mpfr = __llvm_libc::testing::mpfr; + +template class ModfTest : public __llvm_libc::testing::Test { + + DECLARE_SPECIAL_CONSTANTS(T) + +public: + typedef T (*ModfFunc)(T, T *); + + void testSpecialNumbers(ModfFunc func) { + T integral; + + EXPECT_FP_EQ(zero, func(zero, &integral)); + EXPECT_FP_EQ(integral, zero); + EXPECT_FP_EQ(negZero, func(negZero, &integral)); + EXPECT_FP_EQ(integral, negZero); + + EXPECT_FP_EQ(zero, func(inf, &integral)); + EXPECT_FP_EQ(inf, integral); + EXPECT_FP_EQ(negZero, func(negInf, &integral)); + EXPECT_FP_EQ(negInf, integral); + + EXPECT_FP_EQ(aNaN, func(aNaN, &integral)); + } + + void testIntegers(ModfFunc func) { + T integral; + + EXPECT_FP_EQ(T(0.0), func(T(1.0), &integral)); + EXPECT_FP_EQ(T(1.0), integral); + + EXPECT_FP_EQ(T(-0.0), func(T(-1.0), &integral)); + EXPECT_FP_EQ(T(-1.0), integral); + + EXPECT_FP_EQ(T(0.0), func(T(10.0), &integral)); + EXPECT_FP_EQ(T(10.0), integral); + + EXPECT_FP_EQ(T(-0.0), func(T(-10.0), &integral)); + EXPECT_FP_EQ(T(-10.0), integral); + + EXPECT_FP_EQ(T(0.0), func(T(12345.0), &integral)); + EXPECT_FP_EQ(T(12345.0), integral); + + EXPECT_FP_EQ(T(-0.0), func(T(-12345.0), &integral)); + EXPECT_FP_EQ(T(-12345.0), integral); + } + + void testFractions(ModfFunc func) { + T integral; + + EXPECT_FP_EQ(T(0.5), func(T(1.5), &integral)); + EXPECT_FP_EQ(integral, T(1.0)); + + EXPECT_FP_EQ(T(-0.5), func(T(-1.5), &integral)); + EXPECT_FP_EQ(integral, T(-1.0)); + + EXPECT_FP_EQ(T(0.75), func(T(10.75), &integral)); + EXPECT_FP_EQ(integral, T(10.0)); + + EXPECT_FP_EQ(T(-0.75), func(T(-10.75), &integral)); + EXPECT_FP_EQ(integral, T(-10.0)); + + EXPECT_FP_EQ(T(0.125), func(T(100.125), &integral)); + EXPECT_FP_EQ(integral, T(100.0)); + + EXPECT_FP_EQ(T(-0.125), func(T(-100.125), &integral)); + EXPECT_FP_EQ(integral, T(-100.0)); + } + + void testRange(ModfFunc func) { + constexpr UIntType count = 10000000; + constexpr UIntType step = UIntType(-1) / count; + for (UIntType i = 0, v = 0; i <= count; ++i, v += step) { + T x = T(FPBits(v)); + if (isnan(x) || isinf(x) || x == T(0.0)) + continue; + + T integral; + T frac = func(x, &integral); + ASSERT_TRUE(__llvm_libc::fputil::abs(frac) < 1.0l); + ASSERT_TRUE(__llvm_libc::fputil::trunc(x) == integral); + ASSERT_TRUE(integral + frac == x); + } + } +}; + +#define LIST_MODF_TESTS(T, func) \ + using LlvmLibcModfTest = ModfTest; \ + TEST_F(LlvmLibcModfTest, SpecialNumbers) { testSpecialNumbers(&func); } \ + TEST_F(LlvmLibcModfTest, RoundedNubmers) { testIntegers(&func); } \ + TEST_F(LlvmLibcModfTest, Fractions) { testFractions(&func); } \ + TEST_F(LlvmLibcModfTest, Range) { testRange(&func); } diff --git a/libc/test/src/math/cosf_test.cpp b/libc/test/src/math/cosf_test.cpp index debcfaf22365c..e9439a784a9bb 100644 --- a/libc/test/src/math/cosf_test.cpp +++ b/libc/test/src/math/cosf_test.cpp @@ -9,10 +9,8 @@ #include "src/math/cosf.h" #include "test/src/math/sdcomp26094.h" #include "utils/CPP/Array.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/ClassificationFunctions.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" +#include "utils/FPUtil/FPBits.h" +#include "utils/FPUtil/TestHelpers.h" #include "utils/MPFRWrapper/MPFRUtils.h" #include "utils/UnitTest/Test.h" #include @@ -20,51 +18,31 @@ #include #include -using __llvm_libc::fputil::isNegativeQuietNaN; -using __llvm_libc::fputil::isQuietNaN; -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; - using __llvm_libc::testing::sdcomp26094Values; +using FPBits = __llvm_libc::fputil::FPBits; namespace mpfr = __llvm_libc::testing::mpfr; +DECLARE_SPECIAL_CONSTANTS(float) + TEST(LlvmLibcCosfTest, SpecialNumbers) { errno = 0; - EXPECT_TRUE( - isQuietNaN(__llvm_libc::cosf(valueFromBits(BitPatterns::aQuietNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isNegativeQuietNaN( - __llvm_libc::cosf(valueFromBits(BitPatterns::aNegativeQuietNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isQuietNaN( - __llvm_libc::cosf(valueFromBits(BitPatterns::aSignallingNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isNegativeQuietNaN( - __llvm_libc::cosf(valueFromBits(BitPatterns::aNegativeSignallingNaN)))); + EXPECT_FP_EQ(aNaN, __llvm_libc::cosf(aNaN)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::one, - valueAsBits(__llvm_libc::cosf(valueFromBits(BitPatterns::zero)))); + EXPECT_FP_EQ(1.0f, __llvm_libc::cosf(0.0f)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::one, valueAsBits(__llvm_libc::cosf( - valueFromBits(BitPatterns::negZero)))); + EXPECT_FP_EQ(1.0f, __llvm_libc::cosf(-0.0f)); EXPECT_EQ(errno, 0); errno = 0; - EXPECT_TRUE(isQuietNaN(__llvm_libc::cosf(valueFromBits(BitPatterns::inf)))); + EXPECT_FP_EQ(aNaN, __llvm_libc::cosf(inf)); EXPECT_EQ(errno, EDOM); errno = 0; - EXPECT_TRUE( - isQuietNaN(__llvm_libc::cosf(valueFromBits(BitPatterns::negInf)))); + EXPECT_FP_EQ(aNaN, __llvm_libc::cosf(negInf)); EXPECT_EQ(errno, EDOM); } @@ -72,7 +50,7 @@ TEST(LlvmLibcCosfTest, InFloatRange) { constexpr uint32_t count = 1000000; constexpr uint32_t step = UINT32_MAX / count; for (uint32_t i = 0, v = 0; i <= count; ++i, v += step) { - float x = valueFromBits(v); + float x = float(FPBits(v)); if (isnan(x) || isinf(x)) continue; ASSERT_MPFR_MATCH(mpfr::Operation::Cos, x, __llvm_libc::cosf(x), 1.0); @@ -81,22 +59,22 @@ TEST(LlvmLibcCosfTest, InFloatRange) { // For small values, cos(x) is 1. TEST(LlvmLibcCosfTest, SmallValues) { - float x = valueFromBits(0x17800000U); + float x = float(FPBits(0x17800000U)); float result = __llvm_libc::cosf(x); EXPECT_MPFR_MATCH(mpfr::Operation::Cos, x, result, 1.0); - EXPECT_EQ(BitPatterns::one, valueAsBits(result)); + EXPECT_FP_EQ(1.0f, result); - x = valueFromBits(0x0040000U); + x = float(FPBits(0x0040000U)); result = __llvm_libc::cosf(x); EXPECT_MPFR_MATCH(mpfr::Operation::Cos, x, result, 1.0); - EXPECT_EQ(BitPatterns::one, valueAsBits(result)); + EXPECT_FP_EQ(1.0f, result); } // SDCOMP-26094: check cosf in the cases for which the range reducer // returns values furthest beyond its nominal upper bound of pi/4. TEST(LlvmLibcCosfTest, SDCOMP_26094) { for (uint32_t v : sdcomp26094Values) { - float x = valueFromBits(v); + float x = float(FPBits(v)); ASSERT_MPFR_MATCH(mpfr::Operation::Cos, x, __llvm_libc::cosf(x), 1.0); } } diff --git a/libc/test/src/math/exp2f_test.cpp b/libc/test/src/math/exp2f_test.cpp index ef37f0985b1b0..977ef1bce63ca 100644 --- a/libc/test/src/math/exp2f_test.cpp +++ b/libc/test/src/math/exp2f_test.cpp @@ -7,10 +7,8 @@ //===----------------------------------------------------------------------===// #include "src/math/exp2f.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/ClassificationFunctions.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" +#include "utils/FPUtil/FPBits.h" +#include "utils/FPUtil/TestHelpers.h" #include "utils/MPFRWrapper/MPFRUtils.h" #include "utils/UnitTest/Test.h" #include @@ -18,65 +16,40 @@ #include #include -using __llvm_libc::fputil::isNegativeQuietNaN; -using __llvm_libc::fputil::isQuietNaN; -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; - namespace mpfr = __llvm_libc::testing::mpfr; -TEST(LlvmLibcexp2fTest, SpecialNumbers) { - errno = 0; - - EXPECT_TRUE( - isQuietNaN(__llvm_libc::exp2f(valueFromBits(BitPatterns::aQuietNaN)))); - EXPECT_EQ(errno, 0); +DECLARE_SPECIAL_CONSTANTS(float) - EXPECT_TRUE(isNegativeQuietNaN( - __llvm_libc::exp2f(valueFromBits(BitPatterns::aNegativeQuietNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isQuietNaN( - __llvm_libc::exp2f(valueFromBits(BitPatterns::aSignallingNaN)))); - EXPECT_EQ(errno, 0); +TEST(LlvmLibcExp2fTest, SpecialNumbers) { + errno = 0; - EXPECT_TRUE(isNegativeQuietNaN( - __llvm_libc::exp2f(valueFromBits(BitPatterns::aNegativeSignallingNaN)))); + EXPECT_FP_EQ(aNaN, __llvm_libc::exp2f(aNaN)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::exp2f(valueFromBits(BitPatterns::inf)))); + EXPECT_FP_EQ(inf, __llvm_libc::exp2f(inf)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::zero, valueAsBits(__llvm_libc::exp2f( - valueFromBits(BitPatterns::negInf)))); + EXPECT_FP_EQ(0.0f, __llvm_libc::exp2f(negInf)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::one, - valueAsBits(__llvm_libc::exp2f(valueFromBits(BitPatterns::zero)))); + EXPECT_FP_EQ(1.0f, __llvm_libc::exp2f(0.0f)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::one, valueAsBits(__llvm_libc::exp2f( - valueFromBits(BitPatterns::negZero)))); + EXPECT_FP_EQ(1.0f, __llvm_libc::exp2f(-0.0f)); EXPECT_EQ(errno, 0); } TEST(LlvmLibcExpfTest, Overflow) { errno = 0; - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::exp2f(valueFromBits(0x7f7fffffU)))); + EXPECT_FP_EQ(inf, __llvm_libc::exp2f(float(FPBits(0x7f7fffffU)))); EXPECT_EQ(errno, ERANGE); errno = 0; - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::exp2f(valueFromBits(0x43000000U)))); + EXPECT_FP_EQ(inf, __llvm_libc::exp2f(float(FPBits(0x43000000U)))); EXPECT_EQ(errno, ERANGE); errno = 0; - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::exp2f(valueFromBits(0x43000001U)))); + EXPECT_FP_EQ(inf, __llvm_libc::exp2f(float(FPBits(0x43000001U)))); EXPECT_EQ(errno, ERANGE); } @@ -86,44 +59,43 @@ TEST(LlvmLibcExpfTest, Borderline) { float x; errno = 0; - x = valueFromBits(0x42fa0001U); + x = float(FPBits(0x42fa0001U)); EXPECT_MPFR_MATCH(mpfr::Operation::Exp2, x, __llvm_libc::exp2f(x), 1.0); EXPECT_EQ(errno, 0); - x = valueFromBits(0x42ffffffU); + x = float(FPBits(0x42ffffffU)); EXPECT_MPFR_MATCH(mpfr::Operation::Exp2, x, __llvm_libc::exp2f(x), 1.0); EXPECT_EQ(errno, 0); - x = valueFromBits(0xc2fa0001U); + x = float(FPBits(0xc2fa0001U)); EXPECT_MPFR_MATCH(mpfr::Operation::Exp2, x, __llvm_libc::exp2f(x), 1.0); EXPECT_EQ(errno, 0); - x = valueFromBits(0xc2fc0000U); + x = float(FPBits(0xc2fc0000U)); EXPECT_MPFR_MATCH(mpfr::Operation::Exp2, x, __llvm_libc::exp2f(x), 1.0); EXPECT_EQ(errno, 0); - x = valueFromBits(0xc2fc0001U); + x = float(FPBits(0xc2fc0001U)); EXPECT_MPFR_MATCH(mpfr::Operation::Exp2, x, __llvm_libc::exp2f(x), 1.0); EXPECT_EQ(errno, 0); - x = valueFromBits(0xc3150000U); + x = float(FPBits(0xc3150000U)); EXPECT_MPFR_MATCH(mpfr::Operation::Exp2, x, __llvm_libc::exp2f(x), 1.0); EXPECT_EQ(errno, 0); } TEST(LlvmLibcExpfTest, Underflow) { errno = 0; - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::exp2f(valueFromBits(0xff7fffffU)))); + EXPECT_FP_EQ(0.0f, __llvm_libc::exp2f(float(FPBits(0xff7fffffU)))); EXPECT_EQ(errno, ERANGE); errno = 0; - float x = valueFromBits(0xc3158000U); + float x = float(FPBits(0xc3158000U)); EXPECT_MPFR_MATCH(mpfr::Operation::Exp2, x, __llvm_libc::exp2f(x), 1.0); EXPECT_EQ(errno, ERANGE); errno = 0; - x = valueFromBits(0xc3165432U); + x = float(FPBits(0xc3165432U)); EXPECT_MPFR_MATCH(mpfr::Operation::Exp2, x, __llvm_libc::exp2f(x), 1.0); EXPECT_EQ(errno, ERANGE); } @@ -132,7 +104,7 @@ TEST(LlvmLibcexp2fTest, InFloatRange) { constexpr uint32_t count = 1000000; constexpr uint32_t step = UINT32_MAX / count; for (uint32_t i = 0, v = 0; i <= count; ++i, v += step) { - float x = valueFromBits(v); + float x = float(FPBits(v)); if (isnan(x) || isinf(x)) continue; errno = 0; diff --git a/libc/test/src/math/expf_test.cpp b/libc/test/src/math/expf_test.cpp index bbf46ebfaef1f..495475fd5d0a0 100644 --- a/libc/test/src/math/expf_test.cpp +++ b/libc/test/src/math/expf_test.cpp @@ -7,10 +7,8 @@ //===----------------------------------------------------------------------===// #include "src/math/expf.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/ClassificationFunctions.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" +#include "utils/FPUtil/FPBits.h" +#include "utils/FPUtil/TestHelpers.h" #include "utils/MPFRWrapper/MPFRUtils.h" #include "utils/UnitTest/Test.h" #include @@ -18,82 +16,56 @@ #include #include -using __llvm_libc::fputil::isNegativeQuietNaN; -using __llvm_libc::fputil::isQuietNaN; -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; - namespace mpfr = __llvm_libc::testing::mpfr; +DECLARE_SPECIAL_CONSTANTS(float) + TEST(LlvmLibcExpfTest, SpecialNumbers) { errno = 0; - EXPECT_TRUE( - isQuietNaN(__llvm_libc::expf(valueFromBits(BitPatterns::aQuietNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isNegativeQuietNaN( - __llvm_libc::expf(valueFromBits(BitPatterns::aNegativeQuietNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isQuietNaN( - __llvm_libc::expf(valueFromBits(BitPatterns::aSignallingNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isNegativeQuietNaN( - __llvm_libc::expf(valueFromBits(BitPatterns::aNegativeSignallingNaN)))); + EXPECT_FP_EQ(aNaN, __llvm_libc::expf(aNaN)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::expf(valueFromBits(BitPatterns::inf)))); + EXPECT_FP_EQ(inf, __llvm_libc::expf(inf)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::expf(valueFromBits(BitPatterns::negInf)))); + EXPECT_FP_EQ(0.0f, __llvm_libc::expf(negInf)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::one, - valueAsBits(__llvm_libc::expf(valueFromBits(BitPatterns::zero)))); + EXPECT_FP_EQ(1.0f, __llvm_libc::expf(0.0f)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::one, valueAsBits(__llvm_libc::expf( - valueFromBits(BitPatterns::negZero)))); + EXPECT_FP_EQ(1.0f, __llvm_libc::expf(-0.0f)); EXPECT_EQ(errno, 0); } TEST(LlvmLibcExpfTest, Overflow) { errno = 0; - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::expf(valueFromBits(0x7f7fffffU)))); + EXPECT_FP_EQ(inf, __llvm_libc::expf(float(FPBits(0x7f7fffffU)))); EXPECT_EQ(errno, ERANGE); errno = 0; - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::expf(valueFromBits(0x42cffff8U)))); + EXPECT_FP_EQ(inf, __llvm_libc::expf(float(FPBits(0x42cffff8U)))); EXPECT_EQ(errno, ERANGE); errno = 0; - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::expf(valueFromBits(0x42d00008U)))); + EXPECT_FP_EQ(inf, __llvm_libc::expf(float(FPBits(0x42d00008U)))); EXPECT_EQ(errno, ERANGE); } TEST(LlvmLibcExpfTest, Underflow) { errno = 0; - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::expf(valueFromBits(0xff7fffffU)))); + EXPECT_FP_EQ(0.0f, __llvm_libc::expf(float(FPBits(0xff7fffffU)))); EXPECT_EQ(errno, ERANGE); errno = 0; - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::expf(valueFromBits(0xc2cffff8U)))); + float x = float(FPBits(0xc2cffff8U)); + EXPECT_MPFR_MATCH(mpfr::Operation::Exp, x, __llvm_libc::expf(x), 1.0); EXPECT_EQ(errno, ERANGE); errno = 0; - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::expf(valueFromBits(0xc2d00008U)))); + x = float(FPBits(0xc2d00008U)); + EXPECT_MPFR_MATCH(mpfr::Operation::Exp, x, __llvm_libc::expf(x), 1.0); EXPECT_EQ(errno, ERANGE); } @@ -103,19 +75,19 @@ TEST(LlvmLibcExpfTest, Borderline) { float x; errno = 0; - x = valueFromBits(0x42affff8U); + x = float(FPBits(0x42affff8U)); ASSERT_MPFR_MATCH(mpfr::Operation::Exp, x, __llvm_libc::expf(x), 1.0); EXPECT_EQ(errno, 0); - x = valueFromBits(0x42b00008U); + x = float(FPBits(0x42b00008U)); ASSERT_MPFR_MATCH(mpfr::Operation::Exp, x, __llvm_libc::expf(x), 1.0); EXPECT_EQ(errno, 0); - x = valueFromBits(0xc2affff8U); + x = float(FPBits(0xc2affff8U)); ASSERT_MPFR_MATCH(mpfr::Operation::Exp, x, __llvm_libc::expf(x), 1.0); EXPECT_EQ(errno, 0); - x = valueFromBits(0xc2b00008U); + x = float(FPBits(0xc2b00008U)); ASSERT_MPFR_MATCH(mpfr::Operation::Exp, x, __llvm_libc::expf(x), 1.0); EXPECT_EQ(errno, 0); } @@ -124,7 +96,7 @@ TEST(LlvmLibcExpfTest, InFloatRange) { constexpr uint32_t count = 1000000; constexpr uint32_t step = UINT32_MAX / count; for (uint32_t i = 0, v = 0; i <= count; ++i, v += step) { - float x = valueFromBits(v); + float x = float(FPBits(v)); if (isnan(x) || isinf(x)) continue; errno = 0; diff --git a/libc/test/src/math/expm1f_test.cpp b/libc/test/src/math/expm1f_test.cpp index d4b06c29c4bbb..5fa51b4c9a5df 100644 --- a/libc/test/src/math/expm1f_test.cpp +++ b/libc/test/src/math/expm1f_test.cpp @@ -7,10 +7,8 @@ //===----------------------------------------------------------------------===// #include "src/math/expm1f.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/ClassificationFunctions.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" +#include "utils/FPUtil/FPBits.h" +#include "utils/FPUtil/TestHelpers.h" #include "utils/MPFRWrapper/MPFRUtils.h" #include "utils/UnitTest/Test.h" #include @@ -18,82 +16,56 @@ #include #include -using __llvm_libc::fputil::isNegativeQuietNaN; -using __llvm_libc::fputil::isQuietNaN; -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; - namespace mpfr = __llvm_libc::testing::mpfr; +DECLARE_SPECIAL_CONSTANTS(float) + TEST(LlvmLibcExpm1fTest, SpecialNumbers) { errno = 0; - EXPECT_TRUE( - isQuietNaN(__llvm_libc::expm1f(valueFromBits(BitPatterns::aQuietNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isNegativeQuietNaN( - __llvm_libc::expm1f(valueFromBits(BitPatterns::aNegativeQuietNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isQuietNaN( - __llvm_libc::expm1f(valueFromBits(BitPatterns::aSignallingNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isNegativeQuietNaN( - __llvm_libc::expm1f(valueFromBits(BitPatterns::aNegativeSignallingNaN)))); + EXPECT_FP_EQ(aNaN, __llvm_libc::expm1f(aNaN)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::expm1f(valueFromBits(BitPatterns::inf)))); + EXPECT_FP_EQ(inf, __llvm_libc::expm1f(inf)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::negOne, valueAsBits(__llvm_libc::expm1f( - valueFromBits(BitPatterns::negInf)))); + EXPECT_FP_EQ(-1.0f, __llvm_libc::expm1f(negInf)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::expm1f(valueFromBits(BitPatterns::zero)))); + EXPECT_FP_EQ(0.0f, __llvm_libc::expm1f(0.0f)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::negZero, valueAsBits(__llvm_libc::expm1f( - valueFromBits(BitPatterns::negZero)))); + EXPECT_FP_EQ(-0.0f, __llvm_libc::expm1f(-0.0f)); EXPECT_EQ(errno, 0); } TEST(LlvmLibcExpm1fTest, Overflow) { errno = 0; - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::expm1f(valueFromBits(0x7f7fffffU)))); + EXPECT_FP_EQ(inf, __llvm_libc::expm1f(float(FPBits(0x7f7fffffU)))); EXPECT_EQ(errno, ERANGE); errno = 0; - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::expm1f(valueFromBits(0x42cffff8U)))); + EXPECT_FP_EQ(inf, __llvm_libc::expm1f(float(FPBits(0x42cffff8U)))); EXPECT_EQ(errno, ERANGE); errno = 0; - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::expm1f(valueFromBits(0x42d00008U)))); + EXPECT_FP_EQ(inf, __llvm_libc::expm1f(float(FPBits(0x42d00008U)))); EXPECT_EQ(errno, ERANGE); } TEST(LlvmLibcExpm1fTest, Underflow) { errno = 0; - EXPECT_EQ(BitPatterns::negOne, - valueAsBits(__llvm_libc::expm1f(valueFromBits(0xff7fffffU)))); + EXPECT_FP_EQ(-1.0f, __llvm_libc::expm1f(float(FPBits(0xff7fffffU)))); EXPECT_EQ(errno, ERANGE); errno = 0; - EXPECT_EQ(BitPatterns::negOne, - valueAsBits(__llvm_libc::expm1f(valueFromBits(0xc2cffff8U)))); + float x = float(FPBits(0xc2cffff8U)); + EXPECT_FP_EQ(-1.0f, __llvm_libc::expm1f(x)); EXPECT_EQ(errno, ERANGE); errno = 0; - EXPECT_EQ(BitPatterns::negOne, - valueAsBits(__llvm_libc::expm1f(valueFromBits(0xc2d00008U)))); + x = float(FPBits(0xc2d00008U)); + EXPECT_FP_EQ(-1.0f, __llvm_libc::expm1f(x)); EXPECT_EQ(errno, ERANGE); } @@ -103,19 +75,19 @@ TEST(LlvmLibcExpm1fTest, Borderline) { float x; errno = 0; - x = valueFromBits(0x42affff8U); + x = float(FPBits(0x42affff8U)); ASSERT_MPFR_MATCH(mpfr::Operation::Expm1, x, __llvm_libc::expm1f(x), 1.0); EXPECT_EQ(errno, 0); - x = valueFromBits(0x42b00008U); + x = float(FPBits(0x42b00008U)); ASSERT_MPFR_MATCH(mpfr::Operation::Expm1, x, __llvm_libc::expm1f(x), 1.0); EXPECT_EQ(errno, 0); - x = valueFromBits(0xc2affff8U); + x = float(FPBits(0xc2affff8U)); ASSERT_MPFR_MATCH(mpfr::Operation::Expm1, x, __llvm_libc::expm1f(x), 1.0); EXPECT_EQ(errno, 0); - x = valueFromBits(0xc2b00008U); + x = float(FPBits(0xc2b00008U)); ASSERT_MPFR_MATCH(mpfr::Operation::Expm1, x, __llvm_libc::expm1f(x), 1.0); EXPECT_EQ(errno, 0); } @@ -124,7 +96,7 @@ TEST(LlvmLibcExpm1fTest, InFloatRange) { constexpr uint32_t count = 1000000; constexpr uint32_t step = UINT32_MAX / count; for (uint32_t i = 0, v = 0; i <= count; ++i, v += step) { - float x = valueFromBits(v); + float x = float(FPBits(v)); if (isnan(x) || isinf(x)) continue; errno = 0; diff --git a/libc/test/src/math/frexp_test.cpp b/libc/test/src/math/frexp_test.cpp index 2d8ae1c9ca1ac..a44aefc7d8b4e 100644 --- a/libc/test/src/math/frexp_test.cpp +++ b/libc/test/src/math/frexp_test.cpp @@ -6,145 +6,8 @@ // //===----------------------------------------------------------------------===// -#include "src/math/frexp.h" -#include "utils/FPUtil/BasicOperations.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/ClassificationFunctions.h" -#include "utils/FPUtil/FPBits.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" -#include "utils/MPFRWrapper/MPFRUtils.h" -#include "utils/UnitTest/Test.h" -#include - -using FPBits = __llvm_libc::fputil::FPBits; -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -namespace mpfr = __llvm_libc::testing::mpfr; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; -using Properties = __llvm_libc::fputil::FloatProperties; - -TEST(LlvmLibcFrexpTest, SpecialNumbers) { - int exponent; - - EXPECT_EQ(BitPatterns::aQuietNaN, - valueAsBits(__llvm_libc::frexp( - valueFromBits(BitPatterns::aQuietNaN), &exponent))); - EXPECT_EQ(BitPatterns::aNegativeQuietNaN, - valueAsBits(__llvm_libc::frexp( - valueFromBits(BitPatterns::aNegativeQuietNaN), &exponent))); - - EXPECT_EQ(BitPatterns::aSignallingNaN, - valueAsBits(__llvm_libc::frexp( - valueFromBits(BitPatterns::aSignallingNaN), &exponent))); - EXPECT_EQ( - BitPatterns::aNegativeSignallingNaN, - valueAsBits(__llvm_libc::frexp( - valueFromBits(BitPatterns::aNegativeSignallingNaN), &exponent))); - - EXPECT_EQ(BitPatterns::inf, valueAsBits(__llvm_libc::frexp( - valueFromBits(BitPatterns::inf), &exponent))); - EXPECT_EQ(BitPatterns::negInf, - valueAsBits(__llvm_libc::frexp(valueFromBits(BitPatterns::negInf), - &exponent))); - - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::frexp(valueFromBits(BitPatterns::zero), - &exponent))); - EXPECT_EQ(exponent, 0); - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::frexp(valueFromBits(BitPatterns::negZero), - &exponent))); - EXPECT_EQ(exponent, 0); -} - -TEST(LlvmLibcFrexpTest, PowersOfTwo) { - int exponent; - - EXPECT_EQ(valueAsBits(0.5), valueAsBits(__llvm_libc::frexp(1.0, &exponent))); - EXPECT_EQ(exponent, 1); - EXPECT_EQ(valueAsBits(-0.5), - valueAsBits(__llvm_libc::frexp(-1.0, &exponent))); - EXPECT_EQ(exponent, 1); - - EXPECT_EQ(valueAsBits(0.5), valueAsBits(__llvm_libc::frexp(2.0, &exponent))); - EXPECT_EQ(exponent, 2); - EXPECT_EQ(valueAsBits(-0.5), - valueAsBits(__llvm_libc::frexp(-2.0, &exponent))); - EXPECT_EQ(exponent, 2); +#include "FrexpTest.h" - EXPECT_EQ(valueAsBits(0.5), valueAsBits(__llvm_libc::frexp(4.0, &exponent))); - EXPECT_EQ(exponent, 3); - EXPECT_EQ(valueAsBits(-0.5), - valueAsBits(__llvm_libc::frexp(-4.0, &exponent))); - EXPECT_EQ(exponent, 3); - - EXPECT_EQ(valueAsBits(0.5), valueAsBits(__llvm_libc::frexp(8.0, &exponent))); - EXPECT_EQ(exponent, 4); - EXPECT_EQ(valueAsBits(-0.5), - valueAsBits(__llvm_libc::frexp(-8.0, &exponent))); - EXPECT_EQ(exponent, 4); - - EXPECT_EQ(valueAsBits(0.5), valueAsBits(__llvm_libc::frexp(16.0, &exponent))); - EXPECT_EQ(exponent, 5); - EXPECT_EQ(valueAsBits(-0.5), - valueAsBits(__llvm_libc::frexp(-16.0, &exponent))); - EXPECT_EQ(exponent, 5); - - EXPECT_EQ(valueAsBits(0.5), valueAsBits(__llvm_libc::frexp(32.0, &exponent))); - EXPECT_EQ(exponent, 6); - EXPECT_EQ(valueAsBits(-0.5), - valueAsBits(__llvm_libc::frexp(-32.0, &exponent))); - EXPECT_EQ(exponent, 6); - - EXPECT_EQ(valueAsBits(0.5), valueAsBits(__llvm_libc::frexp(64.0, &exponent))); - EXPECT_EQ(exponent, 7); - EXPECT_EQ(valueAsBits(-0.5), - valueAsBits(__llvm_libc::frexp(-64.0, &exponent))); - EXPECT_EQ(exponent, 7); -} - -TEST(LlvmLibcFrexpTest, SomeIntegers) { - int exponent; - - EXPECT_EQ(valueAsBits(0.75), - valueAsBits(__llvm_libc::frexp(24.0, &exponent))); - EXPECT_EQ(exponent, 5); - EXPECT_EQ(valueAsBits(-0.75), - valueAsBits(__llvm_libc::frexp(-24.0, &exponent))); - EXPECT_EQ(exponent, 5); - - EXPECT_EQ(valueAsBits(0.625), - valueAsBits(__llvm_libc::frexp(40.0, &exponent))); - EXPECT_EQ(exponent, 6); - EXPECT_EQ(valueAsBits(-0.625), - valueAsBits(__llvm_libc::frexp(-40.0, &exponent))); - EXPECT_EQ(exponent, 6); - - EXPECT_EQ(valueAsBits(0.78125), - valueAsBits(__llvm_libc::frexp(800.0, &exponent))); - EXPECT_EQ(exponent, 10); - EXPECT_EQ(valueAsBits(-0.78125), - valueAsBits(__llvm_libc::frexp(-800.0, &exponent))); - EXPECT_EQ(exponent, 10); -} - -TEST(LlvmLibcFrexpTest, InDoubleRange) { - using UIntType = FPBits::UIntType; - constexpr UIntType count = 1000001; - constexpr UIntType step = UIntType(-1) / count; - for (UIntType i = 0, v = 0; i <= count; ++i, v += step) { - double x = double(FPBits(v)); - if (isnan(x) || isinf(x) || x == 0.0) - continue; - - mpfr::BinaryOutput result; - result.f = __llvm_libc::frexp(x, &result.i); +#include "src/math/frexp.h" - ASSERT_TRUE(__llvm_libc::fputil::abs(result.f) < 1.0); - ASSERT_TRUE(__llvm_libc::fputil::abs(result.f) >= 0.5); - ASSERT_MPFR_MATCH(mpfr::Operation::Frexp, x, result, 0.0); - } -} +LIST_FREXP_TESTS(double, __llvm_libc::frexp) diff --git a/libc/test/src/math/frexpf_test.cpp b/libc/test/src/math/frexpf_test.cpp index a3a3da4530b88..5d78f94ec1e59 100644 --- a/libc/test/src/math/frexpf_test.cpp +++ b/libc/test/src/math/frexpf_test.cpp @@ -6,152 +6,8 @@ // //===----------------------------------------------------------------------===// -#include "src/math/frexpf.h" -#include "utils/FPUtil/BasicOperations.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/ClassificationFunctions.h" -#include "utils/FPUtil/FPBits.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" -#include "utils/MPFRWrapper/MPFRUtils.h" -#include "utils/UnitTest/Test.h" -#include - -using FPBits = __llvm_libc::fputil::FPBits; -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -namespace mpfr = __llvm_libc::testing::mpfr; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; -using Properties = __llvm_libc::fputil::FloatProperties; - -TEST(LlvmLibcFrexpfTest, SpecialNumbers) { - int exponent; - - EXPECT_EQ(BitPatterns::aQuietNaN, - valueAsBits(__llvm_libc::frexpf( - valueFromBits(BitPatterns::aQuietNaN), &exponent))); - EXPECT_EQ(BitPatterns::aNegativeQuietNaN, - valueAsBits(__llvm_libc::frexpf( - valueFromBits(BitPatterns::aNegativeQuietNaN), &exponent))); - - EXPECT_EQ(BitPatterns::aSignallingNaN, - valueAsBits(__llvm_libc::frexpf( - valueFromBits(BitPatterns::aSignallingNaN), &exponent))); - EXPECT_EQ( - BitPatterns::aNegativeSignallingNaN, - valueAsBits(__llvm_libc::frexpf( - valueFromBits(BitPatterns::aNegativeSignallingNaN), &exponent))); - - EXPECT_EQ(BitPatterns::inf, valueAsBits(__llvm_libc::frexpf( - valueFromBits(BitPatterns::inf), &exponent))); - EXPECT_EQ(BitPatterns::negInf, - valueAsBits(__llvm_libc::frexpf(valueFromBits(BitPatterns::negInf), - &exponent))); - - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::frexpf(valueFromBits(BitPatterns::zero), - &exponent))); - EXPECT_EQ(exponent, 0); - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::frexpf(valueFromBits(BitPatterns::negZero), - &exponent))); - EXPECT_EQ(exponent, 0); -} - -TEST(LlvmLibcFrexpfTest, PowersOfTwo) { - int exponent; - - EXPECT_EQ(valueAsBits(0.5f), - valueAsBits(__llvm_libc::frexpf(1.0f, &exponent))); - EXPECT_EQ(exponent, 1); - EXPECT_EQ(valueAsBits(-0.5f), - valueAsBits(__llvm_libc::frexpf(-1.0f, &exponent))); - EXPECT_EQ(exponent, 1); - - EXPECT_EQ(valueAsBits(0.5f), - valueAsBits(__llvm_libc::frexpf(2.0f, &exponent))); - EXPECT_EQ(exponent, 2); - EXPECT_EQ(valueAsBits(-0.5f), - valueAsBits(__llvm_libc::frexpf(-2.0f, &exponent))); - EXPECT_EQ(exponent, 2); +#include "FrexpTest.h" - EXPECT_EQ(valueAsBits(0.5f), - valueAsBits(__llvm_libc::frexpf(4.0f, &exponent))); - EXPECT_EQ(exponent, 3); - EXPECT_EQ(valueAsBits(-0.5f), - valueAsBits(__llvm_libc::frexpf(-4.0f, &exponent))); - EXPECT_EQ(exponent, 3); - - EXPECT_EQ(valueAsBits(0.5f), - valueAsBits(__llvm_libc::frexpf(8.0f, &exponent))); - EXPECT_EQ(exponent, 4); - EXPECT_EQ(valueAsBits(-0.5f), - valueAsBits(__llvm_libc::frexpf(-8.0f, &exponent))); - EXPECT_EQ(exponent, 4); - - EXPECT_EQ(valueAsBits(0.5f), - valueAsBits(__llvm_libc::frexpf(16.0f, &exponent))); - EXPECT_EQ(exponent, 5); - EXPECT_EQ(valueAsBits(-0.5f), - valueAsBits(__llvm_libc::frexpf(-16.0f, &exponent))); - EXPECT_EQ(exponent, 5); - - EXPECT_EQ(valueAsBits(0.5f), - valueAsBits(__llvm_libc::frexpf(32.0f, &exponent))); - EXPECT_EQ(exponent, 6); - EXPECT_EQ(valueAsBits(-0.5f), - valueAsBits(__llvm_libc::frexpf(-32.0f, &exponent))); - EXPECT_EQ(exponent, 6); - - EXPECT_EQ(valueAsBits(0.5f), - valueAsBits(__llvm_libc::frexpf(64.0f, &exponent))); - EXPECT_EQ(exponent, 7); - EXPECT_EQ(valueAsBits(-0.5f), - valueAsBits(__llvm_libc::frexpf(-64.0f, &exponent))); - EXPECT_EQ(exponent, 7); -} - -TEST(LlvmLibcFrexpfTest, SomeIntegers) { - int exponent; - - EXPECT_EQ(valueAsBits(0.75f), - valueAsBits(__llvm_libc::frexpf(24.0f, &exponent))); - EXPECT_EQ(exponent, 5); - EXPECT_EQ(valueAsBits(-0.75f), - valueAsBits(__llvm_libc::frexpf(-24.0f, &exponent))); - EXPECT_EQ(exponent, 5); - - EXPECT_EQ(valueAsBits(0.625f), - valueAsBits(__llvm_libc::frexpf(40.0f, &exponent))); - EXPECT_EQ(exponent, 6); - EXPECT_EQ(valueAsBits(-0.625f), - valueAsBits(__llvm_libc::frexpf(-40.0f, &exponent))); - EXPECT_EQ(exponent, 6); - - EXPECT_EQ(valueAsBits(0.78125f), - valueAsBits(__llvm_libc::frexpf(800.0f, &exponent))); - EXPECT_EQ(exponent, 10); - EXPECT_EQ(valueAsBits(-0.78125f), - valueAsBits(__llvm_libc::frexpf(-800.0f, &exponent))); - EXPECT_EQ(exponent, 10); -} - -TEST(LlvmLibcFrexpfTest, InFloatRange) { - using UIntType = FPBits::UIntType; - constexpr UIntType count = 1000001; - constexpr UIntType step = UIntType(-1) / count; - for (UIntType i = 0, v = 0; i <= count; ++i, v += step) { - float x = float(FPBits(v)); - if (isnan(x) || isinf(x) || x == 0.0) - continue; - - mpfr::BinaryOutput result; - result.f = __llvm_libc::frexpf(x, &result.i); +#include "src/math/frexpf.h" - ASSERT_TRUE(__llvm_libc::fputil::abs(result.f) < 1.0); - ASSERT_TRUE(__llvm_libc::fputil::abs(result.f) >= 0.5); - ASSERT_MPFR_MATCH(mpfr::Operation::Frexp, x, result, 0.0); - } -} +LIST_FREXP_TESTS(float, __llvm_libc::frexpf) diff --git a/libc/test/src/math/frexpl_test.cpp b/libc/test/src/math/frexpl_test.cpp index 053782b0ba107..4904ccd14907b 100644 --- a/libc/test/src/math/frexpl_test.cpp +++ b/libc/test/src/math/frexpl_test.cpp @@ -6,105 +6,8 @@ // //===----------------------------------------------------------------------===// -#include "src/math/frexpl.h" -#include "utils/FPUtil/BasicOperations.h" -#include "utils/FPUtil/FPBits.h" -#include "utils/MPFRWrapper/MPFRUtils.h" -#include "utils/UnitTest/Test.h" -#include - -typedef long double LD; -using FPBits = __llvm_libc::fputil::FPBits; - -namespace mpfr = __llvm_libc::testing::mpfr; - -TEST(LlvmLibcFrexplTest, SpecialNumbers) { - int exponent; - - EXPECT_TRUE(LD(FPBits::inf()) == - __llvm_libc::frexpl(LD(FPBits::inf()), &exponent)); - EXPECT_TRUE(LD(FPBits::negInf()) == - __llvm_libc::frexpl(LD(FPBits::negInf()), &exponent)); - - EXPECT_TRUE(LD(FPBits::zero()) == - __llvm_libc::frexpl(LD(FPBits::zero()), &exponent)); - EXPECT_EQ(exponent, 0); - - EXPECT_TRUE(LD(FPBits::negZero()) == - __llvm_libc::frexpl(LD(FPBits::negZero()), &exponent)); - EXPECT_EQ(exponent, 0); - - EXPECT_TRUE( - FPBits(__llvm_libc::frexpl(LD(FPBits::buildNaN(1)), &exponent)).isNaN()); -} - -TEST(LlvmLibcFrexplTest, PowersOfTwo) { - int exponent; - - EXPECT_TRUE(0.5l == __llvm_libc::frexpl(1.0l, &exponent)); - EXPECT_EQ(exponent, 1); - EXPECT_TRUE(-0.5l == __llvm_libc::frexpl(-1.0l, &exponent)); - EXPECT_EQ(exponent, 1); - - EXPECT_TRUE(0.5l == __llvm_libc::frexpl(2.0l, &exponent)); - EXPECT_EQ(exponent, 2); - EXPECT_TRUE(-0.5l == __llvm_libc::frexpl(-2.0l, &exponent)); - EXPECT_EQ(exponent, 2); +#include "FrexpTest.h" - EXPECT_TRUE(0.5l == __llvm_libc::frexpl(4.0l, &exponent)); - EXPECT_EQ(exponent, 3); - EXPECT_TRUE(-0.5l == __llvm_libc::frexpl(-4.0l, &exponent)); - EXPECT_EQ(exponent, 3); - - EXPECT_TRUE(0.5l == __llvm_libc::frexpl(8.0l, &exponent)); - EXPECT_EQ(exponent, 4); - EXPECT_TRUE(-0.5l == __llvm_libc::frexpl(-8.0l, &exponent)); - EXPECT_EQ(exponent, 4); - - EXPECT_TRUE(0.5l == __llvm_libc::frexpl(16.0l, &exponent)); - EXPECT_EQ(exponent, 5); - EXPECT_TRUE(-0.5l == __llvm_libc::frexpl(-16.0l, &exponent)); - EXPECT_EQ(exponent, 5); - - EXPECT_TRUE(0.5l == __llvm_libc::frexpl(32.0l, &exponent)); - EXPECT_EQ(exponent, 6); - EXPECT_TRUE(-0.5l == __llvm_libc::frexpl(-32.0l, &exponent)); - EXPECT_EQ(exponent, 6); -} - -TEST(LlvmLibcFrexplTest, SomeIntegers) { - int exponent; - - EXPECT_TRUE(0.75l == __llvm_libc::frexpl(24.0l, &exponent)); - EXPECT_EQ(exponent, 5); - EXPECT_TRUE(-0.75l == __llvm_libc::frexpl(-24.0l, &exponent)); - EXPECT_EQ(exponent, 5); - - EXPECT_TRUE(0.625l == __llvm_libc::frexpl(40.0l, &exponent)); - EXPECT_EQ(exponent, 6); - EXPECT_TRUE(-0.625l == __llvm_libc::frexpl(-40.0l, &exponent)); - EXPECT_EQ(exponent, 6); - - EXPECT_TRUE(0.78125l == __llvm_libc::frexpl(800.0l, &exponent)); - EXPECT_EQ(exponent, 10); - EXPECT_TRUE(-0.78125l == __llvm_libc::frexpl(-800.0l, &exponent)); - EXPECT_EQ(exponent, 10); -} - -TEST(LlvmLibcFrexplTest, LongDoubleRange) { - using UIntType = FPBits::UIntType; - constexpr UIntType count = 10000000; - constexpr UIntType step = UIntType(-1) / count; - for (UIntType i = 0, v = 0; i <= count; ++i, v += step) { - long double x = static_cast(FPBits(v)); - if (isnan(x) || isinf(x) || x == 0.0l) - continue; - - mpfr::BinaryOutput result; - result.f = __llvm_libc::frexpl(x, &result.i); +#include "src/math/frexpl.h" - ASSERT_TRUE(__llvm_libc::fputil::abs(result.f) < 1.0); - ASSERT_TRUE(__llvm_libc::fputil::abs(result.f) >= 0.5); - ASSERT_MPFR_MATCH(mpfr::Operation::Frexp, x, result, 0.0); - } -} +LIST_FREXP_TESTS(long double, __llvm_libc::frexpl) diff --git a/libc/test/src/math/logb_test.cpp b/libc/test/src/math/logb_test.cpp index ca0f9eacde6fe..b90348522aa3a 100644 --- a/libc/test/src/math/logb_test.cpp +++ b/libc/test/src/math/logb_test.cpp @@ -6,94 +6,8 @@ // //===----------------------------------------------------------------------===// -#include "src/math/logb.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" -#include "utils/FPUtil/ManipulationFunctions.h" -#include "utils/UnitTest/Test.h" -#include - -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; -using Properties = __llvm_libc::fputil::FloatProperties; - -TEST(LlvmLibcLogbTest, SpecialNumbers) { - EXPECT_EQ( - BitPatterns::aQuietNaN, - valueAsBits(__llvm_libc::logb(valueFromBits(BitPatterns::aQuietNaN)))); - EXPECT_EQ(BitPatterns::aNegativeQuietNaN, - valueAsBits(__llvm_libc::logb( - valueFromBits(BitPatterns::aNegativeQuietNaN)))); - - EXPECT_EQ(BitPatterns::aSignallingNaN, - valueAsBits( - __llvm_libc::logb(valueFromBits(BitPatterns::aSignallingNaN)))); - EXPECT_EQ(BitPatterns::aNegativeSignallingNaN, - valueAsBits(__llvm_libc::logb( - valueFromBits(BitPatterns::aNegativeSignallingNaN)))); - - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::logb(valueFromBits(BitPatterns::inf)))); - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::logb(valueFromBits(BitPatterns::negInf)))); - - EXPECT_EQ(BitPatterns::negInf, - valueAsBits(__llvm_libc::logb(valueFromBits(BitPatterns::zero)))); - EXPECT_EQ(BitPatterns::negInf, valueAsBits(__llvm_libc::logb( - valueFromBits(BitPatterns::negZero)))); -} - -TEST(LlvmLibcLogbTest, PowersOfTwo) { - EXPECT_EQ(valueAsBits(0.0), valueAsBits(__llvm_libc::logb(1.0))); - EXPECT_EQ(valueAsBits(0.0), valueAsBits(__llvm_libc::logb(-1.0))); - - EXPECT_EQ(valueAsBits(1.0), valueAsBits(__llvm_libc::logb(2.0))); - EXPECT_EQ(valueAsBits(1.0), valueAsBits(__llvm_libc::logb(-2.0))); - - EXPECT_EQ(valueAsBits(2.0), valueAsBits(__llvm_libc::logb(4.0))); - EXPECT_EQ(valueAsBits(2.0), valueAsBits(__llvm_libc::logb(-4.0))); +#include "LogbTest.h" - EXPECT_EQ(valueAsBits(3.0), valueAsBits(__llvm_libc::logb(8.0))); - EXPECT_EQ(valueAsBits(3.0), valueAsBits(__llvm_libc::logb(-8.0))); - - EXPECT_EQ(valueAsBits(4.0), valueAsBits(__llvm_libc::logb(16.0))); - EXPECT_EQ(valueAsBits(4.0), valueAsBits(__llvm_libc::logb(-16.0))); - - EXPECT_EQ(valueAsBits(5.0), valueAsBits(__llvm_libc::logb(32.0))); - EXPECT_EQ(valueAsBits(5.0), valueAsBits(__llvm_libc::logb(-32.0))); -} - -TEST(LlvmLibcLogbTest, SomeIntegers) { - EXPECT_EQ(valueAsBits(1.0), valueAsBits(__llvm_libc::logb(3.0))); - EXPECT_EQ(valueAsBits(1.0), valueAsBits(__llvm_libc::logb(-3.0))); - - EXPECT_EQ(valueAsBits(2.0), valueAsBits(__llvm_libc::logb(7.0))); - EXPECT_EQ(valueAsBits(2.0), valueAsBits(__llvm_libc::logb(-7.0))); - - EXPECT_EQ(valueAsBits(3.0), valueAsBits(__llvm_libc::logb(10.0))); - EXPECT_EQ(valueAsBits(3.0), valueAsBits(__llvm_libc::logb(-10.0))); - - EXPECT_EQ(valueAsBits(4.0), valueAsBits(__llvm_libc::logb(31.0))); - EXPECT_EQ(valueAsBits(4.0), valueAsBits(__llvm_libc::logb(-31.0))); - - EXPECT_EQ(valueAsBits(5.0), valueAsBits(__llvm_libc::logb(55.0))); - EXPECT_EQ(valueAsBits(5.0), valueAsBits(__llvm_libc::logb(-55.0))); -} - -TEST(LlvmLibcLogbTest, InDoubleRange) { - using BitsType = Properties::BitsType; - constexpr BitsType count = 10000000; - constexpr BitsType step = UINT64_MAX / count; - for (BitsType i = 0, v = 0; i <= count; ++i, v += step) { - double x = valueFromBits(v); - if (isnan(x) || isinf(x) || x == 0.0) - continue; +#include "src/math/logb.h" - int exponent; - __llvm_libc::fputil::frexp(x, exponent); - ASSERT_TRUE(double(exponent) == __llvm_libc::logb(x) + 1.0); - } -} +LIST_LOGB_TESTS(double, __llvm_libc::logb) diff --git a/libc/test/src/math/logbf_test.cpp b/libc/test/src/math/logbf_test.cpp index cc91cae7ec290..727eefffbb174 100644 --- a/libc/test/src/math/logbf_test.cpp +++ b/libc/test/src/math/logbf_test.cpp @@ -6,94 +6,8 @@ // //===----------------------------------------------------------------------===// -#include "src/math/logbf.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" -#include "utils/FPUtil/ManipulationFunctions.h" -#include "utils/UnitTest/Test.h" -#include - -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; -using Properties = __llvm_libc::fputil::FloatProperties; - -TEST(LlvmLibcLogbfTest, SpecialNumbers) { - EXPECT_EQ( - BitPatterns::aQuietNaN, - valueAsBits(__llvm_libc::logbf(valueFromBits(BitPatterns::aQuietNaN)))); - EXPECT_EQ(BitPatterns::aNegativeQuietNaN, - valueAsBits(__llvm_libc::logbf( - valueFromBits(BitPatterns::aNegativeQuietNaN)))); - - EXPECT_EQ(BitPatterns::aSignallingNaN, - valueAsBits(__llvm_libc::logbf( - valueFromBits(BitPatterns::aSignallingNaN)))); - EXPECT_EQ(BitPatterns::aNegativeSignallingNaN, - valueAsBits(__llvm_libc::logbf( - valueFromBits(BitPatterns::aNegativeSignallingNaN)))); - - EXPECT_EQ(BitPatterns::inf, - valueAsBits(__llvm_libc::logbf(valueFromBits(BitPatterns::inf)))); - EXPECT_EQ(BitPatterns::inf, valueAsBits(__llvm_libc::logbf( - valueFromBits(BitPatterns::negInf)))); - - EXPECT_EQ(BitPatterns::negInf, - valueAsBits(__llvm_libc::logbf(valueFromBits(BitPatterns::zero)))); - EXPECT_EQ(BitPatterns::negInf, valueAsBits(__llvm_libc::logbf( - valueFromBits(BitPatterns::negZero)))); -} - -TEST(LlvmLibcLogbfTest, PowersOfTwo) { - EXPECT_EQ(valueAsBits(0.0f), valueAsBits(__llvm_libc::logbf(1.0f))); - EXPECT_EQ(valueAsBits(0.0f), valueAsBits(__llvm_libc::logbf(-1.0f))); - - EXPECT_EQ(valueAsBits(1.0f), valueAsBits(__llvm_libc::logbf(2.0f))); - EXPECT_EQ(valueAsBits(1.0f), valueAsBits(__llvm_libc::logbf(-2.0f))); - - EXPECT_EQ(valueAsBits(2.0f), valueAsBits(__llvm_libc::logbf(4.0f))); - EXPECT_EQ(valueAsBits(2.0f), valueAsBits(__llvm_libc::logbf(-4.0f))); +#include "LogbTest.h" - EXPECT_EQ(valueAsBits(3.0f), valueAsBits(__llvm_libc::logbf(8.0f))); - EXPECT_EQ(valueAsBits(3.0f), valueAsBits(__llvm_libc::logbf(-8.0f))); - - EXPECT_EQ(valueAsBits(4.0f), valueAsBits(__llvm_libc::logbf(16.0f))); - EXPECT_EQ(valueAsBits(4.0f), valueAsBits(__llvm_libc::logbf(-16.0f))); - - EXPECT_EQ(valueAsBits(5.0f), valueAsBits(__llvm_libc::logbf(32.0f))); - EXPECT_EQ(valueAsBits(5.0f), valueAsBits(__llvm_libc::logbf(-32.0f))); -} - -TEST(LlvmLibcLogbTest, SomeIntegers) { - EXPECT_EQ(valueAsBits(1.0f), valueAsBits(__llvm_libc::logbf(3.0f))); - EXPECT_EQ(valueAsBits(1.0f), valueAsBits(__llvm_libc::logbf(-3.0f))); - - EXPECT_EQ(valueAsBits(2.0f), valueAsBits(__llvm_libc::logbf(7.0f))); - EXPECT_EQ(valueAsBits(2.0f), valueAsBits(__llvm_libc::logbf(-7.0f))); - - EXPECT_EQ(valueAsBits(3.0f), valueAsBits(__llvm_libc::logbf(10.0f))); - EXPECT_EQ(valueAsBits(3.0f), valueAsBits(__llvm_libc::logbf(-10.0f))); - - EXPECT_EQ(valueAsBits(4.0f), valueAsBits(__llvm_libc::logbf(31.0f))); - EXPECT_EQ(valueAsBits(4.0f), valueAsBits(__llvm_libc::logbf(-31.0f))); - - EXPECT_EQ(valueAsBits(5.0f), valueAsBits(__llvm_libc::logbf(55.0f))); - EXPECT_EQ(valueAsBits(5.0f), valueAsBits(__llvm_libc::logbf(-55.0f))); -} - -TEST(LlvmLibcLogbfTest, InDoubleRange) { - using BitsType = Properties::BitsType; - constexpr BitsType count = 10000000; - constexpr BitsType step = UINT32_MAX / count; - for (BitsType i = 0, v = 0; i <= count; ++i, v += step) { - float x = valueFromBits(v); - if (isnan(x) || isinf(x) || x == 0.0) - continue; +#include "src/math/logbf.h" - int exponent; - __llvm_libc::fputil::frexp(x, exponent); - ASSERT_TRUE(float(exponent) == __llvm_libc::logbf(x) + 1.0); - } -} +LIST_LOGB_TESTS(float, __llvm_libc::logbf) diff --git a/libc/test/src/math/logbl_test.cpp b/libc/test/src/math/logbl_test.cpp index 41a724d95b324..1c7b0d4e66e84 100644 --- a/libc/test/src/math/logbl_test.cpp +++ b/libc/test/src/math/logbl_test.cpp @@ -6,74 +6,8 @@ // //===----------------------------------------------------------------------===// -#include "src/math/logbl.h" -#include "utils/FPUtil/FPBits.h" -#include "utils/FPUtil/ManipulationFunctions.h" -#include "utils/UnitTest/Test.h" -#include - -typedef long double LD; -using FPBits = __llvm_libc::fputil::FPBits; - -TEST(LlvmLibclogblTest, SpecialNumbers) { - EXPECT_TRUE(LD(FPBits::inf()) == __llvm_libc::logbl(LD(FPBits::inf()))); - EXPECT_TRUE(LD(FPBits::inf()) == __llvm_libc::logbl(LD(FPBits::negInf()))); - - EXPECT_TRUE(LD(FPBits::negInf()) == __llvm_libc::logbl(LD(FPBits::zero()))); - EXPECT_TRUE(LD(FPBits::negInf()) == - __llvm_libc::logbl(LD(FPBits::negZero()))); - - EXPECT_TRUE(FPBits(__llvm_libc::logbl(LD(FPBits::buildNaN(1)))).isNaN()); -} - -TEST(LlvmLibclogblTest, PowersOfTwo) { - EXPECT_TRUE(0.0l == __llvm_libc::logbl(1.0l)); - EXPECT_TRUE(0.0l == __llvm_libc::logbl(-1.0l)); - - EXPECT_TRUE(1.0l == __llvm_libc::logbl(2.0l)); - EXPECT_TRUE(1.0l == __llvm_libc::logbl(-2.0l)); - - EXPECT_TRUE(2.0l == __llvm_libc::logbl(4.0l)); - EXPECT_TRUE(2.0l == __llvm_libc::logbl(-4.0l)); - - EXPECT_TRUE(3.0l == __llvm_libc::logbl(8.0l)); - EXPECT_TRUE(3.0l == __llvm_libc::logbl(-8.0l)); +#include "LogbTest.h" - EXPECT_TRUE(4.0l == __llvm_libc::logbl(16.0l)); - EXPECT_TRUE(4.0l == __llvm_libc::logbl(-16.0l)); - - EXPECT_TRUE(5.0l == __llvm_libc::logbl(32.0l)); - EXPECT_TRUE(5.0l == __llvm_libc::logbl(-32.0l)); -} - -TEST(LlvmLibcLogbTest, SomeIntegers) { - EXPECT_TRUE(1.0l == __llvm_libc::logbl(3.0l)); - EXPECT_TRUE(1.0l == __llvm_libc::logbl(-3.0l)); - - EXPECT_TRUE(2.0l == __llvm_libc::logbl(7.0l)); - EXPECT_TRUE(2.0l == __llvm_libc::logbl(-7.0l)); - - EXPECT_TRUE(3.0l == __llvm_libc::logbl(10.0l)); - EXPECT_TRUE(3.0l == __llvm_libc::logbl(-10.0l)); - - EXPECT_TRUE(4.0l == __llvm_libc::logbl(31.0l)); - EXPECT_TRUE(4.0l == __llvm_libc::logbl(-31.0l)); - - EXPECT_TRUE(5.0l == __llvm_libc::logbl(55.0l)); - EXPECT_TRUE(5.0l == __llvm_libc::logbl(-55.0l)); -} - -TEST(LlvmLibcLogblTest, LongDoubleRange) { - using UIntType = FPBits::UIntType; - constexpr UIntType count = 10000000; - constexpr UIntType step = UIntType(-1) / count; - for (UIntType i = 0, v = 0; i <= count; ++i, v += step) { - long double x = LD(FPBits(v)); - if (isnan(x) || isinf(x) || x == 0.0l) - continue; +#include "src/math/logbl.h" - int exponent; - __llvm_libc::fputil::frexp(x, exponent); - ASSERT_TRUE((long double)(exponent) == __llvm_libc::logbl(x) + 1.0l); - } -} +LIST_LOGB_TESTS(long double, __llvm_libc::logbl) diff --git a/libc/test/src/math/modf_test.cpp b/libc/test/src/math/modf_test.cpp index 936cccad8a5f3..ff89517506b4f 100644 --- a/libc/test/src/math/modf_test.cpp +++ b/libc/test/src/math/modf_test.cpp @@ -6,127 +6,8 @@ // //===----------------------------------------------------------------------===// -#include "src/math/modf.h" -#include "utils/FPUtil/BasicOperations.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" -#include "utils/FPUtil/NearestIntegerOperations.h" -#include "utils/UnitTest/Test.h" -#include - -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; -using Properties = __llvm_libc::fputil::FloatProperties; - -TEST(LlvmLibcModfTest, SpecialNumbers) { - double integral; - - EXPECT_EQ(BitPatterns::aQuietNaN, - valueAsBits(__llvm_libc::modf(valueFromBits(BitPatterns::aQuietNaN), - &integral))); - EXPECT_EQ(BitPatterns::aNegativeQuietNaN, - valueAsBits(__llvm_libc::modf( - valueFromBits(BitPatterns::aNegativeQuietNaN), &integral))); - - EXPECT_EQ(BitPatterns::aSignallingNaN, - valueAsBits(__llvm_libc::modf( - valueFromBits(BitPatterns::aSignallingNaN), &integral))); - EXPECT_EQ( - BitPatterns::aNegativeSignallingNaN, - valueAsBits(__llvm_libc::modf( - valueFromBits(BitPatterns::aNegativeSignallingNaN), &integral))); - - EXPECT_EQ(BitPatterns::zero, - valueAsBits( - __llvm_libc::modf(valueFromBits(BitPatterns::inf), &integral))); - EXPECT_EQ(valueAsBits(integral), BitPatterns::inf); - - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::modf(valueFromBits(BitPatterns::negInf), - &integral))); - EXPECT_EQ(valueAsBits(integral), BitPatterns::negInf); - - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::modf(valueFromBits(BitPatterns::zero), - &integral))); - EXPECT_EQ(valueAsBits(integral), BitPatterns::zero); - - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::modf(valueFromBits(BitPatterns::negZero), - &integral))); - EXPECT_EQ(valueAsBits(integral), BitPatterns::negZero); -} - -TEST(LlvmLibcModfTest, Integers) { - double integral; - - EXPECT_EQ(BitPatterns::zero, valueAsBits(__llvm_libc::modf(1.0, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(1.0)); - - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::modf(-1.0, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-1.0)); +#include "ModfTest.h" - EXPECT_EQ(BitPatterns::zero, valueAsBits(__llvm_libc::modf(10.0, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(10.0)); - - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::modf(-10.0, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-10.0)); - - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::modf(12345.0, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(12345.0)); - - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::modf(-12345.0, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-12345.0)); -} - -TEST(LlvmLibcModfTest, Fractions) { - double integral; - - EXPECT_EQ(valueAsBits(0.5), valueAsBits(__llvm_libc::modf(1.5, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(1.0)); - - EXPECT_EQ(valueAsBits(-0.5), valueAsBits(__llvm_libc::modf(-1.5, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-1.0)); - - EXPECT_EQ(valueAsBits(0.75), - valueAsBits(__llvm_libc::modf(10.75, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(10.0)); - - EXPECT_EQ(valueAsBits(-0.75), - valueAsBits(__llvm_libc::modf(-10.75, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-10.0)); - - EXPECT_EQ(valueAsBits(0.125), - valueAsBits(__llvm_libc::modf(100.125, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(100.0)); - - EXPECT_EQ(valueAsBits(-0.125), - valueAsBits(__llvm_libc::modf(-100.125, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-100.0)); -} - -TEST(LlvmLibcModfTest, InDoubleRange) { - using BitsType = Properties::BitsType; - constexpr BitsType count = 10000000; - constexpr BitsType step = UINT64_MAX / count; - for (BitsType i = 0, v = 0; i <= count; ++i, v += step) { - double x = valueFromBits(v); - if (isnan(x) || isinf(x) || x == 0.0) { - // These conditions have been tested in other tests. - continue; - } +#include "src/math/modf.h" - double integral; - double frac = __llvm_libc::modf(x, &integral); - ASSERT_TRUE(__llvm_libc::fputil::abs(frac) < 1.0); - ASSERT_TRUE(__llvm_libc::fputil::trunc(x) == integral); - ASSERT_TRUE(integral + frac == x); - } -} +LIST_MODF_TESTS(double, __llvm_libc::modf) diff --git a/libc/test/src/math/modff_test.cpp b/libc/test/src/math/modff_test.cpp index ec91ef3d018bd..440304ab95ac7 100644 --- a/libc/test/src/math/modff_test.cpp +++ b/libc/test/src/math/modff_test.cpp @@ -6,131 +6,8 @@ // //===----------------------------------------------------------------------===// -#include "src/math/modff.h" -#include "utils/FPUtil/BasicOperations.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" -#include "utils/FPUtil/NearestIntegerOperations.h" -#include "utils/UnitTest/Test.h" -#include - -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; -using Properties = __llvm_libc::fputil::FloatProperties; - -TEST(LlvmLibcModffTest, SpecialNumbers) { - float integral; - - EXPECT_EQ(BitPatterns::aQuietNaN, - valueAsBits(__llvm_libc::modff( - valueFromBits(BitPatterns::aQuietNaN), &integral))); - EXPECT_EQ(BitPatterns::aNegativeQuietNaN, - valueAsBits(__llvm_libc::modff( - valueFromBits(BitPatterns::aNegativeQuietNaN), &integral))); - - EXPECT_EQ(BitPatterns::aSignallingNaN, - valueAsBits(__llvm_libc::modff( - valueFromBits(BitPatterns::aSignallingNaN), &integral))); - EXPECT_EQ( - BitPatterns::aNegativeSignallingNaN, - valueAsBits(__llvm_libc::modff( - valueFromBits(BitPatterns::aNegativeSignallingNaN), &integral))); - - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::modff(valueFromBits(BitPatterns::inf), - &integral))); - EXPECT_EQ(valueAsBits(integral), BitPatterns::inf); - - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::modff(valueFromBits(BitPatterns::negInf), - &integral))); - EXPECT_EQ(valueAsBits(integral), BitPatterns::negInf); - - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::modff(valueFromBits(BitPatterns::zero), - &integral))); - EXPECT_EQ(valueAsBits(integral), BitPatterns::zero); - - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::modff(valueFromBits(BitPatterns::negZero), - &integral))); - EXPECT_EQ(valueAsBits(integral), BitPatterns::negZero); -} - -TEST(LlvmLibcModffTest, Integers) { - float integral; - - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::modff(1.0f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(1.0f)); - - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::modff(-1.0f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-1.0f)); +#include "ModfTest.h" - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::modff(10.0f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(10.0f)); - - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::modff(-10.0f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-10.0f)); - - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::modff(12345.0f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(12345.0f)); - - EXPECT_EQ(BitPatterns::negZero, - valueAsBits(__llvm_libc::modff(-12345.0f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-12345.0f)); -} - -TEST(LlvmLibcModffTest, Fractions) { - float integral; - - EXPECT_EQ(valueAsBits(0.5f), - valueAsBits(__llvm_libc::modff(1.5f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(1.0f)); - - EXPECT_EQ(valueAsBits(-0.5f), - valueAsBits(__llvm_libc::modff(-1.5f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-1.0f)); - - EXPECT_EQ(valueAsBits(0.75f), - valueAsBits(__llvm_libc::modff(10.75f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(10.0f)); - - EXPECT_EQ(valueAsBits(-0.75f), - valueAsBits(__llvm_libc::modff(-10.75f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-10.0f)); - - EXPECT_EQ(valueAsBits(0.125f), - valueAsBits(__llvm_libc::modff(100.125f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(100.0f)); - - EXPECT_EQ(valueAsBits(-0.125f), - valueAsBits(__llvm_libc::modff(-100.125f, &integral))); - EXPECT_EQ(valueAsBits(integral), valueAsBits(-100.0f)); -} - -TEST(LlvmLibcModffTest, InDoubleRange) { - using BitsType = Properties::BitsType; - constexpr BitsType count = 10000000; - constexpr BitsType step = UINT32_MAX / count; - for (BitsType i = 0, v = 0; i <= count; ++i, v += step) { - float x = valueFromBits(v); - if (isnan(x) || isinf(x) || x == 0.0f) { - // These conditions have been tested in other tests. - continue; - } +#include "src/math/modff.h" - float integral; - float frac = __llvm_libc::modff(x, &integral); - ASSERT_TRUE(__llvm_libc::fputil::abs(frac) < 1.0f); - ASSERT_TRUE(__llvm_libc::fputil::trunc(x) == integral); - ASSERT_TRUE(integral + frac == x); - } -} +LIST_MODF_TESTS(float, __llvm_libc::modff) diff --git a/libc/test/src/math/modfl_test.cpp b/libc/test/src/math/modfl_test.cpp index fae4690b65cce..c98678b3e9243 100644 --- a/libc/test/src/math/modfl_test.cpp +++ b/libc/test/src/math/modfl_test.cpp @@ -6,97 +6,8 @@ // //===----------------------------------------------------------------------===// -#include "src/math/modfl.h" -#include "utils/FPUtil/BasicOperations.h" -#include "utils/FPUtil/FPBits.h" -#include "utils/FPUtil/NearestIntegerOperations.h" -#include "utils/UnitTest/Test.h" -#include - -typedef long double LD; -using FPBits = __llvm_libc::fputil::FPBits; - -TEST(LlvmLibcmodflTest, SpecialNumbers) { - long double integral; - - EXPECT_TRUE(LD(FPBits::zero()) == - __llvm_libc::modfl(LD(FPBits::inf()), &integral)); - EXPECT_TRUE(LD(FPBits::inf()) == integral); - - EXPECT_TRUE(LD(FPBits::negZero()) == - __llvm_libc::modfl(LD(FPBits::negInf()), &integral)); - EXPECT_TRUE(LD(FPBits::negInf()) == integral); - - EXPECT_TRUE(LD(FPBits::zero()) == - __llvm_libc::modfl(LD(FPBits::zero()), &integral)); - EXPECT_TRUE(integral == 0.0l); - - EXPECT_TRUE(LD(FPBits::negZero()) == - __llvm_libc::modfl(LD(FPBits::negZero()), &integral)); - EXPECT_TRUE(integral == 0.0l); - - EXPECT_TRUE( - FPBits(__llvm_libc::modfl(LD(FPBits::buildNaN(1)), &integral)).isNaN()); -} - -TEST(LlvmLibcmodflTest, Integers) { - long double integral; - - EXPECT_TRUE(LD(FPBits::zero()) == __llvm_libc::modfl(1.0l, &integral)); - EXPECT_TRUE(integral == 1.0l); - - EXPECT_TRUE(LD(FPBits::negZero()) == __llvm_libc::modfl(-1.0l, &integral)); - EXPECT_TRUE(integral == -1.0l); - - EXPECT_TRUE(LD(FPBits::zero()) == __llvm_libc::modfl(10.0l, &integral)); - EXPECT_TRUE(integral == 10.0l); +#include "ModfTest.h" - EXPECT_TRUE(LD(FPBits::negZero()) == __llvm_libc::modfl(-10.0l, &integral)); - EXPECT_TRUE(integral == -10.0l); - - EXPECT_TRUE(LD(FPBits::zero()) == __llvm_libc::modfl(12345.0l, &integral)); - EXPECT_TRUE(integral == 12345.0l); - - EXPECT_TRUE(LD(FPBits::negZero()) == - __llvm_libc::modfl(-12345.0l, &integral)); - EXPECT_TRUE(integral == -12345.0l); -} - -TEST(LlvmLibcModfTest, Fractions) { - long double integral; - - EXPECT_TRUE(0.5l == __llvm_libc::modfl(1.5l, &integral)); - EXPECT_TRUE(integral == 1.0l); - - EXPECT_TRUE(-0.5l == __llvm_libc::modfl(-1.5l, &integral)); - EXPECT_TRUE(integral == -1.0l); - - EXPECT_TRUE(0.75l == __llvm_libc::modfl(10.75l, &integral)); - EXPECT_TRUE(integral == 10.0l); - - EXPECT_TRUE(-0.75l == __llvm_libc::modfl(-10.75l, &integral)); - EXPECT_TRUE(integral == -10.0l); - - EXPECT_TRUE(0.125l == __llvm_libc::modfl(100.125l, &integral)); - EXPECT_TRUE(integral == 100.0l); - - EXPECT_TRUE(-0.125l == __llvm_libc::modfl(-100.125l, &integral)); - EXPECT_TRUE(integral == -100.0l); -} - -TEST(LlvmLibcModflTest, LongDoubleRange) { - using UIntType = FPBits::UIntType; - constexpr UIntType count = 10000000; - constexpr UIntType step = UIntType(-1) / count; - for (UIntType i = 0, v = 0; i <= count; ++i, v += step) { - long double x = LD(FPBits(v)); - if (isnan(x) || isinf(x) || x == 0.0l) - continue; +#include "src/math/modfl.h" - long double integral; - long double frac = __llvm_libc::modfl(x, &integral); - ASSERT_TRUE(__llvm_libc::fputil::abs(frac) < 1.0l); - ASSERT_TRUE(__llvm_libc::fputil::trunc(x) == integral); - ASSERT_TRUE(integral + frac == x); - } -} +LIST_MODF_TESTS(long double, __llvm_libc::modfl) diff --git a/libc/test/src/math/sdcomp26094.h b/libc/test/src/math/sdcomp26094.h index 7e477534c98ba..9c7d464e5d2bc 100644 --- a/libc/test/src/math/sdcomp26094.h +++ b/libc/test/src/math/sdcomp26094.h @@ -10,17 +10,16 @@ #define LLVM_LIBC_TEST_SRC_MATH_SDCOMP26094_H #include "utils/CPP/Array.h" -#include "utils/FPUtil/BitPatterns.h" + +#include namespace __llvm_libc { namespace testing { -static constexpr __llvm_libc::cpp::Array::BitsType, - 10> - sdcomp26094Values{ - 0x46427f1b, 0x4647e568, 0x46428bac, 0x4647f1f9, 0x4647fe8a, - 0x45d8d7f1, 0x45d371a4, 0x45ce0b57, 0x45d35882, 0x45cdf235, - }; +static constexpr __llvm_libc::cpp::Array sdcomp26094Values{ + 0x46427f1b, 0x4647e568, 0x46428bac, 0x4647f1f9, 0x4647fe8a, + 0x45d8d7f1, 0x45d371a4, 0x45ce0b57, 0x45d35882, 0x45cdf235, +}; } // namespace testing } // namespace __llvm_libc diff --git a/libc/test/src/math/sin_test.cpp b/libc/test/src/math/sin_test.cpp index dd3fcb58c9691..be230a15ed54a 100644 --- a/libc/test/src/math/sin_test.cpp +++ b/libc/test/src/math/sin_test.cpp @@ -7,6 +7,7 @@ //===----------------------------------------------------------------------===// #include "src/math/sin.h" +#include "utils/FPUtil/FPBits.h" #include "utils/FPUtil/TestHelpers.h" #include "utils/MPFRWrapper/MPFRUtils.h" #include "utils/UnitTest/Test.h" diff --git a/libc/test/src/math/sincosf_test.cpp b/libc/test/src/math/sincosf_test.cpp index 97b9837203356..c8172e9da9dec 100644 --- a/libc/test/src/math/sincosf_test.cpp +++ b/libc/test/src/math/sincosf_test.cpp @@ -9,10 +9,8 @@ #include "src/math/sincosf.h" #include "test/src/math/sdcomp26094.h" #include "utils/CPP/Array.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/ClassificationFunctions.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" +#include "utils/FPUtil/FPBits.h" +#include "utils/FPUtil/TestHelpers.h" #include "utils/MPFRWrapper/MPFRUtils.h" #include "utils/UnitTest/Test.h" #include @@ -20,63 +18,42 @@ #include #include -using __llvm_libc::fputil::isNegativeQuietNaN; -using __llvm_libc::fputil::isQuietNaN; -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; - using __llvm_libc::testing::sdcomp26094Values; +using FPBits = __llvm_libc::fputil::FPBits; namespace mpfr = __llvm_libc::testing::mpfr; +DECLARE_SPECIAL_CONSTANTS(float) + TEST(LlvmLibcSinCosfTest, SpecialNumbers) { errno = 0; float sin, cos; - __llvm_libc::sincosf(valueFromBits(BitPatterns::aQuietNaN), &sin, &cos); - EXPECT_TRUE(isQuietNaN(cos)); - EXPECT_TRUE(isQuietNaN(sin)); - EXPECT_EQ(errno, 0); - - __llvm_libc::sincosf(valueFromBits(BitPatterns::aNegativeQuietNaN), &sin, - &cos); - EXPECT_TRUE(isNegativeQuietNaN(cos)); - EXPECT_TRUE(isNegativeQuietNaN(sin)); - EXPECT_EQ(errno, 0); - - __llvm_libc::sincosf(valueFromBits(BitPatterns::aSignallingNaN), &sin, &cos); - EXPECT_TRUE(isQuietNaN(cos)); - EXPECT_TRUE(isQuietNaN(sin)); - EXPECT_EQ(errno, 0); - - __llvm_libc::sincosf(valueFromBits(BitPatterns::aNegativeSignallingNaN), &sin, - &cos); - EXPECT_TRUE(isNegativeQuietNaN(cos)); - EXPECT_TRUE(isNegativeQuietNaN(sin)); + __llvm_libc::sincosf(aNaN, &sin, &cos); + EXPECT_FP_EQ(aNaN, cos); + EXPECT_FP_EQ(aNaN, sin); EXPECT_EQ(errno, 0); - __llvm_libc::sincosf(valueFromBits(BitPatterns::zero), &sin, &cos); - EXPECT_EQ(BitPatterns::one, valueAsBits(cos)); - EXPECT_EQ(BitPatterns::zero, valueAsBits(sin)); + __llvm_libc::sincosf(0.0f, &sin, &cos); + EXPECT_FP_EQ(1.0f, cos); + EXPECT_FP_EQ(0.0f, sin); EXPECT_EQ(errno, 0); - __llvm_libc::sincosf(valueFromBits(BitPatterns::negZero), &sin, &cos); - EXPECT_EQ(BitPatterns::one, valueAsBits(cos)); - EXPECT_EQ(BitPatterns::negZero, valueAsBits(sin)); + __llvm_libc::sincosf(-0.0f, &sin, &cos); + EXPECT_FP_EQ(1.0f, cos); + EXPECT_FP_EQ(-0.0f, sin); EXPECT_EQ(errno, 0); errno = 0; - __llvm_libc::sincosf(valueFromBits(BitPatterns::inf), &sin, &cos); - EXPECT_TRUE(isQuietNaN(cos)); - EXPECT_TRUE(isQuietNaN(sin)); + __llvm_libc::sincosf(inf, &sin, &cos); + EXPECT_FP_EQ(aNaN, cos); + EXPECT_FP_EQ(aNaN, sin); EXPECT_EQ(errno, EDOM); errno = 0; - __llvm_libc::sincosf(valueFromBits(BitPatterns::negInf), &sin, &cos); - EXPECT_TRUE(isQuietNaN(cos)); - EXPECT_TRUE(isQuietNaN(sin)); + __llvm_libc::sincosf(negInf, &sin, &cos); + EXPECT_FP_EQ(aNaN, cos); + EXPECT_FP_EQ(aNaN, sin); EXPECT_EQ(errno, EDOM); } @@ -84,7 +61,7 @@ TEST(LlvmLibcSinCosfTest, InFloatRange) { constexpr uint32_t count = 1000000; constexpr uint32_t step = UINT32_MAX / count; for (uint32_t i = 0, v = 0; i <= count; ++i, v += step) { - float x = valueFromBits(v); + float x = float(FPBits((v))); if (isnan(x) || isinf(x)) continue; @@ -98,28 +75,28 @@ TEST(LlvmLibcSinCosfTest, InFloatRange) { // For small values, cos(x) is 1 and sin(x) is x. TEST(LlvmLibcSinCosfTest, SmallValues) { uint32_t bits = 0x17800000; - float x = valueFromBits(bits); + float x = float(FPBits((bits))); float result_cos, result_sin; __llvm_libc::sincosf(x, &result_sin, &result_cos); EXPECT_MPFR_MATCH(mpfr::Operation::Cos, x, result_cos, 1.0); EXPECT_MPFR_MATCH(mpfr::Operation::Sin, x, result_sin, 1.0); - EXPECT_EQ(BitPatterns::one, valueAsBits(result_cos)); - EXPECT_EQ(bits, valueAsBits(result_sin)); + EXPECT_FP_EQ(1.0f, result_cos); + EXPECT_FP_EQ(x, result_sin); bits = 0x00400000; - x = valueFromBits(bits); + x = float(FPBits((bits))); __llvm_libc::sincosf(x, &result_sin, &result_cos); EXPECT_MPFR_MATCH(mpfr::Operation::Cos, x, result_cos, 1.0); EXPECT_MPFR_MATCH(mpfr::Operation::Sin, x, result_sin, 1.0); - EXPECT_EQ(BitPatterns::one, valueAsBits(result_cos)); - EXPECT_EQ(bits, valueAsBits(result_sin)); + EXPECT_FP_EQ(1.0f, result_cos); + EXPECT_FP_EQ(x, result_sin); } // SDCOMP-26094: check sinf in the cases for which the range reducer // returns values furthest beyond its nominal upper bound of pi/4. TEST(LlvmLibcSinCosfTest, SDCOMP_26094) { for (uint32_t v : sdcomp26094Values) { - float x = valueFromBits(v); + float x = float(FPBits((v))); float sin, cos; __llvm_libc::sincosf(x, &sin, &cos); EXPECT_MPFR_MATCH(mpfr::Operation::Cos, x, cos, 1.0); diff --git a/libc/test/src/math/sinf_test.cpp b/libc/test/src/math/sinf_test.cpp index 67175f8132335..d2364ae0285a3 100644 --- a/libc/test/src/math/sinf_test.cpp +++ b/libc/test/src/math/sinf_test.cpp @@ -9,10 +9,8 @@ #include "src/math/sinf.h" #include "test/src/math/sdcomp26094.h" #include "utils/CPP/Array.h" -#include "utils/FPUtil/BitPatterns.h" -#include "utils/FPUtil/ClassificationFunctions.h" -#include "utils/FPUtil/FloatOperations.h" -#include "utils/FPUtil/FloatProperties.h" +#include "utils/FPUtil/FPBits.h" +#include "utils/FPUtil/TestHelpers.h" #include "utils/MPFRWrapper/MPFRUtils.h" #include "utils/UnitTest/Test.h" #include @@ -20,51 +18,31 @@ #include #include -using __llvm_libc::fputil::isNegativeQuietNaN; -using __llvm_libc::fputil::isQuietNaN; -using __llvm_libc::fputil::valueAsBits; -using __llvm_libc::fputil::valueFromBits; - -using BitPatterns = __llvm_libc::fputil::BitPatterns; - using __llvm_libc::testing::sdcomp26094Values; +using FPBits = __llvm_libc::fputil::FPBits; namespace mpfr = __llvm_libc::testing::mpfr; +DECLARE_SPECIAL_CONSTANTS(float) + TEST(LlvmLibcSinfTest, SpecialNumbers) { errno = 0; - EXPECT_TRUE( - isQuietNaN(__llvm_libc::sinf(valueFromBits(BitPatterns::aQuietNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isNegativeQuietNaN( - __llvm_libc::sinf(valueFromBits(BitPatterns::aNegativeQuietNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isQuietNaN( - __llvm_libc::sinf(valueFromBits(BitPatterns::aSignallingNaN)))); - EXPECT_EQ(errno, 0); - - EXPECT_TRUE(isNegativeQuietNaN( - __llvm_libc::sinf(valueFromBits(BitPatterns::aNegativeSignallingNaN)))); + EXPECT_FP_EQ(aNaN, __llvm_libc::sinf(aNaN)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::zero, - valueAsBits(__llvm_libc::sinf(valueFromBits(BitPatterns::zero)))); + EXPECT_FP_EQ(0.0f, __llvm_libc::sinf(0.0f)); EXPECT_EQ(errno, 0); - EXPECT_EQ(BitPatterns::negZero, valueAsBits(__llvm_libc::sinf( - valueFromBits(BitPatterns::negZero)))); + EXPECT_FP_EQ(-0.0f, __llvm_libc::sinf(-0.0f)); EXPECT_EQ(errno, 0); errno = 0; - EXPECT_TRUE(isQuietNaN(__llvm_libc::sinf(valueFromBits(BitPatterns::inf)))); + EXPECT_FP_EQ(aNaN, __llvm_libc::sinf(inf)); EXPECT_EQ(errno, EDOM); errno = 0; - EXPECT_TRUE( - isQuietNaN(__llvm_libc::sinf(valueFromBits(BitPatterns::negInf)))); + EXPECT_FP_EQ(aNaN, __llvm_libc::sinf(negInf)); EXPECT_EQ(errno, EDOM); } @@ -72,7 +50,7 @@ TEST(LlvmLibcSinfTest, InFloatRange) { constexpr uint32_t count = 1000000; constexpr uint32_t step = UINT32_MAX / count; for (uint32_t i = 0, v = 0; i <= count; ++i, v += step) { - float x = valueFromBits(v); + float x = float(FPBits(v)); if (isnan(x) || isinf(x)) continue; ASSERT_MPFR_MATCH(mpfr::Operation::Sin, x, __llvm_libc::sinf(x), 1.0); @@ -80,30 +58,28 @@ TEST(LlvmLibcSinfTest, InFloatRange) { } TEST(LlvmLibcSinfTest, SpecificBitPatterns) { - float x = valueFromBits(0xc70d39a1); + float x = float(FPBits(uint32_t(0xc70d39a1))); EXPECT_MPFR_MATCH(mpfr::Operation::Sin, x, __llvm_libc::sinf(x), 1.0); } // For small values, sin(x) is x. TEST(LlvmLibcSinfTest, SmallValues) { - uint32_t bits = 0x17800000; - float x = valueFromBits(bits); + float x = float(FPBits(uint32_t(0x17800000))); float result = __llvm_libc::sinf(x); EXPECT_MPFR_MATCH(mpfr::Operation::Sin, x, result, 1.0); - EXPECT_EQ(bits, valueAsBits(result)); + EXPECT_FP_EQ(x, result); - bits = 0x00400000; - x = valueFromBits(bits); + x = float(FPBits(uint32_t(0x00400000))); result = __llvm_libc::sinf(x); EXPECT_MPFR_MATCH(mpfr::Operation::Sin, x, result, 1.0); - EXPECT_EQ(bits, valueAsBits(result)); + EXPECT_FP_EQ(x, result); } // SDCOMP-26094: check sinf in the cases for which the range reducer // returns values furthest beyond its nominal upper bound of pi/4. TEST(LlvmLibcSinfTest, SDCOMP_26094) { for (uint32_t v : sdcomp26094Values) { - float x = valueFromBits(v); + float x = float(FPBits((v))); EXPECT_MPFR_MATCH(mpfr::Operation::Sin, x, __llvm_libc::sinf(x), 1.0); } } diff --git a/libc/utils/FPUtil/BitPatterns.h b/libc/utils/FPUtil/BitPatterns.h deleted file mode 100644 index a26d403e1bf69..0000000000000 --- a/libc/utils/FPUtil/BitPatterns.h +++ /dev/null @@ -1,69 +0,0 @@ -//===-- Bit patterns of common floating point numbers -----------*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_LIBC_UTILS_FPUTIL_BIT_PATTERNS_H -#define LLVM_LIBC_UTILS_FPUTIL_BIT_PATTERNS_H - -#include "FloatProperties.h" - -#include - -static_assert( - FLT_RADIX == 2, - "LLVM libc only supports radix 2 IEEE 754 floating point formats."); - -namespace __llvm_libc { -namespace fputil { - -template struct BitPatterns {}; - -template <> struct BitPatterns { - using BitsType = FloatProperties::BitsType; - - static constexpr BitsType inf = 0x7f800000U; - static constexpr BitsType negInf = 0xff800000U; - - static constexpr BitsType zero = 0x0; - static constexpr BitsType negZero = 0x80000000U; - - static constexpr BitsType one = 0x3f800000U; - static constexpr BitsType negOne = 0xbf800000U; - - // Examples of quiet NAN. - static constexpr BitsType aQuietNaN = 0x7fc00000U; - static constexpr BitsType aNegativeQuietNaN = 0xffc00000U; - - // Examples of signalling NAN. - static constexpr BitsType aSignallingNaN = 0x7f800001U; - static constexpr BitsType aNegativeSignallingNaN = 0xff800001U; -}; - -template <> struct BitPatterns { - using BitsType = FloatProperties::BitsType; - - static constexpr BitsType inf = 0x7ff0000000000000ULL; - static constexpr BitsType negInf = 0xfff0000000000000ULL; - - static constexpr BitsType zero = 0x0ULL; - static constexpr BitsType negZero = 0x8000000000000000ULL; - - static constexpr BitsType one = 0x3FF0000000000000ULL; - - // Examples of quiet NAN. - static constexpr BitsType aQuietNaN = 0x7ff8000000000000ULL; - static constexpr BitsType aNegativeQuietNaN = 0xfff8000000000000ULL; - - // Examples of signalling NAN. - static constexpr BitsType aSignallingNaN = 0x7ff0000000000001ULL; - static constexpr BitsType aNegativeSignallingNaN = 0xfff0000000000001ULL; -}; - -} // namespace fputil -} // namespace __llvm_libc - -#endif // LLVM_LIBC_UTILS_FPUTIL_BIT_PATTERNS_H diff --git a/libc/utils/FPUtil/CMakeLists.txt b/libc/utils/FPUtil/CMakeLists.txt index b1cbb3a14ea0b..7b6daff72179e 100644 --- a/libc/utils/FPUtil/CMakeLists.txt +++ b/libc/utils/FPUtil/CMakeLists.txt @@ -16,11 +16,8 @@ add_header_library( ${LONG_DOUBLE_HDR} ${FENV_IMPL} BasicOperations.h - BitPatterns.h - ClassificationFunctions.h DivisionAndRemainderOperations.h FEnv.h - FloatOperations.h FloatProperties.h FPBits.h BasicOperations.h diff --git a/libc/utils/FPUtil/ClassificationFunctions.h b/libc/utils/FPUtil/ClassificationFunctions.h deleted file mode 100644 index a80e349291cdf..0000000000000 --- a/libc/utils/FPUtil/ClassificationFunctions.h +++ /dev/null @@ -1,90 +0,0 @@ -//===-- Floating point classification functions -----------------*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_LIBC_UTILS_FPUTIL_CLASSIFICATION_FUNCTIONS_H -#define LLVM_LIBC_UTILS_FPUTIL_CLASSIFICATION_FUNCTIONS_H - -#include "BitPatterns.h" -#include "FloatOperations.h" -#include "FloatProperties.h" - -#include "utils/CPP/TypeTraits.h" - -namespace __llvm_libc { -namespace fputil { - -template static inline bool bitsAreInf(BitsType bits) { - using FPType = typename FloatType::Type; - return ((bits & BitPatterns::inf) == BitPatterns::inf) && - ((bits & FloatProperties::mantissaMask) == 0); -} - -// Return true if x is infinity (positive or negative.) -template ::Value, int> = 0> -static inline bool isInf(T x) { - return bitsAreInf(valueAsBits(x)); -} - -template static inline bool bitsAreNaN(BitsType bits) { - using FPType = typename FloatType::Type; - return ((bits & BitPatterns::inf) == BitPatterns::inf) && - ((bits & FloatProperties::mantissaMask) != 0); -} - -// Return true if x is a NAN (quiet or signalling.) -template ::Value, int> = 0> -static inline bool isNaN(T x) { - return bitsAreNaN(valueAsBits(x)); -} - -template static inline bool bitsAreInfOrNaN(BitsType bits) { - using FPType = typename FloatType::Type; - return (bits & BitPatterns::inf) == BitPatterns::inf; -} - -template static inline bool bitsAreZero(BitsType bits) { - using FPType = typename FloatType::Type; - return (bits == BitPatterns::zero) || - (bits == BitPatterns::negZero); -} - -// Return true if x is any kind of NaN or infinity. -template ::Value, int> = 0> -static inline bool isInfOrNaN(T x) { - return bitsAreInfOrNaN(valueAsBits(x)); -} - -// Return true if x is a quiet NAN. -template ::Value, int> = 0> -static inline bool isQuietNaN(T x) { - using Properties = FloatProperties; - using BitsType = typename FloatProperties::BitsType; - BitsType bits = valueAsBits(x); - return ((bits & BitPatterns::inf) == BitPatterns::inf) && - ((bits & Properties::quietNaNMask) != 0); -} - -// Return true if x is a quiet NAN with sign bit set. -template ::Value, int> = 0> -static inline bool isNegativeQuietNaN(T x) { - using Properties = FloatProperties; - using BitsType = typename FloatProperties::BitsType; - BitsType bits = valueAsBits(x); - return ((bits & BitPatterns::negInf) == BitPatterns::negInf) && - ((bits & Properties::quietNaNMask) != 0); -} - -} // namespace fputil -} // namespace __llvm_libc - -#endif // LLVM_LIBC_UTILS_FPUTIL_CLASSIFICATION_FUNCTIONS_H diff --git a/libc/utils/FPUtil/FloatOperations.h b/libc/utils/FPUtil/FloatOperations.h deleted file mode 100644 index ffd138d6cc9bd..0000000000000 --- a/libc/utils/FPUtil/FloatOperations.h +++ /dev/null @@ -1,63 +0,0 @@ -//===-- Common operations on floating point numbers -------------*- C++ -*-===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_LIBC_UTILS_FPUTIL_FLOAT_OPERATIONS_H -#define LLVM_LIBC_UTILS_FPUTIL_FLOAT_OPERATIONS_H - -#include "BitPatterns.h" -#include "FloatProperties.h" - -#include "utils/CPP/TypeTraits.h" - -namespace __llvm_libc { -namespace fputil { - -// Return the bits of a float value. -template ::Value, int> = 0> -static inline typename FloatProperties::BitsType valueAsBits(T x) { - using BitsType = typename FloatProperties::BitsType; - return *reinterpret_cast(&x); -} - -// Return the float value from bits. -template >::Value, int> = 0> -static inline FloatTypeT valueFromBits(BitsType bits) { - return *reinterpret_cast *>(&bits); -} - -// Return the bits of abs(x). -template ::Value, int> = 0> -static inline typename FloatProperties::BitsType absBits(T x) { - return valueAsBits(x) & (~FloatProperties::signMask); -} - -template -static inline int getExponentFromBits(BitsType bits) { - using FPType = typename FloatType::Type; - using Properties = FloatProperties; - bits &= Properties::exponentMask; - int e = (bits >> Properties::mantissaWidth); // Shift out the mantissa. - e -= Properties::exponentOffset; // Zero adjust. - return e; -} - -// Return the zero adjusted exponent value of x. -template ::Value, int> = 0> -static inline int getExponent(T x) { - return getExponentFromBits(valueAsBits(x)); -} - -} // namespace fputil -} // namespace __llvm_libc - -#endif // LLVM_LIBC_UTILS_FPUTIL_FLOAT_OPERATIONS_H diff --git a/libc/utils/FPUtil/aarch64/FEnv.h b/libc/utils/FPUtil/aarch64/FEnv.h index 327ce07265682..93af9a219d036 100644 --- a/libc/utils/FPUtil/aarch64/FEnv.h +++ b/libc/utils/FPUtil/aarch64/FEnv.h @@ -90,10 +90,10 @@ static inline int disableExcept(int excepts) { } static inline int clearExcept(int excepts) { - uint32_t controlWord = FEnv::getControlWord(); + uint32_t statusWord = FEnv::getStatusWord(); uint32_t toClear = FEnv::getStatusValueForExcept(excepts); - controlWord &= ~(toClear << FEnv::ExceptionStatusFlagsBitPosition); - FEnv::writeStatusWord(controlWord); + statusWord &= ~(toClear << FEnv::ExceptionStatusFlagsBitPosition); + FEnv::writeStatusWord(statusWord); return 0; } diff --git a/libc/utils/FPUtil/x86_64/FEnv.h b/libc/utils/FPUtil/x86_64/FEnv.h index f654f0bab2d51..47e9dce7508e1 100644 --- a/libc/utils/FPUtil/x86_64/FEnv.h +++ b/libc/utils/FPUtil/x86_64/FEnv.h @@ -43,7 +43,10 @@ static constexpr uint16_t MXCSRRoundingControlBitPosition = 13; // encoding as well as the same bit positions. struct ExceptionFlags { static constexpr uint16_t Invalid = 0x1; - static constexpr uint16_t Denormal = 0x2; // This flag is not used + // Some libcs define __FE_DENORM corresponding to the denormal input + // exception and include it in FE_ALL_EXCEPTS. We define and use it to + // support compiling against headers provided by such libcs. + static constexpr uint16_t Denormal = 0x2; static constexpr uint16_t DivByZero = 0x4; static constexpr uint16_t Overflow = 0x8; static constexpr uint16_t Underflow = 0x10; @@ -62,6 +65,9 @@ static inline uint16_t getStatusValueForExcept(int excepts) { // We will make use of the fact that exception control bits are single // bit flags in the control registers. return (excepts & FE_INVALID ? ExceptionFlags::Invalid : 0) | +#ifdef __FE_DENORM + (excepts & __FE_DENORM ? ExceptionFalgs::Denormal : 0) | +#endif // __FE_DENORM (excepts & FE_DIVBYZERO ? ExceptionFlags::DivByZero : 0) | (excepts & FE_OVERFLOW ? ExceptionFlags::Overflow : 0) | (excepts & FE_UNDERFLOW ? ExceptionFlags::Underflow : 0) | @@ -70,6 +76,9 @@ static inline uint16_t getStatusValueForExcept(int excepts) { static inline int exceptionStatusToMacro(uint16_t status) { return (status & ExceptionFlags::Invalid ? FE_INVALID : 0) | +#ifdef __FE_DENORM + (status & ExceptionFalgs::Denormal ? __FE_DENORM : 0) | +#endif // __FE_DENORM (status & ExceptionFlags::DivByZero ? FE_DIVBYZERO : 0) | (status & ExceptionFlags::Overflow ? FE_OVERFLOW : 0) | (status & ExceptionFlags::Underflow ? FE_UNDERFLOW : 0) | @@ -188,12 +197,10 @@ static inline int disableExcept(int excepts) { } static inline int clearExcept(int excepts) { - // An instruction to write to x87 status word ins't available. So, we - // just clear all of the x87 exceptions. - // TODO: One can potentially use fegetenv/fesetenv to clear only the - // listed exceptions in the x87 status word. We can do this if it is - // really required. - internal::clearX87Exceptions(); + internal::X87StateDescriptor state; + internal::getX87StateDescriptor(state); + state.StatusWord &= ~internal::getStatusValueForExcept(excepts); + internal::writeX87StateDescriptor(state); uint32_t mxcsr = internal::getMXCSR(); mxcsr &= ~internal::getStatusValueForExcept(excepts); diff --git a/libc/utils/MPFRWrapper/MPFRUtils.cpp b/libc/utils/MPFRWrapper/MPFRUtils.cpp index 959701cf94125..a61f02243579c 100644 --- a/libc/utils/MPFRWrapper/MPFRUtils.cpp +++ b/libc/utils/MPFRWrapper/MPFRUtils.cpp @@ -12,6 +12,7 @@ #include "utils/FPUtil/FPBits.h" #include "utils/FPUtil/TestHelpers.h" +#include #include #include #include @@ -256,51 +257,64 @@ class MPFRNumber { // Return the ULP (units-in-the-last-place) difference between the // stored MPFR and a floating point number. // - // We define: - // ULP(mpfr_value, value) = abs(mpfr_value - value) / eps(value) + // We define ULP difference as follows: + // If exponents of this value and the |input| are same, then: + // ULP(this_value, input) = abs(this_value - input) / eps(input) + // else: + // max = max(abs(this_value), abs(input)) + // min = min(abs(this_value), abs(input)) + // maxExponent = exponent(max) + // ULP(this_value, input) = (max - 2^maxExponent) / eps(max) + + // (2^maxExponent - min) / eps(min) // // Remarks: - // 1. ULP < 0.5 will imply that the value is correctly rounded. + // 1. A ULP of 0.0 will imply that the value is correctly rounded. // 2. We expect that this value and the value to be compared (the [input] // argument) are reasonable close, and we will provide an upper bound // of ULP value for testing. Morever, most of the fractional parts of // ULP value do not matter much, so using double as the return type // should be good enough. + // 3. For close enough values (values which don't diff in their exponent by + // not more than 1), a ULP difference of N indicates a bit distance + // of N between this number and [input]. + // 4. A values of +0.0 and -0.0 are treated as equal. template cpp::EnableIfType::Value, double> ulp(T input) { - fputil::FPBits bits(input); - MPFRNumber mpfrInput(input); - // When calculating error, we first round this number to the floating - // point type T and calculate the ulp error against this rounded number. - // The input is always either exact or rounded. So, we if compare - // with this number directly, we can end up with a large ULP error. - MPFRNumber thisRoundedToFloat(as()); - - // abs(thisRoundedToFloat - input) - mpfr_sub(mpfrInput.value, thisRoundedToFloat.value, mpfrInput.value, - MPFR_RNDN); - mpfr_abs(mpfrInput.value, mpfrInput.value, MPFR_RNDN); - - // get eps(input) - int epsExponent = bits.encoding.exponent - fputil::FPBits::exponentBias - - fputil::MantissaWidth::value; - if (bits.encoding.exponent == 0) { - // correcting denormal exponent - ++epsExponent; - } else if ((bits.encoding.mantissa == 0) && (bits.encoding.exponent > 1) && - mpfr_less_p(thisRoundedToFloat.value, mpfrInput.value)) { - // when the input is exactly 2^n, distance (epsilon) between the input - // and the next floating point number is different from the distance to - // the previous floating point number. So in that case, if the correct - // value from MPFR is smaller than the input, we use the smaller epsilon - --epsExponent; + T thisAsT = as(); + int thisExponent = fputil::FPBits(thisAsT).getExponent(); + int inputExponent = fputil::FPBits(input).getExponent(); + if (thisAsT * input < 0 || thisExponent == inputExponent) { + MPFRNumber inputMPFR(input); + mpfr_sub(inputMPFR.value, value, inputMPFR.value, MPFR_RNDN); + mpfr_abs(inputMPFR.value, inputMPFR.value, MPFR_RNDN); + mpfr_mul_2si(inputMPFR.value, inputMPFR.value, -thisExponent, MPFR_RNDN); + return inputMPFR.as(); } - // Since eps(value) is of the form 2^e, instead of dividing such number, - // we multiply by its inverse 2^{-e}. - mpfr_mul_2si(mpfrInput.value, mpfrInput.value, -epsExponent, MPFR_RNDN); + // If the control reaches here, it means that this number and input are + // of the same sign but different exponent. In such a case, ULP error is + // calculated as sum of two parts. + thisAsT = std::abs(thisAsT); + input = std::abs(input); + T min = thisAsT > input ? input : thisAsT; + T max = thisAsT > input ? thisAsT : input; + int minExponent = fputil::FPBits(min).getExponent(); + int maxExponent = fputil::FPBits(max).getExponent(); - return mpfrInput.as(); + MPFRNumber minMPFR(min); + MPFRNumber maxMPFR(max); + + MPFRNumber pivot(uint32_t(1)); + mpfr_mul_2si(pivot.value, pivot.value, maxExponent, MPFR_RNDN); + + mpfr_sub(minMPFR.value, pivot.value, minMPFR.value, MPFR_RNDN); + mpfr_mul_2si(minMPFR.value, minMPFR.value, -minExponent, MPFR_RNDN); + + mpfr_sub(maxMPFR.value, maxMPFR.value, pivot.value, MPFR_RNDN); + mpfr_mul_2si(maxMPFR.value, maxMPFR.value, -maxExponent, MPFR_RNDN); + + mpfr_add(minMPFR.value, minMPFR.value, maxMPFR.value, MPFR_RNDN); + return minMPFR.as(); } }; diff --git a/libcxx/docs/Cxx2aStatus.rst b/libcxx/docs/Cxx2aStatus.rst index 8bbf7d80c3aa4..ae23daf0238f7 100644 --- a/libcxx/docs/Cxx2aStatus.rst +++ b/libcxx/docs/Cxx2aStatus.rst @@ -42,7 +42,7 @@ Paper Status .. [#note-P0600] P0600: The missing bits in P0600 are in |sect|\ [mem.res.class], |sect|\ [mem.poly.allocator.class], and |sect|\ [container.node.overview]. .. [#note-P0966] P0966: It was previously erroneously marked as complete in version 8.0. See `bug 45368 `__. - .. [#note-P0619] P0619: Only sections D.8, D.9, and D.10 are implemented. Sections D.4, D.7, D.11, D.12, and D.14 remain undone. + .. [#note-P0619] P0619: Only sections D.8, D.9, D.10 and D.13 are implemented. Sections D.4, D.7, D.11, D.12, and D.14 remain undone. .. [#note-P0883] P0883: shared_ptr and floating-point changes weren't applied as they themselves aren't implemented yet. diff --git a/libcxx/docs/Cxx2aStatusPaperStatus.csv b/libcxx/docs/Cxx2aStatusPaperStatus.csv index 90695107ad813..131111befe431 100644 --- a/libcxx/docs/Cxx2aStatusPaperStatus.csv +++ b/libcxx/docs/Cxx2aStatusPaperStatus.csv @@ -194,4 +194,9 @@ "`P2106 `__","LWG","Alternative wording for GB315 and GB316","Prague","* *","" "`P2116 `__","LWG","Remove tuple-like protocol support from fixed-extent span","Prague","|Complete|","11.0" "`P2231 `__","LWG","Missing constexpr in std::optional and std::variant","February 2021","|In progress|","13.0" -"`P2325 `__","LWG","Views should not be required to be default constructible","June Telecon","|In progress|","" +"`P2325 `__","LWG","Views should not be required to be default constructible","June 2021","|In progress|","" +"`P2210R2 `__","LWG",Superior String Splitting,"June 2021","","" +"`P2216R3 `__","LWG",std::format improvements,"June 2021","","" +"`P2281R1 `__","LWG",Clarifying range adaptor objects,"June 2021","","" +"`P2328R1 `__","LWG",join_view should join all views of ranges,"June 2021","","" +"`P2367R0 `__","LWG",Remove misuses of list-initialization from Clause 24,"June 2021","","" \ No newline at end of file diff --git a/libcxx/docs/Cxx2bStatusPaperStatus.csv b/libcxx/docs/Cxx2bStatusPaperStatus.csv index 8905486bb257f..db94ba0099336 100644 --- a/libcxx/docs/Cxx2bStatusPaperStatus.csv +++ b/libcxx/docs/Cxx2bStatusPaperStatus.csv @@ -11,5 +11,15 @@ "`P2212R2 `__","LWG","Relax Requirements for time_point::clock","February 2021","","" "`P2259R1 `__","LWG","Repairing input range adaptors and counted_iterator","February 2021","","" "","","","","","" +"`P0401R6 `__","LWG","Providing size feedback in the Allocator interface","June 2021","", +"`P0448R4 `__","LWG","A strstream replacement using span as buffer","June 2021","","" +"`P1132R8 `__","LWG","out_ptr - a scalable output pointer abstraction","June 2021","","" +"`P1328R1 `__","LWG","Making std::type_info::operator== constexpr","June 2021","","" +"`P1425R4 `__","LWG","Iterators pair constructors for stack and queue","June 2021","","" "`P1518R2 `__","LWG","Stop overconstraining allocators in container deduction guides","June 2021","|Complete|","13.0" -"","","","","","" +"`P1659R3 `__","LWG","starts_with and ends_with","June 2021","","" +"`P1951R1 `__","LWG","Default Arguments for pair Forwarding Constructor","June 2021","","" +"`P1989R2 `__","LWG","Range constructor for std::string_view","June 2021","","" +"`P2136R3 `__","LWG","invoke_r","June 2021","","" +"`P2166R1 `__","LWG","A Proposal to Prohibit std::basic_string and std::basic_string_view construction from nullptr","June 2021","","" +"","","","","","" \ No newline at end of file diff --git a/libcxx/docs/DesignDocs/ABIVersioning.rst b/libcxx/docs/DesignDocs/ABIVersioning.rst index 5960dd18610c0..3b82f3cc60a44 100644 --- a/libcxx/docs/DesignDocs/ABIVersioning.rst +++ b/libcxx/docs/DesignDocs/ABIVersioning.rst @@ -3,15 +3,22 @@ Libc++ ABI stability ==================== -Libc++ aims to preserve stable ABI to avoid subtle bugs when code built to the old ABI -is linked with the code build to the new ABI. At the same time, libc++ allows ABI-breaking -improvements and bugfixes for the scenarios when ABI change is not a issue. +Libc++ aims to preserve a stable ABI to avoid subtle bugs when code built under the old ABI +is linked with code built under the new ABI. At the same time, libc++ wants to make +ABI-breaking improvements and bugfixes in scenarios where the user doesn't mind ABI breaks. -To support both cases, libc++ allows specifying the ABI version at the -build time. The version is defined with a cmake option -LIBCXX_ABI_VERSION. Another option LIBCXX_ABI_UNSTABLE can be used to -include all present ABI breaking features. These options translate -into C++ macro definitions _LIBCPP_ABI_VERSION, _LIBCPP_ABI_UNSTABLE. +To support both cases, libc++ allows specifying an ABI version at +build time. The version is defined with CMake option ``LIBCXX_ABI_VERSION``. +Currently supported values are ``1`` (the stable default) +and ``2`` (the unstable "next" version). At some point "ABI version 2" will be +frozen and new ABI-breaking changes will start being applied to version ``3``; +but this has not happened yet. -Any ABI-changing feature is placed under it's own macro, _LIBCPP_ABI_XXX, which is enabled -based on the value of _LIBCPP_ABI_VERSION. _LIBCPP_ABI_UNSTABLE, if set, enables all features at once. +To always use the most cutting-edge, most unstable ABI (which is currently ``2`` +but at some point will become ``3``), set the CMake option ``LIBCXX_ABI_UNSTABLE``. + +Internally, each ABI-changing feature is placed under its own C++ macro, +``_LIBCPP_ABI_XXX``. These macros' definitions are controlled by the C++ macro +``_LIBCPP_ABI_VERSION``, which is controlled by the ``LIBCXX_ABI_VERSION`` set +at build time. Libc++ does not intend users to interact with these C++ macros +directly. diff --git a/libcxx/docs/FormatIssuePaperStatus.csv b/libcxx/docs/FormatIssuePaperStatus.csv index 10d8b52e703e1..b42d9c6f842ca 100644 --- a/libcxx/docs/FormatIssuePaperStatus.csv +++ b/libcxx/docs/FormatIssuePaperStatus.csv @@ -22,3 +22,5 @@ Number,Name,Assignee,Patch,Status,First released version `LWG-3270 `_,"Parsing and formatting %j with durations",,,, `LWG-3272 `_,"%I%p should parse/format duration since midnight",,,, `LWG-3332 `_,"Issue in [time.format]",,,, + +`P2216 `_,"std::format improvements",,,, diff --git a/libcxx/docs/OneRangesProposalStatus.csv b/libcxx/docs/OneRangesProposalStatus.csv index 0b6ca9ed127c7..0bfb00d441846 100644 --- a/libcxx/docs/OneRangesProposalStatus.csv +++ b/libcxx/docs/OneRangesProposalStatus.csv @@ -61,7 +61,7 @@ Section,Description,Dependencies,Assignee,Complete | indirectly_copyable | indirectly_copyable_storable",[iterator.concepts],Zoe Carver,In progress [common.alg.req]: pt. 2,indirectly_swappable,"| [iterator.concepts] -| [iterator.cust.swap]",Louis Dionne,Not started +| [iterator.cust.swap]",Zoe Carver,✅ [common.alg.req]: pt. 3,indirectly_comparable,[projected],Louis Dionne,Not started [common.alg.req]: pt. 4,"| permutable | mergeable diff --git a/libcxx/docs/RangesIssuePaperStatus.csv b/libcxx/docs/RangesIssuePaperStatus.csv index a6d4cd2166aee..ee4a9aa2667ad 100644 --- a/libcxx/docs/RangesIssuePaperStatus.csv +++ b/libcxx/docs/RangesIssuePaperStatus.csv @@ -22,12 +22,19 @@ `P1994R1 `__,elements_view Needs Its Own sentinel,, `P2091R0 `__,Fixing Issues With Range Access CPOs,, `P2106R0 `__,Range Algorithm Result Types,, + +`P2325R3 `__,Views should not be required to be default constructible ,, +`P2328R1 `__,join_view should join all views of ranges,, +`P2210R2 `__,Superior String Splitting,, +`P2281R1 `__,Clarifying range adaptor objects,, +`P2367R0 `__,Remove misuses of list-initialization from Clause 24,, + `LWG3169 `__, ranges permutation generators discard useful information,, `LWG3173 `__, Enable CTAD for ref-view,, `LWG3179 `__, subrange should always model Range,, `LWG3180 `__, Inconsistently named return type for ranges::minmax_element,, `LWG3183 `__, Normative permission to specialize Ranges variable templates,, -`LWG3186 `__," ranges removal, partition, and partial_sort_copy algorithms discard useful information",, +`LWG3186 `__, "ranges removal, partition, and partial_sort_copy algorithms discard useful information",, `LWG3191 `__, std::ranges::shuffle synopsis does not match algorithm definition,, `LWG3276 `__, Class split_view::outer_iterator::value_type should inherit from view_interface,, `LWG3280 `__, View converting constructors can cause constraint recursion and are unneeded,, diff --git a/libcxx/docs/UsingLibcxx.rst b/libcxx/docs/UsingLibcxx.rst index 31ec90ce1ffbd..b967c986165e8 100644 --- a/libcxx/docs/UsingLibcxx.rst +++ b/libcxx/docs/UsingLibcxx.rst @@ -266,6 +266,9 @@ C++20 Specific Configuration Macros: **_LIBCPP_ENABLE_CXX20_REMOVED_RAW_STORAGE_ITERATOR**: This macro is used to re-enable `raw_storage_iterator`. +**_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS**: + This macro is used to re-enable `is_literal_type`, `is_literal_type_v`, + `result_of` and `result_of_t`. Libc++ Extensions ================= diff --git a/libcxx/docs/index.rst b/libcxx/docs/index.rst index c93fbc7e5d654..7e5cb089ba8e1 100644 --- a/libcxx/docs/index.rst +++ b/libcxx/docs/index.rst @@ -178,12 +178,6 @@ Design Documents DesignDocs/UniquePtrTrivialAbi DesignDocs/VisibilityMacros -* ` design `_ -* ` design `_ -* `Notes by Marshall Clow`__ - -.. __: https://cplusplusmusings.wordpress.com/2012/07/05/clang-and-standard-libraries-on-mac-os-x/ - Build Bots and Test Coverage ---------------------------- diff --git a/libcxx/include/CMakeLists.txt b/libcxx/include/CMakeLists.txt index a594b57866ab9..2cbf7c6fe56ca 100644 --- a/libcxx/include/CMakeLists.txt +++ b/libcxx/include/CMakeLists.txt @@ -103,30 +103,61 @@ set(files __format/format_error.h __format/format_parse_context.h __function_like.h - __functional/search.h - __functional_03 __functional_base - __functional_base_03 + __functional/binary_function.h + __functional/binary_negate.h + __functional/bind_front.h + __functional/bind.h + __functional/binder1st.h + __functional/binder2nd.h + __functional/default_searcher.h + __functional/function.h __functional/hash.h + __functional/identity.h + __functional/invoke.h + __functional/is_transparent.h + __functional/mem_fn.h + __functional/mem_fun_ref.h + __functional/not_fn.h + __functional/operations.h + __functional/perfect_forward.h + __functional/pointer_to_binary_function.h + __functional/pointer_to_unary_function.h + __functional/ranges_operations.h + __functional/reference_wrapper.h __functional/unary_function.h + __functional/unary_negate.h __functional/unwrap_ref.h + __functional/weak_result_type.h __hash_table __iterator/advance.h + __iterator/back_insert_iterator.h __iterator/concepts.h __iterator/default_sentinel.h + __iterator/front_insert_iterator.h __iterator/incrementable_traits.h + __iterator/insert_iterator.h + __iterator/istream_iterator.h + __iterator/istreambuf_iterator.h __iterator/iter_move.h __iterator/iter_swap.h __iterator/iterator_traits.h + __iterator/iterator.h + __iterator/move_iterator.h __iterator/next.h + __iterator/ostream_iterator.h + __iterator/ostreambuf_iterator.h __iterator/prev.h __iterator/projected.h __iterator/readable_traits.h + __iterator/reverse_iterator.h + __iterator/wrap_iter.h __libcpp_version __locale __memory/addressof.h __memory/allocation_guard.h __memory/allocator.h + __memory/allocator_arg_t.h __memory/allocator_traits.h __memory/auto_ptr.h __memory/compressed_pair.h @@ -138,6 +169,7 @@ set(files __memory/temporary_buffer.h __memory/uninitialized_algorithms.h __memory/unique_ptr.h + __memory/uses_allocator.h __mutex_base __node_handle __nullptr diff --git a/libcxx/include/__algorithm/inplace_merge.h b/libcxx/include/__algorithm/inplace_merge.h index 24ad36300fd04..c74633a74cf39 100644 --- a/libcxx/include/__algorithm/inplace_merge.h +++ b/libcxx/include/__algorithm/inplace_merge.h @@ -10,11 +10,12 @@ #define _LIBCPP___ALGORITHM_INPLACE_MERGE_H #include <__config> -#include <__algorithm/comp.h> #include <__algorithm/comp_ref_type.h> -#include <__algorithm/rotate.h> +#include <__algorithm/comp.h> #include <__algorithm/lower_bound.h> #include <__algorithm/min.h> +#include <__algorithm/move.h> +#include <__algorithm/rotate.h> #include <__algorithm/upper_bound.h> #include <__iterator/iterator_traits.h> #include <__utility/swap.h> diff --git a/libcxx/include/__algorithm/search.h b/libcxx/include/__algorithm/search.h index 1b238fcab3e97..008b8ebb04adb 100644 --- a/libcxx/include/__algorithm/search.h +++ b/libcxx/include/__algorithm/search.h @@ -10,11 +10,11 @@ #ifndef _LIBCPP___ALGORITHM_SEARCH_H #define _LIBCPP___ALGORITHM_SEARCH_H -#include <__config> #include <__algorithm/comp.h> -#include <__functional/search.h> +#include <__config> #include <__iterator/iterator_traits.h> #include +#include #if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) #pragma GCC system_header @@ -25,6 +25,78 @@ _LIBCPP_PUSH_MACROS _LIBCPP_BEGIN_NAMESPACE_STD +template +pair<_ForwardIterator1, _ForwardIterator1> + _LIBCPP_CONSTEXPR_AFTER_CXX11 __search(_ForwardIterator1 __first1, _ForwardIterator1 __last1, + _ForwardIterator2 __first2, _ForwardIterator2 __last2, + _BinaryPredicate __pred, forward_iterator_tag, forward_iterator_tag) { + if (__first2 == __last2) + return _VSTD::make_pair(__first1, __first1); // Everything matches an empty sequence + while (true) { + // Find first element in sequence 1 that matchs *__first2, with a mininum of loop checks + while (true) { + if (__first1 == __last1) // return __last1 if no element matches *__first2 + return _VSTD::make_pair(__last1, __last1); + if (__pred(*__first1, *__first2)) + break; + ++__first1; + } + // *__first1 matches *__first2, now match elements after here + _ForwardIterator1 __m1 = __first1; + _ForwardIterator2 __m2 = __first2; + while (true) { + if (++__m2 == __last2) // If pattern exhausted, __first1 is the answer (works for 1 element pattern) + return _VSTD::make_pair(__first1, __m1); + if (++__m1 == __last1) // Otherwise if source exhaused, pattern not found + return _VSTD::make_pair(__last1, __last1); + if (!__pred(*__m1, *__m2)) // if there is a mismatch, restart with a new __first1 + { + ++__first1; + break; + } // else there is a match, check next elements + } + } +} + +template +_LIBCPP_CONSTEXPR_AFTER_CXX11 pair<_RandomAccessIterator1, _RandomAccessIterator1> +__search(_RandomAccessIterator1 __first1, _RandomAccessIterator1 __last1, _RandomAccessIterator2 __first2, + _RandomAccessIterator2 __last2, _BinaryPredicate __pred, random_access_iterator_tag, + random_access_iterator_tag) { + typedef typename iterator_traits<_RandomAccessIterator1>::difference_type _D1; + typedef typename iterator_traits<_RandomAccessIterator2>::difference_type _D2; + // Take advantage of knowing source and pattern lengths. Stop short when source is smaller than pattern + const _D2 __len2 = __last2 - __first2; + if (__len2 == 0) + return _VSTD::make_pair(__first1, __first1); + const _D1 __len1 = __last1 - __first1; + if (__len1 < __len2) + return _VSTD::make_pair(__last1, __last1); + const _RandomAccessIterator1 __s = __last1 - (__len2 - 1); // Start of pattern match can't go beyond here + + while (true) { + while (true) { + if (__first1 == __s) + return _VSTD::make_pair(__last1, __last1); + if (__pred(*__first1, *__first2)) + break; + ++__first1; + } + + _RandomAccessIterator1 __m1 = __first1; + _RandomAccessIterator2 __m2 = __first2; + while (true) { + if (++__m2 == __last2) + return _VSTD::make_pair(__first1, __first1 + __len2); + ++__m1; // no need to check range on __m1 because __s guarantees we have enough source + if (!__pred(*__m1, *__m2)) { + ++__first1; + break; + } + } + } +} + template _LIBCPP_NODISCARD_EXT inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 _ForwardIterator1 search(_ForwardIterator1 __first1, _ForwardIterator1 __last1, _ForwardIterator2 __first2, _ForwardIterator2 __last2, diff --git a/libcxx/include/__config b/libcxx/include/__config index a408382385541..9a5343c14d5ff 100644 --- a/libcxx/include/__config +++ b/libcxx/include/__config @@ -1359,6 +1359,7 @@ extern "C" _LIBCPP_FUNC_VIS void __sanitizer_annotate_contiguous_container( #define _LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS #define _LIBCPP_ENABLE_CXX20_REMOVED_NEGATORS #define _LIBCPP_ENABLE_CXX20_REMOVED_RAW_STORAGE_ITERATOR +#define _LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS #endif // _LIBCPP_ENABLE_CXX20_REMOVED_FEATURES #if !defined(__cpp_deduction_guides) || __cpp_deduction_guides < 201611 diff --git a/libcxx/include/__functional/binary_function.h b/libcxx/include/__functional/binary_function.h new file mode 100644 index 0000000000000..8ca7b06662ae5 --- /dev/null +++ b/libcxx/include/__functional/binary_function.h @@ -0,0 +1,31 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_BINARY_FUNCTION_H +#define _LIBCPP___FUNCTIONAL_BINARY_FUNCTION_H + +#include <__config> + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +template +struct _LIBCPP_TEMPLATE_VIS binary_function +{ + typedef _Arg1 first_argument_type; + typedef _Arg2 second_argument_type; + typedef _Result result_type; +}; + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_BINARY_FUNCTION_H diff --git a/libcxx/include/__functional/binary_negate.h b/libcxx/include/__functional/binary_negate.h new file mode 100644 index 0000000000000..4fc3f1ba28750 --- /dev/null +++ b/libcxx/include/__functional/binary_negate.h @@ -0,0 +1,50 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_BINARY_NEGATE_H +#define _LIBCPP___FUNCTIONAL_BINARY_NEGATE_H + +#include <__config> +#include <__functional/binary_function.h> + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_NEGATORS) + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX17 binary_negate + : public binary_function +{ + _Predicate __pred_; +public: + _LIBCPP_INLINE_VISIBILITY explicit _LIBCPP_CONSTEXPR_AFTER_CXX11 + binary_negate(const _Predicate& __pred) : __pred_(__pred) {} + + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + bool operator()(const typename _Predicate::first_argument_type& __x, + const typename _Predicate::second_argument_type& __y) const + {return !__pred_(__x, __y);} +}; + +template +_LIBCPP_DEPRECATED_IN_CXX17 inline _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY +binary_negate<_Predicate> +not2(const _Predicate& __pred) {return binary_negate<_Predicate>(__pred);} + +#endif // _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_NEGATORS) + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_BINARY_NEGATE_H diff --git a/libcxx/include/__functional/bind.h b/libcxx/include/__functional/bind.h new file mode 100644 index 0000000000000..79dfad723c68f --- /dev/null +++ b/libcxx/include/__functional/bind.h @@ -0,0 +1,386 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_BIND_H +#define _LIBCPP___FUNCTIONAL_BIND_H + +#include <__config> +#include <__functional/weak_result_type.h> +#include <__functional/invoke.h> +#include +#include +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +template struct __is_bind_expression : public false_type {}; +template struct _LIBCPP_TEMPLATE_VIS is_bind_expression + : public __is_bind_expression::type> {}; + +#if _LIBCPP_STD_VER > 14 +template +_LIBCPP_INLINE_VAR constexpr size_t is_bind_expression_v = is_bind_expression<_Tp>::value; +#endif + +template struct __is_placeholder : public integral_constant {}; +template struct _LIBCPP_TEMPLATE_VIS is_placeholder + : public __is_placeholder::type> {}; + +#if _LIBCPP_STD_VER > 14 +template +_LIBCPP_INLINE_VAR constexpr size_t is_placeholder_v = is_placeholder<_Tp>::value; +#endif + +namespace placeholders +{ + +template struct __ph {}; + +#if defined(_LIBCPP_CXX03_LANG) || defined(_LIBCPP_BUILDING_LIBRARY) +_LIBCPP_FUNC_VIS extern const __ph<1> _1; +_LIBCPP_FUNC_VIS extern const __ph<2> _2; +_LIBCPP_FUNC_VIS extern const __ph<3> _3; +_LIBCPP_FUNC_VIS extern const __ph<4> _4; +_LIBCPP_FUNC_VIS extern const __ph<5> _5; +_LIBCPP_FUNC_VIS extern const __ph<6> _6; +_LIBCPP_FUNC_VIS extern const __ph<7> _7; +_LIBCPP_FUNC_VIS extern const __ph<8> _8; +_LIBCPP_FUNC_VIS extern const __ph<9> _9; +_LIBCPP_FUNC_VIS extern const __ph<10> _10; +#else +/* _LIBCPP_INLINE_VAR */ constexpr __ph<1> _1{}; +/* _LIBCPP_INLINE_VAR */ constexpr __ph<2> _2{}; +/* _LIBCPP_INLINE_VAR */ constexpr __ph<3> _3{}; +/* _LIBCPP_INLINE_VAR */ constexpr __ph<4> _4{}; +/* _LIBCPP_INLINE_VAR */ constexpr __ph<5> _5{}; +/* _LIBCPP_INLINE_VAR */ constexpr __ph<6> _6{}; +/* _LIBCPP_INLINE_VAR */ constexpr __ph<7> _7{}; +/* _LIBCPP_INLINE_VAR */ constexpr __ph<8> _8{}; +/* _LIBCPP_INLINE_VAR */ constexpr __ph<9> _9{}; +/* _LIBCPP_INLINE_VAR */ constexpr __ph<10> _10{}; +#endif // defined(_LIBCPP_CXX03_LANG) || defined(_LIBCPP_BUILDING_LIBRARY) + +} // placeholders + +template +struct __is_placeholder > + : public integral_constant {}; + + +#ifndef _LIBCPP_CXX03_LANG + +template +inline _LIBCPP_INLINE_VISIBILITY +_Tp& +__mu(reference_wrapper<_Tp> __t, _Uj&) +{ + return __t.get(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __invoke_of<_Ti&, _Uj...>::type +__mu_expand(_Ti& __ti, tuple<_Uj...>& __uj, __tuple_indices<_Indx...>) +{ + return __ti(_VSTD::forward<_Uj>(_VSTD::get<_Indx>(__uj))...); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename _EnableIf +< + is_bind_expression<_Ti>::value, + __invoke_of<_Ti&, _Uj...> +>::type +__mu(_Ti& __ti, tuple<_Uj...>& __uj) +{ + typedef typename __make_tuple_indices::type __indices; + return _VSTD::__mu_expand(__ti, __uj, __indices()); +} + +template +struct __mu_return2 {}; + +template +struct __mu_return2 +{ + typedef typename tuple_element::value - 1, _Uj>::type type; +}; + +template +inline _LIBCPP_INLINE_VISIBILITY +typename enable_if +< + 0 < is_placeholder<_Ti>::value, + typename __mu_return2<0 < is_placeholder<_Ti>::value, _Ti, _Uj>::type +>::type +__mu(_Ti&, _Uj& __uj) +{ + const size_t _Indx = is_placeholder<_Ti>::value - 1; + return _VSTD::forward::type>(_VSTD::get<_Indx>(__uj)); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename enable_if +< + !is_bind_expression<_Ti>::value && + is_placeholder<_Ti>::value == 0 && + !__is_reference_wrapper<_Ti>::value, + _Ti& +>::type +__mu(_Ti& __ti, _Uj&) +{ + return __ti; +} + +template +struct __mu_return_impl; + +template +struct __mu_return_invokable // false +{ + typedef __nat type; +}; + +template +struct __mu_return_invokable +{ + typedef typename __invoke_of<_Ti&, _Uj...>::type type; +}; + +template +struct __mu_return_impl<_Ti, false, true, false, tuple<_Uj...> > + : public __mu_return_invokable<__invokable<_Ti&, _Uj...>::value, _Ti, _Uj...> +{ +}; + +template +struct __mu_return_impl<_Ti, false, false, true, _TupleUj> +{ + typedef typename tuple_element::value - 1, + _TupleUj>::type&& type; +}; + +template +struct __mu_return_impl<_Ti, true, false, false, _TupleUj> +{ + typedef typename _Ti::type& type; +}; + +template +struct __mu_return_impl<_Ti, false, false, false, _TupleUj> +{ + typedef _Ti& type; +}; + +template +struct __mu_return + : public __mu_return_impl<_Ti, + __is_reference_wrapper<_Ti>::value, + is_bind_expression<_Ti>::value, + 0 < is_placeholder<_Ti>::value && + is_placeholder<_Ti>::value <= tuple_size<_TupleUj>::value, + _TupleUj> +{ +}; + +template +struct __is_valid_bind_return +{ + static const bool value = false; +}; + +template +struct __is_valid_bind_return<_Fp, tuple<_BoundArgs...>, _TupleUj> +{ + static const bool value = __invokable<_Fp, + typename __mu_return<_BoundArgs, _TupleUj>::type...>::value; +}; + +template +struct __is_valid_bind_return<_Fp, const tuple<_BoundArgs...>, _TupleUj> +{ + static const bool value = __invokable<_Fp, + typename __mu_return::type...>::value; +}; + +template ::value> +struct __bind_return; + +template +struct __bind_return<_Fp, tuple<_BoundArgs...>, _TupleUj, true> +{ + typedef typename __invoke_of + < + _Fp&, + typename __mu_return + < + _BoundArgs, + _TupleUj + >::type... + >::type type; +}; + +template +struct __bind_return<_Fp, const tuple<_BoundArgs...>, _TupleUj, true> +{ + typedef typename __invoke_of + < + _Fp&, + typename __mu_return + < + const _BoundArgs, + _TupleUj + >::type... + >::type type; +}; + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __bind_return<_Fp, _BoundArgs, _Args>::type +__apply_functor(_Fp& __f, _BoundArgs& __bound_args, __tuple_indices<_Indx...>, + _Args&& __args) +{ + return _VSTD::__invoke(__f, _VSTD::__mu(_VSTD::get<_Indx>(__bound_args), __args)...); +} + +template +class __bind +#if _LIBCPP_STD_VER <= 17 || !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : public __weak_result_type::type> +#endif +{ +protected: + typedef typename decay<_Fp>::type _Fd; + typedef tuple::type...> _Td; +private: + _Fd __f_; + _Td __bound_args_; + + typedef typename __make_tuple_indices::type __indices; +public: + template ::value && + !is_same::type, + __bind>::value + >::type> + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + explicit __bind(_Gp&& __f, _BA&& ...__bound_args) + : __f_(_VSTD::forward<_Gp>(__f)), + __bound_args_(_VSTD::forward<_BA>(__bound_args)...) {} + + template + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + typename __bind_return<_Fd, _Td, tuple<_Args&&...> >::type + operator()(_Args&& ...__args) + { + return _VSTD::__apply_functor(__f_, __bound_args_, __indices(), + tuple<_Args&&...>(_VSTD::forward<_Args>(__args)...)); + } + + template + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + typename __bind_return >::type + operator()(_Args&& ...__args) const + { + return _VSTD::__apply_functor(__f_, __bound_args_, __indices(), + tuple<_Args&&...>(_VSTD::forward<_Args>(__args)...)); + } +}; + +template +struct __is_bind_expression<__bind<_Fp, _BoundArgs...> > : public true_type {}; + +template +class __bind_r + : public __bind<_Fp, _BoundArgs...> +{ + typedef __bind<_Fp, _BoundArgs...> base; + typedef typename base::_Fd _Fd; + typedef typename base::_Td _Td; +public: + typedef _Rp result_type; + + + template ::value && + !is_same::type, + __bind_r>::value + >::type> + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + explicit __bind_r(_Gp&& __f, _BA&& ...__bound_args) + : base(_VSTD::forward<_Gp>(__f), + _VSTD::forward<_BA>(__bound_args)...) {} + + template + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + typename enable_if + < + is_convertible >::type, + result_type>::value || is_void<_Rp>::value, + result_type + >::type + operator()(_Args&& ...__args) + { + typedef __invoke_void_return_wrapper<_Rp> _Invoker; + return _Invoker::__call(static_cast(*this), _VSTD::forward<_Args>(__args)...); + } + + template + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + typename enable_if + < + is_convertible >::type, + result_type>::value || is_void<_Rp>::value, + result_type + >::type + operator()(_Args&& ...__args) const + { + typedef __invoke_void_return_wrapper<_Rp> _Invoker; + return _Invoker::__call(static_cast(*this), _VSTD::forward<_Args>(__args)...); + } +}; + +template +struct __is_bind_expression<__bind_r<_Rp, _Fp, _BoundArgs...> > : public true_type {}; + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 +__bind<_Fp, _BoundArgs...> +bind(_Fp&& __f, _BoundArgs&&... __bound_args) +{ + typedef __bind<_Fp, _BoundArgs...> type; + return type(_VSTD::forward<_Fp>(__f), _VSTD::forward<_BoundArgs>(__bound_args)...); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 +__bind_r<_Rp, _Fp, _BoundArgs...> +bind(_Fp&& __f, _BoundArgs&&... __bound_args) +{ + typedef __bind_r<_Rp, _Fp, _BoundArgs...> type; + return type(_VSTD::forward<_Fp>(__f), _VSTD::forward<_BoundArgs>(__bound_args)...); +} + +#endif // _LIBCPP_CXX03_LANG + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_BIND_H diff --git a/libcxx/include/__functional/bind_front.h b/libcxx/include/__functional/bind_front.h new file mode 100644 index 0000000000000..8690499f2b0c9 --- /dev/null +++ b/libcxx/include/__functional/bind_front.h @@ -0,0 +1,52 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_BIND_FRONT_H +#define _LIBCPP___FUNCTIONAL_BIND_FRONT_H + +#include <__config> +#include <__functional/perfect_forward.h> +#include <__functional/invoke.h> +#include +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER > 17 + +struct __bind_front_op +{ + template + constexpr static auto __call(_Args&&... __args) + noexcept(noexcept(_VSTD::invoke(_VSTD::forward<_Args>(__args)...))) + -> decltype( _VSTD::invoke(_VSTD::forward<_Args>(__args)...)) + { return _VSTD::invoke(_VSTD::forward<_Args>(__args)...); } +}; + +template, _Fn>, + is_move_constructible>, + is_constructible, _Args>..., + is_move_constructible>... + >::value>> +constexpr auto bind_front(_Fn&& __f, _Args&&... __args) +{ + return __perfect_forward<__bind_front_op, _Fn, _Args...>(_VSTD::forward<_Fn>(__f), + _VSTD::forward<_Args>(__args)...); +} + +#endif // _LIBCPP_STD_VER > 17 + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_BIND_FRONT_H diff --git a/libcxx/include/__functional/binder1st.h b/libcxx/include/__functional/binder1st.h new file mode 100644 index 0000000000000..5dd8f5cf01553 --- /dev/null +++ b/libcxx/include/__functional/binder1st.h @@ -0,0 +1,54 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_BINDER1ST_H +#define _LIBCPP___FUNCTIONAL_BINDER1ST_H + +#include <__config> +#include <__functional/unary_function.h> + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER <= 14 || defined(_LIBCPP_ENABLE_CXX17_REMOVED_BINDERS) + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 binder1st + : public unary_function +{ +protected: + __Operation op; + typename __Operation::first_argument_type value; +public: + _LIBCPP_INLINE_VISIBILITY binder1st(const __Operation& __x, + const typename __Operation::first_argument_type __y) + : op(__x), value(__y) {} + _LIBCPP_INLINE_VISIBILITY typename __Operation::result_type operator() + (typename __Operation::second_argument_type& __x) const + {return op(value, __x);} + _LIBCPP_INLINE_VISIBILITY typename __Operation::result_type operator() + (const typename __Operation::second_argument_type& __x) const + {return op(value, __x);} +}; + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +binder1st<__Operation> +bind1st(const __Operation& __op, const _Tp& __x) + {return binder1st<__Operation>(__op, __x);} + +#endif // _LIBCPP_STD_VER <= 14 || defined(_LIBCPP_ENABLE_CXX17_REMOVED_BINDERS) + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_BINDER1ST_H diff --git a/libcxx/include/__functional/binder2nd.h b/libcxx/include/__functional/binder2nd.h new file mode 100644 index 0000000000000..3ed5f5bf45408 --- /dev/null +++ b/libcxx/include/__functional/binder2nd.h @@ -0,0 +1,54 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_BINDER2ND_H +#define _LIBCPP___FUNCTIONAL_BINDER2ND_H + +#include <__config> +#include <__functional/unary_function.h> + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER <= 14 || defined(_LIBCPP_ENABLE_CXX17_REMOVED_BINDERS) + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 binder2nd + : public unary_function +{ +protected: + __Operation op; + typename __Operation::second_argument_type value; +public: + _LIBCPP_INLINE_VISIBILITY + binder2nd(const __Operation& __x, const typename __Operation::second_argument_type __y) + : op(__x), value(__y) {} + _LIBCPP_INLINE_VISIBILITY typename __Operation::result_type operator() + ( typename __Operation::first_argument_type& __x) const + {return op(__x, value);} + _LIBCPP_INLINE_VISIBILITY typename __Operation::result_type operator() + (const typename __Operation::first_argument_type& __x) const + {return op(__x, value);} +}; + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +binder2nd<__Operation> +bind2nd(const __Operation& __op, const _Tp& __x) + {return binder2nd<__Operation>(__op, __x);} + +#endif // _LIBCPP_STD_VER <= 14 || defined(_LIBCPP_ENABLE_CXX17_REMOVED_BINDERS) + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_BINDER2ND_H diff --git a/libcxx/include/__functional/default_searcher.h b/libcxx/include/__functional/default_searcher.h new file mode 100644 index 0000000000000..1acbc1883afc3 --- /dev/null +++ b/libcxx/include/__functional/default_searcher.h @@ -0,0 +1,56 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_DEFAULT_SEARCHER_H +#define _LIBCPP___FUNCTIONAL_DEFAULT_SEARCHER_H + +#include <__algorithm/search.h> +#include <__config> +#include <__functional/operations.h> +#include <__iterator/iterator_traits.h> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER > 14 + +// default searcher +template> +class _LIBCPP_TEMPLATE_VIS default_searcher { +public: + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + default_searcher(_ForwardIterator __f, _ForwardIterator __l, + _BinaryPredicate __p = _BinaryPredicate()) + : __first_(__f), __last_(__l), __pred_(__p) {} + + template + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + pair<_ForwardIterator2, _ForwardIterator2> + operator () (_ForwardIterator2 __f, _ForwardIterator2 __l) const + { + return _VSTD::__search(__f, __l, __first_, __last_, __pred_, + typename iterator_traits<_ForwardIterator>::iterator_category(), + typename iterator_traits<_ForwardIterator2>::iterator_category()); + } + +private: + _ForwardIterator __first_; + _ForwardIterator __last_; + _BinaryPredicate __pred_; + }; + +#endif // _LIBCPP_STD_VER > 14 + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_DEFAULT_SEARCHER_H diff --git a/libcxx/include/__functional_03 b/libcxx/include/__functional/function.h similarity index 53% rename from libcxx/include/__functional_03 rename to libcxx/include/__functional/function.h index 619d92e5385e0..ba629e1d145e4 100644 --- a/libcxx/include/__functional_03 +++ b/libcxx/include/__functional/function.h @@ -7,15 +7,1229 @@ // //===----------------------------------------------------------------------===// -#ifndef _LIBCPP_FUNCTIONAL_03 -#define _LIBCPP_FUNCTIONAL_03 - -// manual variadic expansion for +#ifndef _LIBCPP___FUNCTIONAL_FUNCTION_H +#define _LIBCPP___FUNCTIONAL_FUNCTION_H + +#include <__config> +#include <__functional/binary_function.h> +#include <__functional/invoke.h> +#include <__functional/unary_function.h> +#include <__iterator/iterator_traits.h> +#include <__memory/allocator_traits.h> +#include <__memory/compressed_pair.h> +#include <__memory/shared_ptr.h> +#include +#include // TODO: replace with <__memory/__builtin_new_allocator.h> +#include +#include #if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) #pragma GCC system_header #endif +_LIBCPP_BEGIN_NAMESPACE_STD + +// bad_function_call + +class _LIBCPP_EXCEPTION_ABI bad_function_call + : public exception +{ +#ifdef _LIBCPP_ABI_BAD_FUNCTION_CALL_KEY_FUNCTION +public: + virtual ~bad_function_call() _NOEXCEPT; + + virtual const char* what() const _NOEXCEPT; +#endif +}; + +_LIBCPP_NORETURN inline _LIBCPP_INLINE_VISIBILITY +void __throw_bad_function_call() +{ +#ifndef _LIBCPP_NO_EXCEPTIONS + throw bad_function_call(); +#else + _VSTD::abort(); +#endif +} + +#if defined(_LIBCPP_CXX03_LANG) && !defined(_LIBCPP_DISABLE_DEPRECATION_WARNINGS) && __has_attribute(deprecated) +# define _LIBCPP_DEPRECATED_CXX03_FUNCTION \ + __attribute__((deprecated("Using std::function in C++03 is not supported anymore. Please upgrade to C++11 or later, or use a different type"))) +#else +# define _LIBCPP_DEPRECATED_CXX03_FUNCTION /* nothing */ +#endif + +template class _LIBCPP_DEPRECATED_CXX03_FUNCTION _LIBCPP_TEMPLATE_VIS function; // undefined + +namespace __function +{ + +template +struct __maybe_derive_from_unary_function +{ +}; + +template +struct __maybe_derive_from_unary_function<_Rp(_A1)> + : public unary_function<_A1, _Rp> +{ +}; + +template +struct __maybe_derive_from_binary_function +{ +}; + +template +struct __maybe_derive_from_binary_function<_Rp(_A1, _A2)> + : public binary_function<_A1, _A2, _Rp> +{ +}; + +template +_LIBCPP_INLINE_VISIBILITY +bool __not_null(_Fp const&) { return true; } + +template +_LIBCPP_INLINE_VISIBILITY +bool __not_null(_Fp* __ptr) { return __ptr; } + +template +_LIBCPP_INLINE_VISIBILITY +bool __not_null(_Ret _Class::*__ptr) { return __ptr; } + +template +_LIBCPP_INLINE_VISIBILITY +bool __not_null(function<_Fp> const& __f) { return !!__f; } + +#ifdef _LIBCPP_HAS_EXTENSION_BLOCKS +template +_LIBCPP_INLINE_VISIBILITY +bool __not_null(_Rp (^__p)(_Args...)) { return __p; } +#endif + +} // namespace __function + +#ifndef _LIBCPP_CXX03_LANG + +namespace __function { + +// __alloc_func holds a functor and an allocator. + +template class __alloc_func; +template +class __default_alloc_func; + +template +class __alloc_func<_Fp, _Ap, _Rp(_ArgTypes...)> +{ + __compressed_pair<_Fp, _Ap> __f_; + + public: + typedef _LIBCPP_NODEBUG_TYPE _Fp _Target; + typedef _LIBCPP_NODEBUG_TYPE _Ap _Alloc; + + _LIBCPP_INLINE_VISIBILITY + const _Target& __target() const { return __f_.first(); } + + // WIN32 APIs may define __allocator, so use __get_allocator instead. + _LIBCPP_INLINE_VISIBILITY + const _Alloc& __get_allocator() const { return __f_.second(); } + + _LIBCPP_INLINE_VISIBILITY + explicit __alloc_func(_Target&& __f) + : __f_(piecewise_construct, _VSTD::forward_as_tuple(_VSTD::move(__f)), + _VSTD::forward_as_tuple()) + { + } + + _LIBCPP_INLINE_VISIBILITY + explicit __alloc_func(const _Target& __f, const _Alloc& __a) + : __f_(piecewise_construct, _VSTD::forward_as_tuple(__f), + _VSTD::forward_as_tuple(__a)) + { + } + + _LIBCPP_INLINE_VISIBILITY + explicit __alloc_func(const _Target& __f, _Alloc&& __a) + : __f_(piecewise_construct, _VSTD::forward_as_tuple(__f), + _VSTD::forward_as_tuple(_VSTD::move(__a))) + { + } + + _LIBCPP_INLINE_VISIBILITY + explicit __alloc_func(_Target&& __f, _Alloc&& __a) + : __f_(piecewise_construct, _VSTD::forward_as_tuple(_VSTD::move(__f)), + _VSTD::forward_as_tuple(_VSTD::move(__a))) + { + } + + _LIBCPP_INLINE_VISIBILITY + _Rp operator()(_ArgTypes&&... __arg) + { + typedef __invoke_void_return_wrapper<_Rp> _Invoker; + return _Invoker::__call(__f_.first(), + _VSTD::forward<_ArgTypes>(__arg)...); + } + + _LIBCPP_INLINE_VISIBILITY + __alloc_func* __clone() const + { + typedef allocator_traits<_Alloc> __alloc_traits; + typedef + typename __rebind_alloc_helper<__alloc_traits, __alloc_func>::type + _AA; + _AA __a(__f_.second()); + typedef __allocator_destructor<_AA> _Dp; + unique_ptr<__alloc_func, _Dp> __hold(__a.allocate(1), _Dp(__a, 1)); + ::new ((void*)__hold.get()) __alloc_func(__f_.first(), _Alloc(__a)); + return __hold.release(); + } + + _LIBCPP_INLINE_VISIBILITY + void destroy() _NOEXCEPT { __f_.~__compressed_pair<_Target, _Alloc>(); } + + static void __destroy_and_delete(__alloc_func* __f) { + typedef allocator_traits<_Alloc> __alloc_traits; + typedef typename __rebind_alloc_helper<__alloc_traits, __alloc_func>::type + _FunAlloc; + _FunAlloc __a(__f->__get_allocator()); + __f->destroy(); + __a.deallocate(__f, 1); + } +}; + +template +class __default_alloc_func<_Fp, _Rp(_ArgTypes...)> { + _Fp __f_; + +public: + typedef _LIBCPP_NODEBUG_TYPE _Fp _Target; + + _LIBCPP_INLINE_VISIBILITY + const _Target& __target() const { return __f_; } + + _LIBCPP_INLINE_VISIBILITY + explicit __default_alloc_func(_Target&& __f) : __f_(_VSTD::move(__f)) {} + + _LIBCPP_INLINE_VISIBILITY + explicit __default_alloc_func(const _Target& __f) : __f_(__f) {} + + _LIBCPP_INLINE_VISIBILITY + _Rp operator()(_ArgTypes&&... __arg) { + typedef __invoke_void_return_wrapper<_Rp> _Invoker; + return _Invoker::__call(__f_, _VSTD::forward<_ArgTypes>(__arg)...); + } + + _LIBCPP_INLINE_VISIBILITY + __default_alloc_func* __clone() const { + __builtin_new_allocator::__holder_t __hold = + __builtin_new_allocator::__allocate_type<__default_alloc_func>(1); + __default_alloc_func* __res = + ::new ((void*)__hold.get()) __default_alloc_func(__f_); + (void)__hold.release(); + return __res; + } + + _LIBCPP_INLINE_VISIBILITY + void destroy() _NOEXCEPT { __f_.~_Target(); } + + static void __destroy_and_delete(__default_alloc_func* __f) { + __f->destroy(); + __builtin_new_allocator::__deallocate_type<__default_alloc_func>(__f, 1); + } +}; + +// __base provides an abstract interface for copyable functors. + +template class _LIBCPP_TEMPLATE_VIS __base; + +template +class __base<_Rp(_ArgTypes...)> +{ + __base(const __base&); + __base& operator=(const __base&); +public: + _LIBCPP_INLINE_VISIBILITY __base() {} + _LIBCPP_INLINE_VISIBILITY virtual ~__base() {} + virtual __base* __clone() const = 0; + virtual void __clone(__base*) const = 0; + virtual void destroy() _NOEXCEPT = 0; + virtual void destroy_deallocate() _NOEXCEPT = 0; + virtual _Rp operator()(_ArgTypes&& ...) = 0; +#ifndef _LIBCPP_NO_RTTI + virtual const void* target(const type_info&) const _NOEXCEPT = 0; + virtual const std::type_info& target_type() const _NOEXCEPT = 0; +#endif // _LIBCPP_NO_RTTI +}; + +// __func implements __base for a given functor type. + +template class __func; + +template +class __func<_Fp, _Alloc, _Rp(_ArgTypes...)> + : public __base<_Rp(_ArgTypes...)> +{ + __alloc_func<_Fp, _Alloc, _Rp(_ArgTypes...)> __f_; +public: + _LIBCPP_INLINE_VISIBILITY + explicit __func(_Fp&& __f) + : __f_(_VSTD::move(__f)) {} + + _LIBCPP_INLINE_VISIBILITY + explicit __func(const _Fp& __f, const _Alloc& __a) + : __f_(__f, __a) {} + + _LIBCPP_INLINE_VISIBILITY + explicit __func(const _Fp& __f, _Alloc&& __a) + : __f_(__f, _VSTD::move(__a)) {} + + _LIBCPP_INLINE_VISIBILITY + explicit __func(_Fp&& __f, _Alloc&& __a) + : __f_(_VSTD::move(__f), _VSTD::move(__a)) {} + + virtual __base<_Rp(_ArgTypes...)>* __clone() const; + virtual void __clone(__base<_Rp(_ArgTypes...)>*) const; + virtual void destroy() _NOEXCEPT; + virtual void destroy_deallocate() _NOEXCEPT; + virtual _Rp operator()(_ArgTypes&&... __arg); +#ifndef _LIBCPP_NO_RTTI + virtual const void* target(const type_info&) const _NOEXCEPT; + virtual const std::type_info& target_type() const _NOEXCEPT; +#endif // _LIBCPP_NO_RTTI +}; + +template +__base<_Rp(_ArgTypes...)>* +__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::__clone() const +{ + typedef allocator_traits<_Alloc> __alloc_traits; + typedef typename __rebind_alloc_helper<__alloc_traits, __func>::type _Ap; + _Ap __a(__f_.__get_allocator()); + typedef __allocator_destructor<_Ap> _Dp; + unique_ptr<__func, _Dp> __hold(__a.allocate(1), _Dp(__a, 1)); + ::new ((void*)__hold.get()) __func(__f_.__target(), _Alloc(__a)); + return __hold.release(); +} + +template +void +__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::__clone(__base<_Rp(_ArgTypes...)>* __p) const +{ + ::new ((void*)__p) __func(__f_.__target(), __f_.__get_allocator()); +} + +template +void +__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::destroy() _NOEXCEPT +{ + __f_.destroy(); +} + +template +void +__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::destroy_deallocate() _NOEXCEPT +{ + typedef allocator_traits<_Alloc> __alloc_traits; + typedef typename __rebind_alloc_helper<__alloc_traits, __func>::type _Ap; + _Ap __a(__f_.__get_allocator()); + __f_.destroy(); + __a.deallocate(this, 1); +} + +template +_Rp +__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::operator()(_ArgTypes&& ... __arg) +{ + return __f_(_VSTD::forward<_ArgTypes>(__arg)...); +} + +#ifndef _LIBCPP_NO_RTTI + +template +const void* +__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::target(const type_info& __ti) const _NOEXCEPT +{ + if (__ti == typeid(_Fp)) + return &__f_.__target(); + return nullptr; +} + +template +const std::type_info& +__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::target_type() const _NOEXCEPT +{ + return typeid(_Fp); +} + +#endif // _LIBCPP_NO_RTTI + +// __value_func creates a value-type from a __func. + +template class __value_func; + +template class __value_func<_Rp(_ArgTypes...)> +{ + typename aligned_storage<3 * sizeof(void*)>::type __buf_; + + typedef __base<_Rp(_ArgTypes...)> __func; + __func* __f_; + + _LIBCPP_NO_CFI static __func* __as_base(void* p) + { + return reinterpret_cast<__func*>(p); + } + + public: + _LIBCPP_INLINE_VISIBILITY + __value_func() _NOEXCEPT : __f_(nullptr) {} + + template + _LIBCPP_INLINE_VISIBILITY __value_func(_Fp&& __f, const _Alloc& __a) + : __f_(nullptr) + { + typedef allocator_traits<_Alloc> __alloc_traits; + typedef __function::__func<_Fp, _Alloc, _Rp(_ArgTypes...)> _Fun; + typedef typename __rebind_alloc_helper<__alloc_traits, _Fun>::type + _FunAlloc; + + if (__function::__not_null(__f)) + { + _FunAlloc __af(__a); + if (sizeof(_Fun) <= sizeof(__buf_) && + is_nothrow_copy_constructible<_Fp>::value && + is_nothrow_copy_constructible<_FunAlloc>::value) + { + __f_ = + ::new ((void*)&__buf_) _Fun(_VSTD::move(__f), _Alloc(__af)); + } + else + { + typedef __allocator_destructor<_FunAlloc> _Dp; + unique_ptr<__func, _Dp> __hold(__af.allocate(1), _Dp(__af, 1)); + ::new ((void*)__hold.get()) _Fun(_VSTD::move(__f), _Alloc(__a)); + __f_ = __hold.release(); + } + } + } + + template ::type, __value_func>::value>::type> + _LIBCPP_INLINE_VISIBILITY explicit __value_func(_Fp&& __f) + : __value_func(_VSTD::forward<_Fp>(__f), allocator<_Fp>()) {} + + _LIBCPP_INLINE_VISIBILITY + __value_func(const __value_func& __f) + { + if (__f.__f_ == nullptr) + __f_ = nullptr; + else if ((void*)__f.__f_ == &__f.__buf_) + { + __f_ = __as_base(&__buf_); + __f.__f_->__clone(__f_); + } + else + __f_ = __f.__f_->__clone(); + } + + _LIBCPP_INLINE_VISIBILITY + __value_func(__value_func&& __f) _NOEXCEPT + { + if (__f.__f_ == nullptr) + __f_ = nullptr; + else if ((void*)__f.__f_ == &__f.__buf_) + { + __f_ = __as_base(&__buf_); + __f.__f_->__clone(__f_); + } + else + { + __f_ = __f.__f_; + __f.__f_ = nullptr; + } + } + + _LIBCPP_INLINE_VISIBILITY + ~__value_func() + { + if ((void*)__f_ == &__buf_) + __f_->destroy(); + else if (__f_) + __f_->destroy_deallocate(); + } + + _LIBCPP_INLINE_VISIBILITY + __value_func& operator=(__value_func&& __f) + { + *this = nullptr; + if (__f.__f_ == nullptr) + __f_ = nullptr; + else if ((void*)__f.__f_ == &__f.__buf_) + { + __f_ = __as_base(&__buf_); + __f.__f_->__clone(__f_); + } + else + { + __f_ = __f.__f_; + __f.__f_ = nullptr; + } + return *this; + } + + _LIBCPP_INLINE_VISIBILITY + __value_func& operator=(nullptr_t) + { + __func* __f = __f_; + __f_ = nullptr; + if ((void*)__f == &__buf_) + __f->destroy(); + else if (__f) + __f->destroy_deallocate(); + return *this; + } + + _LIBCPP_INLINE_VISIBILITY + _Rp operator()(_ArgTypes&&... __args) const + { + if (__f_ == nullptr) + __throw_bad_function_call(); + return (*__f_)(_VSTD::forward<_ArgTypes>(__args)...); + } + + _LIBCPP_INLINE_VISIBILITY + void swap(__value_func& __f) _NOEXCEPT + { + if (&__f == this) + return; + if ((void*)__f_ == &__buf_ && (void*)__f.__f_ == &__f.__buf_) + { + typename aligned_storage::type __tempbuf; + __func* __t = __as_base(&__tempbuf); + __f_->__clone(__t); + __f_->destroy(); + __f_ = nullptr; + __f.__f_->__clone(__as_base(&__buf_)); + __f.__f_->destroy(); + __f.__f_ = nullptr; + __f_ = __as_base(&__buf_); + __t->__clone(__as_base(&__f.__buf_)); + __t->destroy(); + __f.__f_ = __as_base(&__f.__buf_); + } + else if ((void*)__f_ == &__buf_) + { + __f_->__clone(__as_base(&__f.__buf_)); + __f_->destroy(); + __f_ = __f.__f_; + __f.__f_ = __as_base(&__f.__buf_); + } + else if ((void*)__f.__f_ == &__f.__buf_) + { + __f.__f_->__clone(__as_base(&__buf_)); + __f.__f_->destroy(); + __f.__f_ = __f_; + __f_ = __as_base(&__buf_); + } + else + _VSTD::swap(__f_, __f.__f_); + } + + _LIBCPP_INLINE_VISIBILITY + explicit operator bool() const _NOEXCEPT { return __f_ != nullptr; } + +#ifndef _LIBCPP_NO_RTTI + _LIBCPP_INLINE_VISIBILITY + const std::type_info& target_type() const _NOEXCEPT + { + if (__f_ == nullptr) + return typeid(void); + return __f_->target_type(); + } + + template + _LIBCPP_INLINE_VISIBILITY const _Tp* target() const _NOEXCEPT + { + if (__f_ == nullptr) + return nullptr; + return (const _Tp*)__f_->target(typeid(_Tp)); + } +#endif // _LIBCPP_NO_RTTI +}; + +// Storage for a functor object, to be used with __policy to manage copy and +// destruction. +union __policy_storage +{ + mutable char __small[sizeof(void*) * 2]; + void* __large; +}; + +// True if _Fun can safely be held in __policy_storage.__small. +template +struct __use_small_storage + : public integral_constant< + bool, sizeof(_Fun) <= sizeof(__policy_storage) && + _LIBCPP_ALIGNOF(_Fun) <= _LIBCPP_ALIGNOF(__policy_storage) && + is_trivially_copy_constructible<_Fun>::value && + is_trivially_destructible<_Fun>::value> {}; + +// Policy contains information about how to copy, destroy, and move the +// underlying functor. You can think of it as a vtable of sorts. +struct __policy +{ + // Used to copy or destroy __large values. null for trivial objects. + void* (*const __clone)(const void*); + void (*const __destroy)(void*); + + // True if this is the null policy (no value). + const bool __is_null; + + // The target type. May be null if RTTI is disabled. + const std::type_info* const __type_info; + + // Returns a pointer to a static policy object suitable for the functor + // type. + template + _LIBCPP_INLINE_VISIBILITY static const __policy* __create() + { + return __choose_policy<_Fun>(__use_small_storage<_Fun>()); + } + + _LIBCPP_INLINE_VISIBILITY + static const __policy* __create_empty() + { + static const _LIBCPP_CONSTEXPR __policy __policy_ = {nullptr, nullptr, + true, +#ifndef _LIBCPP_NO_RTTI + &typeid(void) +#else + nullptr +#endif + }; + return &__policy_; + } + + private: + template static void* __large_clone(const void* __s) + { + const _Fun* __f = static_cast(__s); + return __f->__clone(); + } + + template + static void __large_destroy(void* __s) { + _Fun::__destroy_and_delete(static_cast<_Fun*>(__s)); + } + + template + _LIBCPP_INLINE_VISIBILITY static const __policy* + __choose_policy(/* is_small = */ false_type) { + static const _LIBCPP_CONSTEXPR __policy __policy_ = { + &__large_clone<_Fun>, &__large_destroy<_Fun>, false, +#ifndef _LIBCPP_NO_RTTI + &typeid(typename _Fun::_Target) +#else + nullptr +#endif + }; + return &__policy_; + } + + template + _LIBCPP_INLINE_VISIBILITY static const __policy* + __choose_policy(/* is_small = */ true_type) + { + static const _LIBCPP_CONSTEXPR __policy __policy_ = { + nullptr, nullptr, false, +#ifndef _LIBCPP_NO_RTTI + &typeid(typename _Fun::_Target) +#else + nullptr +#endif + }; + return &__policy_; + } +}; + +// Used to choose between perfect forwarding or pass-by-value. Pass-by-value is +// faster for types that can be passed in registers. +template +using __fast_forward = + typename conditional::value, _Tp, _Tp&&>::type; + +// __policy_invoker calls an instance of __alloc_func held in __policy_storage. + +template struct __policy_invoker; + +template +struct __policy_invoker<_Rp(_ArgTypes...)> +{ + typedef _Rp (*__Call)(const __policy_storage*, + __fast_forward<_ArgTypes>...); + + __Call __call_; + + // Creates an invoker that throws bad_function_call. + _LIBCPP_INLINE_VISIBILITY + __policy_invoker() : __call_(&__call_empty) {} + + // Creates an invoker that calls the given instance of __func. + template + _LIBCPP_INLINE_VISIBILITY static __policy_invoker __create() + { + return __policy_invoker(&__call_impl<_Fun>); + } + + private: + _LIBCPP_INLINE_VISIBILITY + explicit __policy_invoker(__Call __c) : __call_(__c) {} + + static _Rp __call_empty(const __policy_storage*, + __fast_forward<_ArgTypes>...) + { + __throw_bad_function_call(); + } + + template + static _Rp __call_impl(const __policy_storage* __buf, + __fast_forward<_ArgTypes>... __args) + { + _Fun* __f = reinterpret_cast<_Fun*>(__use_small_storage<_Fun>::value + ? &__buf->__small + : __buf->__large); + return (*__f)(_VSTD::forward<_ArgTypes>(__args)...); + } +}; + +// __policy_func uses a __policy and __policy_invoker to create a type-erased, +// copyable functor. + +template class __policy_func; + +template class __policy_func<_Rp(_ArgTypes...)> +{ + // Inline storage for small objects. + __policy_storage __buf_; + + // Calls the value stored in __buf_. This could technically be part of + // policy, but storing it here eliminates a level of indirection inside + // operator(). + typedef __function::__policy_invoker<_Rp(_ArgTypes...)> __invoker; + __invoker __invoker_; + + // The policy that describes how to move / copy / destroy __buf_. Never + // null, even if the function is empty. + const __policy* __policy_; + + public: + _LIBCPP_INLINE_VISIBILITY + __policy_func() : __policy_(__policy::__create_empty()) {} + + template + _LIBCPP_INLINE_VISIBILITY __policy_func(_Fp&& __f, const _Alloc& __a) + : __policy_(__policy::__create_empty()) + { + typedef __alloc_func<_Fp, _Alloc, _Rp(_ArgTypes...)> _Fun; + typedef allocator_traits<_Alloc> __alloc_traits; + typedef typename __rebind_alloc_helper<__alloc_traits, _Fun>::type + _FunAlloc; + + if (__function::__not_null(__f)) + { + __invoker_ = __invoker::template __create<_Fun>(); + __policy_ = __policy::__create<_Fun>(); + + _FunAlloc __af(__a); + if (__use_small_storage<_Fun>()) + { + ::new ((void*)&__buf_.__small) + _Fun(_VSTD::move(__f), _Alloc(__af)); + } + else + { + typedef __allocator_destructor<_FunAlloc> _Dp; + unique_ptr<_Fun, _Dp> __hold(__af.allocate(1), _Dp(__af, 1)); + ::new ((void*)__hold.get()) + _Fun(_VSTD::move(__f), _Alloc(__af)); + __buf_.__large = __hold.release(); + } + } + } + + template ::type, __policy_func>::value>::type> + _LIBCPP_INLINE_VISIBILITY explicit __policy_func(_Fp&& __f) + : __policy_(__policy::__create_empty()) { + typedef __default_alloc_func<_Fp, _Rp(_ArgTypes...)> _Fun; + + if (__function::__not_null(__f)) { + __invoker_ = __invoker::template __create<_Fun>(); + __policy_ = __policy::__create<_Fun>(); + if (__use_small_storage<_Fun>()) { + ::new ((void*)&__buf_.__small) _Fun(_VSTD::move(__f)); + } else { + __builtin_new_allocator::__holder_t __hold = + __builtin_new_allocator::__allocate_type<_Fun>(1); + __buf_.__large = ::new ((void*)__hold.get()) _Fun(_VSTD::move(__f)); + (void)__hold.release(); + } + } + } + + _LIBCPP_INLINE_VISIBILITY + __policy_func(const __policy_func& __f) + : __buf_(__f.__buf_), __invoker_(__f.__invoker_), + __policy_(__f.__policy_) + { + if (__policy_->__clone) + __buf_.__large = __policy_->__clone(__f.__buf_.__large); + } + + _LIBCPP_INLINE_VISIBILITY + __policy_func(__policy_func&& __f) + : __buf_(__f.__buf_), __invoker_(__f.__invoker_), + __policy_(__f.__policy_) + { + if (__policy_->__destroy) + { + __f.__policy_ = __policy::__create_empty(); + __f.__invoker_ = __invoker(); + } + } + + _LIBCPP_INLINE_VISIBILITY + ~__policy_func() + { + if (__policy_->__destroy) + __policy_->__destroy(__buf_.__large); + } + + _LIBCPP_INLINE_VISIBILITY + __policy_func& operator=(__policy_func&& __f) + { + *this = nullptr; + __buf_ = __f.__buf_; + __invoker_ = __f.__invoker_; + __policy_ = __f.__policy_; + __f.__policy_ = __policy::__create_empty(); + __f.__invoker_ = __invoker(); + return *this; + } + + _LIBCPP_INLINE_VISIBILITY + __policy_func& operator=(nullptr_t) + { + const __policy* __p = __policy_; + __policy_ = __policy::__create_empty(); + __invoker_ = __invoker(); + if (__p->__destroy) + __p->__destroy(__buf_.__large); + return *this; + } + + _LIBCPP_INLINE_VISIBILITY + _Rp operator()(_ArgTypes&&... __args) const + { + return __invoker_.__call_(_VSTD::addressof(__buf_), + _VSTD::forward<_ArgTypes>(__args)...); + } + + _LIBCPP_INLINE_VISIBILITY + void swap(__policy_func& __f) + { + _VSTD::swap(__invoker_, __f.__invoker_); + _VSTD::swap(__policy_, __f.__policy_); + _VSTD::swap(__buf_, __f.__buf_); + } + + _LIBCPP_INLINE_VISIBILITY + explicit operator bool() const _NOEXCEPT + { + return !__policy_->__is_null; + } + +#ifndef _LIBCPP_NO_RTTI + _LIBCPP_INLINE_VISIBILITY + const std::type_info& target_type() const _NOEXCEPT + { + return *__policy_->__type_info; + } + + template + _LIBCPP_INLINE_VISIBILITY const _Tp* target() const _NOEXCEPT + { + if (__policy_->__is_null || typeid(_Tp) != *__policy_->__type_info) + return nullptr; + if (__policy_->__clone) // Out of line storage. + return reinterpret_cast(__buf_.__large); + else + return reinterpret_cast(&__buf_.__small); + } +#endif // _LIBCPP_NO_RTTI +}; + +#if defined(_LIBCPP_HAS_BLOCKS_RUNTIME) && !defined(_LIBCPP_HAS_OBJC_ARC) + +extern "C" void *_Block_copy(const void *); +extern "C" void _Block_release(const void *); + +template +class __func<_Rp1(^)(_ArgTypes1...), _Alloc, _Rp(_ArgTypes...)> + : public __base<_Rp(_ArgTypes...)> +{ + typedef _Rp1(^__block_type)(_ArgTypes1...); + __block_type __f_; + +public: + _LIBCPP_INLINE_VISIBILITY + explicit __func(__block_type const& __f) + : __f_(reinterpret_cast<__block_type>(__f ? _Block_copy(__f) : nullptr)) + { } + + // [TODO] add && to save on a retain + + _LIBCPP_INLINE_VISIBILITY + explicit __func(__block_type __f, const _Alloc& /* unused */) + : __f_(reinterpret_cast<__block_type>(__f ? _Block_copy(__f) : nullptr)) + { } + + virtual __base<_Rp(_ArgTypes...)>* __clone() const { + _LIBCPP_ASSERT(false, + "Block pointers are just pointers, so they should always fit into " + "std::function's small buffer optimization. This function should " + "never be invoked."); + return nullptr; + } + + virtual void __clone(__base<_Rp(_ArgTypes...)>* __p) const { + ::new ((void*)__p) __func(__f_); + } + + virtual void destroy() _NOEXCEPT { + if (__f_) + _Block_release(__f_); + __f_ = 0; + } + + virtual void destroy_deallocate() _NOEXCEPT { + _LIBCPP_ASSERT(false, + "Block pointers are just pointers, so they should always fit into " + "std::function's small buffer optimization. This function should " + "never be invoked."); + } + + virtual _Rp operator()(_ArgTypes&& ... __arg) { + return _VSTD::__invoke(__f_, _VSTD::forward<_ArgTypes>(__arg)...); + } + +#ifndef _LIBCPP_NO_RTTI + virtual const void* target(type_info const& __ti) const _NOEXCEPT { + if (__ti == typeid(__func::__block_type)) + return &__f_; + return (const void*)nullptr; + } + + virtual const std::type_info& target_type() const _NOEXCEPT { + return typeid(__func::__block_type); + } +#endif // _LIBCPP_NO_RTTI +}; + +#endif // _LIBCPP_HAS_EXTENSION_BLOCKS && !_LIBCPP_HAS_OBJC_ARC + +} // __function + +template +class _LIBCPP_TEMPLATE_VIS function<_Rp(_ArgTypes...)> +#if _LIBCPP_STD_VER <= 17 || !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : public __function::__maybe_derive_from_unary_function<_Rp(_ArgTypes...)>, + public __function::__maybe_derive_from_binary_function<_Rp(_ArgTypes...)> +#endif +{ +#ifndef _LIBCPP_ABI_OPTIMIZED_FUNCTION + typedef __function::__value_func<_Rp(_ArgTypes...)> __func; +#else + typedef __function::__policy_func<_Rp(_ArgTypes...)> __func; +#endif + + __func __f_; + + template , function>, + __invokable<_Fp, _ArgTypes...> + >::value> + struct __callable; + template + struct __callable<_Fp, true> + { + static const bool value = is_void<_Rp>::value || + __is_core_convertible::type, + _Rp>::value; + }; + template + struct __callable<_Fp, false> + { + static const bool value = false; + }; + + template + using _EnableIfLValueCallable = typename enable_if<__callable<_Fp&>::value>::type; +public: + typedef _Rp result_type; + + // construct/copy/destroy: + _LIBCPP_INLINE_VISIBILITY + function() _NOEXCEPT { } + _LIBCPP_INLINE_VISIBILITY + function(nullptr_t) _NOEXCEPT {} + function(const function&); + function(function&&) _NOEXCEPT; + template> + function(_Fp); + +#if _LIBCPP_STD_VER <= 14 + template + _LIBCPP_INLINE_VISIBILITY + function(allocator_arg_t, const _Alloc&) _NOEXCEPT {} + template + _LIBCPP_INLINE_VISIBILITY + function(allocator_arg_t, const _Alloc&, nullptr_t) _NOEXCEPT {} + template + function(allocator_arg_t, const _Alloc&, const function&); + template + function(allocator_arg_t, const _Alloc&, function&&); + template> + function(allocator_arg_t, const _Alloc& __a, _Fp __f); +#endif + + function& operator=(const function&); + function& operator=(function&&) _NOEXCEPT; + function& operator=(nullptr_t) _NOEXCEPT; + template::type>> + function& operator=(_Fp&&); + + ~function(); + + // function modifiers: + void swap(function&) _NOEXCEPT; + +#if _LIBCPP_STD_VER <= 14 + template + _LIBCPP_INLINE_VISIBILITY + void assign(_Fp&& __f, const _Alloc& __a) + {function(allocator_arg, __a, _VSTD::forward<_Fp>(__f)).swap(*this);} +#endif + + // function capacity: + _LIBCPP_INLINE_VISIBILITY + explicit operator bool() const _NOEXCEPT { + return static_cast(__f_); + } + + // deleted overloads close possible hole in the type system + template + bool operator==(const function<_R2(_ArgTypes2...)>&) const = delete; + template + bool operator!=(const function<_R2(_ArgTypes2...)>&) const = delete; +public: + // function invocation: + _Rp operator()(_ArgTypes...) const; + +#ifndef _LIBCPP_NO_RTTI + // function target access: + const std::type_info& target_type() const _NOEXCEPT; + template _Tp* target() _NOEXCEPT; + template const _Tp* target() const _NOEXCEPT; +#endif // _LIBCPP_NO_RTTI +}; + +#ifndef _LIBCPP_HAS_NO_DEDUCTION_GUIDES +template +function(_Rp(*)(_Ap...)) -> function<_Rp(_Ap...)>; + +template +struct __strip_signature; + +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...)> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) const> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) volatile> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) const volatile> { using type = _Rp(_Ap...); }; + +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) &> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) const &> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) volatile &> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) const volatile &> { using type = _Rp(_Ap...); }; + +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) noexcept> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) const noexcept> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) volatile noexcept> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) const volatile noexcept> { using type = _Rp(_Ap...); }; + +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) & noexcept> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) const & noexcept> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) volatile & noexcept> { using type = _Rp(_Ap...); }; +template +struct __strip_signature<_Rp (_Gp::*) (_Ap...) const volatile & noexcept> { using type = _Rp(_Ap...); }; + +template::type> +function(_Fp) -> function<_Stripped>; +#endif // !_LIBCPP_HAS_NO_DEDUCTION_GUIDES + +template +function<_Rp(_ArgTypes...)>::function(const function& __f) : __f_(__f.__f_) {} + +#if _LIBCPP_STD_VER <= 14 +template +template +function<_Rp(_ArgTypes...)>::function(allocator_arg_t, const _Alloc&, + const function& __f) : __f_(__f.__f_) {} +#endif + +template +function<_Rp(_ArgTypes...)>::function(function&& __f) _NOEXCEPT + : __f_(_VSTD::move(__f.__f_)) {} + +#if _LIBCPP_STD_VER <= 14 +template +template +function<_Rp(_ArgTypes...)>::function(allocator_arg_t, const _Alloc&, + function&& __f) + : __f_(_VSTD::move(__f.__f_)) {} +#endif + +template +template +function<_Rp(_ArgTypes...)>::function(_Fp __f) : __f_(_VSTD::move(__f)) {} + +#if _LIBCPP_STD_VER <= 14 +template +template +function<_Rp(_ArgTypes...)>::function(allocator_arg_t, const _Alloc& __a, + _Fp __f) + : __f_(_VSTD::move(__f), __a) {} +#endif + +template +function<_Rp(_ArgTypes...)>& +function<_Rp(_ArgTypes...)>::operator=(const function& __f) +{ + function(__f).swap(*this); + return *this; +} + +template +function<_Rp(_ArgTypes...)>& +function<_Rp(_ArgTypes...)>::operator=(function&& __f) _NOEXCEPT +{ + __f_ = _VSTD::move(__f.__f_); + return *this; +} + +template +function<_Rp(_ArgTypes...)>& +function<_Rp(_ArgTypes...)>::operator=(nullptr_t) _NOEXCEPT +{ + __f_ = nullptr; + return *this; +} + +template +template +function<_Rp(_ArgTypes...)>& +function<_Rp(_ArgTypes...)>::operator=(_Fp&& __f) +{ + function(_VSTD::forward<_Fp>(__f)).swap(*this); + return *this; +} + +template +function<_Rp(_ArgTypes...)>::~function() {} + +template +void +function<_Rp(_ArgTypes...)>::swap(function& __f) _NOEXCEPT +{ + __f_.swap(__f.__f_); +} + +template +_Rp +function<_Rp(_ArgTypes...)>::operator()(_ArgTypes... __arg) const +{ + return __f_(_VSTD::forward<_ArgTypes>(__arg)...); +} + +#ifndef _LIBCPP_NO_RTTI + +template +const std::type_info& +function<_Rp(_ArgTypes...)>::target_type() const _NOEXCEPT +{ + return __f_.target_type(); +} + +template +template +_Tp* +function<_Rp(_ArgTypes...)>::target() _NOEXCEPT +{ + return (_Tp*)(__f_.template target<_Tp>()); +} + +template +template +const _Tp* +function<_Rp(_ArgTypes...)>::target() const _NOEXCEPT +{ + return __f_.template target<_Tp>(); +} + +#endif // _LIBCPP_NO_RTTI + +template +inline _LIBCPP_INLINE_VISIBILITY +bool +operator==(const function<_Rp(_ArgTypes...)>& __f, nullptr_t) _NOEXCEPT {return !__f;} + +template +inline _LIBCPP_INLINE_VISIBILITY +bool +operator==(nullptr_t, const function<_Rp(_ArgTypes...)>& __f) _NOEXCEPT {return !__f;} + +template +inline _LIBCPP_INLINE_VISIBILITY +bool +operator!=(const function<_Rp(_ArgTypes...)>& __f, nullptr_t) _NOEXCEPT {return (bool)__f;} + +template +inline _LIBCPP_INLINE_VISIBILITY +bool +operator!=(nullptr_t, const function<_Rp(_ArgTypes...)>& __f) _NOEXCEPT {return (bool)__f;} + +template +inline _LIBCPP_INLINE_VISIBILITY +void +swap(function<_Rp(_ArgTypes...)>& __x, function<_Rp(_ArgTypes...)>& __y) _NOEXCEPT +{return __x.swap(__y);} + +#else // _LIBCPP_CXX03_LANG + namespace __function { template class __base; @@ -1588,4 +2802,8 @@ void swap(function<_Fp>& __x, function<_Fp>& __y) {return __x.swap(__y);} -#endif // _LIBCPP_FUNCTIONAL_03 +#endif + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_FUNCTION_H diff --git a/libcxx/include/__functional/hash.h b/libcxx/include/__functional/hash.h index e169ebc6ea598..eb715e4b9c890 100644 --- a/libcxx/include/__functional/hash.h +++ b/libcxx/include/__functional/hash.h @@ -14,6 +14,7 @@ #include <__tuple> #include <__utility/forward.h> #include <__utility/move.h> +#include <__utility/pair.h> #include <__utility/swap.h> #include #include diff --git a/libcxx/include/__functional/identity.h b/libcxx/include/__functional/identity.h new file mode 100644 index 0000000000000..6b8346b3b2a7a --- /dev/null +++ b/libcxx/include/__functional/identity.h @@ -0,0 +1,37 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_IDENTITY_H +#define _LIBCPP___FUNCTIONAL_IDENTITY_H + +#include <__config> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER > 17 + +struct identity { + template + _LIBCPP_NODISCARD_EXT constexpr _Tp&& operator()(_Tp&& __t) const noexcept + { + return _VSTD::forward<_Tp>(__t); + } + + using is_transparent = void; +}; +#endif // _LIBCPP_STD_VER > 17 + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_IDENTITY_H diff --git a/libcxx/include/__functional/invoke.h b/libcxx/include/__functional/invoke.h new file mode 100644 index 0000000000000..0e167c75d6908 --- /dev/null +++ b/libcxx/include/__functional/invoke.h @@ -0,0 +1,100 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_INVOKE_H +#define _LIBCPP___FUNCTIONAL_INVOKE_H + +#include <__config> +#include <__functional/weak_result_type.h> +#include <__utility/forward.h> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +template ::value> +struct __invoke_void_return_wrapper +{ +#ifndef _LIBCPP_CXX03_LANG + template + static _Ret __call(_Args&&... __args) { + return _VSTD::__invoke(_VSTD::forward<_Args>(__args)...); + } +#else + template + static _Ret __call(_Fn __f) { + return _VSTD::__invoke(__f); + } + + template + static _Ret __call(_Fn __f, _A0& __a0) { + return _VSTD::__invoke(__f, __a0); + } + + template + static _Ret __call(_Fn __f, _A0& __a0, _A1& __a1) { + return _VSTD::__invoke(__f, __a0, __a1); + } + + template + static _Ret __call(_Fn __f, _A0& __a0, _A1& __a1, _A2& __a2){ + return _VSTD::__invoke(__f, __a0, __a1, __a2); + } +#endif +}; + +template +struct __invoke_void_return_wrapper<_Ret, true> +{ +#ifndef _LIBCPP_CXX03_LANG + template + static void __call(_Args&&... __args) { + _VSTD::__invoke(_VSTD::forward<_Args>(__args)...); + } +#else + template + static void __call(_Fn __f) { + _VSTD::__invoke(__f); + } + + template + static void __call(_Fn __f, _A0& __a0) { + _VSTD::__invoke(__f, __a0); + } + + template + static void __call(_Fn __f, _A0& __a0, _A1& __a1) { + _VSTD::__invoke(__f, __a0, __a1); + } + + template + static void __call(_Fn __f, _A0& __a0, _A1& __a1, _A2& __a2) { + _VSTD::__invoke(__f, __a0, __a1, __a2); + } +#endif +}; + +#if _LIBCPP_STD_VER > 14 + +template +_LIBCPP_CONSTEXPR_AFTER_CXX17 invoke_result_t<_Fn, _Args...> +invoke(_Fn&& __f, _Args&&... __args) + noexcept(is_nothrow_invocable_v<_Fn, _Args...>) +{ + return _VSTD::__invoke(_VSTD::forward<_Fn>(__f), _VSTD::forward<_Args>(__args)...); +} + +#endif // _LIBCPP_STD_VER > 14 + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_INVOKE_H diff --git a/libcxx/include/__functional/is_transparent.h b/libcxx/include/__functional/is_transparent.h new file mode 100644 index 0000000000000..4a72aa8e29eea --- /dev/null +++ b/libcxx/include/__functional/is_transparent.h @@ -0,0 +1,36 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_IS_TRANSPARENT +#define _LIBCPP___FUNCTIONAL_IS_TRANSPARENT + +#include <__config> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER > 11 + +template +struct __is_transparent : false_type {}; + +template +struct __is_transparent<_Tp, _Up, + typename __void_t::type> + : true_type {}; + +#endif + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_IS_TRANSPARENT diff --git a/libcxx/include/__functional/mem_fn.h b/libcxx/include/__functional/mem_fn.h new file mode 100644 index 0000000000000..1fa070a42cc9c --- /dev/null +++ b/libcxx/include/__functional/mem_fn.h @@ -0,0 +1,161 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_MEM_FN_H +#define _LIBCPP___FUNCTIONAL_MEM_FN_H + +#include <__config> +#include <__functional/weak_result_type.h> +#include <__functional/binary_function.h> +#include <__functional/invoke.h> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +template +class __mem_fn +#if _LIBCPP_STD_VER <= 17 || !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : public __weak_result_type<_Tp> +#endif +{ +public: + // types + typedef _Tp type; +private: + type __f_; + +public: + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + __mem_fn(type __f) _NOEXCEPT : __f_(__f) {} + +#ifndef _LIBCPP_CXX03_LANG + // invoke + template + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + typename __invoke_return::type + operator() (_ArgTypes&&... __args) const { + return _VSTD::__invoke(__f_, _VSTD::forward<_ArgTypes>(__args)...); + } +#else + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return0::type + operator() (_A0& __a0) const { + return _VSTD::__invoke(__f_, __a0); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return0::type + operator() (_A0 const& __a0) const { + return _VSTD::__invoke(__f_, __a0); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return1::type + operator() (_A0& __a0, _A1& __a1) const { + return _VSTD::__invoke(__f_, __a0, __a1); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return1::type + operator() (_A0 const& __a0, _A1& __a1) const { + return _VSTD::__invoke(__f_, __a0, __a1); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return1::type + operator() (_A0& __a0, _A1 const& __a1) const { + return _VSTD::__invoke(__f_, __a0, __a1); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return1::type + operator() (_A0 const& __a0, _A1 const& __a1) const { + return _VSTD::__invoke(__f_, __a0, __a1); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0& __a0, _A1& __a1, _A2& __a2) const { + return _VSTD::__invoke(__f_, __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0 const& __a0, _A1& __a1, _A2& __a2) const { + return _VSTD::__invoke(__f_, __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0& __a0, _A1 const& __a1, _A2& __a2) const { + return _VSTD::__invoke(__f_, __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0& __a0, _A1& __a1, _A2 const& __a2) const { + return _VSTD::__invoke(__f_, __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0 const& __a0, _A1 const& __a1, _A2& __a2) const { + return _VSTD::__invoke(__f_, __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0 const& __a0, _A1& __a1, _A2 const& __a2) const { + return _VSTD::__invoke(__f_, __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0& __a0, _A1 const& __a1, _A2 const& __a2) const { + return _VSTD::__invoke(__f_, __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0 const& __a0, _A1 const& __a1, _A2 const& __a2) const { + return _VSTD::__invoke(__f_, __a0, __a1, __a2); + } +#endif +}; + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 +__mem_fn<_Rp _Tp::*> +mem_fn(_Rp _Tp::* __pm) _NOEXCEPT +{ + return __mem_fn<_Rp _Tp::*>(__pm); +} + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_MEM_FN_H diff --git a/libcxx/include/__functional/mem_fun_ref.h b/libcxx/include/__functional/mem_fun_ref.h new file mode 100644 index 0000000000000..4616da0b07482 --- /dev/null +++ b/libcxx/include/__functional/mem_fun_ref.h @@ -0,0 +1,173 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_MEM_FUN_REF_H +#define _LIBCPP___FUNCTIONAL_MEM_FUN_REF_H + +#include <__config> +#include <__functional/unary_function.h> +#include <__functional/binary_function.h> + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER <= 14 || defined(_LIBCPP_ENABLE_CXX17_REMOVED_BINDERS) + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 mem_fun_t + : public unary_function<_Tp*, _Sp> +{ + _Sp (_Tp::*__p_)(); +public: + _LIBCPP_INLINE_VISIBILITY explicit mem_fun_t(_Sp (_Tp::*__p)()) + : __p_(__p) {} + _LIBCPP_INLINE_VISIBILITY _Sp operator()(_Tp* __p) const + {return (__p->*__p_)();} +}; + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 mem_fun1_t + : public binary_function<_Tp*, _Ap, _Sp> +{ + _Sp (_Tp::*__p_)(_Ap); +public: + _LIBCPP_INLINE_VISIBILITY explicit mem_fun1_t(_Sp (_Tp::*__p)(_Ap)) + : __p_(__p) {} + _LIBCPP_INLINE_VISIBILITY _Sp operator()(_Tp* __p, _Ap __x) const + {return (__p->*__p_)(__x);} +}; + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +mem_fun_t<_Sp,_Tp> +mem_fun(_Sp (_Tp::*__f)()) + {return mem_fun_t<_Sp,_Tp>(__f);} + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +mem_fun1_t<_Sp,_Tp,_Ap> +mem_fun(_Sp (_Tp::*__f)(_Ap)) + {return mem_fun1_t<_Sp,_Tp,_Ap>(__f);} + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 mem_fun_ref_t + : public unary_function<_Tp, _Sp> +{ + _Sp (_Tp::*__p_)(); +public: + _LIBCPP_INLINE_VISIBILITY explicit mem_fun_ref_t(_Sp (_Tp::*__p)()) + : __p_(__p) {} + _LIBCPP_INLINE_VISIBILITY _Sp operator()(_Tp& __p) const + {return (__p.*__p_)();} +}; + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 mem_fun1_ref_t + : public binary_function<_Tp, _Ap, _Sp> +{ + _Sp (_Tp::*__p_)(_Ap); +public: + _LIBCPP_INLINE_VISIBILITY explicit mem_fun1_ref_t(_Sp (_Tp::*__p)(_Ap)) + : __p_(__p) {} + _LIBCPP_INLINE_VISIBILITY _Sp operator()(_Tp& __p, _Ap __x) const + {return (__p.*__p_)(__x);} +}; + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +mem_fun_ref_t<_Sp,_Tp> +mem_fun_ref(_Sp (_Tp::*__f)()) + {return mem_fun_ref_t<_Sp,_Tp>(__f);} + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +mem_fun1_ref_t<_Sp,_Tp,_Ap> +mem_fun_ref(_Sp (_Tp::*__f)(_Ap)) + {return mem_fun1_ref_t<_Sp,_Tp,_Ap>(__f);} + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 const_mem_fun_t + : public unary_function +{ + _Sp (_Tp::*__p_)() const; +public: + _LIBCPP_INLINE_VISIBILITY explicit const_mem_fun_t(_Sp (_Tp::*__p)() const) + : __p_(__p) {} + _LIBCPP_INLINE_VISIBILITY _Sp operator()(const _Tp* __p) const + {return (__p->*__p_)();} +}; + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 const_mem_fun1_t + : public binary_function +{ + _Sp (_Tp::*__p_)(_Ap) const; +public: + _LIBCPP_INLINE_VISIBILITY explicit const_mem_fun1_t(_Sp (_Tp::*__p)(_Ap) const) + : __p_(__p) {} + _LIBCPP_INLINE_VISIBILITY _Sp operator()(const _Tp* __p, _Ap __x) const + {return (__p->*__p_)(__x);} +}; + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +const_mem_fun_t<_Sp,_Tp> +mem_fun(_Sp (_Tp::*__f)() const) + {return const_mem_fun_t<_Sp,_Tp>(__f);} + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +const_mem_fun1_t<_Sp,_Tp,_Ap> +mem_fun(_Sp (_Tp::*__f)(_Ap) const) + {return const_mem_fun1_t<_Sp,_Tp,_Ap>(__f);} + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 const_mem_fun_ref_t + : public unary_function<_Tp, _Sp> +{ + _Sp (_Tp::*__p_)() const; +public: + _LIBCPP_INLINE_VISIBILITY explicit const_mem_fun_ref_t(_Sp (_Tp::*__p)() const) + : __p_(__p) {} + _LIBCPP_INLINE_VISIBILITY _Sp operator()(const _Tp& __p) const + {return (__p.*__p_)();} +}; + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 const_mem_fun1_ref_t + : public binary_function<_Tp, _Ap, _Sp> +{ + _Sp (_Tp::*__p_)(_Ap) const; +public: + _LIBCPP_INLINE_VISIBILITY explicit const_mem_fun1_ref_t(_Sp (_Tp::*__p)(_Ap) const) + : __p_(__p) {} + _LIBCPP_INLINE_VISIBILITY _Sp operator()(const _Tp& __p, _Ap __x) const + {return (__p.*__p_)(__x);} +}; + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +const_mem_fun_ref_t<_Sp,_Tp> +mem_fun_ref(_Sp (_Tp::*__f)() const) + {return const_mem_fun_ref_t<_Sp,_Tp>(__f);} + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +const_mem_fun1_ref_t<_Sp,_Tp,_Ap> +mem_fun_ref(_Sp (_Tp::*__f)(_Ap) const) + {return const_mem_fun1_ref_t<_Sp,_Tp,_Ap>(__f);} + +#endif // _LIBCPP_STD_VER <= 14 || defined(_LIBCPP_ENABLE_CXX17_REMOVED_BINDERS) + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_MEM_FUN_REF_H diff --git a/libcxx/include/__functional/not_fn.h b/libcxx/include/__functional/not_fn.h new file mode 100644 index 0000000000000..632be5ff096b5 --- /dev/null +++ b/libcxx/include/__functional/not_fn.h @@ -0,0 +1,47 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_NOT_FN_H +#define _LIBCPP___FUNCTIONAL_NOT_FN_H + +#include <__config> +#include <__functional/perfect_forward.h> +#include <__functional/invoke.h> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER > 14 + +struct __not_fn_op +{ + template + static _LIBCPP_CONSTEXPR_AFTER_CXX17 auto __call(_Args&&... __args) + noexcept(noexcept(!_VSTD::invoke(_VSTD::forward<_Args>(__args)...))) + -> decltype( !_VSTD::invoke(_VSTD::forward<_Args>(__args)...)) + { return !_VSTD::invoke(_VSTD::forward<_Args>(__args)...); } +}; + +template, _Fn> && + is_move_constructible_v<_Fn>>> +_LIBCPP_CONSTEXPR_AFTER_CXX17 auto not_fn(_Fn&& __f) +{ + return __perfect_forward<__not_fn_op, _Fn>(_VSTD::forward<_Fn>(__f)); +} + +#endif // _LIBCPP_STD_VER > 14 + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_NOT_FN_H diff --git a/libcxx/include/__functional/operations.h b/libcxx/include/__functional/operations.h new file mode 100644 index 0000000000000..667d17988bc4e --- /dev/null +++ b/libcxx/include/__functional/operations.h @@ -0,0 +1,729 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_OPERATIONS_H +#define _LIBCPP___FUNCTIONAL_OPERATIONS_H + +#include <__config> +#include <__functional/binary_function.h> +#include <__functional/unary_function.h> +#include <__utility/forward.h> + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +// Arithmetic operations + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS plus +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, _Tp> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef _Tp __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + _Tp operator()(const _Tp& __x, const _Tp& __y) const + {return __x + __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS plus +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) + _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) + _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) + _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS minus +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, _Tp> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef _Tp __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + _Tp operator()(const _Tp& __x, const _Tp& __y) const + {return __x - __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS minus +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) - _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) - _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) - _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS multiplies +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, _Tp> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef _Tp __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + _Tp operator()(const _Tp& __x, const _Tp& __y) const + {return __x * __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS multiplies +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) * _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) * _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) * _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS divides +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, _Tp> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef _Tp __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + _Tp operator()(const _Tp& __x, const _Tp& __y) const + {return __x / __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS divides +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) / _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) / _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) / _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS modulus +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, _Tp> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef _Tp __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + _Tp operator()(const _Tp& __x, const _Tp& __y) const + {return __x % __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS modulus +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) % _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) % _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) % _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS negate +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : unary_function<_Tp, _Tp> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef _Tp __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + _Tp operator()(const _Tp& __x) const + {return -__x;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS negate +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_Tp&& __x) const + _NOEXCEPT_(noexcept(- _VSTD::forward<_Tp>(__x))) + -> decltype (- _VSTD::forward<_Tp>(__x)) + { return - _VSTD::forward<_Tp>(__x); } + typedef void is_transparent; +}; +#endif + +// Bitwise operations + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS bit_and +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, _Tp> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef _Tp __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + _Tp operator()(const _Tp& __x, const _Tp& __y) const + {return __x & __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS bit_and +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) & _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) & _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) & _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +#if _LIBCPP_STD_VER > 11 +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +template +struct _LIBCPP_TEMPLATE_VIS bit_not +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : unary_function<_Tp, _Tp> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + _Tp operator()(const _Tp& __x) const + {return ~__x;} +}; + +template <> +struct _LIBCPP_TEMPLATE_VIS bit_not +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_Tp&& __x) const + _NOEXCEPT_(noexcept(~_VSTD::forward<_Tp>(__x))) + -> decltype (~_VSTD::forward<_Tp>(__x)) + { return ~_VSTD::forward<_Tp>(__x); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS bit_or +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, _Tp> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef _Tp __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + _Tp operator()(const _Tp& __x, const _Tp& __y) const + {return __x | __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS bit_or +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) | _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) | _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) | _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS bit_xor +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, _Tp> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef _Tp __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + _Tp operator()(const _Tp& __x, const _Tp& __y) const + {return __x ^ __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS bit_xor +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) ^ _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) ^ _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) ^ _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +// Comparison operations + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS equal_to +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, bool> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef bool __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + bool operator()(const _Tp& __x, const _Tp& __y) const + {return __x == __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS equal_to +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) == _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) == _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) == _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS not_equal_to +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, bool> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef bool __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + bool operator()(const _Tp& __x, const _Tp& __y) const + {return __x != __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS not_equal_to +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) != _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) != _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) != _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS less +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, bool> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef bool __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + bool operator()(const _Tp& __x, const _Tp& __y) const + {return __x < __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS less +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) < _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) < _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) < _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS less_equal +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, bool> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef bool __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + bool operator()(const _Tp& __x, const _Tp& __y) const + {return __x <= __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS less_equal +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) <= _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) <= _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) <= _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS greater_equal +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, bool> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef bool __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + bool operator()(const _Tp& __x, const _Tp& __y) const + {return __x >= __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS greater_equal +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) >= _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) >= _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) >= _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS greater +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, bool> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef bool __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + bool operator()(const _Tp& __x, const _Tp& __y) const + {return __x > __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS greater +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) > _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) > _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) > _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +// Logical operations + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS logical_and +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, bool> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef bool __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + bool operator()(const _Tp& __x, const _Tp& __y) const + {return __x && __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS logical_and +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) && _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) && _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) && _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS logical_not +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : unary_function<_Tp, bool> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef bool __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + bool operator()(const _Tp& __x) const + {return !__x;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS logical_not +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_Tp&& __x) const + _NOEXCEPT_(noexcept(!_VSTD::forward<_Tp>(__x))) + -> decltype (!_VSTD::forward<_Tp>(__x)) + { return !_VSTD::forward<_Tp>(__x); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +#if _LIBCPP_STD_VER > 11 +template +#else +template +#endif +struct _LIBCPP_TEMPLATE_VIS logical_or +#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : binary_function<_Tp, _Tp, bool> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP + typedef bool __result_type; // used by valarray +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) + _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; + _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; +#endif + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + bool operator()(const _Tp& __x, const _Tp& __y) const + {return __x || __y;} +}; + +#if _LIBCPP_STD_VER > 11 +template <> +struct _LIBCPP_TEMPLATE_VIS logical_or +{ + template + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + auto operator()(_T1&& __t, _T2&& __u) const + _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) || _VSTD::forward<_T2>(__u))) + -> decltype (_VSTD::forward<_T1>(__t) || _VSTD::forward<_T2>(__u)) + { return _VSTD::forward<_T1>(__t) || _VSTD::forward<_T2>(__u); } + typedef void is_transparent; +}; +#endif + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_OPERATIONS_H diff --git a/libcxx/include/__functional/perfect_forward.h b/libcxx/include/__functional/perfect_forward.h new file mode 100644 index 0000000000000..a5678e1593bba --- /dev/null +++ b/libcxx/include/__functional/perfect_forward.h @@ -0,0 +1,88 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_PERFECT_FORWARD_H +#define _LIBCPP___FUNCTIONAL_PERFECT_FORWARD_H + +#include <__config> +#include +#include +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER > 14 + +template::value>::type> +struct __perfect_forward_impl; + +template +struct __perfect_forward_impl<_Op, __tuple_types<_Bound...>, __tuple_indices<_Idxs...>> +{ + tuple<_Bound...> __bound_; + + template + _LIBCPP_INLINE_VISIBILITY constexpr auto operator()(_Args&&... __args) & + noexcept(noexcept(_Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...))) + -> decltype( _Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...)) + {return _Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...);} + + template + _LIBCPP_INLINE_VISIBILITY constexpr auto operator()(_Args&&... __args) const& + noexcept(noexcept(_Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...))) + -> decltype( _Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...)) + {return _Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...);} + + template + _LIBCPP_INLINE_VISIBILITY constexpr auto operator()(_Args&&... __args) && + noexcept(noexcept(_Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., + _VSTD::forward<_Args>(__args)...))) + -> decltype( _Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., + _VSTD::forward<_Args>(__args)...)) + {return _Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., + _VSTD::forward<_Args>(__args)...);} + + template + _LIBCPP_INLINE_VISIBILITY constexpr auto operator()(_Args&&... __args) const&& + noexcept(noexcept(_Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., + _VSTD::forward<_Args>(__args)...))) + -> decltype( _Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., + _VSTD::forward<_Args>(__args)...)) + {return _Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., + _VSTD::forward<_Args>(__args)...);} + + template>::type, + class = _EnableIf>> + constexpr __perfect_forward_impl(__perfect_forward_impl const& __other) + : __bound_(__other.__bound_) {} + + template>::type, + class = _EnableIf>> + constexpr __perfect_forward_impl(__perfect_forward_impl && __other) + : __bound_(_VSTD::move(__other.__bound_)) {} + + template + explicit constexpr __perfect_forward_impl(_BoundArgs&&... __bound) : + __bound_(_VSTD::forward<_BoundArgs>(__bound)...) { } +}; + +template +using __perfect_forward = + __perfect_forward_impl<_Op, __tuple_types...>>; + +#endif // _LIBCPP_STD_VER > 14 + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_PERFECT_FORWARD_H diff --git a/libcxx/include/__functional/pointer_to_binary_function.h b/libcxx/include/__functional/pointer_to_binary_function.h new file mode 100644 index 0000000000000..d4a6c1674aec5 --- /dev/null +++ b/libcxx/include/__functional/pointer_to_binary_function.h @@ -0,0 +1,46 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_POINTER_TO_BINARY_FUNCTION_H +#define _LIBCPP___FUNCTIONAL_POINTER_TO_BINARY_FUNCTION_H + +#include <__config> +#include <__functional/binary_function.h> + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER <= 14 || defined(_LIBCPP_ENABLE_CXX17_REMOVED_BINDERS) + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 pointer_to_binary_function + : public binary_function<_Arg1, _Arg2, _Result> +{ + _Result (*__f_)(_Arg1, _Arg2); +public: + _LIBCPP_INLINE_VISIBILITY explicit pointer_to_binary_function(_Result (*__f)(_Arg1, _Arg2)) + : __f_(__f) {} + _LIBCPP_INLINE_VISIBILITY _Result operator()(_Arg1 __x, _Arg2 __y) const + {return __f_(__x, __y);} +}; + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +pointer_to_binary_function<_Arg1,_Arg2,_Result> +ptr_fun(_Result (*__f)(_Arg1,_Arg2)) + {return pointer_to_binary_function<_Arg1,_Arg2,_Result>(__f);} + +#endif + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_POINTER_TO_BINARY_FUNCTION_H diff --git a/libcxx/include/__functional/pointer_to_unary_function.h b/libcxx/include/__functional/pointer_to_unary_function.h new file mode 100644 index 0000000000000..0ac4561cc3053 --- /dev/null +++ b/libcxx/include/__functional/pointer_to_unary_function.h @@ -0,0 +1,46 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_POINTER_TO_UNARY_FUNCTION_H +#define _LIBCPP___FUNCTIONAL_POINTER_TO_UNARY_FUNCTION_H + +#include <__config> +#include <__functional/unary_function.h> + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER <= 14 || defined(_LIBCPP_ENABLE_CXX17_REMOVED_BINDERS) + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 pointer_to_unary_function + : public unary_function<_Arg, _Result> +{ + _Result (*__f_)(_Arg); +public: + _LIBCPP_INLINE_VISIBILITY explicit pointer_to_unary_function(_Result (*__f)(_Arg)) + : __f_(__f) {} + _LIBCPP_INLINE_VISIBILITY _Result operator()(_Arg __x) const + {return __f_(__x);} +}; + +template +_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY +pointer_to_unary_function<_Arg,_Result> +ptr_fun(_Result (*__f)(_Arg)) + {return pointer_to_unary_function<_Arg,_Result>(__f);} + +#endif // _LIBCPP_STD_VER <= 14 || defined(_LIBCPP_ENABLE_CXX17_REMOVED_BINDERS) + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_POINTER_TO_UNARY_FUNCTION_H diff --git a/libcxx/include/__functional/ranges_operations.h b/libcxx/include/__functional/ranges_operations.h new file mode 100644 index 0000000000000..777c535251029 --- /dev/null +++ b/libcxx/include/__functional/ranges_operations.h @@ -0,0 +1,97 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_RANGES_OPERATIONS_H +#define _LIBCPP___FUNCTIONAL_RANGES_OPERATIONS_H + +#include <__config> +#include +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if !defined(_LIBCPP_HAS_NO_RANGES) +namespace ranges { + +struct equal_to { + template + requires equality_comparable_with<_Tp, _Up> + [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const + noexcept(noexcept(bool(_VSTD::forward<_Tp>(__t) == _VSTD::forward<_Up>(__u)))) { + return _VSTD::forward<_Tp>(__t) == _VSTD::forward<_Up>(__u); + } + + using is_transparent = void; +}; + +struct not_equal_to { + template + requires equality_comparable_with<_Tp, _Up> + [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const + noexcept(noexcept(bool(!(_VSTD::forward<_Tp>(__t) == _VSTD::forward<_Up>(__u))))) { + return !(_VSTD::forward<_Tp>(__t) == _VSTD::forward<_Up>(__u)); + } + + using is_transparent = void; +}; + +struct less { + template + requires totally_ordered_with<_Tp, _Up> + [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const + noexcept(noexcept(bool(_VSTD::forward<_Tp>(__t) < _VSTD::forward<_Up>(__u)))) { + return _VSTD::forward<_Tp>(__t) < _VSTD::forward<_Up>(__u); + } + + using is_transparent = void; +}; + +struct less_equal { + template + requires totally_ordered_with<_Tp, _Up> + [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const + noexcept(noexcept(bool(!(_VSTD::forward<_Up>(__u) < _VSTD::forward<_Tp>(__t))))) { + return !(_VSTD::forward<_Up>(__u) < _VSTD::forward<_Tp>(__t)); + } + + using is_transparent = void; +}; + +struct greater { + template + requires totally_ordered_with<_Tp, _Up> + [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const + noexcept(noexcept(bool(_VSTD::forward<_Up>(__u) < _VSTD::forward<_Tp>(__t)))) { + return _VSTD::forward<_Up>(__u) < _VSTD::forward<_Tp>(__t); + } + + using is_transparent = void; +}; + +struct greater_equal { + template + requires totally_ordered_with<_Tp, _Up> + [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const + noexcept(noexcept(bool(!(_VSTD::forward<_Tp>(__t) < _VSTD::forward<_Up>(__u))))) { + return !(_VSTD::forward<_Tp>(__t) < _VSTD::forward<_Up>(__u)); + } + + using is_transparent = void; +}; + +} // namespace ranges +#endif // !defined(_LIBCPP_HAS_NO_RANGES) + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_RANGES_OPERATIONS_H diff --git a/libcxx/include/__functional/reference_wrapper.h b/libcxx/include/__functional/reference_wrapper.h new file mode 100644 index 0000000000000..09f4a64945022 --- /dev/null +++ b/libcxx/include/__functional/reference_wrapper.h @@ -0,0 +1,223 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_REFERENCE_WRAPPER_H +#define _LIBCPP___FUNCTIONAL_REFERENCE_WRAPPER_H + +#include <__config> +#include <__functional/weak_result_type.h> +#include <__memory/addressof.h> +#include <__utility/forward.h> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +template +class _LIBCPP_TEMPLATE_VIS reference_wrapper +#if _LIBCPP_STD_VER <= 17 || !defined(_LIBCPP_ABI_NO_BINDER_BASES) + : public __weak_result_type<_Tp> +#endif +{ +public: + // types + typedef _Tp type; +private: + type* __f_; + +#ifndef _LIBCPP_CXX03_LANG + static void __fun(_Tp&) _NOEXCEPT; + static void __fun(_Tp&&) = delete; +#endif + +public: + // construct/copy/destroy +#ifdef _LIBCPP_CXX03_LANG + _LIBCPP_INLINE_VISIBILITY + reference_wrapper(type& __f) _NOEXCEPT + : __f_(_VSTD::addressof(__f)) {} +#else + template ::value, decltype(__fun(declval<_Up>())) >> + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + reference_wrapper(_Up&& __u) _NOEXCEPT_(noexcept(__fun(declval<_Up>()))) { + type& __f = static_cast<_Up&&>(__u); + __f_ = _VSTD::addressof(__f); + } +#endif + + // access + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + operator type&() const _NOEXCEPT {return *__f_;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + type& get() const _NOEXCEPT {return *__f_;} + +#ifndef _LIBCPP_CXX03_LANG + // invoke + template + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 + typename __invoke_of::type + operator() (_ArgTypes&&... __args) const { + return _VSTD::__invoke(get(), _VSTD::forward<_ArgTypes>(__args)...); + } +#else + + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return::type + operator() () const { + return _VSTD::__invoke(get()); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return0::type + operator() (_A0& __a0) const { + return _VSTD::__invoke(get(), __a0); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return0::type + operator() (_A0 const& __a0) const { + return _VSTD::__invoke(get(), __a0); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return1::type + operator() (_A0& __a0, _A1& __a1) const { + return _VSTD::__invoke(get(), __a0, __a1); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return1::type + operator() (_A0 const& __a0, _A1& __a1) const { + return _VSTD::__invoke(get(), __a0, __a1); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return1::type + operator() (_A0& __a0, _A1 const& __a1) const { + return _VSTD::__invoke(get(), __a0, __a1); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return1::type + operator() (_A0 const& __a0, _A1 const& __a1) const { + return _VSTD::__invoke(get(), __a0, __a1); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0& __a0, _A1& __a1, _A2& __a2) const { + return _VSTD::__invoke(get(), __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0 const& __a0, _A1& __a1, _A2& __a2) const { + return _VSTD::__invoke(get(), __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0& __a0, _A1 const& __a1, _A2& __a2) const { + return _VSTD::__invoke(get(), __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0& __a0, _A1& __a1, _A2 const& __a2) const { + return _VSTD::__invoke(get(), __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0 const& __a0, _A1 const& __a1, _A2& __a2) const { + return _VSTD::__invoke(get(), __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0 const& __a0, _A1& __a1, _A2 const& __a2) const { + return _VSTD::__invoke(get(), __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0& __a0, _A1 const& __a1, _A2 const& __a2) const { + return _VSTD::__invoke(get(), __a0, __a1, __a2); + } + + template + _LIBCPP_INLINE_VISIBILITY + typename __invoke_return2::type + operator() (_A0 const& __a0, _A1 const& __a1, _A2 const& __a2) const { + return _VSTD::__invoke(get(), __a0, __a1, __a2); + } +#endif // _LIBCPP_CXX03_LANG +}; + +#ifndef _LIBCPP_HAS_NO_DEDUCTION_GUIDES +template +reference_wrapper(_Tp&) -> reference_wrapper<_Tp>; +#endif + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 +reference_wrapper<_Tp> +ref(_Tp& __t) _NOEXCEPT +{ + return reference_wrapper<_Tp>(__t); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 +reference_wrapper<_Tp> +ref(reference_wrapper<_Tp> __t) _NOEXCEPT +{ + return _VSTD::ref(__t.get()); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 +reference_wrapper +cref(const _Tp& __t) _NOEXCEPT +{ + return reference_wrapper(__t); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 +reference_wrapper +cref(reference_wrapper<_Tp> __t) _NOEXCEPT +{ + return _VSTD::cref(__t.get()); +} + +#ifndef _LIBCPP_CXX03_LANG +template void ref(const _Tp&&) = delete; +template void cref(const _Tp&&) = delete; +#endif + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_REFERENCE_WRAPPER_H diff --git a/libcxx/include/__functional/search.h b/libcxx/include/__functional/search.h deleted file mode 100644 index 061b30f0d0322..0000000000000 --- a/libcxx/include/__functional/search.h +++ /dev/null @@ -1,102 +0,0 @@ -// -*- C++ -*- -//===----------------------------------------------------------------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#ifndef _LIBCPP___FUNCTIONAL___SEARCH_H -#define _LIBCPP___FUNCTIONAL___SEARCH_H - -#include <__config> -#include <__iterator/iterator_traits.h> -#include - -#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) -#pragma GCC system_header -#endif - -_LIBCPP_PUSH_MACROS -#include <__undef_macros> - -_LIBCPP_BEGIN_NAMESPACE_STD - -template -pair<_ForwardIterator1, _ForwardIterator1> - _LIBCPP_CONSTEXPR_AFTER_CXX11 __search(_ForwardIterator1 __first1, _ForwardIterator1 __last1, - _ForwardIterator2 __first2, _ForwardIterator2 __last2, - _BinaryPredicate __pred, forward_iterator_tag, forward_iterator_tag) { - if (__first2 == __last2) - return _VSTD::make_pair(__first1, __first1); // Everything matches an empty sequence - while (true) { - // Find first element in sequence 1 that matchs *__first2, with a mininum of loop checks - while (true) { - if (__first1 == __last1) // return __last1 if no element matches *__first2 - return _VSTD::make_pair(__last1, __last1); - if (__pred(*__first1, *__first2)) - break; - ++__first1; - } - // *__first1 matches *__first2, now match elements after here - _ForwardIterator1 __m1 = __first1; - _ForwardIterator2 __m2 = __first2; - while (true) { - if (++__m2 == __last2) // If pattern exhausted, __first1 is the answer (works for 1 element pattern) - return _VSTD::make_pair(__first1, __m1); - if (++__m1 == __last1) // Otherwise if source exhaused, pattern not found - return _VSTD::make_pair(__last1, __last1); - if (!__pred(*__m1, *__m2)) // if there is a mismatch, restart with a new __first1 - { - ++__first1; - break; - } // else there is a match, check next elements - } - } -} - -template -_LIBCPP_CONSTEXPR_AFTER_CXX11 pair<_RandomAccessIterator1, _RandomAccessIterator1> -__search(_RandomAccessIterator1 __first1, _RandomAccessIterator1 __last1, _RandomAccessIterator2 __first2, - _RandomAccessIterator2 __last2, _BinaryPredicate __pred, random_access_iterator_tag, - random_access_iterator_tag) { - typedef typename iterator_traits<_RandomAccessIterator1>::difference_type _D1; - typedef typename iterator_traits<_RandomAccessIterator2>::difference_type _D2; - // Take advantage of knowing source and pattern lengths. Stop short when source is smaller than pattern - const _D2 __len2 = __last2 - __first2; - if (__len2 == 0) - return _VSTD::make_pair(__first1, __first1); - const _D1 __len1 = __last1 - __first1; - if (__len1 < __len2) - return _VSTD::make_pair(__last1, __last1); - const _RandomAccessIterator1 __s = __last1 - (__len2 - 1); // Start of pattern match can't go beyond here - - while (true) { - while (true) { - if (__first1 == __s) - return _VSTD::make_pair(__last1, __last1); - if (__pred(*__first1, *__first2)) - break; - ++__first1; - } - - _RandomAccessIterator1 __m1 = __first1; - _RandomAccessIterator2 __m2 = __first2; - while (true) { - if (++__m2 == __last2) - return _VSTD::make_pair(__first1, __first1 + __len2); - ++__m1; // no need to check range on __m1 because __s guarantees we have enough source - if (!__pred(*__m1, *__m2)) { - ++__first1; - break; - } - } - } -} - -_LIBCPP_END_NAMESPACE_STD - -_LIBCPP_POP_MACROS - -#endif // _LIBCPP___FUNCTIONAL___SEARCH_H diff --git a/libcxx/include/__functional/unary_negate.h b/libcxx/include/__functional/unary_negate.h new file mode 100644 index 0000000000000..71257cf40c0dd --- /dev/null +++ b/libcxx/include/__functional/unary_negate.h @@ -0,0 +1,47 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_UNARY_NEGATE_H +#define _LIBCPP___FUNCTIONAL_UNARY_NEGATE_H + +#include <__config> +#include <__functional/unary_function.h> + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_NEGATORS) + +template +class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX17 unary_negate + : public unary_function +{ + _Predicate __pred_; +public: + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + explicit unary_negate(const _Predicate& __pred) + : __pred_(__pred) {} + _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY + bool operator()(const typename _Predicate::argument_type& __x) const + {return !__pred_(__x);} +}; + +template +_LIBCPP_DEPRECATED_IN_CXX17 inline _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY +unary_negate<_Predicate> +not1(const _Predicate& __pred) {return unary_negate<_Predicate>(__pred);} + +#endif // _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_NEGATORS) + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_UNARY_NEGATE_H diff --git a/libcxx/include/__functional/unwrap_ref.h b/libcxx/include/__functional/unwrap_ref.h index 85c0c20ee7e0f..4d091ec35c5d2 100644 --- a/libcxx/include/__functional/unwrap_ref.h +++ b/libcxx/include/__functional/unwrap_ref.h @@ -36,8 +36,14 @@ struct decay; template struct unwrap_reference : __unwrap_reference<_Tp> { }; +template +using unwrap_reference_t = typename unwrap_reference<_Tp>::type; + template struct unwrap_ref_decay : unwrap_reference::type> { }; + +template +using unwrap_ref_decay_t = typename unwrap_ref_decay<_Tp>::type; #endif // > C++17 template diff --git a/libcxx/include/__functional/weak_result_type.h b/libcxx/include/__functional/weak_result_type.h new file mode 100644 index 0000000000000..2ee85acf1ef4d --- /dev/null +++ b/libcxx/include/__functional/weak_result_type.h @@ -0,0 +1,481 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL_WEAK_RESULT_TYPE_H +#define _LIBCPP___FUNCTIONAL_WEAK_RESULT_TYPE_H + +#include <__config> +#include <__functional/binary_function.h> +#include <__functional/unary_function.h> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +template +struct __has_result_type +{ +private: + struct __two {char __lx; char __lxx;}; + template static __two __test(...); + template static char __test(typename _Up::result_type* = 0); +public: + static const bool value = sizeof(__test<_Tp>(0)) == 1; +}; + +// __weak_result_type + +template +struct __derives_from_unary_function +{ +private: + struct __two {char __lx; char __lxx;}; + static __two __test(...); + template + static unary_function<_Ap, _Rp> + __test(const volatile unary_function<_Ap, _Rp>*); +public: + static const bool value = !is_same::value; + typedef decltype(__test((_Tp*)0)) type; +}; + +template +struct __derives_from_binary_function +{ +private: + struct __two {char __lx; char __lxx;}; + static __two __test(...); + template + static binary_function<_A1, _A2, _Rp> + __test(const volatile binary_function<_A1, _A2, _Rp>*); +public: + static const bool value = !is_same::value; + typedef decltype(__test((_Tp*)0)) type; +}; + +template ::value> +struct __maybe_derive_from_unary_function // bool is true + : public __derives_from_unary_function<_Tp>::type +{ +}; + +template +struct __maybe_derive_from_unary_function<_Tp, false> +{ +}; + +template ::value> +struct __maybe_derive_from_binary_function // bool is true + : public __derives_from_binary_function<_Tp>::type +{ +}; + +template +struct __maybe_derive_from_binary_function<_Tp, false> +{ +}; + +template ::value> +struct __weak_result_type_imp // bool is true + : public __maybe_derive_from_unary_function<_Tp>, + public __maybe_derive_from_binary_function<_Tp> +{ + typedef _LIBCPP_NODEBUG_TYPE typename _Tp::result_type result_type; +}; + +template +struct __weak_result_type_imp<_Tp, false> + : public __maybe_derive_from_unary_function<_Tp>, + public __maybe_derive_from_binary_function<_Tp> +{ +}; + +template +struct __weak_result_type + : public __weak_result_type_imp<_Tp> +{ +}; + +// 0 argument case + +template +struct __weak_result_type<_Rp ()> +{ + typedef _LIBCPP_NODEBUG_TYPE _Rp result_type; +}; + +template +struct __weak_result_type<_Rp (&)()> +{ + typedef _LIBCPP_NODEBUG_TYPE _Rp result_type; +}; + +template +struct __weak_result_type<_Rp (*)()> +{ + typedef _LIBCPP_NODEBUG_TYPE _Rp result_type; +}; + +// 1 argument case + +template +struct __weak_result_type<_Rp (_A1)> + : public unary_function<_A1, _Rp> +{ +}; + +template +struct __weak_result_type<_Rp (&)(_A1)> + : public unary_function<_A1, _Rp> +{ +}; + +template +struct __weak_result_type<_Rp (*)(_A1)> + : public unary_function<_A1, _Rp> +{ +}; + +template +struct __weak_result_type<_Rp (_Cp::*)()> + : public unary_function<_Cp*, _Rp> +{ +}; + +template +struct __weak_result_type<_Rp (_Cp::*)() const> + : public unary_function +{ +}; + +template +struct __weak_result_type<_Rp (_Cp::*)() volatile> + : public unary_function +{ +}; + +template +struct __weak_result_type<_Rp (_Cp::*)() const volatile> + : public unary_function +{ +}; + +// 2 argument case + +template +struct __weak_result_type<_Rp (_A1, _A2)> + : public binary_function<_A1, _A2, _Rp> +{ +}; + +template +struct __weak_result_type<_Rp (*)(_A1, _A2)> + : public binary_function<_A1, _A2, _Rp> +{ +}; + +template +struct __weak_result_type<_Rp (&)(_A1, _A2)> + : public binary_function<_A1, _A2, _Rp> +{ +}; + +template +struct __weak_result_type<_Rp (_Cp::*)(_A1)> + : public binary_function<_Cp*, _A1, _Rp> +{ +}; + +template +struct __weak_result_type<_Rp (_Cp::*)(_A1) const> + : public binary_function +{ +}; + +template +struct __weak_result_type<_Rp (_Cp::*)(_A1) volatile> + : public binary_function +{ +}; + +template +struct __weak_result_type<_Rp (_Cp::*)(_A1) const volatile> + : public binary_function +{ +}; + + +#ifndef _LIBCPP_CXX03_LANG +// 3 or more arguments + +template +struct __weak_result_type<_Rp (_A1, _A2, _A3, _A4...)> +{ + typedef _Rp result_type; +}; + +template +struct __weak_result_type<_Rp (&)(_A1, _A2, _A3, _A4...)> +{ + typedef _Rp result_type; +}; + +template +struct __weak_result_type<_Rp (*)(_A1, _A2, _A3, _A4...)> +{ + typedef _Rp result_type; +}; + +template +struct __weak_result_type<_Rp (_Cp::*)(_A1, _A2, _A3...)> +{ + typedef _Rp result_type; +}; + +template +struct __weak_result_type<_Rp (_Cp::*)(_A1, _A2, _A3...) const> +{ + typedef _Rp result_type; +}; + +template +struct __weak_result_type<_Rp (_Cp::*)(_A1, _A2, _A3...) volatile> +{ + typedef _Rp result_type; +}; + +template +struct __weak_result_type<_Rp (_Cp::*)(_A1, _A2, _A3...) const volatile> +{ + typedef _Rp result_type; +}; + +template +struct __invoke_return +{ + typedef decltype(_VSTD::__invoke(declval<_Tp>(), declval<_Args>()...)) type; +}; + +#else // defined(_LIBCPP_CXX03_LANG) + +template +struct __enable_invoke_imp; + +template +struct __enable_invoke_imp<_Ret, _T1, true, true> { + typedef _Ret _Bullet1; + typedef _Bullet1 type; +}; + +template +struct __enable_invoke_imp<_Ret, _T1, true, false> { + typedef _Ret _Bullet2; + typedef _Bullet2 type; +}; + +template +struct __enable_invoke_imp<_Ret, _T1, false, true> { + typedef typename add_lvalue_reference< + typename __apply_cv<_T1, _Ret>::type + >::type _Bullet3; + typedef _Bullet3 type; +}; + +template +struct __enable_invoke_imp<_Ret, _T1, false, false> { + typedef typename add_lvalue_reference< + typename __apply_cv()), _Ret>::type + >::type _Bullet4; + typedef _Bullet4 type; +}; + +template +struct __enable_invoke_imp<_Ret, _T1*, false, false> { + typedef typename add_lvalue_reference< + typename __apply_cv<_T1, _Ret>::type + >::type _Bullet4; + typedef _Bullet4 type; +}; + +template , + class _Ret = typename _Traits::_ReturnType, + class _Class = typename _Traits::_ClassType> +struct __enable_invoke : __enable_invoke_imp< + _Ret, _T1, + is_member_function_pointer<_Fn>::value, + is_base_of<_Class, typename remove_reference<_T1>::type>::value> +{ +}; + +__nat __invoke(__any, ...); + +// first bullet + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __enable_invoke<_Fn, _T1>::_Bullet1 +__invoke(_Fn __f, _T1& __t1) { + return (__t1.*__f)(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __enable_invoke<_Fn, _T1>::_Bullet1 +__invoke(_Fn __f, _T1& __t1, _A0& __a0) { + return (__t1.*__f)(__a0); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __enable_invoke<_Fn, _T1>::_Bullet1 +__invoke(_Fn __f, _T1& __t1, _A0& __a0, _A1& __a1) { + return (__t1.*__f)(__a0, __a1); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __enable_invoke<_Fn, _T1>::_Bullet1 +__invoke(_Fn __f, _T1& __t1, _A0& __a0, _A1& __a1, _A2& __a2) { + return (__t1.*__f)(__a0, __a1, __a2); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __enable_invoke<_Fn, _T1>::_Bullet2 +__invoke(_Fn __f, _T1& __t1) { + return ((*__t1).*__f)(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __enable_invoke<_Fn, _T1>::_Bullet2 +__invoke(_Fn __f, _T1& __t1, _A0& __a0) { + return ((*__t1).*__f)(__a0); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __enable_invoke<_Fn, _T1>::_Bullet2 +__invoke(_Fn __f, _T1& __t1, _A0& __a0, _A1& __a1) { + return ((*__t1).*__f)(__a0, __a1); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __enable_invoke<_Fn, _T1>::_Bullet2 +__invoke(_Fn __f, _T1& __t1, _A0& __a0, _A1& __a1, _A2& __a2) { + return ((*__t1).*__f)(__a0, __a1, __a2); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __enable_invoke<_Fn, _T1>::_Bullet3 +__invoke(_Fn __f, _T1& __t1) { + return __t1.*__f; +} + +template +inline _LIBCPP_INLINE_VISIBILITY +typename __enable_invoke<_Fn, _T1>::_Bullet4 +__invoke(_Fn __f, _T1& __t1) { + return (*__t1).*__f; +} + +// fifth bullet + +template +inline _LIBCPP_INLINE_VISIBILITY +decltype(declval<_Fp&>()()) +__invoke(_Fp& __f) +{ + return __f(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +decltype(declval<_Fp&>()(declval<_A0&>())) +__invoke(_Fp& __f, _A0& __a0) +{ + return __f(__a0); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +decltype(declval<_Fp&>()(declval<_A0&>(), declval<_A1&>())) +__invoke(_Fp& __f, _A0& __a0, _A1& __a1) +{ + return __f(__a0, __a1); +} + +template +inline _LIBCPP_INLINE_VISIBILITY +decltype(declval<_Fp&>()(declval<_A0&>(), declval<_A1&>(), declval<_A2&>())) +__invoke(_Fp& __f, _A0& __a0, _A1& __a1, _A2& __a2) +{ + return __f(__a0, __a1, __a2); +} + +template >::value> +struct __invoke_return +{ + typedef typename __weak_result_type<_Fp>::result_type type; +}; + +template +struct __invoke_return<_Fp, false> +{ + typedef decltype(_VSTD::__invoke(declval<_Fp&>())) type; +}; + +template +struct __invoke_return0 +{ + typedef decltype(_VSTD::__invoke(declval<_Tp&>(), declval<_A0&>())) type; +}; + +template +struct __invoke_return0<_Rp _Tp::*, _A0> +{ + typedef typename __enable_invoke<_Rp _Tp::*, _A0>::type type; +}; + +template +struct __invoke_return1 +{ + typedef decltype(_VSTD::__invoke(declval<_Tp&>(), declval<_A0&>(), + declval<_A1&>())) type; +}; + +template +struct __invoke_return1<_Rp _Class::*, _A0, _A1> { + typedef typename __enable_invoke<_Rp _Class::*, _A0>::type type; +}; + +template +struct __invoke_return2 +{ + typedef decltype(_VSTD::__invoke(declval<_Tp&>(), declval<_A0&>(), + declval<_A1&>(), + declval<_A2&>())) type; +}; + +template +struct __invoke_return2<_Ret _Class::*, _A0, _A1, _A2> { + typedef typename __enable_invoke<_Ret _Class::*, _A0>::type type; +}; + +#endif // !defined(_LIBCPP_CXX03_LANG) + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL_WEAK_RESULT_TYPE_H diff --git a/libcxx/include/__functional_base b/libcxx/include/__functional_base index 479dfcf841b24..ccc3f3a58ca5c 100644 --- a/libcxx/include/__functional_base +++ b/libcxx/include/__functional_base @@ -11,7 +11,14 @@ #define _LIBCPP_FUNCTIONAL_BASE #include <__config> +#include <__functional/binary_function.h> +#include <__functional/invoke.h> +#include <__functional/operations.h> +#include <__functional/reference_wrapper.h> #include <__functional/unary_function.h> +#include <__functional/weak_result_type.h> +#include <__memory/allocator_arg_t.h> +#include <__memory/uses_allocator.h> #include #include #include @@ -22,675 +29,4 @@ #pragma GCC system_header #endif -_LIBCPP_BEGIN_NAMESPACE_STD - -template -struct _LIBCPP_TEMPLATE_VIS binary_function -{ - typedef _Arg1 first_argument_type; - typedef _Arg2 second_argument_type; - typedef _Result result_type; -}; - -template -struct __has_result_type -{ -private: - struct __two {char __lx; char __lxx;}; - template static __two __test(...); - template static char __test(typename _Up::result_type* = 0); -public: - static const bool value = sizeof(__test<_Tp>(0)) == 1; -}; - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS less -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, bool> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef bool __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - bool operator()(const _Tp& __x, const _Tp& __y) const - {return __x < __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS less -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) < _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) < _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) < _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - -// __weak_result_type - -template -struct __derives_from_unary_function -{ -private: - struct __two {char __lx; char __lxx;}; - static __two __test(...); - template - static unary_function<_Ap, _Rp> - __test(const volatile unary_function<_Ap, _Rp>*); -public: - static const bool value = !is_same::value; - typedef decltype(__test((_Tp*)0)) type; -}; - -template -struct __derives_from_binary_function -{ -private: - struct __two {char __lx; char __lxx;}; - static __two __test(...); - template - static binary_function<_A1, _A2, _Rp> - __test(const volatile binary_function<_A1, _A2, _Rp>*); -public: - static const bool value = !is_same::value; - typedef decltype(__test((_Tp*)0)) type; -}; - -template ::value> -struct __maybe_derive_from_unary_function // bool is true - : public __derives_from_unary_function<_Tp>::type -{ -}; - -template -struct __maybe_derive_from_unary_function<_Tp, false> -{ -}; - -template ::value> -struct __maybe_derive_from_binary_function // bool is true - : public __derives_from_binary_function<_Tp>::type -{ -}; - -template -struct __maybe_derive_from_binary_function<_Tp, false> -{ -}; - -template ::value> -struct __weak_result_type_imp // bool is true - : public __maybe_derive_from_unary_function<_Tp>, - public __maybe_derive_from_binary_function<_Tp> -{ - typedef _LIBCPP_NODEBUG_TYPE typename _Tp::result_type result_type; -}; - -template -struct __weak_result_type_imp<_Tp, false> - : public __maybe_derive_from_unary_function<_Tp>, - public __maybe_derive_from_binary_function<_Tp> -{ -}; - -template -struct __weak_result_type - : public __weak_result_type_imp<_Tp> -{ -}; - -// 0 argument case - -template -struct __weak_result_type<_Rp ()> -{ - typedef _LIBCPP_NODEBUG_TYPE _Rp result_type; -}; - -template -struct __weak_result_type<_Rp (&)()> -{ - typedef _LIBCPP_NODEBUG_TYPE _Rp result_type; -}; - -template -struct __weak_result_type<_Rp (*)()> -{ - typedef _LIBCPP_NODEBUG_TYPE _Rp result_type; -}; - -// 1 argument case - -template -struct __weak_result_type<_Rp (_A1)> - : public unary_function<_A1, _Rp> -{ -}; - -template -struct __weak_result_type<_Rp (&)(_A1)> - : public unary_function<_A1, _Rp> -{ -}; - -template -struct __weak_result_type<_Rp (*)(_A1)> - : public unary_function<_A1, _Rp> -{ -}; - -template -struct __weak_result_type<_Rp (_Cp::*)()> - : public unary_function<_Cp*, _Rp> -{ -}; - -template -struct __weak_result_type<_Rp (_Cp::*)() const> - : public unary_function -{ -}; - -template -struct __weak_result_type<_Rp (_Cp::*)() volatile> - : public unary_function -{ -}; - -template -struct __weak_result_type<_Rp (_Cp::*)() const volatile> - : public unary_function -{ -}; - -// 2 argument case - -template -struct __weak_result_type<_Rp (_A1, _A2)> - : public binary_function<_A1, _A2, _Rp> -{ -}; - -template -struct __weak_result_type<_Rp (*)(_A1, _A2)> - : public binary_function<_A1, _A2, _Rp> -{ -}; - -template -struct __weak_result_type<_Rp (&)(_A1, _A2)> - : public binary_function<_A1, _A2, _Rp> -{ -}; - -template -struct __weak_result_type<_Rp (_Cp::*)(_A1)> - : public binary_function<_Cp*, _A1, _Rp> -{ -}; - -template -struct __weak_result_type<_Rp (_Cp::*)(_A1) const> - : public binary_function -{ -}; - -template -struct __weak_result_type<_Rp (_Cp::*)(_A1) volatile> - : public binary_function -{ -}; - -template -struct __weak_result_type<_Rp (_Cp::*)(_A1) const volatile> - : public binary_function -{ -}; - - -#ifndef _LIBCPP_CXX03_LANG -// 3 or more arguments - -template -struct __weak_result_type<_Rp (_A1, _A2, _A3, _A4...)> -{ - typedef _Rp result_type; -}; - -template -struct __weak_result_type<_Rp (&)(_A1, _A2, _A3, _A4...)> -{ - typedef _Rp result_type; -}; - -template -struct __weak_result_type<_Rp (*)(_A1, _A2, _A3, _A4...)> -{ - typedef _Rp result_type; -}; - -template -struct __weak_result_type<_Rp (_Cp::*)(_A1, _A2, _A3...)> -{ - typedef _Rp result_type; -}; - -template -struct __weak_result_type<_Rp (_Cp::*)(_A1, _A2, _A3...) const> -{ - typedef _Rp result_type; -}; - -template -struct __weak_result_type<_Rp (_Cp::*)(_A1, _A2, _A3...) volatile> -{ - typedef _Rp result_type; -}; - -template -struct __weak_result_type<_Rp (_Cp::*)(_A1, _A2, _A3...) const volatile> -{ - typedef _Rp result_type; -}; - -template -struct __invoke_return -{ - typedef decltype(_VSTD::__invoke(declval<_Tp>(), declval<_Args>()...)) type; -}; - -#else // defined(_LIBCPP_CXX03_LANG) - -#include <__functional_base_03> - -#endif // !defined(_LIBCPP_CXX03_LANG) - - -template ::value> -struct __invoke_void_return_wrapper -{ -#ifndef _LIBCPP_CXX03_LANG - template - static _Ret __call(_Args&&... __args) { - return _VSTD::__invoke(_VSTD::forward<_Args>(__args)...); - } -#else - template - static _Ret __call(_Fn __f) { - return _VSTD::__invoke(__f); - } - - template - static _Ret __call(_Fn __f, _A0& __a0) { - return _VSTD::__invoke(__f, __a0); - } - - template - static _Ret __call(_Fn __f, _A0& __a0, _A1& __a1) { - return _VSTD::__invoke(__f, __a0, __a1); - } - - template - static _Ret __call(_Fn __f, _A0& __a0, _A1& __a1, _A2& __a2){ - return _VSTD::__invoke(__f, __a0, __a1, __a2); - } -#endif -}; - -template -struct __invoke_void_return_wrapper<_Ret, true> -{ -#ifndef _LIBCPP_CXX03_LANG - template - static void __call(_Args&&... __args) { - _VSTD::__invoke(_VSTD::forward<_Args>(__args)...); - } -#else - template - static void __call(_Fn __f) { - _VSTD::__invoke(__f); - } - - template - static void __call(_Fn __f, _A0& __a0) { - _VSTD::__invoke(__f, __a0); - } - - template - static void __call(_Fn __f, _A0& __a0, _A1& __a1) { - _VSTD::__invoke(__f, __a0, __a1); - } - - template - static void __call(_Fn __f, _A0& __a0, _A1& __a1, _A2& __a2) { - _VSTD::__invoke(__f, __a0, __a1, __a2); - } -#endif -}; - -template -class _LIBCPP_TEMPLATE_VIS reference_wrapper -#if _LIBCPP_STD_VER <= 17 || !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : public __weak_result_type<_Tp> -#endif -{ -public: - // types - typedef _Tp type; -private: - type* __f_; - -#ifndef _LIBCPP_CXX03_LANG - static void __fun(_Tp&) _NOEXCEPT; - static void __fun(_Tp&&) = delete; -#endif - -public: - // construct/copy/destroy -#ifdef _LIBCPP_CXX03_LANG - _LIBCPP_INLINE_VISIBILITY - reference_wrapper(type& __f) _NOEXCEPT - : __f_(_VSTD::addressof(__f)) {} -#else - template ::value, decltype(__fun(declval<_Up>())) >> - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - reference_wrapper(_Up&& __u) _NOEXCEPT_(noexcept(__fun(declval<_Up>()))) { - type& __f = static_cast<_Up&&>(__u); - __f_ = _VSTD::addressof(__f); - } -#endif - - // access - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - operator type&() const _NOEXCEPT {return *__f_;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - type& get() const _NOEXCEPT {return *__f_;} - -#ifndef _LIBCPP_CXX03_LANG - // invoke - template - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - typename __invoke_of::type - operator() (_ArgTypes&&... __args) const { - return _VSTD::__invoke(get(), _VSTD::forward<_ArgTypes>(__args)...); - } -#else - - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return::type - operator() () const { - return _VSTD::__invoke(get()); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return0::type - operator() (_A0& __a0) const { - return _VSTD::__invoke(get(), __a0); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return0::type - operator() (_A0 const& __a0) const { - return _VSTD::__invoke(get(), __a0); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return1::type - operator() (_A0& __a0, _A1& __a1) const { - return _VSTD::__invoke(get(), __a0, __a1); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return1::type - operator() (_A0 const& __a0, _A1& __a1) const { - return _VSTD::__invoke(get(), __a0, __a1); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return1::type - operator() (_A0& __a0, _A1 const& __a1) const { - return _VSTD::__invoke(get(), __a0, __a1); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return1::type - operator() (_A0 const& __a0, _A1 const& __a1) const { - return _VSTD::__invoke(get(), __a0, __a1); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0& __a0, _A1& __a1, _A2& __a2) const { - return _VSTD::__invoke(get(), __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0 const& __a0, _A1& __a1, _A2& __a2) const { - return _VSTD::__invoke(get(), __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0& __a0, _A1 const& __a1, _A2& __a2) const { - return _VSTD::__invoke(get(), __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0& __a0, _A1& __a1, _A2 const& __a2) const { - return _VSTD::__invoke(get(), __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0 const& __a0, _A1 const& __a1, _A2& __a2) const { - return _VSTD::__invoke(get(), __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0 const& __a0, _A1& __a1, _A2 const& __a2) const { - return _VSTD::__invoke(get(), __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0& __a0, _A1 const& __a1, _A2 const& __a2) const { - return _VSTD::__invoke(get(), __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0 const& __a0, _A1 const& __a1, _A2 const& __a2) const { - return _VSTD::__invoke(get(), __a0, __a1, __a2); - } -#endif // _LIBCPP_CXX03_LANG -}; - -#ifndef _LIBCPP_HAS_NO_DEDUCTION_GUIDES -template -reference_wrapper(_Tp&) -> reference_wrapper<_Tp>; -#endif - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 -reference_wrapper<_Tp> -ref(_Tp& __t) _NOEXCEPT -{ - return reference_wrapper<_Tp>(__t); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 -reference_wrapper<_Tp> -ref(reference_wrapper<_Tp> __t) _NOEXCEPT -{ - return _VSTD::ref(__t.get()); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 -reference_wrapper -cref(const _Tp& __t) _NOEXCEPT -{ - return reference_wrapper(__t); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 -reference_wrapper -cref(reference_wrapper<_Tp> __t) _NOEXCEPT -{ - return _VSTD::cref(__t.get()); -} - -#ifndef _LIBCPP_CXX03_LANG -template void ref(const _Tp&&) = delete; -template void cref(const _Tp&&) = delete; -#endif - -#if _LIBCPP_STD_VER > 11 -template -struct __is_transparent : false_type {}; - -template -struct __is_transparent<_Tp, _Up, - typename __void_t::type> - : true_type {}; -#endif - -// allocator_arg_t - -struct _LIBCPP_TEMPLATE_VIS allocator_arg_t { explicit allocator_arg_t() = default; }; - -#if defined(_LIBCPP_CXX03_LANG) || defined(_LIBCPP_BUILDING_LIBRARY) -extern _LIBCPP_EXPORTED_FROM_ABI const allocator_arg_t allocator_arg; -#else -/* _LIBCPP_INLINE_VAR */ constexpr allocator_arg_t allocator_arg = allocator_arg_t(); -#endif - -// uses_allocator - -template -struct __has_allocator_type -{ -private: - struct __two {char __lx; char __lxx;}; - template static __two __test(...); - template static char __test(typename _Up::allocator_type* = 0); -public: - static const bool value = sizeof(__test<_Tp>(0)) == 1; -}; - -template ::value> -struct __uses_allocator - : public integral_constant::value> -{ -}; - -template -struct __uses_allocator<_Tp, _Alloc, false> - : public false_type -{ -}; - -template -struct _LIBCPP_TEMPLATE_VIS uses_allocator - : public __uses_allocator<_Tp, _Alloc> -{ -}; - -#if _LIBCPP_STD_VER > 14 -template -_LIBCPP_INLINE_VAR constexpr size_t uses_allocator_v = uses_allocator<_Tp, _Alloc>::value; -#endif - -#ifndef _LIBCPP_CXX03_LANG - -// allocator construction - -template -struct __uses_alloc_ctor_imp -{ - typedef _LIBCPP_NODEBUG_TYPE typename __uncvref<_Alloc>::type _RawAlloc; - static const bool __ua = uses_allocator<_Tp, _RawAlloc>::value; - static const bool __ic = - is_constructible<_Tp, allocator_arg_t, _Alloc, _Args...>::value; - static const int value = __ua ? 2 - __ic : 0; -}; - -template -struct __uses_alloc_ctor - : integral_constant::value> - {}; - -template -inline _LIBCPP_INLINE_VISIBILITY -void __user_alloc_construct_impl (integral_constant, _Tp *__storage, const _Allocator &, _Args &&... __args ) -{ - new (__storage) _Tp (_VSTD::forward<_Args>(__args)...); -} - -// FIXME: This should have a version which takes a non-const alloc. -template -inline _LIBCPP_INLINE_VISIBILITY -void __user_alloc_construct_impl (integral_constant, _Tp *__storage, const _Allocator &__a, _Args &&... __args ) -{ - new (__storage) _Tp (allocator_arg, __a, _VSTD::forward<_Args>(__args)...); -} - -// FIXME: This should have a version which takes a non-const alloc. -template -inline _LIBCPP_INLINE_VISIBILITY -void __user_alloc_construct_impl (integral_constant, _Tp *__storage, const _Allocator &__a, _Args &&... __args ) -{ - new (__storage) _Tp (_VSTD::forward<_Args>(__args)..., __a); -} - -#endif // _LIBCPP_CXX03_LANG - -#if _LIBCPP_STD_VER > 14 - -template -_LIBCPP_CONSTEXPR_AFTER_CXX17 invoke_result_t<_Fn, _Args...> -invoke(_Fn&& __f, _Args&&... __args) - noexcept(is_nothrow_invocable_v<_Fn, _Args...>) -{ - return _VSTD::__invoke(_VSTD::forward<_Fn>(__f), _VSTD::forward<_Args>(__args)...); -} - -#endif // _LIBCPP_STD_VER > 14 - -_LIBCPP_END_NAMESPACE_STD - #endif // _LIBCPP_FUNCTIONAL_BASE diff --git a/libcxx/include/__functional_base_03 b/libcxx/include/__functional_base_03 deleted file mode 100644 index 21b39a4bf8f02..0000000000000 --- a/libcxx/include/__functional_base_03 +++ /dev/null @@ -1,223 +0,0 @@ -// -*- C++ -*- -//===----------------------------------------------------------------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#ifndef _LIBCPP_FUNCTIONAL_BASE_03 -#define _LIBCPP_FUNCTIONAL_BASE_03 - -// manual variadic expansion for - -// __invoke - -template -struct __enable_invoke_imp; - -template -struct __enable_invoke_imp<_Ret, _T1, true, true> { - typedef _Ret _Bullet1; - typedef _Bullet1 type; -}; - -template -struct __enable_invoke_imp<_Ret, _T1, true, false> { - typedef _Ret _Bullet2; - typedef _Bullet2 type; -}; - -template -struct __enable_invoke_imp<_Ret, _T1, false, true> { - typedef typename add_lvalue_reference< - typename __apply_cv<_T1, _Ret>::type - >::type _Bullet3; - typedef _Bullet3 type; -}; - -template -struct __enable_invoke_imp<_Ret, _T1, false, false> { - typedef typename add_lvalue_reference< - typename __apply_cv()), _Ret>::type - >::type _Bullet4; - typedef _Bullet4 type; -}; - -template -struct __enable_invoke_imp<_Ret, _T1*, false, false> { - typedef typename add_lvalue_reference< - typename __apply_cv<_T1, _Ret>::type - >::type _Bullet4; - typedef _Bullet4 type; -}; - -template , - class _Ret = typename _Traits::_ReturnType, - class _Class = typename _Traits::_ClassType> -struct __enable_invoke : __enable_invoke_imp< - _Ret, _T1, - is_member_function_pointer<_Fn>::value, - is_base_of<_Class, typename remove_reference<_T1>::type>::value> -{ -}; - -__nat __invoke(__any, ...); - -// first bullet - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __enable_invoke<_Fn, _T1>::_Bullet1 -__invoke(_Fn __f, _T1& __t1) { - return (__t1.*__f)(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __enable_invoke<_Fn, _T1>::_Bullet1 -__invoke(_Fn __f, _T1& __t1, _A0& __a0) { - return (__t1.*__f)(__a0); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __enable_invoke<_Fn, _T1>::_Bullet1 -__invoke(_Fn __f, _T1& __t1, _A0& __a0, _A1& __a1) { - return (__t1.*__f)(__a0, __a1); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __enable_invoke<_Fn, _T1>::_Bullet1 -__invoke(_Fn __f, _T1& __t1, _A0& __a0, _A1& __a1, _A2& __a2) { - return (__t1.*__f)(__a0, __a1, __a2); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __enable_invoke<_Fn, _T1>::_Bullet2 -__invoke(_Fn __f, _T1& __t1) { - return ((*__t1).*__f)(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __enable_invoke<_Fn, _T1>::_Bullet2 -__invoke(_Fn __f, _T1& __t1, _A0& __a0) { - return ((*__t1).*__f)(__a0); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __enable_invoke<_Fn, _T1>::_Bullet2 -__invoke(_Fn __f, _T1& __t1, _A0& __a0, _A1& __a1) { - return ((*__t1).*__f)(__a0, __a1); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __enable_invoke<_Fn, _T1>::_Bullet2 -__invoke(_Fn __f, _T1& __t1, _A0& __a0, _A1& __a1, _A2& __a2) { - return ((*__t1).*__f)(__a0, __a1, __a2); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __enable_invoke<_Fn, _T1>::_Bullet3 -__invoke(_Fn __f, _T1& __t1) { - return __t1.*__f; -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __enable_invoke<_Fn, _T1>::_Bullet4 -__invoke(_Fn __f, _T1& __t1) { - return (*__t1).*__f; -} - -// fifth bullet - -template -inline _LIBCPP_INLINE_VISIBILITY -decltype(declval<_Fp&>()()) -__invoke(_Fp& __f) -{ - return __f(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -decltype(declval<_Fp&>()(declval<_A0&>())) -__invoke(_Fp& __f, _A0& __a0) -{ - return __f(__a0); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -decltype(declval<_Fp&>()(declval<_A0&>(), declval<_A1&>())) -__invoke(_Fp& __f, _A0& __a0, _A1& __a1) -{ - return __f(__a0, __a1); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -decltype(declval<_Fp&>()(declval<_A0&>(), declval<_A1&>(), declval<_A2&>())) -__invoke(_Fp& __f, _A0& __a0, _A1& __a1, _A2& __a2) -{ - return __f(__a0, __a1, __a2); -} - -template >::value> -struct __invoke_return -{ - typedef typename __weak_result_type<_Fp>::result_type type; -}; - -template -struct __invoke_return<_Fp, false> -{ - typedef decltype(_VSTD::__invoke(declval<_Fp&>())) type; -}; - -template -struct __invoke_return0 -{ - typedef decltype(_VSTD::__invoke(declval<_Tp&>(), declval<_A0&>())) type; -}; - -template -struct __invoke_return0<_Rp _Tp::*, _A0> -{ - typedef typename __enable_invoke<_Rp _Tp::*, _A0>::type type; -}; - -template -struct __invoke_return1 -{ - typedef decltype(_VSTD::__invoke(declval<_Tp&>(), declval<_A0&>(), - declval<_A1&>())) type; -}; - -template -struct __invoke_return1<_Rp _Class::*, _A0, _A1> { - typedef typename __enable_invoke<_Rp _Class::*, _A0>::type type; -}; - -template -struct __invoke_return2 -{ - typedef decltype(_VSTD::__invoke(declval<_Tp&>(), declval<_A0&>(), - declval<_A1&>(), - declval<_A2&>())) type; -}; - -template -struct __invoke_return2<_Ret _Class::*, _A0, _A1, _A2> { - typedef typename __enable_invoke<_Ret _Class::*, _A0>::type type; -}; -#endif // _LIBCPP_FUNCTIONAL_BASE_03 diff --git a/libcxx/include/__iterator/advance.h b/libcxx/include/__iterator/advance.h index fdac109f3a86c..4971bebfed864 100644 --- a/libcxx/include/__iterator/advance.h +++ b/libcxx/include/__iterator/advance.h @@ -16,6 +16,7 @@ #include <__iterator/concepts.h> #include <__iterator/incrementable_traits.h> #include <__iterator/iterator_traits.h> +#include #include #include #include diff --git a/libcxx/include/__iterator/back_insert_iterator.h b/libcxx/include/__iterator/back_insert_iterator.h new file mode 100644 index 0000000000000..61ac90dfffcac --- /dev/null +++ b/libcxx/include/__iterator/back_insert_iterator.h @@ -0,0 +1,75 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___ITERATOR_BACK_INSERT_ITERATOR_H +#define _LIBCPP___ITERATOR_BACK_INSERT_ITERATOR_H + +#include <__config> +#include <__iterator/iterator_traits.h> +#include <__iterator/iterator.h> +#include <__memory/addressof.h> +#include +#include // std::move + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +template +class _LIBCPP_TEMPLATE_VIS back_insert_iterator +#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) + : public iterator +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP +protected: + _Container* container; +public: + typedef output_iterator_tag iterator_category; + typedef void value_type; +#if _LIBCPP_STD_VER > 17 + typedef ptrdiff_t difference_type; +#else + typedef void difference_type; +#endif + typedef void pointer; + typedef void reference; + typedef _Container container_type; + + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 explicit back_insert_iterator(_Container& __x) : container(_VSTD::addressof(__x)) {} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 back_insert_iterator& operator=(const typename _Container::value_type& __value_) + {container->push_back(__value_); return *this;} +#ifndef _LIBCPP_CXX03_LANG + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 back_insert_iterator& operator=(typename _Container::value_type&& __value_) + {container->push_back(_VSTD::move(__value_)); return *this;} +#endif // _LIBCPP_CXX03_LANG + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 back_insert_iterator& operator*() {return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 back_insert_iterator& operator++() {return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 back_insert_iterator operator++(int) {return *this;} +}; + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 +back_insert_iterator<_Container> +back_inserter(_Container& __x) +{ + return back_insert_iterator<_Container>(__x); +} + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___ITERATOR_BACK_INSERT_ITERATOR_H diff --git a/libcxx/include/__iterator/concepts.h b/libcxx/include/__iterator/concepts.h index e3664db14ae26..94e5f5d0a6cc4 100644 --- a/libcxx/include/__iterator/concepts.h +++ b/libcxx/include/__iterator/concepts.h @@ -249,6 +249,9 @@ concept indirectly_movable_storable = constructible_from, iter_rvalue_reference_t<_In>> && assignable_from&, iter_rvalue_reference_t<_In>>; +// Note: indirectly_swappable is located in iter_swap.h to prevent a dependency cycle +// (both iter_swap and indirectly_swappable require indirectly_readable). + // clang-format on #endif // !defined(_LIBCPP_HAS_NO_RANGES) diff --git a/libcxx/include/__iterator/front_insert_iterator.h b/libcxx/include/__iterator/front_insert_iterator.h new file mode 100644 index 0000000000000..d5d86f51849cb --- /dev/null +++ b/libcxx/include/__iterator/front_insert_iterator.h @@ -0,0 +1,75 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___ITERATOR_FRONT_INSERT_ITERATOR_H +#define _LIBCPP___ITERATOR_FRONT_INSERT_ITERATOR_H + +#include <__config> +#include <__iterator/iterator_traits.h> +#include <__iterator/iterator.h> +#include <__memory/addressof.h> +#include +#include // std::move + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +template +class _LIBCPP_TEMPLATE_VIS front_insert_iterator +#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) + : public iterator +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP +protected: + _Container* container; +public: + typedef output_iterator_tag iterator_category; + typedef void value_type; +#if _LIBCPP_STD_VER > 17 + typedef ptrdiff_t difference_type; +#else + typedef void difference_type; +#endif + typedef void pointer; + typedef void reference; + typedef _Container container_type; + + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 explicit front_insert_iterator(_Container& __x) : container(_VSTD::addressof(__x)) {} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 front_insert_iterator& operator=(const typename _Container::value_type& __value_) + {container->push_front(__value_); return *this;} +#ifndef _LIBCPP_CXX03_LANG + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 front_insert_iterator& operator=(typename _Container::value_type&& __value_) + {container->push_front(_VSTD::move(__value_)); return *this;} +#endif // _LIBCPP_CXX03_LANG + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 front_insert_iterator& operator*() {return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 front_insert_iterator& operator++() {return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 front_insert_iterator operator++(int) {return *this;} +}; + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 +front_insert_iterator<_Container> +front_inserter(_Container& __x) +{ + return front_insert_iterator<_Container>(__x); +} + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___ITERATOR_FRONT_INSERT_ITERATOR_H diff --git a/libcxx/include/__iterator/insert_iterator.h b/libcxx/include/__iterator/insert_iterator.h new file mode 100644 index 0000000000000..40555a4c9d349 --- /dev/null +++ b/libcxx/include/__iterator/insert_iterator.h @@ -0,0 +1,77 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___ITERATOR_INSERT_ITERATOR_H +#define _LIBCPP___ITERATOR_INSERT_ITERATOR_H + +#include <__config> +#include <__iterator/iterator_traits.h> +#include <__iterator/iterator.h> +#include <__memory/addressof.h> +#include +#include // std::move + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +template +class _LIBCPP_TEMPLATE_VIS insert_iterator +#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) + : public iterator +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP +protected: + _Container* container; + typename _Container::iterator iter; // FIXME: `ranges::iterator_t` in C++20 mode +public: + typedef output_iterator_tag iterator_category; + typedef void value_type; +#if _LIBCPP_STD_VER > 17 + typedef ptrdiff_t difference_type; +#else + typedef void difference_type; +#endif + typedef void pointer; + typedef void reference; + typedef _Container container_type; + + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator(_Container& __x, typename _Container::iterator __i) + : container(_VSTD::addressof(__x)), iter(__i) {} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator& operator=(const typename _Container::value_type& __value_) + {iter = container->insert(iter, __value_); ++iter; return *this;} +#ifndef _LIBCPP_CXX03_LANG + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator& operator=(typename _Container::value_type&& __value_) + {iter = container->insert(iter, _VSTD::move(__value_)); ++iter; return *this;} +#endif // _LIBCPP_CXX03_LANG + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator& operator*() {return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator& operator++() {return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator& operator++(int) {return *this;} +}; + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 +insert_iterator<_Container> +inserter(_Container& __x, typename _Container::iterator __i) +{ + return insert_iterator<_Container>(__x, __i); +} + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___ITERATOR_INSERT_ITERATOR_H diff --git a/libcxx/include/__iterator/istream_iterator.h b/libcxx/include/__iterator/istream_iterator.h new file mode 100644 index 0000000000000..1dd57f0d49cfd --- /dev/null +++ b/libcxx/include/__iterator/istream_iterator.h @@ -0,0 +1,104 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___ITERATOR_ISTREAM_ITERATOR_H +#define _LIBCPP___ITERATOR_ISTREAM_ITERATOR_H + +#include <__config> +#include <__iterator/iterator_traits.h> +#include <__iterator/iterator.h> +#include <__memory/addressof.h> +#include +#include // for forward declarations of char_traits and basic_istream + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +template , class _Distance = ptrdiff_t> +class _LIBCPP_TEMPLATE_VIS istream_iterator +#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) + : public iterator +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP +public: + typedef input_iterator_tag iterator_category; + typedef _Tp value_type; + typedef _Distance difference_type; + typedef const _Tp* pointer; + typedef const _Tp& reference; + typedef _CharT char_type; + typedef _Traits traits_type; + typedef basic_istream<_CharT,_Traits> istream_type; +private: + istream_type* __in_stream_; + _Tp __value_; +public: + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR istream_iterator() : __in_stream_(nullptr), __value_() {} + _LIBCPP_INLINE_VISIBILITY istream_iterator(istream_type& __s) : __in_stream_(_VSTD::addressof(__s)) + { + if (!(*__in_stream_ >> __value_)) + __in_stream_ = nullptr; + } + + _LIBCPP_INLINE_VISIBILITY const _Tp& operator*() const {return __value_;} + _LIBCPP_INLINE_VISIBILITY const _Tp* operator->() const {return _VSTD::addressof((operator*()));} + _LIBCPP_INLINE_VISIBILITY istream_iterator& operator++() + { + if (!(*__in_stream_ >> __value_)) + __in_stream_ = nullptr; + return *this; + } + _LIBCPP_INLINE_VISIBILITY istream_iterator operator++(int) + {istream_iterator __t(*this); ++(*this); return __t;} + + template + friend _LIBCPP_INLINE_VISIBILITY + bool + operator==(const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __x, + const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __y); + + template + friend _LIBCPP_INLINE_VISIBILITY + bool + operator==(const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __x, + const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __y); +}; + +template +inline _LIBCPP_INLINE_VISIBILITY +bool +operator==(const istream_iterator<_Tp, _CharT, _Traits, _Distance>& __x, + const istream_iterator<_Tp, _CharT, _Traits, _Distance>& __y) +{ + return __x.__in_stream_ == __y.__in_stream_; +} + +template +inline _LIBCPP_INLINE_VISIBILITY +bool +operator!=(const istream_iterator<_Tp, _CharT, _Traits, _Distance>& __x, + const istream_iterator<_Tp, _CharT, _Traits, _Distance>& __y) +{ + return !(__x == __y); +} + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___ITERATOR_ISTREAM_ITERATOR_H diff --git a/libcxx/include/__iterator/istreambuf_iterator.h b/libcxx/include/__iterator/istreambuf_iterator.h new file mode 100644 index 0000000000000..910d57efc3ba9 --- /dev/null +++ b/libcxx/include/__iterator/istreambuf_iterator.h @@ -0,0 +1,110 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___ITERATOR_ISTREAMBUF_ITERATOR_H +#define _LIBCPP___ITERATOR_ISTREAMBUF_ITERATOR_H + +#include <__config> +#include <__iterator/iterator_traits.h> +#include <__iterator/iterator.h> +#include // for forward declaration of basic_streambuf + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +template +class _LIBCPP_TEMPLATE_VIS istreambuf_iterator +#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) + : public iterator +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP +public: + typedef input_iterator_tag iterator_category; + typedef _CharT value_type; + typedef typename _Traits::off_type difference_type; + typedef _CharT* pointer; + typedef _CharT reference; + typedef _CharT char_type; + typedef _Traits traits_type; + typedef typename _Traits::int_type int_type; + typedef basic_streambuf<_CharT,_Traits> streambuf_type; + typedef basic_istream<_CharT,_Traits> istream_type; +private: + mutable streambuf_type* __sbuf_; + + class __proxy + { + char_type __keep_; + streambuf_type* __sbuf_; + _LIBCPP_INLINE_VISIBILITY __proxy(char_type __c, streambuf_type* __s) + : __keep_(__c), __sbuf_(__s) {} + friend class istreambuf_iterator; + public: + _LIBCPP_INLINE_VISIBILITY char_type operator*() const {return __keep_;} + }; + + _LIBCPP_INLINE_VISIBILITY + bool __test_for_eof() const + { + if (__sbuf_ && traits_type::eq_int_type(__sbuf_->sgetc(), traits_type::eof())) + __sbuf_ = nullptr; + return __sbuf_ == nullptr; + } +public: + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR istreambuf_iterator() _NOEXCEPT : __sbuf_(nullptr) {} + _LIBCPP_INLINE_VISIBILITY istreambuf_iterator(istream_type& __s) _NOEXCEPT + : __sbuf_(__s.rdbuf()) {} + _LIBCPP_INLINE_VISIBILITY istreambuf_iterator(streambuf_type* __s) _NOEXCEPT + : __sbuf_(__s) {} + _LIBCPP_INLINE_VISIBILITY istreambuf_iterator(const __proxy& __p) _NOEXCEPT + : __sbuf_(__p.__sbuf_) {} + + _LIBCPP_INLINE_VISIBILITY char_type operator*() const + {return static_cast(__sbuf_->sgetc());} + _LIBCPP_INLINE_VISIBILITY istreambuf_iterator& operator++() + { + __sbuf_->sbumpc(); + return *this; + } + _LIBCPP_INLINE_VISIBILITY __proxy operator++(int) + { + return __proxy(__sbuf_->sbumpc(), __sbuf_); + } + + _LIBCPP_INLINE_VISIBILITY bool equal(const istreambuf_iterator& __b) const + {return __test_for_eof() == __b.__test_for_eof();} +}; + +template +inline _LIBCPP_INLINE_VISIBILITY +bool operator==(const istreambuf_iterator<_CharT,_Traits>& __a, + const istreambuf_iterator<_CharT,_Traits>& __b) + {return __a.equal(__b);} + +template +inline _LIBCPP_INLINE_VISIBILITY +bool operator!=(const istreambuf_iterator<_CharT,_Traits>& __a, + const istreambuf_iterator<_CharT,_Traits>& __b) + {return !__a.equal(__b);} + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___ITERATOR_ISTREAMBUF_ITERATOR_H diff --git a/libcxx/include/__iterator/iter_swap.h b/libcxx/include/__iterator/iter_swap.h index a529472e2a13d..17153728f0846 100644 --- a/libcxx/include/__iterator/iter_swap.h +++ b/libcxx/include/__iterator/iter_swap.h @@ -85,6 +85,16 @@ inline namespace __cpo { } // namespace ranges +template +concept indirectly_swappable = + indirectly_readable<_I1> && indirectly_readable<_I2> && + requires(const _I1 __i1, const _I2 __i2) { + ranges::iter_swap(__i1, __i1); + ranges::iter_swap(__i2, __i2); + ranges::iter_swap(__i1, __i2); + ranges::iter_swap(__i2, __i1); + }; + #endif // !defined(_LIBCPP_HAS_NO_RANGES) _LIBCPP_END_NAMESPACE_STD diff --git a/libcxx/include/__iterator/iterator.h b/libcxx/include/__iterator/iterator.h new file mode 100644 index 0000000000000..dfd481e357120 --- /dev/null +++ b/libcxx/include/__iterator/iterator.h @@ -0,0 +1,40 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___ITERATOR_ITERATOR_H +#define _LIBCPP___ITERATOR_ITERATOR_H + +#include <__config> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +template +struct _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX17 iterator +{ + typedef _Tp value_type; + typedef _Distance difference_type; + typedef _Pointer pointer; + typedef _Reference reference; + typedef _Category iterator_category; +}; + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___ITERATOR_ITERATOR_H diff --git a/libcxx/include/__iterator/move_iterator.h b/libcxx/include/__iterator/move_iterator.h new file mode 100644 index 0000000000000..7819743bdb396 --- /dev/null +++ b/libcxx/include/__iterator/move_iterator.h @@ -0,0 +1,189 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___ITERATOR_MOVE_ITERATOR_H +#define _LIBCPP___ITERATOR_MOVE_ITERATOR_H + +#include <__config> +#include <__iterator/iterator_traits.h> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +template +class _LIBCPP_TEMPLATE_VIS move_iterator +{ +private: + _Iter __i; +public: + typedef _Iter iterator_type; + typedef typename iterator_traits::value_type value_type; + typedef typename iterator_traits::difference_type difference_type; + typedef iterator_type pointer; + typedef _If<__is_cpp17_random_access_iterator<_Iter>::value, + random_access_iterator_tag, + typename iterator_traits<_Iter>::iterator_category> iterator_category; +#if _LIBCPP_STD_VER > 17 + typedef input_iterator_tag iterator_concept; +#endif + +#ifndef _LIBCPP_CXX03_LANG + typedef typename iterator_traits::reference __reference; + typedef typename conditional< + is_reference<__reference>::value, + typename remove_reference<__reference>::type&&, + __reference + >::type reference; +#else + typedef typename iterator_traits::reference reference; +#endif + + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + move_iterator() : __i() {} + + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + explicit move_iterator(_Iter __x) : __i(__x) {} + + template ::value && is_convertible<_Up const&, _Iter>::value + > > + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + move_iterator(const move_iterator<_Up>& __u) : __i(__u.base()) {} + + template ::value && + is_convertible<_Up const&, _Iter>::value && + is_assignable<_Iter&, _Up const&>::value + > > + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + move_iterator& operator=(const move_iterator<_Up>& __u) { + __i = __u.base(); + return *this; + } + + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 _Iter base() const {return __i;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reference operator*() const { return static_cast(*__i); } + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + pointer operator->() const { return __i;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + move_iterator& operator++() {++__i; return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + move_iterator operator++(int) {move_iterator __tmp(*this); ++__i; return __tmp;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + move_iterator& operator--() {--__i; return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + move_iterator operator--(int) {move_iterator __tmp(*this); --__i; return __tmp;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + move_iterator operator+ (difference_type __n) const {return move_iterator(__i + __n);} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + move_iterator& operator+=(difference_type __n) {__i += __n; return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + move_iterator operator- (difference_type __n) const {return move_iterator(__i - __n);} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + move_iterator& operator-=(difference_type __n) {__i -= __n; return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reference operator[](difference_type __n) const { return static_cast(__i[__n]); } +}; + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator==(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) +{ + return __x.base() == __y.base(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator<(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) +{ + return __x.base() < __y.base(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator!=(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) +{ + return __x.base() != __y.base(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator>(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) +{ + return __x.base() > __y.base(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator>=(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) +{ + return __x.base() >= __y.base(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator<=(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) +{ + return __x.base() <= __y.base(); +} + +#ifndef _LIBCPP_CXX03_LANG +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +auto +operator-(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) +-> decltype(__x.base() - __y.base()) +{ + return __x.base() - __y.base(); +} +#else +template +inline _LIBCPP_INLINE_VISIBILITY +typename move_iterator<_Iter1>::difference_type +operator-(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) +{ + return __x.base() - __y.base(); +} +#endif + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +move_iterator<_Iter> +operator+(typename move_iterator<_Iter>::difference_type __n, const move_iterator<_Iter>& __x) +{ + return move_iterator<_Iter>(__x.base() + __n); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +move_iterator<_Iter> +make_move_iterator(_Iter __i) +{ + return move_iterator<_Iter>(__i); +} + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___ITERATOR_MOVE_ITERATOR_H diff --git a/libcxx/include/__iterator/ostream_iterator.h b/libcxx/include/__iterator/ostream_iterator.h new file mode 100644 index 0000000000000..2615b21b059fd --- /dev/null +++ b/libcxx/include/__iterator/ostream_iterator.h @@ -0,0 +1,76 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___ITERATOR_OSTREAM_ITERATOR_H +#define _LIBCPP___ITERATOR_OSTREAM_ITERATOR_H + +#include <__config> +#include <__iterator/iterator_traits.h> +#include <__iterator/iterator.h> +#include <__memory/addressof.h> +#include +#include // for forward declarations of char_traits and basic_ostream + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +template > +class _LIBCPP_TEMPLATE_VIS ostream_iterator +#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) + : public iterator +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP +public: + typedef output_iterator_tag iterator_category; + typedef void value_type; +#if _LIBCPP_STD_VER > 17 + typedef ptrdiff_t difference_type; +#else + typedef void difference_type; +#endif + typedef void pointer; + typedef void reference; + typedef _CharT char_type; + typedef _Traits traits_type; + typedef basic_ostream<_CharT, _Traits> ostream_type; + +private: + ostream_type* __out_stream_; + const char_type* __delim_; +public: + _LIBCPP_INLINE_VISIBILITY ostream_iterator(ostream_type& __s) _NOEXCEPT + : __out_stream_(_VSTD::addressof(__s)), __delim_(nullptr) {} + _LIBCPP_INLINE_VISIBILITY ostream_iterator(ostream_type& __s, const _CharT* __delimiter) _NOEXCEPT + : __out_stream_(_VSTD::addressof(__s)), __delim_(__delimiter) {} + _LIBCPP_INLINE_VISIBILITY ostream_iterator& operator=(const _Tp& __value_) + { + *__out_stream_ << __value_; + if (__delim_) + *__out_stream_ << __delim_; + return *this; + } + + _LIBCPP_INLINE_VISIBILITY ostream_iterator& operator*() {return *this;} + _LIBCPP_INLINE_VISIBILITY ostream_iterator& operator++() {return *this;} + _LIBCPP_INLINE_VISIBILITY ostream_iterator& operator++(int) {return *this;} +}; + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___ITERATOR_OSTREAM_ITERATOR_H diff --git a/libcxx/include/__iterator/ostreambuf_iterator.h b/libcxx/include/__iterator/ostreambuf_iterator.h new file mode 100644 index 0000000000000..4676fc70ffbeb --- /dev/null +++ b/libcxx/include/__iterator/ostreambuf_iterator.h @@ -0,0 +1,81 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___ITERATOR_OSTREAMBUF_ITERATOR_H +#define _LIBCPP___ITERATOR_OSTREAMBUF_ITERATOR_H + +#include <__config> +#include <__iterator/iterator_traits.h> +#include <__iterator/iterator.h> +#include // for forward declaration of basic_streambuf + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +template +class _LIBCPP_TEMPLATE_VIS ostreambuf_iterator +#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) + : public iterator +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP +public: + typedef output_iterator_tag iterator_category; + typedef void value_type; +#if _LIBCPP_STD_VER > 17 + typedef ptrdiff_t difference_type; +#else + typedef void difference_type; +#endif + typedef void pointer; + typedef void reference; + typedef _CharT char_type; + typedef _Traits traits_type; + typedef basic_streambuf<_CharT, _Traits> streambuf_type; + typedef basic_ostream<_CharT, _Traits> ostream_type; + +private: + streambuf_type* __sbuf_; +public: + _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator(ostream_type& __s) _NOEXCEPT + : __sbuf_(__s.rdbuf()) {} + _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator(streambuf_type* __s) _NOEXCEPT + : __sbuf_(__s) {} + _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator& operator=(_CharT __c) + { + if (__sbuf_ && traits_type::eq_int_type(__sbuf_->sputc(__c), traits_type::eof())) + __sbuf_ = nullptr; + return *this; + } + _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator& operator*() {return *this;} + _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator& operator++() {return *this;} + _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator& operator++(int) {return *this;} + _LIBCPP_INLINE_VISIBILITY bool failed() const _NOEXCEPT {return __sbuf_ == nullptr;} + + template + friend + _LIBCPP_HIDDEN + ostreambuf_iterator<_Ch, _Tr> + __pad_and_output(ostreambuf_iterator<_Ch, _Tr> __s, + const _Ch* __ob, const _Ch* __op, const _Ch* __oe, + ios_base& __iob, _Ch __fl); +}; + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___ITERATOR_OSTREAMBUF_ITERATOR_H diff --git a/libcxx/include/__iterator/reverse_iterator.h b/libcxx/include/__iterator/reverse_iterator.h new file mode 100644 index 0000000000000..77f7143b43057 --- /dev/null +++ b/libcxx/include/__iterator/reverse_iterator.h @@ -0,0 +1,239 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___ITERATOR_REVERSE_ITERATOR_H +#define _LIBCPP___ITERATOR_REVERSE_ITERATOR_H + +#include <__config> +#include <__iterator/iterator_traits.h> +#include <__iterator/iterator.h> +#include <__memory/addressof.h> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +template +struct __is_stashing_iterator : false_type {}; + +template +struct __is_stashing_iterator<_Tp, typename __void_t::type> + : true_type {}; + +_LIBCPP_SUPPRESS_DEPRECATED_PUSH +template +class _LIBCPP_TEMPLATE_VIS reverse_iterator +#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) + : public iterator::iterator_category, + typename iterator_traits<_Iter>::value_type, + typename iterator_traits<_Iter>::difference_type, + typename iterator_traits<_Iter>::pointer, + typename iterator_traits<_Iter>::reference> +#endif +{ +_LIBCPP_SUPPRESS_DEPRECATED_POP +private: +#ifndef _LIBCPP_ABI_NO_ITERATOR_BASES + _Iter __t; // no longer used as of LWG #2360, not removed due to ABI break +#endif + + static_assert(!__is_stashing_iterator<_Iter>::value, + "The specified iterator type cannot be used with reverse_iterator; " + "Using stashing iterators with reverse_iterator causes undefined behavior"); + +protected: + _Iter current; +public: + typedef _Iter iterator_type; + typedef typename iterator_traits<_Iter>::difference_type difference_type; + typedef typename iterator_traits<_Iter>::reference reference; + typedef typename iterator_traits<_Iter>::pointer pointer; + typedef _If<__is_cpp17_random_access_iterator<_Iter>::value, + random_access_iterator_tag, + typename iterator_traits<_Iter>::iterator_category> iterator_category; + typedef typename iterator_traits<_Iter>::value_type value_type; + +#if _LIBCPP_STD_VER > 17 + typedef _If<__is_cpp17_random_access_iterator<_Iter>::value, + random_access_iterator_tag, + bidirectional_iterator_tag> iterator_concept; +#endif + +#ifndef _LIBCPP_ABI_NO_ITERATOR_BASES + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator() : __t(), current() {} + + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + explicit reverse_iterator(_Iter __x) : __t(__x), current(__x) {} + + template ::value && is_convertible<_Up const&, _Iter>::value + > > + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator(const reverse_iterator<_Up>& __u) + : __t(__u.base()), current(__u.base()) + { } + + template ::value && + is_convertible<_Up const&, _Iter>::value && + is_assignable<_Up const&, _Iter>::value + > > + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator& operator=(const reverse_iterator<_Up>& __u) { + __t = current = __u.base(); + return *this; + } +#else + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator() : current() {} + + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + explicit reverse_iterator(_Iter __x) : current(__x) {} + + template ::value && is_convertible<_Up const&, _Iter>::value + > > + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator(const reverse_iterator<_Up>& __u) + : current(__u.base()) + { } + + template ::value && + is_convertible<_Up const&, _Iter>::value && + is_assignable<_Up const&, _Iter>::value + > > + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator& operator=(const reverse_iterator<_Up>& __u) { + current = __u.base(); + return *this; + } +#endif + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + _Iter base() const {return current;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reference operator*() const {_Iter __tmp = current; return *--__tmp;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + pointer operator->() const {return _VSTD::addressof(operator*());} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator& operator++() {--current; return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator operator++(int) {reverse_iterator __tmp(*this); --current; return __tmp;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator& operator--() {++current; return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator operator--(int) {reverse_iterator __tmp(*this); ++current; return __tmp;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator operator+ (difference_type __n) const {return reverse_iterator(current - __n);} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator& operator+=(difference_type __n) {current -= __n; return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator operator- (difference_type __n) const {return reverse_iterator(current + __n);} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reverse_iterator& operator-=(difference_type __n) {current += __n; return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 + reference operator[](difference_type __n) const {return *(*this + __n);} +}; + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator==(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) +{ + return __x.base() == __y.base(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator<(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) +{ + return __x.base() > __y.base(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator!=(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) +{ + return __x.base() != __y.base(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator>(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) +{ + return __x.base() < __y.base(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator>=(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) +{ + return __x.base() <= __y.base(); +} + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +bool +operator<=(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) +{ + return __x.base() >= __y.base(); +} + +#ifndef _LIBCPP_CXX03_LANG +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +auto +operator-(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) +-> decltype(__y.base() - __x.base()) +{ + return __y.base() - __x.base(); +} +#else +template +inline _LIBCPP_INLINE_VISIBILITY +typename reverse_iterator<_Iter1>::difference_type +operator-(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) +{ + return __y.base() - __x.base(); +} +#endif + +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +reverse_iterator<_Iter> +operator+(typename reverse_iterator<_Iter>::difference_type __n, const reverse_iterator<_Iter>& __x) +{ + return reverse_iterator<_Iter>(__x.base() - __n); +} + +#if _LIBCPP_STD_VER > 11 +template +inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 +reverse_iterator<_Iter> make_reverse_iterator(_Iter __i) +{ + return reverse_iterator<_Iter>(__i); +} +#endif + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___ITERATOR_REVERSE_ITERATOR_H diff --git a/libcxx/include/__iterator/wrap_iter.h b/libcxx/include/__iterator/wrap_iter.h new file mode 100644 index 0000000000000..4f2228c893d76 --- /dev/null +++ b/libcxx/include/__iterator/wrap_iter.h @@ -0,0 +1,254 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___ITERATOR_WRAP_ITER_H +#define _LIBCPP___ITERATOR_WRAP_ITER_H + +#include <__config> +#include <__debug> +#include <__iterator/iterator_traits.h> +#include <__memory/pointer_traits.h> // __to_address +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_PUSH_MACROS +#include <__undef_macros> + +_LIBCPP_BEGIN_NAMESPACE_STD + +template +class __wrap_iter +{ +public: + typedef _Iter iterator_type; + typedef typename iterator_traits::value_type value_type; + typedef typename iterator_traits::difference_type difference_type; + typedef typename iterator_traits::pointer pointer; + typedef typename iterator_traits::reference reference; + typedef typename iterator_traits::iterator_category iterator_category; +#if _LIBCPP_STD_VER > 17 + typedef contiguous_iterator_tag iterator_concept; +#endif + +private: + iterator_type __i; +public: + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter() _NOEXCEPT +#if _LIBCPP_STD_VER > 11 + : __i{} +#endif + { +#if _LIBCPP_DEBUG_LEVEL == 2 + __get_db()->__insert_i(this); +#endif + } + template _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG + __wrap_iter(const __wrap_iter<_Up>& __u, + typename enable_if::value>::type* = nullptr) _NOEXCEPT + : __i(__u.base()) + { +#if _LIBCPP_DEBUG_LEVEL == 2 + __get_db()->__iterator_copy(this, &__u); +#endif + } +#if _LIBCPP_DEBUG_LEVEL == 2 + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG + __wrap_iter(const __wrap_iter& __x) + : __i(__x.base()) + { + __get_db()->__iterator_copy(this, &__x); + } + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG + __wrap_iter& operator=(const __wrap_iter& __x) + { + if (this != &__x) + { + __get_db()->__iterator_copy(this, &__x); + __i = __x.__i; + } + return *this; + } + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG + ~__wrap_iter() + { + __get_db()->__erase_i(this); + } +#endif + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG reference operator*() const _NOEXCEPT + { +#if _LIBCPP_DEBUG_LEVEL == 2 + _LIBCPP_ASSERT(__get_const_db()->__dereferenceable(this), + "Attempted to dereference a non-dereferenceable iterator"); +#endif + return *__i; + } + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG pointer operator->() const _NOEXCEPT + { +#if _LIBCPP_DEBUG_LEVEL == 2 + _LIBCPP_ASSERT(__get_const_db()->__dereferenceable(this), + "Attempted to dereference a non-dereferenceable iterator"); +#endif + return _VSTD::__to_address(__i); + } + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter& operator++() _NOEXCEPT + { +#if _LIBCPP_DEBUG_LEVEL == 2 + _LIBCPP_ASSERT(__get_const_db()->__dereferenceable(this), + "Attempted to increment a non-incrementable iterator"); +#endif + ++__i; + return *this; + } + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter operator++(int) _NOEXCEPT + {__wrap_iter __tmp(*this); ++(*this); return __tmp;} + + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter& operator--() _NOEXCEPT + { +#if _LIBCPP_DEBUG_LEVEL == 2 + _LIBCPP_ASSERT(__get_const_db()->__decrementable(this), + "Attempted to decrement a non-decrementable iterator"); +#endif + --__i; + return *this; + } + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter operator--(int) _NOEXCEPT + {__wrap_iter __tmp(*this); --(*this); return __tmp;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter operator+ (difference_type __n) const _NOEXCEPT + {__wrap_iter __w(*this); __w += __n; return __w;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter& operator+=(difference_type __n) _NOEXCEPT + { +#if _LIBCPP_DEBUG_LEVEL == 2 + _LIBCPP_ASSERT(__get_const_db()->__addable(this, __n), + "Attempted to add/subtract an iterator outside its valid range"); +#endif + __i += __n; + return *this; + } + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter operator- (difference_type __n) const _NOEXCEPT + {return *this + (-__n);} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter& operator-=(difference_type __n) _NOEXCEPT + {*this += -__n; return *this;} + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG reference operator[](difference_type __n) const _NOEXCEPT + { +#if _LIBCPP_DEBUG_LEVEL == 2 + _LIBCPP_ASSERT(__get_const_db()->__subscriptable(this, __n), + "Attempted to subscript an iterator outside its valid range"); +#endif + return __i[__n]; + } + + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG iterator_type base() const _NOEXCEPT {return __i;} + +private: +#if _LIBCPP_DEBUG_LEVEL == 2 + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter(const void* __p, iterator_type __x) : __i(__x) + { + __get_db()->__insert_ic(this, __p); + } +#else + _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter(iterator_type __x) _NOEXCEPT : __i(__x) {} +#endif + + template friend class __wrap_iter; + template friend class basic_string; + template friend class _LIBCPP_TEMPLATE_VIS vector; + template friend class _LIBCPP_TEMPLATE_VIS span; +}; + +template +_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG +bool operator==(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT +{ + return __x.base() == __y.base(); +} + +template +_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG +bool operator<(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT +{ +#if _LIBCPP_DEBUG_LEVEL == 2 + _LIBCPP_ASSERT(__get_const_db()->__less_than_comparable(&__x, &__y), + "Attempted to compare incomparable iterators"); +#endif + return __x.base() < __y.base(); +} + +template +_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG +bool operator!=(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT +{ + return !(__x == __y); +} + +template +_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG +bool operator>(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT +{ + return __y < __x; +} + +template +_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG +bool operator>=(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT +{ + return !(__x < __y); +} + +template +_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG +bool operator<=(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT +{ + return !(__y < __x); +} + +template +_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG +#ifndef _LIBCPP_CXX03_LANG +auto operator-(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT + -> decltype(__x.base() - __y.base()) +#else +typename __wrap_iter<_Iter1>::difference_type +operator-(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT +#endif // C++03 +{ +#if _LIBCPP_DEBUG_LEVEL == 2 + _LIBCPP_ASSERT(__get_const_db()->__less_than_comparable(&__x, &__y), + "Attempted to subtract incompatible iterators"); +#endif + return __x.base() - __y.base(); +} + +template +_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG +__wrap_iter<_Iter1> operator+(typename __wrap_iter<_Iter1>::difference_type __n, __wrap_iter<_Iter1> __x) _NOEXCEPT +{ + __x += __n; + return __x; +} + +#if _LIBCPP_STD_VER <= 17 +template +struct __is_cpp17_contiguous_iterator<__wrap_iter<_It> > : true_type {}; +#endif + +template +_LIBCPP_CONSTEXPR +decltype(_VSTD::__to_address(declval<_Iter>())) +__to_address(__wrap_iter<_Iter> __w) _NOEXCEPT { + return _VSTD::__to_address(__w.base()); +} + +_LIBCPP_END_NAMESPACE_STD + +_LIBCPP_POP_MACROS + +#endif // _LIBCPP___ITERATOR_WRAP_ITER_H diff --git a/libcxx/include/__memory/allocator_arg_t.h b/libcxx/include/__memory/allocator_arg_t.h new file mode 100644 index 0000000000000..830c6b8148eb8 --- /dev/null +++ b/libcxx/include/__memory/allocator_arg_t.h @@ -0,0 +1,78 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___FUNCTIONAL___ALLOCATOR_ARG_T_H +#define _LIBCPP___FUNCTIONAL___ALLOCATOR_ARG_T_H + +#include <__config> +#include <__memory/uses_allocator.h> +#include <__utility/forward.h> +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +struct _LIBCPP_TEMPLATE_VIS allocator_arg_t { explicit allocator_arg_t() = default; }; + +#if defined(_LIBCPP_CXX03_LANG) || defined(_LIBCPP_BUILDING_LIBRARY) +extern _LIBCPP_EXPORTED_FROM_ABI const allocator_arg_t allocator_arg; +#else +/* _LIBCPP_INLINE_VAR */ constexpr allocator_arg_t allocator_arg = allocator_arg_t(); +#endif + +#ifndef _LIBCPP_CXX03_LANG + +// allocator construction + +template +struct __uses_alloc_ctor_imp +{ + typedef _LIBCPP_NODEBUG_TYPE typename __uncvref<_Alloc>::type _RawAlloc; + static const bool __ua = uses_allocator<_Tp, _RawAlloc>::value; + static const bool __ic = + is_constructible<_Tp, allocator_arg_t, _Alloc, _Args...>::value; + static const int value = __ua ? 2 - __ic : 0; +}; + +template +struct __uses_alloc_ctor + : integral_constant::value> + {}; + +template +inline _LIBCPP_INLINE_VISIBILITY +void __user_alloc_construct_impl (integral_constant, _Tp *__storage, const _Allocator &, _Args &&... __args ) +{ + new (__storage) _Tp (_VSTD::forward<_Args>(__args)...); +} + +// FIXME: This should have a version which takes a non-const alloc. +template +inline _LIBCPP_INLINE_VISIBILITY +void __user_alloc_construct_impl (integral_constant, _Tp *__storage, const _Allocator &__a, _Args &&... __args ) +{ + new (__storage) _Tp (allocator_arg, __a, _VSTD::forward<_Args>(__args)...); +} + +// FIXME: This should have a version which takes a non-const alloc. +template +inline _LIBCPP_INLINE_VISIBILITY +void __user_alloc_construct_impl (integral_constant, _Tp *__storage, const _Allocator &__a, _Args &&... __args ) +{ + new (__storage) _Tp (_VSTD::forward<_Args>(__args)..., __a); +} + +#endif // _LIBCPP_CXX03_LANG + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___FUNCTIONAL___ALLOCATOR_ARG_T_H diff --git a/libcxx/include/__memory/shared_ptr.h b/libcxx/include/__memory/shared_ptr.h index 64f5b06ac26b2..04161c4b73ed3 100644 --- a/libcxx/include/__memory/shared_ptr.h +++ b/libcxx/include/__memory/shared_ptr.h @@ -12,11 +12,14 @@ #include <__availability> #include <__config> -#include <__functional_base> // std::less, std::binary_function +#include <__functional_base> +#include <__functional/binary_function.h> +#include <__functional/operations.h> +#include <__functional/reference_wrapper.h> #include <__memory/addressof.h> #include <__memory/allocation_guard.h> -#include <__memory/allocator.h> #include <__memory/allocator_traits.h> +#include <__memory/allocator.h> #include <__memory/compressed_pair.h> #include <__memory/pointer_traits.h> #include <__memory/unique_ptr.h> @@ -25,6 +28,7 @@ #include // abort #include #include +#include #include #include #if !defined(_LIBCPP_HAS_NO_ATOMIC_HEADER) diff --git a/libcxx/include/__memory/unique_ptr.h b/libcxx/include/__memory/unique_ptr.h index d730fc9ef4e5f..083e0a8c250d2 100644 --- a/libcxx/include/__memory/unique_ptr.h +++ b/libcxx/include/__memory/unique_ptr.h @@ -11,8 +11,9 @@ #define _LIBCPP___MEMORY_UNIQUE_PTR_H #include <__config> -#include <__functional_base> // std::less +#include <__functional_base> #include <__functional/hash.h> +#include <__functional/operations.h> #include <__memory/allocator_traits.h> // __pointer #include <__memory/compressed_pair.h> #include <__utility/forward.h> diff --git a/libcxx/include/__memory/uses_allocator.h b/libcxx/include/__memory/uses_allocator.h new file mode 100644 index 0000000000000..36e7520575458 --- /dev/null +++ b/libcxx/include/__memory/uses_allocator.h @@ -0,0 +1,60 @@ +// -*- C++ -*- +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef _LIBCPP___MEMORY_USES_ALLOCATOR_H +#define _LIBCPP___MEMORY_USES_ALLOCATOR_H + +#include <__config> +#include +#include + +#if !defined(_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER) +#pragma GCC system_header +#endif + +_LIBCPP_BEGIN_NAMESPACE_STD + +template +struct __has_allocator_type +{ +private: + struct __two {char __lx; char __lxx;}; + template static __two __test(...); + template static char __test(typename _Up::allocator_type* = 0); +public: + static const bool value = sizeof(__test<_Tp>(0)) == 1; +}; + +template ::value> +struct __uses_allocator + : public integral_constant::value> +{ +}; + +template +struct __uses_allocator<_Tp, _Alloc, false> + : public false_type +{ +}; + +template +struct _LIBCPP_TEMPLATE_VIS uses_allocator + : public __uses_allocator<_Tp, _Alloc> +{ +}; + +#if _LIBCPP_STD_VER > 14 +template +_LIBCPP_INLINE_VAR constexpr size_t uses_allocator_v = uses_allocator<_Tp, _Alloc>::value; +#endif + +_LIBCPP_END_NAMESPACE_STD + +#endif // _LIBCPP___MEMORY_USES_ALLOCATOR_H diff --git a/libcxx/include/__ranges/ref_view.h b/libcxx/include/__ranges/ref_view.h index 5ca4ca16065c9..1df7939aa7c6f 100644 --- a/libcxx/include/__ranges/ref_view.h +++ b/libcxx/include/__ranges/ref_view.h @@ -13,6 +13,7 @@ #include <__iterator/concepts.h> #include <__iterator/incrementable_traits.h> #include <__iterator/iterator_traits.h> +#include <__memory/addressof.h> #include <__ranges/access.h> #include <__ranges/concepts.h> #include <__ranges/data.h> diff --git a/libcxx/include/__ranges/subrange.h b/libcxx/include/__ranges/subrange.h index f365fb7466cb5..8ce20bd180bf3 100644 --- a/libcxx/include/__ranges/subrange.h +++ b/libcxx/include/__ranges/subrange.h @@ -18,7 +18,6 @@ #include <__ranges/concepts.h> #include <__ranges/enable_borrowed_range.h> #include <__ranges/size.h> -#include <__ranges/subrange.h> #include <__ranges/view_interface.h> #include #include diff --git a/libcxx/include/__string b/libcxx/include/__string index a00c73623c4f3..b77a7fb4f8d36 100644 --- a/libcxx/include/__string +++ b/libcxx/include/__string @@ -11,11 +11,20 @@ #define _LIBCPP___STRING #include <__config> -#include // for search and min -#include // for EOF -#include // for memcpy -#include // for wmemcpy -#include // for __murmur2_or_cityhash +#include <__algorithm/copy.h> +#include <__algorithm/copy_backward.h> +#include <__algorithm/copy_n.h> +#include <__algorithm/fill_n.h> +#include <__algorithm/find_first_of.h> +#include <__algorithm/find_end.h> +#include <__algorithm/min.h> +#include <__functional/hash.h> // for __murmur2_or_cityhash +#include <__iterator/iterator_traits.h> +#include // for EOF +#include // for uint_least16_t +#include // for memcpy +#include // for wmemcpy +#include // for __libcpp_is_constant_evaluated #include <__debug> diff --git a/libcxx/include/__support/ibm/xlocale.h b/libcxx/include/__support/ibm/xlocale.h index 77ac02a2241ac..58bdc67af9681 100644 --- a/libcxx/include/__support/ibm/xlocale.h +++ b/libcxx/include/__support/ibm/xlocale.h @@ -310,7 +310,12 @@ int vasprintf(char **strp, const char *fmt, va_list ap) { } va_list ap_copy; + // va_copy may not be provided by the C library in C++ 03 mode. +#if defined(_LIBCPP_CXX03_LANG) && __has_builtin(__builtin_va_copy) + __builtin_va_copy(ap_copy, ap); +#else va_copy(ap_copy, ap); +#endif int str_size = vsnprintf(*strp, buff_size, fmt, ap_copy); va_end(ap_copy); diff --git a/libcxx/include/concepts b/libcxx/include/concepts index 0b51f53dcc393..3dec9b5279019 100644 --- a/libcxx/include/concepts +++ b/libcxx/include/concepts @@ -130,6 +130,7 @@ namespace std { */ #include <__config> +#include <__functional/invoke.h> #include <__functional_base> #include #include diff --git a/libcxx/include/experimental/__memory b/libcxx/include/experimental/__memory index 4cf8978468cee..b38b664b339ae 100644 --- a/libcxx/include/experimental/__memory +++ b/libcxx/include/experimental/__memory @@ -10,6 +10,8 @@ #ifndef _LIBCPP_EXPERIMENTAL___MEMORY #define _LIBCPP_EXPERIMENTAL___MEMORY +#include <__memory/allocator_arg_t.h> +#include <__memory/uses_allocator.h> #include #include // for erased_type #include <__functional_base> @@ -73,12 +75,35 @@ struct __lfts_uses_alloc_ctor > {}; +template +inline _LIBCPP_INLINE_VISIBILITY +void __user_alloc_construct_impl (integral_constant, _Tp *__storage, const _Allocator &, _Args &&... __args ) +{ + new (__storage) _Tp (_VSTD::forward<_Args>(__args)...); +} + +// FIXME: This should have a version which takes a non-const alloc. +template +inline _LIBCPP_INLINE_VISIBILITY +void __user_alloc_construct_impl (integral_constant, _Tp *__storage, const _Allocator &__a, _Args &&... __args ) +{ + new (__storage) _Tp (allocator_arg, __a, _VSTD::forward<_Args>(__args)...); +} + +// FIXME: This should have a version which takes a non-const alloc. +template +inline _LIBCPP_INLINE_VISIBILITY +void __user_alloc_construct_impl (integral_constant, _Tp *__storage, const _Allocator &__a, _Args &&... __args ) +{ + new (__storage) _Tp (_VSTD::forward<_Args>(__args)..., __a); +} + template inline _LIBCPP_INLINE_VISIBILITY void __lfts_user_alloc_construct( _Tp * __store, const _Alloc & __a, _Args &&... __args) { - _VSTD::__user_alloc_construct_impl( + ::std::experimental::fundamentals_v1::__user_alloc_construct_impl( typename __lfts_uses_alloc_ctor<_Tp, _Alloc, _Args...>::type() , __store, __a, _VSTD::forward<_Args>(__args)... ); diff --git a/libcxx/include/experimental/functional b/libcxx/include/experimental/functional index f6c1821da9c57..e3220e16caeb8 100644 --- a/libcxx/include/experimental/functional +++ b/libcxx/include/experimental/functional @@ -86,7 +86,7 @@ inline namespace fundamentals_v1 { */ -#include <__functional/search.h> +#include <__memory/uses_allocator.h> #include #include #include diff --git a/libcxx/include/ext/__hash b/libcxx/include/ext/__hash index 86fd7ef2cfc48..fbeddf03a404b 100644 --- a/libcxx/include/ext/__hash +++ b/libcxx/include/ext/__hash @@ -12,6 +12,7 @@ #pragma GCC system_header +#include <__string> #include #include diff --git a/libcxx/include/fstream b/libcxx/include/fstream index 09af0d91e79b6..c522b8ab110d7 100644 --- a/libcxx/include/fstream +++ b/libcxx/include/fstream @@ -219,16 +219,12 @@ public: // 27.9.1.2 Constructors/destructor: basic_filebuf(); -#ifndef _LIBCPP_CXX03_LANG basic_filebuf(basic_filebuf&& __rhs); -#endif virtual ~basic_filebuf(); // 27.9.1.3 Assign/swap: -#ifndef _LIBCPP_CXX03_LANG _LIBCPP_INLINE_VISIBILITY basic_filebuf& operator=(basic_filebuf&& __rhs); -#endif void swap(basic_filebuf& __rhs); // 27.9.1.4 Members: @@ -318,8 +314,6 @@ basic_filebuf<_CharT, _Traits>::basic_filebuf() setbuf(nullptr, 4096); } -#ifndef _LIBCPP_CXX03_LANG - template basic_filebuf<_CharT, _Traits>::basic_filebuf(basic_filebuf&& __rhs) : basic_streambuf<_CharT, _Traits>(__rhs) @@ -394,8 +388,6 @@ basic_filebuf<_CharT, _Traits>::operator=(basic_filebuf&& __rhs) return *this; } -#endif // _LIBCPP_CXX03_LANG - template basic_filebuf<_CharT, _Traits>::~basic_filebuf() { @@ -1164,13 +1156,10 @@ public: : basic_ifstream(__p.c_str(), __mode) {} #endif // _LIBCPP_STD_VER >= 17 #endif -#ifndef _LIBCPP_CXX03_LANG _LIBCPP_INLINE_VISIBILITY basic_ifstream(basic_ifstream&& __rhs); - _LIBCPP_INLINE_VISIBILITY basic_ifstream& operator=(basic_ifstream&& __rhs); -#endif _LIBCPP_INLINE_VISIBILITY void swap(basic_ifstream& __rhs); @@ -1240,8 +1229,6 @@ basic_ifstream<_CharT, _Traits>::basic_ifstream(const string& __s, ios_base::ope } #endif -#ifndef _LIBCPP_CXX03_LANG - template inline basic_ifstream<_CharT, _Traits>::basic_ifstream(basic_ifstream&& __rhs) @@ -1261,8 +1248,6 @@ basic_ifstream<_CharT, _Traits>::operator=(basic_ifstream&& __rhs) return *this; } -#endif // _LIBCPP_CXX03_LANG - template inline void @@ -1379,13 +1364,10 @@ public: : basic_ofstream(__p.c_str(), __mode) {} #endif // _LIBCPP_STD_VER >= 17 -#ifndef _LIBCPP_CXX03_LANG _LIBCPP_INLINE_VISIBILITY basic_ofstream(basic_ofstream&& __rhs); - _LIBCPP_INLINE_VISIBILITY basic_ofstream& operator=(basic_ofstream&& __rhs); -#endif _LIBCPP_INLINE_VISIBILITY void swap(basic_ofstream& __rhs); @@ -1454,8 +1436,6 @@ basic_ofstream<_CharT, _Traits>::basic_ofstream(const string& __s, ios_base::ope } #endif -#ifndef _LIBCPP_CXX03_LANG - template inline basic_ofstream<_CharT, _Traits>::basic_ofstream(basic_ofstream&& __rhs) @@ -1475,8 +1455,6 @@ basic_ofstream<_CharT, _Traits>::operator=(basic_ofstream&& __rhs) return *this; } -#endif // _LIBCPP_CXX03_LANG - template inline void @@ -1595,13 +1573,12 @@ public: #endif // _LIBCPP_STD_VER >= 17 #endif -#ifndef _LIBCPP_CXX03_LANG _LIBCPP_INLINE_VISIBILITY basic_fstream(basic_fstream&& __rhs); _LIBCPP_INLINE_VISIBILITY basic_fstream& operator=(basic_fstream&& __rhs); -#endif + _LIBCPP_INLINE_VISIBILITY void swap(basic_fstream& __rhs); @@ -1668,8 +1645,6 @@ basic_fstream<_CharT, _Traits>::basic_fstream(const string& __s, ios_base::openm } #endif -#ifndef _LIBCPP_CXX03_LANG - template inline basic_fstream<_CharT, _Traits>::basic_fstream(basic_fstream&& __rhs) @@ -1689,8 +1664,6 @@ basic_fstream<_CharT, _Traits>::operator=(basic_fstream&& __rhs) return *this; } -#endif // _LIBCPP_CXX03_LANG - template inline void diff --git a/libcxx/include/functional b/libcxx/include/functional index 2b2dcd26ce46f..ecbc5667af18f 100644 --- a/libcxx/include/functional +++ b/libcxx/include/functional @@ -1,5 +1,5 @@ // -*- C++ -*- -//===------------------------ functional ----------------------------------===// +//===----------------------------------------------------------------------===// // // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. // See https://llvm.org/LICENSE.txt for license information. @@ -487,12 +487,30 @@ POLICY: For non-variadic implementations, the number of arguments is limited */ +#include <__algorithm/search.h> #include <__config> #include <__debug> -#include <__functional_base> +#include <__functional/binary_function.h> // TODO: deprecate +#include <__functional/binary_negate.h> +#include <__functional/bind_front.h> +#include <__functional/bind.h> +#include <__functional/binder1st.h> +#include <__functional/binder2nd.h> +#include <__functional/default_searcher.h> +#include <__functional/function.h> #include <__functional/hash.h> -#include <__functional/search.h> -#include <__functional/unary_function.h> +#include <__functional/identity.h> +#include <__functional/invoke.h> +#include <__functional/mem_fn.h> // TODO: deprecate +#include <__functional/mem_fun_ref.h> +#include <__functional/not_fn.h> +#include <__functional/operations.h> +#include <__functional/pointer_to_binary_function.h> +#include <__functional/pointer_to_unary_function.h> +#include <__functional/ranges_operations.h> +#include <__functional/reference_wrapper.h> +#include <__functional/unary_function.h> // TODO: deprecate +#include <__functional/unary_negate.h> #include <__functional/unwrap_ref.h> #include <__utility/forward.h> #include @@ -508,2902 +526,4 @@ POLICY: For non-variadic implementations, the number of arguments is limited #pragma GCC system_header #endif -_LIBCPP_BEGIN_NAMESPACE_STD - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS plus -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, _Tp> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef _Tp __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - _Tp operator()(const _Tp& __x, const _Tp& __y) const - {return __x + __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS plus -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) + _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) + _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) + _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS minus -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, _Tp> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef _Tp __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - _Tp operator()(const _Tp& __x, const _Tp& __y) const - {return __x - __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS minus -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) - _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) - _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) - _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS multiplies -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, _Tp> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef _Tp __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - _Tp operator()(const _Tp& __x, const _Tp& __y) const - {return __x * __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS multiplies -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) * _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) * _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) * _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS divides -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, _Tp> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef _Tp __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - _Tp operator()(const _Tp& __x, const _Tp& __y) const - {return __x / __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS divides -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) / _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) / _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) / _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS modulus -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, _Tp> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef _Tp __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - _Tp operator()(const _Tp& __x, const _Tp& __y) const - {return __x % __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS modulus -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) % _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) % _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) % _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS negate -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : unary_function<_Tp, _Tp> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef _Tp __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - _Tp operator()(const _Tp& __x) const - {return -__x;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS negate -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_Tp&& __x) const - _NOEXCEPT_(noexcept(- _VSTD::forward<_Tp>(__x))) - -> decltype (- _VSTD::forward<_Tp>(__x)) - { return - _VSTD::forward<_Tp>(__x); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS equal_to -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, bool> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef bool __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - bool operator()(const _Tp& __x, const _Tp& __y) const - {return __x == __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS equal_to -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) == _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) == _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) == _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS not_equal_to -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, bool> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef bool __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - bool operator()(const _Tp& __x, const _Tp& __y) const - {return __x != __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS not_equal_to -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) != _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) != _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) != _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS greater -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, bool> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef bool __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - bool operator()(const _Tp& __x, const _Tp& __y) const - {return __x > __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS greater -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) > _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) > _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) > _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -// less in <__functional_base> - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS greater_equal -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, bool> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef bool __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - bool operator()(const _Tp& __x, const _Tp& __y) const - {return __x >= __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS greater_equal -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) >= _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) >= _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) >= _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS less_equal -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, bool> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef bool __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - bool operator()(const _Tp& __x, const _Tp& __y) const - {return __x <= __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS less_equal -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) <= _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) <= _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) <= _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS logical_and -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, bool> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef bool __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - bool operator()(const _Tp& __x, const _Tp& __y) const - {return __x && __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS logical_and -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) && _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) && _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) && _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS logical_or -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, bool> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef bool __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - bool operator()(const _Tp& __x, const _Tp& __y) const - {return __x || __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS logical_or -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) || _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) || _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) || _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS logical_not -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : unary_function<_Tp, bool> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef bool __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef bool result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - bool operator()(const _Tp& __x) const - {return !__x;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS logical_not -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_Tp&& __x) const - _NOEXCEPT_(noexcept(!_VSTD::forward<_Tp>(__x))) - -> decltype (!_VSTD::forward<_Tp>(__x)) - { return !_VSTD::forward<_Tp>(__x); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS bit_and -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, _Tp> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef _Tp __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - _Tp operator()(const _Tp& __x, const _Tp& __y) const - {return __x & __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS bit_and -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) & _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) & _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) & _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS bit_or -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, _Tp> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef _Tp __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - _Tp operator()(const _Tp& __x, const _Tp& __y) const - {return __x | __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS bit_or -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) | _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) | _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) | _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -#if _LIBCPP_STD_VER > 11 -template -#else -template -#endif -struct _LIBCPP_TEMPLATE_VIS bit_xor -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : binary_function<_Tp, _Tp, _Tp> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP - typedef _Tp __result_type; // used by valarray -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp first_argument_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp second_argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - _Tp operator()(const _Tp& __x, const _Tp& __y) const - {return __x ^ __y;} -}; - -#if _LIBCPP_STD_VER > 11 -template <> -struct _LIBCPP_TEMPLATE_VIS bit_xor -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_T1&& __t, _T2&& __u) const - _NOEXCEPT_(noexcept(_VSTD::forward<_T1>(__t) ^ _VSTD::forward<_T2>(__u))) - -> decltype (_VSTD::forward<_T1>(__t) ^ _VSTD::forward<_T2>(__u)) - { return _VSTD::forward<_T1>(__t) ^ _VSTD::forward<_T2>(__u); } - typedef void is_transparent; -}; -#endif - - -#if _LIBCPP_STD_VER > 11 -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -template -struct _LIBCPP_TEMPLATE_VIS bit_not -#if !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : unary_function<_Tp, _Tp> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_BINDER_TYPEDEFS) - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp result_type; - _LIBCPP_DEPRECATED_IN_CXX17 typedef _Tp argument_type; -#endif - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - _Tp operator()(const _Tp& __x) const - {return ~__x;} -}; - -template <> -struct _LIBCPP_TEMPLATE_VIS bit_not -{ - template - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - auto operator()(_Tp&& __x) const - _NOEXCEPT_(noexcept(~_VSTD::forward<_Tp>(__x))) - -> decltype (~_VSTD::forward<_Tp>(__x)) - { return ~_VSTD::forward<_Tp>(__x); } - typedef void is_transparent; -}; -#endif - -#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_NEGATORS) -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX17 unary_negate - : public unary_function -{ - _Predicate __pred_; -public: - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - explicit unary_negate(const _Predicate& __pred) - : __pred_(__pred) {} - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - bool operator()(const typename _Predicate::argument_type& __x) const - {return !__pred_(__x);} -}; - -template -_LIBCPP_DEPRECATED_IN_CXX17 inline _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY -unary_negate<_Predicate> -not1(const _Predicate& __pred) {return unary_negate<_Predicate>(__pred);} - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX17 binary_negate - : public binary_function -{ - _Predicate __pred_; -public: - _LIBCPP_INLINE_VISIBILITY explicit _LIBCPP_CONSTEXPR_AFTER_CXX11 - binary_negate(const _Predicate& __pred) : __pred_(__pred) {} - - _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY - bool operator()(const typename _Predicate::first_argument_type& __x, - const typename _Predicate::second_argument_type& __y) const - {return !__pred_(__x, __y);} -}; - -template -_LIBCPP_DEPRECATED_IN_CXX17 inline _LIBCPP_CONSTEXPR_AFTER_CXX11 _LIBCPP_INLINE_VISIBILITY -binary_negate<_Predicate> -not2(const _Predicate& __pred) {return binary_negate<_Predicate>(__pred);} -#endif // _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_NEGATORS) - -#if _LIBCPP_STD_VER <= 14 || defined(_LIBCPP_ENABLE_CXX17_REMOVED_BINDERS) -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 binder1st - : public unary_function -{ -protected: - __Operation op; - typename __Operation::first_argument_type value; -public: - _LIBCPP_INLINE_VISIBILITY binder1st(const __Operation& __x, - const typename __Operation::first_argument_type __y) - : op(__x), value(__y) {} - _LIBCPP_INLINE_VISIBILITY typename __Operation::result_type operator() - (typename __Operation::second_argument_type& __x) const - {return op(value, __x);} - _LIBCPP_INLINE_VISIBILITY typename __Operation::result_type operator() - (const typename __Operation::second_argument_type& __x) const - {return op(value, __x);} -}; - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -binder1st<__Operation> -bind1st(const __Operation& __op, const _Tp& __x) - {return binder1st<__Operation>(__op, __x);} - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 binder2nd - : public unary_function -{ -protected: - __Operation op; - typename __Operation::second_argument_type value; -public: - _LIBCPP_INLINE_VISIBILITY - binder2nd(const __Operation& __x, const typename __Operation::second_argument_type __y) - : op(__x), value(__y) {} - _LIBCPP_INLINE_VISIBILITY typename __Operation::result_type operator() - ( typename __Operation::first_argument_type& __x) const - {return op(__x, value);} - _LIBCPP_INLINE_VISIBILITY typename __Operation::result_type operator() - (const typename __Operation::first_argument_type& __x) const - {return op(__x, value);} -}; - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -binder2nd<__Operation> -bind2nd(const __Operation& __op, const _Tp& __x) - {return binder2nd<__Operation>(__op, __x);} - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 pointer_to_unary_function - : public unary_function<_Arg, _Result> -{ - _Result (*__f_)(_Arg); -public: - _LIBCPP_INLINE_VISIBILITY explicit pointer_to_unary_function(_Result (*__f)(_Arg)) - : __f_(__f) {} - _LIBCPP_INLINE_VISIBILITY _Result operator()(_Arg __x) const - {return __f_(__x);} -}; - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -pointer_to_unary_function<_Arg,_Result> -ptr_fun(_Result (*__f)(_Arg)) - {return pointer_to_unary_function<_Arg,_Result>(__f);} - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 pointer_to_binary_function - : public binary_function<_Arg1, _Arg2, _Result> -{ - _Result (*__f_)(_Arg1, _Arg2); -public: - _LIBCPP_INLINE_VISIBILITY explicit pointer_to_binary_function(_Result (*__f)(_Arg1, _Arg2)) - : __f_(__f) {} - _LIBCPP_INLINE_VISIBILITY _Result operator()(_Arg1 __x, _Arg2 __y) const - {return __f_(__x, __y);} -}; - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -pointer_to_binary_function<_Arg1,_Arg2,_Result> -ptr_fun(_Result (*__f)(_Arg1,_Arg2)) - {return pointer_to_binary_function<_Arg1,_Arg2,_Result>(__f);} - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 mem_fun_t - : public unary_function<_Tp*, _Sp> -{ - _Sp (_Tp::*__p_)(); -public: - _LIBCPP_INLINE_VISIBILITY explicit mem_fun_t(_Sp (_Tp::*__p)()) - : __p_(__p) {} - _LIBCPP_INLINE_VISIBILITY _Sp operator()(_Tp* __p) const - {return (__p->*__p_)();} -}; - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 mem_fun1_t - : public binary_function<_Tp*, _Ap, _Sp> -{ - _Sp (_Tp::*__p_)(_Ap); -public: - _LIBCPP_INLINE_VISIBILITY explicit mem_fun1_t(_Sp (_Tp::*__p)(_Ap)) - : __p_(__p) {} - _LIBCPP_INLINE_VISIBILITY _Sp operator()(_Tp* __p, _Ap __x) const - {return (__p->*__p_)(__x);} -}; - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -mem_fun_t<_Sp,_Tp> -mem_fun(_Sp (_Tp::*__f)()) - {return mem_fun_t<_Sp,_Tp>(__f);} - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -mem_fun1_t<_Sp,_Tp,_Ap> -mem_fun(_Sp (_Tp::*__f)(_Ap)) - {return mem_fun1_t<_Sp,_Tp,_Ap>(__f);} - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 mem_fun_ref_t - : public unary_function<_Tp, _Sp> -{ - _Sp (_Tp::*__p_)(); -public: - _LIBCPP_INLINE_VISIBILITY explicit mem_fun_ref_t(_Sp (_Tp::*__p)()) - : __p_(__p) {} - _LIBCPP_INLINE_VISIBILITY _Sp operator()(_Tp& __p) const - {return (__p.*__p_)();} -}; - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 mem_fun1_ref_t - : public binary_function<_Tp, _Ap, _Sp> -{ - _Sp (_Tp::*__p_)(_Ap); -public: - _LIBCPP_INLINE_VISIBILITY explicit mem_fun1_ref_t(_Sp (_Tp::*__p)(_Ap)) - : __p_(__p) {} - _LIBCPP_INLINE_VISIBILITY _Sp operator()(_Tp& __p, _Ap __x) const - {return (__p.*__p_)(__x);} -}; - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -mem_fun_ref_t<_Sp,_Tp> -mem_fun_ref(_Sp (_Tp::*__f)()) - {return mem_fun_ref_t<_Sp,_Tp>(__f);} - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -mem_fun1_ref_t<_Sp,_Tp,_Ap> -mem_fun_ref(_Sp (_Tp::*__f)(_Ap)) - {return mem_fun1_ref_t<_Sp,_Tp,_Ap>(__f);} - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 const_mem_fun_t - : public unary_function -{ - _Sp (_Tp::*__p_)() const; -public: - _LIBCPP_INLINE_VISIBILITY explicit const_mem_fun_t(_Sp (_Tp::*__p)() const) - : __p_(__p) {} - _LIBCPP_INLINE_VISIBILITY _Sp operator()(const _Tp* __p) const - {return (__p->*__p_)();} -}; - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 const_mem_fun1_t - : public binary_function -{ - _Sp (_Tp::*__p_)(_Ap) const; -public: - _LIBCPP_INLINE_VISIBILITY explicit const_mem_fun1_t(_Sp (_Tp::*__p)(_Ap) const) - : __p_(__p) {} - _LIBCPP_INLINE_VISIBILITY _Sp operator()(const _Tp* __p, _Ap __x) const - {return (__p->*__p_)(__x);} -}; - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -const_mem_fun_t<_Sp,_Tp> -mem_fun(_Sp (_Tp::*__f)() const) - {return const_mem_fun_t<_Sp,_Tp>(__f);} - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -const_mem_fun1_t<_Sp,_Tp,_Ap> -mem_fun(_Sp (_Tp::*__f)(_Ap) const) - {return const_mem_fun1_t<_Sp,_Tp,_Ap>(__f);} - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 const_mem_fun_ref_t - : public unary_function<_Tp, _Sp> -{ - _Sp (_Tp::*__p_)() const; -public: - _LIBCPP_INLINE_VISIBILITY explicit const_mem_fun_ref_t(_Sp (_Tp::*__p)() const) - : __p_(__p) {} - _LIBCPP_INLINE_VISIBILITY _Sp operator()(const _Tp& __p) const - {return (__p.*__p_)();} -}; - -template -class _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX11 const_mem_fun1_ref_t - : public binary_function<_Tp, _Ap, _Sp> -{ - _Sp (_Tp::*__p_)(_Ap) const; -public: - _LIBCPP_INLINE_VISIBILITY explicit const_mem_fun1_ref_t(_Sp (_Tp::*__p)(_Ap) const) - : __p_(__p) {} - _LIBCPP_INLINE_VISIBILITY _Sp operator()(const _Tp& __p, _Ap __x) const - {return (__p.*__p_)(__x);} -}; - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -const_mem_fun_ref_t<_Sp,_Tp> -mem_fun_ref(_Sp (_Tp::*__f)() const) - {return const_mem_fun_ref_t<_Sp,_Tp>(__f);} - -template -_LIBCPP_DEPRECATED_IN_CXX11 inline _LIBCPP_INLINE_VISIBILITY -const_mem_fun1_ref_t<_Sp,_Tp,_Ap> -mem_fun_ref(_Sp (_Tp::*__f)(_Ap) const) - {return const_mem_fun1_ref_t<_Sp,_Tp,_Ap>(__f);} -#endif - -//////////////////////////////////////////////////////////////////////////////// -// MEMFUN -//============================================================================== - -template -class __mem_fn -#if _LIBCPP_STD_VER <= 17 || !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : public __weak_result_type<_Tp> -#endif -{ -public: - // types - typedef _Tp type; -private: - type __f_; - -public: - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - __mem_fn(type __f) _NOEXCEPT : __f_(__f) {} - -#ifndef _LIBCPP_CXX03_LANG - // invoke - template - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - typename __invoke_return::type - operator() (_ArgTypes&&... __args) const { - return _VSTD::__invoke(__f_, _VSTD::forward<_ArgTypes>(__args)...); - } -#else - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return0::type - operator() (_A0& __a0) const { - return _VSTD::__invoke(__f_, __a0); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return0::type - operator() (_A0 const& __a0) const { - return _VSTD::__invoke(__f_, __a0); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return1::type - operator() (_A0& __a0, _A1& __a1) const { - return _VSTD::__invoke(__f_, __a0, __a1); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return1::type - operator() (_A0 const& __a0, _A1& __a1) const { - return _VSTD::__invoke(__f_, __a0, __a1); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return1::type - operator() (_A0& __a0, _A1 const& __a1) const { - return _VSTD::__invoke(__f_, __a0, __a1); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return1::type - operator() (_A0 const& __a0, _A1 const& __a1) const { - return _VSTD::__invoke(__f_, __a0, __a1); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0& __a0, _A1& __a1, _A2& __a2) const { - return _VSTD::__invoke(__f_, __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0 const& __a0, _A1& __a1, _A2& __a2) const { - return _VSTD::__invoke(__f_, __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0& __a0, _A1 const& __a1, _A2& __a2) const { - return _VSTD::__invoke(__f_, __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0& __a0, _A1& __a1, _A2 const& __a2) const { - return _VSTD::__invoke(__f_, __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0 const& __a0, _A1 const& __a1, _A2& __a2) const { - return _VSTD::__invoke(__f_, __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0 const& __a0, _A1& __a1, _A2 const& __a2) const { - return _VSTD::__invoke(__f_, __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0& __a0, _A1 const& __a1, _A2 const& __a2) const { - return _VSTD::__invoke(__f_, __a0, __a1, __a2); - } - - template - _LIBCPP_INLINE_VISIBILITY - typename __invoke_return2::type - operator() (_A0 const& __a0, _A1 const& __a1, _A2 const& __a2) const { - return _VSTD::__invoke(__f_, __a0, __a1, __a2); - } -#endif -}; - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 -__mem_fn<_Rp _Tp::*> -mem_fn(_Rp _Tp::* __pm) _NOEXCEPT -{ - return __mem_fn<_Rp _Tp::*>(__pm); -} - -//////////////////////////////////////////////////////////////////////////////// -// FUNCTION -//============================================================================== - -// bad_function_call - -class _LIBCPP_EXCEPTION_ABI bad_function_call - : public exception -{ -#ifdef _LIBCPP_ABI_BAD_FUNCTION_CALL_KEY_FUNCTION -public: - virtual ~bad_function_call() _NOEXCEPT; - - virtual const char* what() const _NOEXCEPT; -#endif -}; - -_LIBCPP_NORETURN inline _LIBCPP_INLINE_VISIBILITY -void __throw_bad_function_call() -{ -#ifndef _LIBCPP_NO_EXCEPTIONS - throw bad_function_call(); -#else - _VSTD::abort(); -#endif -} - -#if defined(_LIBCPP_CXX03_LANG) && !defined(_LIBCPP_DISABLE_DEPRECATION_WARNINGS) && __has_attribute(deprecated) -# define _LIBCPP_DEPRECATED_CXX03_FUNCTION \ - __attribute__((deprecated("Using std::function in C++03 is not supported anymore. Please upgrade to C++11 or later, or use a different type"))) -#else -# define _LIBCPP_DEPRECATED_CXX03_FUNCTION /* nothing */ -#endif - -template class _LIBCPP_DEPRECATED_CXX03_FUNCTION _LIBCPP_TEMPLATE_VIS function; // undefined - -namespace __function -{ - -template -struct __maybe_derive_from_unary_function -{ -}; - -template -struct __maybe_derive_from_unary_function<_Rp(_A1)> - : public unary_function<_A1, _Rp> -{ -}; - -template -struct __maybe_derive_from_binary_function -{ -}; - -template -struct __maybe_derive_from_binary_function<_Rp(_A1, _A2)> - : public binary_function<_A1, _A2, _Rp> -{ -}; - -template -_LIBCPP_INLINE_VISIBILITY -bool __not_null(_Fp const&) { return true; } - -template -_LIBCPP_INLINE_VISIBILITY -bool __not_null(_Fp* __ptr) { return __ptr; } - -template -_LIBCPP_INLINE_VISIBILITY -bool __not_null(_Ret _Class::*__ptr) { return __ptr; } - -template -_LIBCPP_INLINE_VISIBILITY -bool __not_null(function<_Fp> const& __f) { return !!__f; } - -#ifdef _LIBCPP_HAS_EXTENSION_BLOCKS -template -_LIBCPP_INLINE_VISIBILITY -bool __not_null(_Rp (^__p)(_Args...)) { return __p; } -#endif - -} // namespace __function - -#ifndef _LIBCPP_CXX03_LANG - -namespace __function { - -// __alloc_func holds a functor and an allocator. - -template class __alloc_func; -template -class __default_alloc_func; - -template -class __alloc_func<_Fp, _Ap, _Rp(_ArgTypes...)> -{ - __compressed_pair<_Fp, _Ap> __f_; - - public: - typedef _LIBCPP_NODEBUG_TYPE _Fp _Target; - typedef _LIBCPP_NODEBUG_TYPE _Ap _Alloc; - - _LIBCPP_INLINE_VISIBILITY - const _Target& __target() const { return __f_.first(); } - - // WIN32 APIs may define __allocator, so use __get_allocator instead. - _LIBCPP_INLINE_VISIBILITY - const _Alloc& __get_allocator() const { return __f_.second(); } - - _LIBCPP_INLINE_VISIBILITY - explicit __alloc_func(_Target&& __f) - : __f_(piecewise_construct, _VSTD::forward_as_tuple(_VSTD::move(__f)), - _VSTD::forward_as_tuple()) - { - } - - _LIBCPP_INLINE_VISIBILITY - explicit __alloc_func(const _Target& __f, const _Alloc& __a) - : __f_(piecewise_construct, _VSTD::forward_as_tuple(__f), - _VSTD::forward_as_tuple(__a)) - { - } - - _LIBCPP_INLINE_VISIBILITY - explicit __alloc_func(const _Target& __f, _Alloc&& __a) - : __f_(piecewise_construct, _VSTD::forward_as_tuple(__f), - _VSTD::forward_as_tuple(_VSTD::move(__a))) - { - } - - _LIBCPP_INLINE_VISIBILITY - explicit __alloc_func(_Target&& __f, _Alloc&& __a) - : __f_(piecewise_construct, _VSTD::forward_as_tuple(_VSTD::move(__f)), - _VSTD::forward_as_tuple(_VSTD::move(__a))) - { - } - - _LIBCPP_INLINE_VISIBILITY - _Rp operator()(_ArgTypes&&... __arg) - { - typedef __invoke_void_return_wrapper<_Rp> _Invoker; - return _Invoker::__call(__f_.first(), - _VSTD::forward<_ArgTypes>(__arg)...); - } - - _LIBCPP_INLINE_VISIBILITY - __alloc_func* __clone() const - { - typedef allocator_traits<_Alloc> __alloc_traits; - typedef - typename __rebind_alloc_helper<__alloc_traits, __alloc_func>::type - _AA; - _AA __a(__f_.second()); - typedef __allocator_destructor<_AA> _Dp; - unique_ptr<__alloc_func, _Dp> __hold(__a.allocate(1), _Dp(__a, 1)); - ::new ((void*)__hold.get()) __alloc_func(__f_.first(), _Alloc(__a)); - return __hold.release(); - } - - _LIBCPP_INLINE_VISIBILITY - void destroy() _NOEXCEPT { __f_.~__compressed_pair<_Target, _Alloc>(); } - - static void __destroy_and_delete(__alloc_func* __f) { - typedef allocator_traits<_Alloc> __alloc_traits; - typedef typename __rebind_alloc_helper<__alloc_traits, __alloc_func>::type - _FunAlloc; - _FunAlloc __a(__f->__get_allocator()); - __f->destroy(); - __a.deallocate(__f, 1); - } -}; - -template -class __default_alloc_func<_Fp, _Rp(_ArgTypes...)> { - _Fp __f_; - -public: - typedef _LIBCPP_NODEBUG_TYPE _Fp _Target; - - _LIBCPP_INLINE_VISIBILITY - const _Target& __target() const { return __f_; } - - _LIBCPP_INLINE_VISIBILITY - explicit __default_alloc_func(_Target&& __f) : __f_(_VSTD::move(__f)) {} - - _LIBCPP_INLINE_VISIBILITY - explicit __default_alloc_func(const _Target& __f) : __f_(__f) {} - - _LIBCPP_INLINE_VISIBILITY - _Rp operator()(_ArgTypes&&... __arg) { - typedef __invoke_void_return_wrapper<_Rp> _Invoker; - return _Invoker::__call(__f_, _VSTD::forward<_ArgTypes>(__arg)...); - } - - _LIBCPP_INLINE_VISIBILITY - __default_alloc_func* __clone() const { - __builtin_new_allocator::__holder_t __hold = - __builtin_new_allocator::__allocate_type<__default_alloc_func>(1); - __default_alloc_func* __res = - ::new ((void*)__hold.get()) __default_alloc_func(__f_); - (void)__hold.release(); - return __res; - } - - _LIBCPP_INLINE_VISIBILITY - void destroy() _NOEXCEPT { __f_.~_Target(); } - - static void __destroy_and_delete(__default_alloc_func* __f) { - __f->destroy(); - __builtin_new_allocator::__deallocate_type<__default_alloc_func>(__f, 1); - } -}; - -// __base provides an abstract interface for copyable functors. - -template class _LIBCPP_TEMPLATE_VIS __base; - -template -class __base<_Rp(_ArgTypes...)> -{ - __base(const __base&); - __base& operator=(const __base&); -public: - _LIBCPP_INLINE_VISIBILITY __base() {} - _LIBCPP_INLINE_VISIBILITY virtual ~__base() {} - virtual __base* __clone() const = 0; - virtual void __clone(__base*) const = 0; - virtual void destroy() _NOEXCEPT = 0; - virtual void destroy_deallocate() _NOEXCEPT = 0; - virtual _Rp operator()(_ArgTypes&& ...) = 0; -#ifndef _LIBCPP_NO_RTTI - virtual const void* target(const type_info&) const _NOEXCEPT = 0; - virtual const std::type_info& target_type() const _NOEXCEPT = 0; -#endif // _LIBCPP_NO_RTTI -}; - -// __func implements __base for a given functor type. - -template class __func; - -template -class __func<_Fp, _Alloc, _Rp(_ArgTypes...)> - : public __base<_Rp(_ArgTypes...)> -{ - __alloc_func<_Fp, _Alloc, _Rp(_ArgTypes...)> __f_; -public: - _LIBCPP_INLINE_VISIBILITY - explicit __func(_Fp&& __f) - : __f_(_VSTD::move(__f)) {} - - _LIBCPP_INLINE_VISIBILITY - explicit __func(const _Fp& __f, const _Alloc& __a) - : __f_(__f, __a) {} - - _LIBCPP_INLINE_VISIBILITY - explicit __func(const _Fp& __f, _Alloc&& __a) - : __f_(__f, _VSTD::move(__a)) {} - - _LIBCPP_INLINE_VISIBILITY - explicit __func(_Fp&& __f, _Alloc&& __a) - : __f_(_VSTD::move(__f), _VSTD::move(__a)) {} - - virtual __base<_Rp(_ArgTypes...)>* __clone() const; - virtual void __clone(__base<_Rp(_ArgTypes...)>*) const; - virtual void destroy() _NOEXCEPT; - virtual void destroy_deallocate() _NOEXCEPT; - virtual _Rp operator()(_ArgTypes&&... __arg); -#ifndef _LIBCPP_NO_RTTI - virtual const void* target(const type_info&) const _NOEXCEPT; - virtual const std::type_info& target_type() const _NOEXCEPT; -#endif // _LIBCPP_NO_RTTI -}; - -template -__base<_Rp(_ArgTypes...)>* -__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::__clone() const -{ - typedef allocator_traits<_Alloc> __alloc_traits; - typedef typename __rebind_alloc_helper<__alloc_traits, __func>::type _Ap; - _Ap __a(__f_.__get_allocator()); - typedef __allocator_destructor<_Ap> _Dp; - unique_ptr<__func, _Dp> __hold(__a.allocate(1), _Dp(__a, 1)); - ::new ((void*)__hold.get()) __func(__f_.__target(), _Alloc(__a)); - return __hold.release(); -} - -template -void -__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::__clone(__base<_Rp(_ArgTypes...)>* __p) const -{ - ::new ((void*)__p) __func(__f_.__target(), __f_.__get_allocator()); -} - -template -void -__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::destroy() _NOEXCEPT -{ - __f_.destroy(); -} - -template -void -__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::destroy_deallocate() _NOEXCEPT -{ - typedef allocator_traits<_Alloc> __alloc_traits; - typedef typename __rebind_alloc_helper<__alloc_traits, __func>::type _Ap; - _Ap __a(__f_.__get_allocator()); - __f_.destroy(); - __a.deallocate(this, 1); -} - -template -_Rp -__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::operator()(_ArgTypes&& ... __arg) -{ - return __f_(_VSTD::forward<_ArgTypes>(__arg)...); -} - -#ifndef _LIBCPP_NO_RTTI - -template -const void* -__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::target(const type_info& __ti) const _NOEXCEPT -{ - if (__ti == typeid(_Fp)) - return &__f_.__target(); - return nullptr; -} - -template -const std::type_info& -__func<_Fp, _Alloc, _Rp(_ArgTypes...)>::target_type() const _NOEXCEPT -{ - return typeid(_Fp); -} - -#endif // _LIBCPP_NO_RTTI - -// __value_func creates a value-type from a __func. - -template class __value_func; - -template class __value_func<_Rp(_ArgTypes...)> -{ - typename aligned_storage<3 * sizeof(void*)>::type __buf_; - - typedef __base<_Rp(_ArgTypes...)> __func; - __func* __f_; - - _LIBCPP_NO_CFI static __func* __as_base(void* p) - { - return reinterpret_cast<__func*>(p); - } - - public: - _LIBCPP_INLINE_VISIBILITY - __value_func() _NOEXCEPT : __f_(nullptr) {} - - template - _LIBCPP_INLINE_VISIBILITY __value_func(_Fp&& __f, const _Alloc& __a) - : __f_(nullptr) - { - typedef allocator_traits<_Alloc> __alloc_traits; - typedef __function::__func<_Fp, _Alloc, _Rp(_ArgTypes...)> _Fun; - typedef typename __rebind_alloc_helper<__alloc_traits, _Fun>::type - _FunAlloc; - - if (__function::__not_null(__f)) - { - _FunAlloc __af(__a); - if (sizeof(_Fun) <= sizeof(__buf_) && - is_nothrow_copy_constructible<_Fp>::value && - is_nothrow_copy_constructible<_FunAlloc>::value) - { - __f_ = - ::new ((void*)&__buf_) _Fun(_VSTD::move(__f), _Alloc(__af)); - } - else - { - typedef __allocator_destructor<_FunAlloc> _Dp; - unique_ptr<__func, _Dp> __hold(__af.allocate(1), _Dp(__af, 1)); - ::new ((void*)__hold.get()) _Fun(_VSTD::move(__f), _Alloc(__a)); - __f_ = __hold.release(); - } - } - } - - template ::type, __value_func>::value>::type> - _LIBCPP_INLINE_VISIBILITY explicit __value_func(_Fp&& __f) - : __value_func(_VSTD::forward<_Fp>(__f), allocator<_Fp>()) {} - - _LIBCPP_INLINE_VISIBILITY - __value_func(const __value_func& __f) - { - if (__f.__f_ == nullptr) - __f_ = nullptr; - else if ((void*)__f.__f_ == &__f.__buf_) - { - __f_ = __as_base(&__buf_); - __f.__f_->__clone(__f_); - } - else - __f_ = __f.__f_->__clone(); - } - - _LIBCPP_INLINE_VISIBILITY - __value_func(__value_func&& __f) _NOEXCEPT - { - if (__f.__f_ == nullptr) - __f_ = nullptr; - else if ((void*)__f.__f_ == &__f.__buf_) - { - __f_ = __as_base(&__buf_); - __f.__f_->__clone(__f_); - } - else - { - __f_ = __f.__f_; - __f.__f_ = nullptr; - } - } - - _LIBCPP_INLINE_VISIBILITY - ~__value_func() - { - if ((void*)__f_ == &__buf_) - __f_->destroy(); - else if (__f_) - __f_->destroy_deallocate(); - } - - _LIBCPP_INLINE_VISIBILITY - __value_func& operator=(__value_func&& __f) - { - *this = nullptr; - if (__f.__f_ == nullptr) - __f_ = nullptr; - else if ((void*)__f.__f_ == &__f.__buf_) - { - __f_ = __as_base(&__buf_); - __f.__f_->__clone(__f_); - } - else - { - __f_ = __f.__f_; - __f.__f_ = nullptr; - } - return *this; - } - - _LIBCPP_INLINE_VISIBILITY - __value_func& operator=(nullptr_t) - { - __func* __f = __f_; - __f_ = nullptr; - if ((void*)__f == &__buf_) - __f->destroy(); - else if (__f) - __f->destroy_deallocate(); - return *this; - } - - _LIBCPP_INLINE_VISIBILITY - _Rp operator()(_ArgTypes&&... __args) const - { - if (__f_ == nullptr) - __throw_bad_function_call(); - return (*__f_)(_VSTD::forward<_ArgTypes>(__args)...); - } - - _LIBCPP_INLINE_VISIBILITY - void swap(__value_func& __f) _NOEXCEPT - { - if (&__f == this) - return; - if ((void*)__f_ == &__buf_ && (void*)__f.__f_ == &__f.__buf_) - { - typename aligned_storage::type __tempbuf; - __func* __t = __as_base(&__tempbuf); - __f_->__clone(__t); - __f_->destroy(); - __f_ = nullptr; - __f.__f_->__clone(__as_base(&__buf_)); - __f.__f_->destroy(); - __f.__f_ = nullptr; - __f_ = __as_base(&__buf_); - __t->__clone(__as_base(&__f.__buf_)); - __t->destroy(); - __f.__f_ = __as_base(&__f.__buf_); - } - else if ((void*)__f_ == &__buf_) - { - __f_->__clone(__as_base(&__f.__buf_)); - __f_->destroy(); - __f_ = __f.__f_; - __f.__f_ = __as_base(&__f.__buf_); - } - else if ((void*)__f.__f_ == &__f.__buf_) - { - __f.__f_->__clone(__as_base(&__buf_)); - __f.__f_->destroy(); - __f.__f_ = __f_; - __f_ = __as_base(&__buf_); - } - else - _VSTD::swap(__f_, __f.__f_); - } - - _LIBCPP_INLINE_VISIBILITY - explicit operator bool() const _NOEXCEPT { return __f_ != nullptr; } - -#ifndef _LIBCPP_NO_RTTI - _LIBCPP_INLINE_VISIBILITY - const std::type_info& target_type() const _NOEXCEPT - { - if (__f_ == nullptr) - return typeid(void); - return __f_->target_type(); - } - - template - _LIBCPP_INLINE_VISIBILITY const _Tp* target() const _NOEXCEPT - { - if (__f_ == nullptr) - return nullptr; - return (const _Tp*)__f_->target(typeid(_Tp)); - } -#endif // _LIBCPP_NO_RTTI -}; - -// Storage for a functor object, to be used with __policy to manage copy and -// destruction. -union __policy_storage -{ - mutable char __small[sizeof(void*) * 2]; - void* __large; -}; - -// True if _Fun can safely be held in __policy_storage.__small. -template -struct __use_small_storage - : public integral_constant< - bool, sizeof(_Fun) <= sizeof(__policy_storage) && - _LIBCPP_ALIGNOF(_Fun) <= _LIBCPP_ALIGNOF(__policy_storage) && - is_trivially_copy_constructible<_Fun>::value && - is_trivially_destructible<_Fun>::value> {}; - -// Policy contains information about how to copy, destroy, and move the -// underlying functor. You can think of it as a vtable of sorts. -struct __policy -{ - // Used to copy or destroy __large values. null for trivial objects. - void* (*const __clone)(const void*); - void (*const __destroy)(void*); - - // True if this is the null policy (no value). - const bool __is_null; - - // The target type. May be null if RTTI is disabled. - const std::type_info* const __type_info; - - // Returns a pointer to a static policy object suitable for the functor - // type. - template - _LIBCPP_INLINE_VISIBILITY static const __policy* __create() - { - return __choose_policy<_Fun>(__use_small_storage<_Fun>()); - } - - _LIBCPP_INLINE_VISIBILITY - static const __policy* __create_empty() - { - static const _LIBCPP_CONSTEXPR __policy __policy_ = {nullptr, nullptr, - true, -#ifndef _LIBCPP_NO_RTTI - &typeid(void) -#else - nullptr -#endif - }; - return &__policy_; - } - - private: - template static void* __large_clone(const void* __s) - { - const _Fun* __f = static_cast(__s); - return __f->__clone(); - } - - template - static void __large_destroy(void* __s) { - _Fun::__destroy_and_delete(static_cast<_Fun*>(__s)); - } - - template - _LIBCPP_INLINE_VISIBILITY static const __policy* - __choose_policy(/* is_small = */ false_type) { - static const _LIBCPP_CONSTEXPR __policy __policy_ = { - &__large_clone<_Fun>, &__large_destroy<_Fun>, false, -#ifndef _LIBCPP_NO_RTTI - &typeid(typename _Fun::_Target) -#else - nullptr -#endif - }; - return &__policy_; - } - - template - _LIBCPP_INLINE_VISIBILITY static const __policy* - __choose_policy(/* is_small = */ true_type) - { - static const _LIBCPP_CONSTEXPR __policy __policy_ = { - nullptr, nullptr, false, -#ifndef _LIBCPP_NO_RTTI - &typeid(typename _Fun::_Target) -#else - nullptr -#endif - }; - return &__policy_; - } -}; - -// Used to choose between perfect forwarding or pass-by-value. Pass-by-value is -// faster for types that can be passed in registers. -template -using __fast_forward = - typename conditional::value, _Tp, _Tp&&>::type; - -// __policy_invoker calls an instance of __alloc_func held in __policy_storage. - -template struct __policy_invoker; - -template -struct __policy_invoker<_Rp(_ArgTypes...)> -{ - typedef _Rp (*__Call)(const __policy_storage*, - __fast_forward<_ArgTypes>...); - - __Call __call_; - - // Creates an invoker that throws bad_function_call. - _LIBCPP_INLINE_VISIBILITY - __policy_invoker() : __call_(&__call_empty) {} - - // Creates an invoker that calls the given instance of __func. - template - _LIBCPP_INLINE_VISIBILITY static __policy_invoker __create() - { - return __policy_invoker(&__call_impl<_Fun>); - } - - private: - _LIBCPP_INLINE_VISIBILITY - explicit __policy_invoker(__Call __c) : __call_(__c) {} - - static _Rp __call_empty(const __policy_storage*, - __fast_forward<_ArgTypes>...) - { - __throw_bad_function_call(); - } - - template - static _Rp __call_impl(const __policy_storage* __buf, - __fast_forward<_ArgTypes>... __args) - { - _Fun* __f = reinterpret_cast<_Fun*>(__use_small_storage<_Fun>::value - ? &__buf->__small - : __buf->__large); - return (*__f)(_VSTD::forward<_ArgTypes>(__args)...); - } -}; - -// __policy_func uses a __policy and __policy_invoker to create a type-erased, -// copyable functor. - -template class __policy_func; - -template class __policy_func<_Rp(_ArgTypes...)> -{ - // Inline storage for small objects. - __policy_storage __buf_; - - // Calls the value stored in __buf_. This could technically be part of - // policy, but storing it here eliminates a level of indirection inside - // operator(). - typedef __function::__policy_invoker<_Rp(_ArgTypes...)> __invoker; - __invoker __invoker_; - - // The policy that describes how to move / copy / destroy __buf_. Never - // null, even if the function is empty. - const __policy* __policy_; - - public: - _LIBCPP_INLINE_VISIBILITY - __policy_func() : __policy_(__policy::__create_empty()) {} - - template - _LIBCPP_INLINE_VISIBILITY __policy_func(_Fp&& __f, const _Alloc& __a) - : __policy_(__policy::__create_empty()) - { - typedef __alloc_func<_Fp, _Alloc, _Rp(_ArgTypes...)> _Fun; - typedef allocator_traits<_Alloc> __alloc_traits; - typedef typename __rebind_alloc_helper<__alloc_traits, _Fun>::type - _FunAlloc; - - if (__function::__not_null(__f)) - { - __invoker_ = __invoker::template __create<_Fun>(); - __policy_ = __policy::__create<_Fun>(); - - _FunAlloc __af(__a); - if (__use_small_storage<_Fun>()) - { - ::new ((void*)&__buf_.__small) - _Fun(_VSTD::move(__f), _Alloc(__af)); - } - else - { - typedef __allocator_destructor<_FunAlloc> _Dp; - unique_ptr<_Fun, _Dp> __hold(__af.allocate(1), _Dp(__af, 1)); - ::new ((void*)__hold.get()) - _Fun(_VSTD::move(__f), _Alloc(__af)); - __buf_.__large = __hold.release(); - } - } - } - - template ::type, __policy_func>::value>::type> - _LIBCPP_INLINE_VISIBILITY explicit __policy_func(_Fp&& __f) - : __policy_(__policy::__create_empty()) { - typedef __default_alloc_func<_Fp, _Rp(_ArgTypes...)> _Fun; - - if (__function::__not_null(__f)) { - __invoker_ = __invoker::template __create<_Fun>(); - __policy_ = __policy::__create<_Fun>(); - if (__use_small_storage<_Fun>()) { - ::new ((void*)&__buf_.__small) _Fun(_VSTD::move(__f)); - } else { - __builtin_new_allocator::__holder_t __hold = - __builtin_new_allocator::__allocate_type<_Fun>(1); - __buf_.__large = ::new ((void*)__hold.get()) _Fun(_VSTD::move(__f)); - (void)__hold.release(); - } - } - } - - _LIBCPP_INLINE_VISIBILITY - __policy_func(const __policy_func& __f) - : __buf_(__f.__buf_), __invoker_(__f.__invoker_), - __policy_(__f.__policy_) - { - if (__policy_->__clone) - __buf_.__large = __policy_->__clone(__f.__buf_.__large); - } - - _LIBCPP_INLINE_VISIBILITY - __policy_func(__policy_func&& __f) - : __buf_(__f.__buf_), __invoker_(__f.__invoker_), - __policy_(__f.__policy_) - { - if (__policy_->__destroy) - { - __f.__policy_ = __policy::__create_empty(); - __f.__invoker_ = __invoker(); - } - } - - _LIBCPP_INLINE_VISIBILITY - ~__policy_func() - { - if (__policy_->__destroy) - __policy_->__destroy(__buf_.__large); - } - - _LIBCPP_INLINE_VISIBILITY - __policy_func& operator=(__policy_func&& __f) - { - *this = nullptr; - __buf_ = __f.__buf_; - __invoker_ = __f.__invoker_; - __policy_ = __f.__policy_; - __f.__policy_ = __policy::__create_empty(); - __f.__invoker_ = __invoker(); - return *this; - } - - _LIBCPP_INLINE_VISIBILITY - __policy_func& operator=(nullptr_t) - { - const __policy* __p = __policy_; - __policy_ = __policy::__create_empty(); - __invoker_ = __invoker(); - if (__p->__destroy) - __p->__destroy(__buf_.__large); - return *this; - } - - _LIBCPP_INLINE_VISIBILITY - _Rp operator()(_ArgTypes&&... __args) const - { - return __invoker_.__call_(_VSTD::addressof(__buf_), - _VSTD::forward<_ArgTypes>(__args)...); - } - - _LIBCPP_INLINE_VISIBILITY - void swap(__policy_func& __f) - { - _VSTD::swap(__invoker_, __f.__invoker_); - _VSTD::swap(__policy_, __f.__policy_); - _VSTD::swap(__buf_, __f.__buf_); - } - - _LIBCPP_INLINE_VISIBILITY - explicit operator bool() const _NOEXCEPT - { - return !__policy_->__is_null; - } - -#ifndef _LIBCPP_NO_RTTI - _LIBCPP_INLINE_VISIBILITY - const std::type_info& target_type() const _NOEXCEPT - { - return *__policy_->__type_info; - } - - template - _LIBCPP_INLINE_VISIBILITY const _Tp* target() const _NOEXCEPT - { - if (__policy_->__is_null || typeid(_Tp) != *__policy_->__type_info) - return nullptr; - if (__policy_->__clone) // Out of line storage. - return reinterpret_cast(__buf_.__large); - else - return reinterpret_cast(&__buf_.__small); - } -#endif // _LIBCPP_NO_RTTI -}; - -#if defined(_LIBCPP_HAS_BLOCKS_RUNTIME) && !defined(_LIBCPP_HAS_OBJC_ARC) - -extern "C" void *_Block_copy(const void *); -extern "C" void _Block_release(const void *); - -template -class __func<_Rp1(^)(_ArgTypes1...), _Alloc, _Rp(_ArgTypes...)> - : public __base<_Rp(_ArgTypes...)> -{ - typedef _Rp1(^__block_type)(_ArgTypes1...); - __block_type __f_; - -public: - _LIBCPP_INLINE_VISIBILITY - explicit __func(__block_type const& __f) - : __f_(reinterpret_cast<__block_type>(__f ? _Block_copy(__f) : nullptr)) - { } - - // [TODO] add && to save on a retain - - _LIBCPP_INLINE_VISIBILITY - explicit __func(__block_type __f, const _Alloc& /* unused */) - : __f_(reinterpret_cast<__block_type>(__f ? _Block_copy(__f) : nullptr)) - { } - - virtual __base<_Rp(_ArgTypes...)>* __clone() const { - _LIBCPP_ASSERT(false, - "Block pointers are just pointers, so they should always fit into " - "std::function's small buffer optimization. This function should " - "never be invoked."); - return nullptr; - } - - virtual void __clone(__base<_Rp(_ArgTypes...)>* __p) const { - ::new ((void*)__p) __func(__f_); - } - - virtual void destroy() _NOEXCEPT { - if (__f_) - _Block_release(__f_); - __f_ = 0; - } - - virtual void destroy_deallocate() _NOEXCEPT { - _LIBCPP_ASSERT(false, - "Block pointers are just pointers, so they should always fit into " - "std::function's small buffer optimization. This function should " - "never be invoked."); - } - - virtual _Rp operator()(_ArgTypes&& ... __arg) { - return _VSTD::__invoke(__f_, _VSTD::forward<_ArgTypes>(__arg)...); - } - -#ifndef _LIBCPP_NO_RTTI - virtual const void* target(type_info const& __ti) const _NOEXCEPT { - if (__ti == typeid(__func::__block_type)) - return &__f_; - return (const void*)nullptr; - } - - virtual const std::type_info& target_type() const _NOEXCEPT { - return typeid(__func::__block_type); - } -#endif // _LIBCPP_NO_RTTI -}; - -#endif // _LIBCPP_HAS_EXTENSION_BLOCKS && !_LIBCPP_HAS_OBJC_ARC - -} // __function - -template -class _LIBCPP_TEMPLATE_VIS function<_Rp(_ArgTypes...)> -#if _LIBCPP_STD_VER <= 17 || !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : public __function::__maybe_derive_from_unary_function<_Rp(_ArgTypes...)>, - public __function::__maybe_derive_from_binary_function<_Rp(_ArgTypes...)> -#endif -{ -#ifndef _LIBCPP_ABI_OPTIMIZED_FUNCTION - typedef __function::__value_func<_Rp(_ArgTypes...)> __func; -#else - typedef __function::__policy_func<_Rp(_ArgTypes...)> __func; -#endif - - __func __f_; - - template , function>, - __invokable<_Fp, _ArgTypes...> - >::value> - struct __callable; - template - struct __callable<_Fp, true> - { - static const bool value = is_void<_Rp>::value || - __is_core_convertible::type, - _Rp>::value; - }; - template - struct __callable<_Fp, false> - { - static const bool value = false; - }; - - template - using _EnableIfLValueCallable = typename enable_if<__callable<_Fp&>::value>::type; -public: - typedef _Rp result_type; - - // construct/copy/destroy: - _LIBCPP_INLINE_VISIBILITY - function() _NOEXCEPT { } - _LIBCPP_INLINE_VISIBILITY - function(nullptr_t) _NOEXCEPT {} - function(const function&); - function(function&&) _NOEXCEPT; - template> - function(_Fp); - -#if _LIBCPP_STD_VER <= 14 - template - _LIBCPP_INLINE_VISIBILITY - function(allocator_arg_t, const _Alloc&) _NOEXCEPT {} - template - _LIBCPP_INLINE_VISIBILITY - function(allocator_arg_t, const _Alloc&, nullptr_t) _NOEXCEPT {} - template - function(allocator_arg_t, const _Alloc&, const function&); - template - function(allocator_arg_t, const _Alloc&, function&&); - template> - function(allocator_arg_t, const _Alloc& __a, _Fp __f); -#endif - - function& operator=(const function&); - function& operator=(function&&) _NOEXCEPT; - function& operator=(nullptr_t) _NOEXCEPT; - template::type>> - function& operator=(_Fp&&); - - ~function(); - - // function modifiers: - void swap(function&) _NOEXCEPT; - -#if _LIBCPP_STD_VER <= 14 - template - _LIBCPP_INLINE_VISIBILITY - void assign(_Fp&& __f, const _Alloc& __a) - {function(allocator_arg, __a, _VSTD::forward<_Fp>(__f)).swap(*this);} -#endif - - // function capacity: - _LIBCPP_INLINE_VISIBILITY - explicit operator bool() const _NOEXCEPT { - return static_cast(__f_); - } - - // deleted overloads close possible hole in the type system - template - bool operator==(const function<_R2(_ArgTypes2...)>&) const = delete; - template - bool operator!=(const function<_R2(_ArgTypes2...)>&) const = delete; -public: - // function invocation: - _Rp operator()(_ArgTypes...) const; - -#ifndef _LIBCPP_NO_RTTI - // function target access: - const std::type_info& target_type() const _NOEXCEPT; - template _Tp* target() _NOEXCEPT; - template const _Tp* target() const _NOEXCEPT; -#endif // _LIBCPP_NO_RTTI -}; - -#ifndef _LIBCPP_HAS_NO_DEDUCTION_GUIDES -template -function(_Rp(*)(_Ap...)) -> function<_Rp(_Ap...)>; - -template -struct __strip_signature; - -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...)> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) const> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) volatile> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) const volatile> { using type = _Rp(_Ap...); }; - -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) &> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) const &> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) volatile &> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) const volatile &> { using type = _Rp(_Ap...); }; - -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) noexcept> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) const noexcept> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) volatile noexcept> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) const volatile noexcept> { using type = _Rp(_Ap...); }; - -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) & noexcept> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) const & noexcept> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) volatile & noexcept> { using type = _Rp(_Ap...); }; -template -struct __strip_signature<_Rp (_Gp::*) (_Ap...) const volatile & noexcept> { using type = _Rp(_Ap...); }; - -template::type> -function(_Fp) -> function<_Stripped>; -#endif // !_LIBCPP_HAS_NO_DEDUCTION_GUIDES - -template -function<_Rp(_ArgTypes...)>::function(const function& __f) : __f_(__f.__f_) {} - -#if _LIBCPP_STD_VER <= 14 -template -template -function<_Rp(_ArgTypes...)>::function(allocator_arg_t, const _Alloc&, - const function& __f) : __f_(__f.__f_) {} -#endif - -template -function<_Rp(_ArgTypes...)>::function(function&& __f) _NOEXCEPT - : __f_(_VSTD::move(__f.__f_)) {} - -#if _LIBCPP_STD_VER <= 14 -template -template -function<_Rp(_ArgTypes...)>::function(allocator_arg_t, const _Alloc&, - function&& __f) - : __f_(_VSTD::move(__f.__f_)) {} -#endif - -template -template -function<_Rp(_ArgTypes...)>::function(_Fp __f) : __f_(_VSTD::move(__f)) {} - -#if _LIBCPP_STD_VER <= 14 -template -template -function<_Rp(_ArgTypes...)>::function(allocator_arg_t, const _Alloc& __a, - _Fp __f) - : __f_(_VSTD::move(__f), __a) {} -#endif - -template -function<_Rp(_ArgTypes...)>& -function<_Rp(_ArgTypes...)>::operator=(const function& __f) -{ - function(__f).swap(*this); - return *this; -} - -template -function<_Rp(_ArgTypes...)>& -function<_Rp(_ArgTypes...)>::operator=(function&& __f) _NOEXCEPT -{ - __f_ = _VSTD::move(__f.__f_); - return *this; -} - -template -function<_Rp(_ArgTypes...)>& -function<_Rp(_ArgTypes...)>::operator=(nullptr_t) _NOEXCEPT -{ - __f_ = nullptr; - return *this; -} - -template -template -function<_Rp(_ArgTypes...)>& -function<_Rp(_ArgTypes...)>::operator=(_Fp&& __f) -{ - function(_VSTD::forward<_Fp>(__f)).swap(*this); - return *this; -} - -template -function<_Rp(_ArgTypes...)>::~function() {} - -template -void -function<_Rp(_ArgTypes...)>::swap(function& __f) _NOEXCEPT -{ - __f_.swap(__f.__f_); -} - -template -_Rp -function<_Rp(_ArgTypes...)>::operator()(_ArgTypes... __arg) const -{ - return __f_(_VSTD::forward<_ArgTypes>(__arg)...); -} - -#ifndef _LIBCPP_NO_RTTI - -template -const std::type_info& -function<_Rp(_ArgTypes...)>::target_type() const _NOEXCEPT -{ - return __f_.target_type(); -} - -template -template -_Tp* -function<_Rp(_ArgTypes...)>::target() _NOEXCEPT -{ - return (_Tp*)(__f_.template target<_Tp>()); -} - -template -template -const _Tp* -function<_Rp(_ArgTypes...)>::target() const _NOEXCEPT -{ - return __f_.template target<_Tp>(); -} - -#endif // _LIBCPP_NO_RTTI - -template -inline _LIBCPP_INLINE_VISIBILITY -bool -operator==(const function<_Rp(_ArgTypes...)>& __f, nullptr_t) _NOEXCEPT {return !__f;} - -template -inline _LIBCPP_INLINE_VISIBILITY -bool -operator==(nullptr_t, const function<_Rp(_ArgTypes...)>& __f) _NOEXCEPT {return !__f;} - -template -inline _LIBCPP_INLINE_VISIBILITY -bool -operator!=(const function<_Rp(_ArgTypes...)>& __f, nullptr_t) _NOEXCEPT {return (bool)__f;} - -template -inline _LIBCPP_INLINE_VISIBILITY -bool -operator!=(nullptr_t, const function<_Rp(_ArgTypes...)>& __f) _NOEXCEPT {return (bool)__f;} - -template -inline _LIBCPP_INLINE_VISIBILITY -void -swap(function<_Rp(_ArgTypes...)>& __x, function<_Rp(_ArgTypes...)>& __y) _NOEXCEPT -{return __x.swap(__y);} - -#else // _LIBCPP_CXX03_LANG - -#include <__functional_03> - -#endif - -//////////////////////////////////////////////////////////////////////////////// -// BIND -//============================================================================== - -template struct __is_bind_expression : public false_type {}; -template struct _LIBCPP_TEMPLATE_VIS is_bind_expression - : public __is_bind_expression::type> {}; - -#if _LIBCPP_STD_VER > 14 -template -_LIBCPP_INLINE_VAR constexpr size_t is_bind_expression_v = is_bind_expression<_Tp>::value; -#endif - -template struct __is_placeholder : public integral_constant {}; -template struct _LIBCPP_TEMPLATE_VIS is_placeholder - : public __is_placeholder::type> {}; - -#if _LIBCPP_STD_VER > 14 -template -_LIBCPP_INLINE_VAR constexpr size_t is_placeholder_v = is_placeholder<_Tp>::value; -#endif - -namespace placeholders -{ - -template struct __ph {}; - -#if defined(_LIBCPP_CXX03_LANG) || defined(_LIBCPP_BUILDING_LIBRARY) -_LIBCPP_FUNC_VIS extern const __ph<1> _1; -_LIBCPP_FUNC_VIS extern const __ph<2> _2; -_LIBCPP_FUNC_VIS extern const __ph<3> _3; -_LIBCPP_FUNC_VIS extern const __ph<4> _4; -_LIBCPP_FUNC_VIS extern const __ph<5> _5; -_LIBCPP_FUNC_VIS extern const __ph<6> _6; -_LIBCPP_FUNC_VIS extern const __ph<7> _7; -_LIBCPP_FUNC_VIS extern const __ph<8> _8; -_LIBCPP_FUNC_VIS extern const __ph<9> _9; -_LIBCPP_FUNC_VIS extern const __ph<10> _10; -#else -/* _LIBCPP_INLINE_VAR */ constexpr __ph<1> _1{}; -/* _LIBCPP_INLINE_VAR */ constexpr __ph<2> _2{}; -/* _LIBCPP_INLINE_VAR */ constexpr __ph<3> _3{}; -/* _LIBCPP_INLINE_VAR */ constexpr __ph<4> _4{}; -/* _LIBCPP_INLINE_VAR */ constexpr __ph<5> _5{}; -/* _LIBCPP_INLINE_VAR */ constexpr __ph<6> _6{}; -/* _LIBCPP_INLINE_VAR */ constexpr __ph<7> _7{}; -/* _LIBCPP_INLINE_VAR */ constexpr __ph<8> _8{}; -/* _LIBCPP_INLINE_VAR */ constexpr __ph<9> _9{}; -/* _LIBCPP_INLINE_VAR */ constexpr __ph<10> _10{}; -#endif // defined(_LIBCPP_CXX03_LANG) || defined(_LIBCPP_BUILDING_LIBRARY) - -} // placeholders - -template -struct __is_placeholder > - : public integral_constant {}; - - -#ifndef _LIBCPP_CXX03_LANG - -template -inline _LIBCPP_INLINE_VISIBILITY -_Tp& -__mu(reference_wrapper<_Tp> __t, _Uj&) -{ - return __t.get(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __invoke_of<_Ti&, _Uj...>::type -__mu_expand(_Ti& __ti, tuple<_Uj...>& __uj, __tuple_indices<_Indx...>) -{ - return __ti(_VSTD::forward<_Uj>(_VSTD::get<_Indx>(__uj))...); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename _EnableIf -< - is_bind_expression<_Ti>::value, - __invoke_of<_Ti&, _Uj...> ->::type -__mu(_Ti& __ti, tuple<_Uj...>& __uj) -{ - typedef typename __make_tuple_indices::type __indices; - return _VSTD::__mu_expand(__ti, __uj, __indices()); -} - -template -struct __mu_return2 {}; - -template -struct __mu_return2 -{ - typedef typename tuple_element::value - 1, _Uj>::type type; -}; - -template -inline _LIBCPP_INLINE_VISIBILITY -typename enable_if -< - 0 < is_placeholder<_Ti>::value, - typename __mu_return2<0 < is_placeholder<_Ti>::value, _Ti, _Uj>::type ->::type -__mu(_Ti&, _Uj& __uj) -{ - const size_t _Indx = is_placeholder<_Ti>::value - 1; - return _VSTD::forward::type>(_VSTD::get<_Indx>(__uj)); -} - -template -inline _LIBCPP_INLINE_VISIBILITY -typename enable_if -< - !is_bind_expression<_Ti>::value && - is_placeholder<_Ti>::value == 0 && - !__is_reference_wrapper<_Ti>::value, - _Ti& ->::type -__mu(_Ti& __ti, _Uj&) -{ - return __ti; -} - -template -struct __mu_return_impl; - -template -struct __mu_return_invokable // false -{ - typedef __nat type; -}; - -template -struct __mu_return_invokable -{ - typedef typename __invoke_of<_Ti&, _Uj...>::type type; -}; - -template -struct __mu_return_impl<_Ti, false, true, false, tuple<_Uj...> > - : public __mu_return_invokable<__invokable<_Ti&, _Uj...>::value, _Ti, _Uj...> -{ -}; - -template -struct __mu_return_impl<_Ti, false, false, true, _TupleUj> -{ - typedef typename tuple_element::value - 1, - _TupleUj>::type&& type; -}; - -template -struct __mu_return_impl<_Ti, true, false, false, _TupleUj> -{ - typedef typename _Ti::type& type; -}; - -template -struct __mu_return_impl<_Ti, false, false, false, _TupleUj> -{ - typedef _Ti& type; -}; - -template -struct __mu_return - : public __mu_return_impl<_Ti, - __is_reference_wrapper<_Ti>::value, - is_bind_expression<_Ti>::value, - 0 < is_placeholder<_Ti>::value && - is_placeholder<_Ti>::value <= tuple_size<_TupleUj>::value, - _TupleUj> -{ -}; - -template -struct __is_valid_bind_return -{ - static const bool value = false; -}; - -template -struct __is_valid_bind_return<_Fp, tuple<_BoundArgs...>, _TupleUj> -{ - static const bool value = __invokable<_Fp, - typename __mu_return<_BoundArgs, _TupleUj>::type...>::value; -}; - -template -struct __is_valid_bind_return<_Fp, const tuple<_BoundArgs...>, _TupleUj> -{ - static const bool value = __invokable<_Fp, - typename __mu_return::type...>::value; -}; - -template ::value> -struct __bind_return; - -template -struct __bind_return<_Fp, tuple<_BoundArgs...>, _TupleUj, true> -{ - typedef typename __invoke_of - < - _Fp&, - typename __mu_return - < - _BoundArgs, - _TupleUj - >::type... - >::type type; -}; - -template -struct __bind_return<_Fp, const tuple<_BoundArgs...>, _TupleUj, true> -{ - typedef typename __invoke_of - < - _Fp&, - typename __mu_return - < - const _BoundArgs, - _TupleUj - >::type... - >::type type; -}; - -template -inline _LIBCPP_INLINE_VISIBILITY -typename __bind_return<_Fp, _BoundArgs, _Args>::type -__apply_functor(_Fp& __f, _BoundArgs& __bound_args, __tuple_indices<_Indx...>, - _Args&& __args) -{ - return _VSTD::__invoke(__f, _VSTD::__mu(_VSTD::get<_Indx>(__bound_args), __args)...); -} - -template -class __bind -#if _LIBCPP_STD_VER <= 17 || !defined(_LIBCPP_ABI_NO_BINDER_BASES) - : public __weak_result_type::type> -#endif -{ -protected: - typedef typename decay<_Fp>::type _Fd; - typedef tuple::type...> _Td; -private: - _Fd __f_; - _Td __bound_args_; - - typedef typename __make_tuple_indices::type __indices; -public: - template ::value && - !is_same::type, - __bind>::value - >::type> - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - explicit __bind(_Gp&& __f, _BA&& ...__bound_args) - : __f_(_VSTD::forward<_Gp>(__f)), - __bound_args_(_VSTD::forward<_BA>(__bound_args)...) {} - - template - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - typename __bind_return<_Fd, _Td, tuple<_Args&&...> >::type - operator()(_Args&& ...__args) - { - return _VSTD::__apply_functor(__f_, __bound_args_, __indices(), - tuple<_Args&&...>(_VSTD::forward<_Args>(__args)...)); - } - - template - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - typename __bind_return >::type - operator()(_Args&& ...__args) const - { - return _VSTD::__apply_functor(__f_, __bound_args_, __indices(), - tuple<_Args&&...>(_VSTD::forward<_Args>(__args)...)); - } -}; - -template -struct __is_bind_expression<__bind<_Fp, _BoundArgs...> > : public true_type {}; - -template -class __bind_r - : public __bind<_Fp, _BoundArgs...> -{ - typedef __bind<_Fp, _BoundArgs...> base; - typedef typename base::_Fd _Fd; - typedef typename base::_Td _Td; -public: - typedef _Rp result_type; - - - template ::value && - !is_same::type, - __bind_r>::value - >::type> - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - explicit __bind_r(_Gp&& __f, _BA&& ...__bound_args) - : base(_VSTD::forward<_Gp>(__f), - _VSTD::forward<_BA>(__bound_args)...) {} - - template - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - typename enable_if - < - is_convertible >::type, - result_type>::value || is_void<_Rp>::value, - result_type - >::type - operator()(_Args&& ...__args) - { - typedef __invoke_void_return_wrapper<_Rp> _Invoker; - return _Invoker::__call(static_cast(*this), _VSTD::forward<_Args>(__args)...); - } - - template - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - typename enable_if - < - is_convertible >::type, - result_type>::value || is_void<_Rp>::value, - result_type - >::type - operator()(_Args&& ...__args) const - { - typedef __invoke_void_return_wrapper<_Rp> _Invoker; - return _Invoker::__call(static_cast(*this), _VSTD::forward<_Args>(__args)...); - } -}; - -template -struct __is_bind_expression<__bind_r<_Rp, _Fp, _BoundArgs...> > : public true_type {}; - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 -__bind<_Fp, _BoundArgs...> -bind(_Fp&& __f, _BoundArgs&&... __bound_args) -{ - typedef __bind<_Fp, _BoundArgs...> type; - return type(_VSTD::forward<_Fp>(__f), _VSTD::forward<_BoundArgs>(__bound_args)...); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 -__bind_r<_Rp, _Fp, _BoundArgs...> -bind(_Fp&& __f, _BoundArgs&&... __bound_args) -{ - typedef __bind_r<_Rp, _Fp, _BoundArgs...> type; - return type(_VSTD::forward<_Fp>(__f), _VSTD::forward<_BoundArgs>(__bound_args)...); -} - -#endif // _LIBCPP_CXX03_LANG - -#if _LIBCPP_STD_VER > 14 - -template::value>::type> -struct __perfect_forward_impl; - -template -struct __perfect_forward_impl<_Op, __tuple_types<_Bound...>, __tuple_indices<_Idxs...>> -{ - tuple<_Bound...> __bound_; - - template - _LIBCPP_INLINE_VISIBILITY constexpr auto operator()(_Args&&... __args) & - noexcept(noexcept(_Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...))) - -> decltype( _Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...)) - {return _Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...);} - - template - _LIBCPP_INLINE_VISIBILITY constexpr auto operator()(_Args&&... __args) const& - noexcept(noexcept(_Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...))) - -> decltype( _Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...)) - {return _Op::__call(_VSTD::get<_Idxs>(__bound_)..., _VSTD::forward<_Args>(__args)...);} - - template - _LIBCPP_INLINE_VISIBILITY constexpr auto operator()(_Args&&... __args) && - noexcept(noexcept(_Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., - _VSTD::forward<_Args>(__args)...))) - -> decltype( _Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., - _VSTD::forward<_Args>(__args)...)) - {return _Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., - _VSTD::forward<_Args>(__args)...);} - - template - _LIBCPP_INLINE_VISIBILITY constexpr auto operator()(_Args&&... __args) const&& - noexcept(noexcept(_Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., - _VSTD::forward<_Args>(__args)...))) - -> decltype( _Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., - _VSTD::forward<_Args>(__args)...)) - {return _Op::__call(_VSTD::get<_Idxs>(_VSTD::move(__bound_))..., - _VSTD::forward<_Args>(__args)...);} - - template>::type, - class = _EnableIf>> - constexpr __perfect_forward_impl(__perfect_forward_impl const& __other) - : __bound_(__other.__bound_) {} - - template>::type, - class = _EnableIf>> - constexpr __perfect_forward_impl(__perfect_forward_impl && __other) - : __bound_(_VSTD::move(__other.__bound_)) {} - - template - explicit constexpr __perfect_forward_impl(_BoundArgs&&... __bound) : - __bound_(_VSTD::forward<_BoundArgs>(__bound)...) { } -}; - -template -using __perfect_forward = - __perfect_forward_impl<_Op, __tuple_types...>>; - -struct __not_fn_op -{ - template - static _LIBCPP_CONSTEXPR_AFTER_CXX17 auto __call(_Args&&... __args) - noexcept(noexcept(!_VSTD::invoke(_VSTD::forward<_Args>(__args)...))) - -> decltype( !_VSTD::invoke(_VSTD::forward<_Args>(__args)...)) - { return !_VSTD::invoke(_VSTD::forward<_Args>(__args)...); } -}; - -template, _Fn> && - is_move_constructible_v<_Fn>>> -_LIBCPP_CONSTEXPR_AFTER_CXX17 auto not_fn(_Fn&& __f) -{ - return __perfect_forward<__not_fn_op, _Fn>(_VSTD::forward<_Fn>(__f)); -} - -#endif // _LIBCPP_STD_VER > 14 - -#if _LIBCPP_STD_VER > 17 - -struct __bind_front_op -{ - template - constexpr static auto __call(_Args&&... __args) - noexcept(noexcept(_VSTD::invoke(_VSTD::forward<_Args>(__args)...))) - -> decltype( _VSTD::invoke(_VSTD::forward<_Args>(__args)...)) - { return _VSTD::invoke(_VSTD::forward<_Args>(__args)...); } -}; - -template, _Fn>, - is_move_constructible>, - is_constructible, _Args>..., - is_move_constructible>... - >::value>> -constexpr auto bind_front(_Fn&& __f, _Args&&... __args) -{ - return __perfect_forward<__bind_front_op, _Fn, _Args...>(_VSTD::forward<_Fn>(__f), - _VSTD::forward<_Args>(__args)...); -} - -#endif // _LIBCPP_STD_VER > 17 - -// struct hash in - -#if _LIBCPP_STD_VER > 14 - -// default searcher -template> -class _LIBCPP_TEMPLATE_VIS default_searcher { -public: - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - default_searcher(_ForwardIterator __f, _ForwardIterator __l, - _BinaryPredicate __p = _BinaryPredicate()) - : __first_(__f), __last_(__l), __pred_(__p) {} - - template - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 - pair<_ForwardIterator2, _ForwardIterator2> - operator () (_ForwardIterator2 __f, _ForwardIterator2 __l) const - { - return _VSTD::__search(__f, __l, __first_, __last_, __pred_, - typename iterator_traits<_ForwardIterator>::iterator_category(), - typename iterator_traits<_ForwardIterator2>::iterator_category()); - } - -private: - _ForwardIterator __first_; - _ForwardIterator __last_; - _BinaryPredicate __pred_; - }; - -#endif // _LIBCPP_STD_VER > 14 - -#if _LIBCPP_STD_VER > 17 -template -using unwrap_reference_t = typename unwrap_reference<_Tp>::type; - -template -using unwrap_ref_decay_t = typename unwrap_ref_decay<_Tp>::type; -#endif // > C++17 - -#if _LIBCPP_STD_VER > 17 -// [func.identity] -struct identity { - template - _LIBCPP_NODISCARD_EXT constexpr _Tp&& operator()(_Tp&& __t) const noexcept - { - return _VSTD::forward<_Tp>(__t); - } - - using is_transparent = void; -}; -#endif // _LIBCPP_STD_VER > 17 - -#if !defined(_LIBCPP_HAS_NO_RANGES) - -namespace ranges { - -struct equal_to { - template - requires equality_comparable_with<_Tp, _Up> - [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const - noexcept(noexcept(bool(_VSTD::forward<_Tp>(__t) == _VSTD::forward<_Up>(__u)))) { - return _VSTD::forward<_Tp>(__t) == _VSTD::forward<_Up>(__u); - } - - using is_transparent = void; -}; - -struct not_equal_to { - template - requires equality_comparable_with<_Tp, _Up> - [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const - noexcept(noexcept(bool(!(_VSTD::forward<_Tp>(__t) == _VSTD::forward<_Up>(__u))))) { - return !(_VSTD::forward<_Tp>(__t) == _VSTD::forward<_Up>(__u)); - } - - using is_transparent = void; -}; - -struct greater { - template - requires totally_ordered_with<_Tp, _Up> - [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const - noexcept(noexcept(bool(_VSTD::forward<_Up>(__u) < _VSTD::forward<_Tp>(__t)))) { - return _VSTD::forward<_Up>(__u) < _VSTD::forward<_Tp>(__t); - } - - using is_transparent = void; -}; - -struct less { - template - requires totally_ordered_with<_Tp, _Up> - [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const - noexcept(noexcept(bool(_VSTD::forward<_Tp>(__t) < _VSTD::forward<_Up>(__u)))) { - return _VSTD::forward<_Tp>(__t) < _VSTD::forward<_Up>(__u); - } - - using is_transparent = void; -}; - -struct greater_equal { - template - requires totally_ordered_with<_Tp, _Up> - [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const - noexcept(noexcept(bool(!(_VSTD::forward<_Tp>(__t) < _VSTD::forward<_Up>(__u))))) { - return !(_VSTD::forward<_Tp>(__t) < _VSTD::forward<_Up>(__u)); - } - - using is_transparent = void; -}; - -struct less_equal { - template - requires totally_ordered_with<_Tp, _Up> - [[nodiscard]] constexpr bool operator()(_Tp &&__t, _Up &&__u) const - noexcept(noexcept(bool(!(_VSTD::forward<_Up>(__u) < _VSTD::forward<_Tp>(__t))))) { - return !(_VSTD::forward<_Up>(__u) < _VSTD::forward<_Tp>(__t)); - } - - using is_transparent = void; -}; - -} // namespace ranges - -#endif // !defined(_LIBCPP_HAS_NO_RANGES) - -_LIBCPP_END_NAMESPACE_STD - #endif // _LIBCPP_FUNCTIONAL diff --git a/libcxx/include/future b/libcxx/include/future index 5d2732b73cf61..349e6afc43e4a 100644 --- a/libcxx/include/future +++ b/libcxx/include/future @@ -364,6 +364,8 @@ template struct uses_allocator, Alloc>; #include <__availability> #include <__config> #include <__debug> +#include <__memory/allocator_arg_t.h> +#include <__memory/uses_allocator.h> #include <__utility/__decay_copy.h> #include <__utility/forward.h> #include diff --git a/libcxx/include/ios b/libcxx/include/ios index eefb58f55be13..3128bca899990 100644 --- a/libcxx/include/ios +++ b/libcxx/include/ios @@ -662,10 +662,8 @@ protected: _LIBCPP_INLINE_VISIBILITY void move(basic_ios& __rhs); -#ifndef _LIBCPP_CXX03_LANG _LIBCPP_INLINE_VISIBILITY void move(basic_ios&& __rhs) {move(__rhs);} -#endif _LIBCPP_INLINE_VISIBILITY void swap(basic_ios& __rhs) _NOEXCEPT; _LIBCPP_INLINE_VISIBILITY diff --git a/libcxx/include/istream b/libcxx/include/istream index 531280719b30e..17ca68388f523 100644 --- a/libcxx/include/istream +++ b/libcxx/include/istream @@ -192,14 +192,12 @@ public: { this->init(__sb); } virtual ~basic_istream(); protected: -#ifndef _LIBCPP_CXX03_LANG inline _LIBCPP_INLINE_VISIBILITY basic_istream(basic_istream&& __rhs); // 27.7.1.1.2 Assign/swap: inline _LIBCPP_INLINE_VISIBILITY basic_istream& operator=(basic_istream&& __rhs); -#endif inline _LIBCPP_HIDE_FROM_ABI_AFTER_V1 void swap(basic_istream& __rhs) { @@ -207,10 +205,8 @@ protected: basic_ios::swap(__rhs); } -#ifndef _LIBCPP_CXX03_LANG basic_istream (const basic_istream& __rhs) = delete; basic_istream& operator=(const basic_istream& __rhs) = delete; -#endif public: // 27.7.1.1.3 Prefix/suffix: @@ -333,8 +329,6 @@ basic_istream<_CharT, _Traits>::sentry::sentry(basic_istream<_CharT, _Traits>& _ __is.setstate(ios_base::failbit); } -#ifndef _LIBCPP_CXX03_LANG - template basic_istream<_CharT, _Traits>::basic_istream(basic_istream&& __rhs) : __gc_(__rhs.__gc_) @@ -351,8 +345,6 @@ basic_istream<_CharT, _Traits>::operator=(basic_istream&& __rhs) return *this; } -#endif // _LIBCPP_CXX03_LANG - template basic_istream<_CharT, _Traits>::~basic_istream() { @@ -1416,21 +1408,18 @@ public: virtual ~basic_iostream(); protected: -#ifndef _LIBCPP_CXX03_LANG inline _LIBCPP_INLINE_VISIBILITY basic_iostream(basic_iostream&& __rhs); // assign/swap inline _LIBCPP_INLINE_VISIBILITY basic_iostream& operator=(basic_iostream&& __rhs); -#endif + inline _LIBCPP_HIDE_FROM_ABI_AFTER_V1 void swap(basic_iostream& __rhs) { basic_istream::swap(__rhs); } }; -#ifndef _LIBCPP_CXX03_LANG - template basic_iostream<_CharT, _Traits>::basic_iostream(basic_iostream&& __rhs) : basic_istream<_CharT, _Traits>(_VSTD::move(__rhs)) @@ -1445,8 +1434,6 @@ basic_iostream<_CharT, _Traits>::operator=(basic_iostream&& __rhs) return *this; } -#endif // _LIBCPP_CXX03_LANG - template basic_iostream<_CharT, _Traits>::~basic_iostream() { @@ -1570,8 +1557,6 @@ getline(basic_istream<_CharT, _Traits>& __is, return getline(__is, __str, __is.widen('\n')); } -#ifndef _LIBCPP_CXX03_LANG - template inline _LIBCPP_INLINE_VISIBILITY basic_istream<_CharT, _Traits>& @@ -1590,8 +1575,6 @@ getline(basic_istream<_CharT, _Traits>&& __is, return getline(__is, __str, __is.widen('\n')); } -#endif // _LIBCPP_CXX03_LANG - template basic_istream<_CharT, _Traits>& operator>>(basic_istream<_CharT, _Traits>& __is, bitset<_Size>& __x) diff --git a/libcxx/include/iterator b/libcxx/include/iterator index 092e5898fc26a..f6b0d2ae0a963 100644 --- a/libcxx/include/iterator +++ b/libcxx/include/iterator @@ -132,6 +132,10 @@ template template concept indirectly_movable_storable = see below; // since C++20 +// [alg.req.ind.swap], concept indirectly_swappable +template + concept indirectly_swappable = see below; // since C++20 + template struct iterator // deprecated in C++17 @@ -558,16 +562,27 @@ template constexpr const E* data(initializer_list il) noexcept; #include <__debug> #include <__functional_base> #include <__iterator/advance.h> +#include <__iterator/back_insert_iterator.h> #include <__iterator/concepts.h> #include <__iterator/default_sentinel.h> +#include <__iterator/front_insert_iterator.h> #include <__iterator/incrementable_traits.h> +#include <__iterator/insert_iterator.h> +#include <__iterator/istream_iterator.h> +#include <__iterator/istreambuf_iterator.h> #include <__iterator/iter_move.h> #include <__iterator/iter_swap.h> #include <__iterator/iterator_traits.h> +#include <__iterator/iterator.h> +#include <__iterator/move_iterator.h> #include <__iterator/next.h> +#include <__iterator/ostream_iterator.h> +#include <__iterator/ostreambuf_iterator.h> #include <__iterator/prev.h> #include <__iterator/projected.h> #include <__iterator/readable_traits.h> +#include <__iterator/reverse_iterator.h> +#include <__iterator/wrap_iter.h> #include <__memory/addressof.h> #include <__memory/pointer_traits.h> #include <__utility/forward.h> @@ -575,7 +590,6 @@ template constexpr const E* data(initializer_list il) noexcept; #include // Mandated by the Standard. #include #include -#include // for forward declarations of vector and string #include #include @@ -585,17 +599,6 @@ template constexpr const E* data(initializer_list il) noexcept; _LIBCPP_BEGIN_NAMESPACE_STD -template -struct _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX17 iterator -{ - typedef _Tp value_type; - typedef _Distance difference_type; - typedef _Pointer pointer; - typedef _Reference reference; - typedef _Category iterator_category; -}; - template inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 typename iterator_traits<_InputIter>::difference_type @@ -623,1120 +626,6 @@ distance(_InputIter __first, _InputIter __last) return _VSTD::__distance(__first, __last, typename iterator_traits<_InputIter>::iterator_category()); } -template -struct __is_stashing_iterator : false_type {}; - -template -struct __is_stashing_iterator<_Tp, typename __void_t::type> - : true_type {}; - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -template -class _LIBCPP_TEMPLATE_VIS reverse_iterator -#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) - : public iterator::iterator_category, - typename iterator_traits<_Iter>::value_type, - typename iterator_traits<_Iter>::difference_type, - typename iterator_traits<_Iter>::pointer, - typename iterator_traits<_Iter>::reference> -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP -private: -#ifndef _LIBCPP_ABI_NO_ITERATOR_BASES - _Iter __t; // no longer used as of LWG #2360, not removed due to ABI break -#endif - - static_assert(!__is_stashing_iterator<_Iter>::value, - "The specified iterator type cannot be used with reverse_iterator; " - "Using stashing iterators with reverse_iterator causes undefined behavior"); - -protected: - _Iter current; -public: - typedef _Iter iterator_type; - typedef typename iterator_traits<_Iter>::difference_type difference_type; - typedef typename iterator_traits<_Iter>::reference reference; - typedef typename iterator_traits<_Iter>::pointer pointer; - typedef _If<__is_cpp17_random_access_iterator<_Iter>::value, - random_access_iterator_tag, - typename iterator_traits<_Iter>::iterator_category> iterator_category; - typedef typename iterator_traits<_Iter>::value_type value_type; - -#if _LIBCPP_STD_VER > 17 - typedef _If<__is_cpp17_random_access_iterator<_Iter>::value, - random_access_iterator_tag, - bidirectional_iterator_tag> iterator_concept; -#endif - -#ifndef _LIBCPP_ABI_NO_ITERATOR_BASES - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator() : __t(), current() {} - - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - explicit reverse_iterator(_Iter __x) : __t(__x), current(__x) {} - - template ::value && is_convertible<_Up const&, _Iter>::value - > > - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator(const reverse_iterator<_Up>& __u) - : __t(__u.base()), current(__u.base()) - { } - - template ::value && - is_convertible<_Up const&, _Iter>::value && - is_assignable<_Up const&, _Iter>::value - > > - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator& operator=(const reverse_iterator<_Up>& __u) { - __t = current = __u.base(); - return *this; - } -#else - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator() : current() {} - - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - explicit reverse_iterator(_Iter __x) : current(__x) {} - - template ::value && is_convertible<_Up const&, _Iter>::value - > > - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator(const reverse_iterator<_Up>& __u) - : current(__u.base()) - { } - - template ::value && - is_convertible<_Up const&, _Iter>::value && - is_assignable<_Up const&, _Iter>::value - > > - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator& operator=(const reverse_iterator<_Up>& __u) { - current = __u.base(); - return *this; - } -#endif - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - _Iter base() const {return current;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reference operator*() const {_Iter __tmp = current; return *--__tmp;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - pointer operator->() const {return _VSTD::addressof(operator*());} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator& operator++() {--current; return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator operator++(int) {reverse_iterator __tmp(*this); --current; return __tmp;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator& operator--() {++current; return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator operator--(int) {reverse_iterator __tmp(*this); ++current; return __tmp;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator operator+ (difference_type __n) const {return reverse_iterator(current - __n);} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator& operator+=(difference_type __n) {current -= __n; return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator operator- (difference_type __n) const {return reverse_iterator(current + __n);} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reverse_iterator& operator-=(difference_type __n) {current += __n; return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reference operator[](difference_type __n) const {return *(*this + __n);} -}; - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator==(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) -{ - return __x.base() == __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator<(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) -{ - return __x.base() > __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator!=(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) -{ - return __x.base() != __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator>(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) -{ - return __x.base() < __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator>=(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) -{ - return __x.base() <= __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator<=(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) -{ - return __x.base() >= __y.base(); -} - -#ifndef _LIBCPP_CXX03_LANG -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -auto -operator-(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) --> decltype(__y.base() - __x.base()) -{ - return __y.base() - __x.base(); -} -#else -template -inline _LIBCPP_INLINE_VISIBILITY -typename reverse_iterator<_Iter1>::difference_type -operator-(const reverse_iterator<_Iter1>& __x, const reverse_iterator<_Iter2>& __y) -{ - return __y.base() - __x.base(); -} -#endif - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -reverse_iterator<_Iter> -operator+(typename reverse_iterator<_Iter>::difference_type __n, const reverse_iterator<_Iter>& __x) -{ - return reverse_iterator<_Iter>(__x.base() - __n); -} - -#if _LIBCPP_STD_VER > 11 -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -reverse_iterator<_Iter> make_reverse_iterator(_Iter __i) -{ - return reverse_iterator<_Iter>(__i); -} -#endif - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -template -class _LIBCPP_TEMPLATE_VIS back_insert_iterator -#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) - : public iterator -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP -protected: - _Container* container; -public: - typedef output_iterator_tag iterator_category; - typedef void value_type; -#if _LIBCPP_STD_VER > 17 - typedef ptrdiff_t difference_type; -#else - typedef void difference_type; -#endif - typedef void pointer; - typedef void reference; - typedef _Container container_type; - - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 explicit back_insert_iterator(_Container& __x) : container(_VSTD::addressof(__x)) {} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 back_insert_iterator& operator=(const typename _Container::value_type& __value_) - {container->push_back(__value_); return *this;} -#ifndef _LIBCPP_CXX03_LANG - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 back_insert_iterator& operator=(typename _Container::value_type&& __value_) - {container->push_back(_VSTD::move(__value_)); return *this;} -#endif // _LIBCPP_CXX03_LANG - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 back_insert_iterator& operator*() {return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 back_insert_iterator& operator++() {return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 back_insert_iterator operator++(int) {return *this;} -}; - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 -back_insert_iterator<_Container> -back_inserter(_Container& __x) -{ - return back_insert_iterator<_Container>(__x); -} - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -template -class _LIBCPP_TEMPLATE_VIS front_insert_iterator -#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) - : public iterator -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP -protected: - _Container* container; -public: - typedef output_iterator_tag iterator_category; - typedef void value_type; -#if _LIBCPP_STD_VER > 17 - typedef ptrdiff_t difference_type; -#else - typedef void difference_type; -#endif - typedef void pointer; - typedef void reference; - typedef _Container container_type; - - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 explicit front_insert_iterator(_Container& __x) : container(_VSTD::addressof(__x)) {} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 front_insert_iterator& operator=(const typename _Container::value_type& __value_) - {container->push_front(__value_); return *this;} -#ifndef _LIBCPP_CXX03_LANG - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 front_insert_iterator& operator=(typename _Container::value_type&& __value_) - {container->push_front(_VSTD::move(__value_)); return *this;} -#endif // _LIBCPP_CXX03_LANG - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 front_insert_iterator& operator*() {return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 front_insert_iterator& operator++() {return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 front_insert_iterator operator++(int) {return *this;} -}; - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 -front_insert_iterator<_Container> -front_inserter(_Container& __x) -{ - return front_insert_iterator<_Container>(__x); -} - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -template -class _LIBCPP_TEMPLATE_VIS insert_iterator -#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) - : public iterator -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP -protected: - _Container* container; - typename _Container::iterator iter; // FIXME: `ranges::iterator_t` in C++20 mode -public: - typedef output_iterator_tag iterator_category; - typedef void value_type; -#if _LIBCPP_STD_VER > 17 - typedef ptrdiff_t difference_type; -#else - typedef void difference_type; -#endif - typedef void pointer; - typedef void reference; - typedef _Container container_type; - - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator(_Container& __x, typename _Container::iterator __i) - : container(_VSTD::addressof(__x)), iter(__i) {} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator& operator=(const typename _Container::value_type& __value_) - {iter = container->insert(iter, __value_); ++iter; return *this;} -#ifndef _LIBCPP_CXX03_LANG - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator& operator=(typename _Container::value_type&& __value_) - {iter = container->insert(iter, _VSTD::move(__value_)); ++iter; return *this;} -#endif // _LIBCPP_CXX03_LANG - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator& operator*() {return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator& operator++() {return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 insert_iterator& operator++(int) {return *this;} -}; - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 -insert_iterator<_Container> -inserter(_Container& __x, typename _Container::iterator __i) -{ - return insert_iterator<_Container>(__x, __i); -} - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -template , class _Distance = ptrdiff_t> -class _LIBCPP_TEMPLATE_VIS istream_iterator -#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) - : public iterator -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP -public: - typedef input_iterator_tag iterator_category; - typedef _Tp value_type; - typedef _Distance difference_type; - typedef const _Tp* pointer; - typedef const _Tp& reference; - typedef _CharT char_type; - typedef _Traits traits_type; - typedef basic_istream<_CharT,_Traits> istream_type; -private: - istream_type* __in_stream_; - _Tp __value_; -public: - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR istream_iterator() : __in_stream_(nullptr), __value_() {} - _LIBCPP_INLINE_VISIBILITY istream_iterator(istream_type& __s) : __in_stream_(_VSTD::addressof(__s)) - { - if (!(*__in_stream_ >> __value_)) - __in_stream_ = nullptr; - } - - _LIBCPP_INLINE_VISIBILITY const _Tp& operator*() const {return __value_;} - _LIBCPP_INLINE_VISIBILITY const _Tp* operator->() const {return _VSTD::addressof((operator*()));} - _LIBCPP_INLINE_VISIBILITY istream_iterator& operator++() - { - if (!(*__in_stream_ >> __value_)) - __in_stream_ = nullptr; - return *this; - } - _LIBCPP_INLINE_VISIBILITY istream_iterator operator++(int) - {istream_iterator __t(*this); ++(*this); return __t;} - - template - friend _LIBCPP_INLINE_VISIBILITY - bool - operator==(const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __x, - const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __y); - - template - friend _LIBCPP_INLINE_VISIBILITY - bool - operator==(const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __x, - const istream_iterator<_Up, _CharU, _TraitsU, _DistanceU>& __y); -}; - -template -inline _LIBCPP_INLINE_VISIBILITY -bool -operator==(const istream_iterator<_Tp, _CharT, _Traits, _Distance>& __x, - const istream_iterator<_Tp, _CharT, _Traits, _Distance>& __y) -{ - return __x.__in_stream_ == __y.__in_stream_; -} - -template -inline _LIBCPP_INLINE_VISIBILITY -bool -operator!=(const istream_iterator<_Tp, _CharT, _Traits, _Distance>& __x, - const istream_iterator<_Tp, _CharT, _Traits, _Distance>& __y) -{ - return !(__x == __y); -} - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -template > -class _LIBCPP_TEMPLATE_VIS ostream_iterator -#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) - : public iterator -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP -public: - typedef output_iterator_tag iterator_category; - typedef void value_type; -#if _LIBCPP_STD_VER > 17 - typedef ptrdiff_t difference_type; -#else - typedef void difference_type; -#endif - typedef void pointer; - typedef void reference; - typedef _CharT char_type; - typedef _Traits traits_type; - typedef basic_ostream<_CharT, _Traits> ostream_type; - -private: - ostream_type* __out_stream_; - const char_type* __delim_; -public: - _LIBCPP_INLINE_VISIBILITY ostream_iterator(ostream_type& __s) _NOEXCEPT - : __out_stream_(_VSTD::addressof(__s)), __delim_(nullptr) {} - _LIBCPP_INLINE_VISIBILITY ostream_iterator(ostream_type& __s, const _CharT* __delimiter) _NOEXCEPT - : __out_stream_(_VSTD::addressof(__s)), __delim_(__delimiter) {} - _LIBCPP_INLINE_VISIBILITY ostream_iterator& operator=(const _Tp& __value_) - { - *__out_stream_ << __value_; - if (__delim_) - *__out_stream_ << __delim_; - return *this; - } - - _LIBCPP_INLINE_VISIBILITY ostream_iterator& operator*() {return *this;} - _LIBCPP_INLINE_VISIBILITY ostream_iterator& operator++() {return *this;} - _LIBCPP_INLINE_VISIBILITY ostream_iterator& operator++(int) {return *this;} -}; - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -template -class _LIBCPP_TEMPLATE_VIS istreambuf_iterator -#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) - : public iterator -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP -public: - typedef input_iterator_tag iterator_category; - typedef _CharT value_type; - typedef typename _Traits::off_type difference_type; - typedef _CharT* pointer; - typedef _CharT reference; - typedef _CharT char_type; - typedef _Traits traits_type; - typedef typename _Traits::int_type int_type; - typedef basic_streambuf<_CharT,_Traits> streambuf_type; - typedef basic_istream<_CharT,_Traits> istream_type; -private: - mutable streambuf_type* __sbuf_; - - class __proxy - { - char_type __keep_; - streambuf_type* __sbuf_; - _LIBCPP_INLINE_VISIBILITY __proxy(char_type __c, streambuf_type* __s) - : __keep_(__c), __sbuf_(__s) {} - friend class istreambuf_iterator; - public: - _LIBCPP_INLINE_VISIBILITY char_type operator*() const {return __keep_;} - }; - - _LIBCPP_INLINE_VISIBILITY - bool __test_for_eof() const - { - if (__sbuf_ && traits_type::eq_int_type(__sbuf_->sgetc(), traits_type::eof())) - __sbuf_ = nullptr; - return __sbuf_ == nullptr; - } -public: - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR istreambuf_iterator() _NOEXCEPT : __sbuf_(nullptr) {} - _LIBCPP_INLINE_VISIBILITY istreambuf_iterator(istream_type& __s) _NOEXCEPT - : __sbuf_(__s.rdbuf()) {} - _LIBCPP_INLINE_VISIBILITY istreambuf_iterator(streambuf_type* __s) _NOEXCEPT - : __sbuf_(__s) {} - _LIBCPP_INLINE_VISIBILITY istreambuf_iterator(const __proxy& __p) _NOEXCEPT - : __sbuf_(__p.__sbuf_) {} - - _LIBCPP_INLINE_VISIBILITY char_type operator*() const - {return static_cast(__sbuf_->sgetc());} - _LIBCPP_INLINE_VISIBILITY istreambuf_iterator& operator++() - { - __sbuf_->sbumpc(); - return *this; - } - _LIBCPP_INLINE_VISIBILITY __proxy operator++(int) - { - return __proxy(__sbuf_->sbumpc(), __sbuf_); - } - - _LIBCPP_INLINE_VISIBILITY bool equal(const istreambuf_iterator& __b) const - {return __test_for_eof() == __b.__test_for_eof();} -}; - -template -inline _LIBCPP_INLINE_VISIBILITY -bool operator==(const istreambuf_iterator<_CharT,_Traits>& __a, - const istreambuf_iterator<_CharT,_Traits>& __b) - {return __a.equal(__b);} - -template -inline _LIBCPP_INLINE_VISIBILITY -bool operator!=(const istreambuf_iterator<_CharT,_Traits>& __a, - const istreambuf_iterator<_CharT,_Traits>& __b) - {return !__a.equal(__b);} - -_LIBCPP_SUPPRESS_DEPRECATED_PUSH -template -class _LIBCPP_TEMPLATE_VIS ostreambuf_iterator -#if _LIBCPP_STD_VER <= 14 || !defined(_LIBCPP_ABI_NO_ITERATOR_BASES) - : public iterator -#endif -{ -_LIBCPP_SUPPRESS_DEPRECATED_POP -public: - typedef output_iterator_tag iterator_category; - typedef void value_type; -#if _LIBCPP_STD_VER > 17 - typedef ptrdiff_t difference_type; -#else - typedef void difference_type; -#endif - typedef void pointer; - typedef void reference; - typedef _CharT char_type; - typedef _Traits traits_type; - typedef basic_streambuf<_CharT, _Traits> streambuf_type; - typedef basic_ostream<_CharT, _Traits> ostream_type; - -private: - streambuf_type* __sbuf_; -public: - _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator(ostream_type& __s) _NOEXCEPT - : __sbuf_(__s.rdbuf()) {} - _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator(streambuf_type* __s) _NOEXCEPT - : __sbuf_(__s) {} - _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator& operator=(_CharT __c) - { - if (__sbuf_ && traits_type::eq_int_type(__sbuf_->sputc(__c), traits_type::eof())) - __sbuf_ = nullptr; - return *this; - } - _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator& operator*() {return *this;} - _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator& operator++() {return *this;} - _LIBCPP_INLINE_VISIBILITY ostreambuf_iterator& operator++(int) {return *this;} - _LIBCPP_INLINE_VISIBILITY bool failed() const _NOEXCEPT {return __sbuf_ == nullptr;} - - template - friend - _LIBCPP_HIDDEN - ostreambuf_iterator<_Ch, _Tr> - __pad_and_output(ostreambuf_iterator<_Ch, _Tr> __s, - const _Ch* __ob, const _Ch* __op, const _Ch* __oe, - ios_base& __iob, _Ch __fl); -}; - -template -class _LIBCPP_TEMPLATE_VIS move_iterator -{ -private: - _Iter __i; -public: - typedef _Iter iterator_type; - typedef typename iterator_traits::value_type value_type; - typedef typename iterator_traits::difference_type difference_type; - typedef iterator_type pointer; - typedef _If<__is_cpp17_random_access_iterator<_Iter>::value, - random_access_iterator_tag, - typename iterator_traits<_Iter>::iterator_category> iterator_category; -#if _LIBCPP_STD_VER > 17 - typedef input_iterator_tag iterator_concept; -#endif - -#ifndef _LIBCPP_CXX03_LANG - typedef typename iterator_traits::reference __reference; - typedef typename conditional< - is_reference<__reference>::value, - typename remove_reference<__reference>::type&&, - __reference - >::type reference; -#else - typedef typename iterator_traits::reference reference; -#endif - - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - move_iterator() : __i() {} - - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - explicit move_iterator(_Iter __x) : __i(__x) {} - - template ::value && is_convertible<_Up const&, _Iter>::value - > > - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - move_iterator(const move_iterator<_Up>& __u) : __i(__u.base()) {} - - template ::value && - is_convertible<_Up const&, _Iter>::value && - is_assignable<_Iter&, _Up const&>::value - > > - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - move_iterator& operator=(const move_iterator<_Up>& __u) { - __i = __u.base(); - return *this; - } - - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 _Iter base() const {return __i;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reference operator*() const { return static_cast(*__i); } - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - pointer operator->() const { return __i;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - move_iterator& operator++() {++__i; return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - move_iterator operator++(int) {move_iterator __tmp(*this); ++__i; return __tmp;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - move_iterator& operator--() {--__i; return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - move_iterator operator--(int) {move_iterator __tmp(*this); --__i; return __tmp;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - move_iterator operator+ (difference_type __n) const {return move_iterator(__i + __n);} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - move_iterator& operator+=(difference_type __n) {__i += __n; return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - move_iterator operator- (difference_type __n) const {return move_iterator(__i - __n);} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - move_iterator& operator-=(difference_type __n) {__i -= __n; return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 - reference operator[](difference_type __n) const { return static_cast(__i[__n]); } -}; - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator==(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) -{ - return __x.base() == __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator<(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) -{ - return __x.base() < __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator!=(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) -{ - return __x.base() != __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator>(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) -{ - return __x.base() > __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator>=(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) -{ - return __x.base() >= __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -bool -operator<=(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) -{ - return __x.base() <= __y.base(); -} - -#ifndef _LIBCPP_CXX03_LANG -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -auto -operator-(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) --> decltype(__x.base() - __y.base()) -{ - return __x.base() - __y.base(); -} -#else -template -inline _LIBCPP_INLINE_VISIBILITY -typename move_iterator<_Iter1>::difference_type -operator-(const move_iterator<_Iter1>& __x, const move_iterator<_Iter2>& __y) -{ - return __x.base() - __y.base(); -} -#endif - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -move_iterator<_Iter> -operator+(typename move_iterator<_Iter>::difference_type __n, const move_iterator<_Iter>& __x) -{ - return move_iterator<_Iter>(__x.base() + __n); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX14 -move_iterator<_Iter> -make_move_iterator(_Iter __i) -{ - return move_iterator<_Iter>(__i); -} - -// __wrap_iter - -template class __wrap_iter; - -template -_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator==(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - -template -_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator<(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - -template -_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator!=(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - -template -_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator>(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - -template -_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator>=(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - -template -_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator<=(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - -#ifndef _LIBCPP_CXX03_LANG -template -_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -auto -operator-(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT --> decltype(__x.base() - __y.base()); -#else -template -_LIBCPP_INLINE_VISIBILITY -typename __wrap_iter<_Iter1>::difference_type -operator-(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; -#endif - -template -_LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -__wrap_iter<_Iter> -operator+(typename __wrap_iter<_Iter>::difference_type, __wrap_iter<_Iter>) _NOEXCEPT; - -template _Op _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 copy(_Ip, _Ip, _Op); -template _B2 _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 copy_backward(_B1, _B1, _B2); -template _Op _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 move(_Ip, _Ip, _Op); -template _B2 _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX17 move_backward(_B1, _B1, _B2); - -template -class __wrap_iter -{ -public: - typedef _Iter iterator_type; - typedef typename iterator_traits::value_type value_type; - typedef typename iterator_traits::difference_type difference_type; - typedef typename iterator_traits::pointer pointer; - typedef typename iterator_traits::reference reference; - typedef typename iterator_traits::iterator_category iterator_category; -#if _LIBCPP_STD_VER > 17 - typedef contiguous_iterator_tag iterator_concept; -#endif - -private: - iterator_type __i; -public: - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter() _NOEXCEPT -#if _LIBCPP_STD_VER > 11 - : __i{} -#endif - { -#if _LIBCPP_DEBUG_LEVEL == 2 - __get_db()->__insert_i(this); -#endif - } - template _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG - __wrap_iter(const __wrap_iter<_Up>& __u, - typename enable_if::value>::type* = nullptr) _NOEXCEPT - : __i(__u.base()) - { -#if _LIBCPP_DEBUG_LEVEL == 2 - __get_db()->__iterator_copy(this, &__u); -#endif - } -#if _LIBCPP_DEBUG_LEVEL == 2 - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG - __wrap_iter(const __wrap_iter& __x) - : __i(__x.base()) - { - __get_db()->__iterator_copy(this, &__x); - } - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG - __wrap_iter& operator=(const __wrap_iter& __x) - { - if (this != &__x) - { - __get_db()->__iterator_copy(this, &__x); - __i = __x.__i; - } - return *this; - } - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG - ~__wrap_iter() - { - __get_db()->__erase_i(this); - } -#endif - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG reference operator*() const _NOEXCEPT - { -#if _LIBCPP_DEBUG_LEVEL == 2 - _LIBCPP_ASSERT(__get_const_db()->__dereferenceable(this), - "Attempted to dereference a non-dereferenceable iterator"); -#endif - return *__i; - } - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG pointer operator->() const _NOEXCEPT - { -#if _LIBCPP_DEBUG_LEVEL == 2 - _LIBCPP_ASSERT(__get_const_db()->__dereferenceable(this), - "Attempted to dereference a non-dereferenceable iterator"); -#endif - return _VSTD::__to_address(__i); - } - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter& operator++() _NOEXCEPT - { -#if _LIBCPP_DEBUG_LEVEL == 2 - _LIBCPP_ASSERT(__get_const_db()->__dereferenceable(this), - "Attempted to increment a non-incrementable iterator"); -#endif - ++__i; - return *this; - } - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter operator++(int) _NOEXCEPT - {__wrap_iter __tmp(*this); ++(*this); return __tmp;} - - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter& operator--() _NOEXCEPT - { -#if _LIBCPP_DEBUG_LEVEL == 2 - _LIBCPP_ASSERT(__get_const_db()->__decrementable(this), - "Attempted to decrement a non-decrementable iterator"); -#endif - --__i; - return *this; - } - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter operator--(int) _NOEXCEPT - {__wrap_iter __tmp(*this); --(*this); return __tmp;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter operator+ (difference_type __n) const _NOEXCEPT - {__wrap_iter __w(*this); __w += __n; return __w;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter& operator+=(difference_type __n) _NOEXCEPT - { -#if _LIBCPP_DEBUG_LEVEL == 2 - _LIBCPP_ASSERT(__get_const_db()->__addable(this, __n), - "Attempted to add/subtract an iterator outside its valid range"); -#endif - __i += __n; - return *this; - } - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter operator- (difference_type __n) const _NOEXCEPT - {return *this + (-__n);} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter& operator-=(difference_type __n) _NOEXCEPT - {*this += -__n; return *this;} - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG reference operator[](difference_type __n) const _NOEXCEPT - { -#if _LIBCPP_DEBUG_LEVEL == 2 - _LIBCPP_ASSERT(__get_const_db()->__subscriptable(this, __n), - "Attempted to subscript an iterator outside its valid range"); -#endif - return __i[__n]; - } - - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG iterator_type base() const _NOEXCEPT {return __i;} - -private: -#if _LIBCPP_DEBUG_LEVEL == 2 - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter(const void* __p, iterator_type __x) : __i(__x) - { - __get_db()->__insert_ic(this, __p); - } -#else - _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG __wrap_iter(iterator_type __x) _NOEXCEPT : __i(__x) {} -#endif - - template friend class __wrap_iter; - template friend class basic_string; - template friend class _LIBCPP_TEMPLATE_VIS vector; - template friend class _LIBCPP_TEMPLATE_VIS span; - - template - _LIBCPP_CONSTEXPR_IF_NODEBUG friend - bool - operator==(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - - template - _LIBCPP_CONSTEXPR_IF_NODEBUG friend - bool - operator<(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - - template - _LIBCPP_CONSTEXPR_IF_NODEBUG friend - bool - operator!=(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - - template - _LIBCPP_CONSTEXPR_IF_NODEBUG friend - bool - operator>(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - - template - _LIBCPP_CONSTEXPR_IF_NODEBUG friend - bool - operator>=(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - - template - _LIBCPP_CONSTEXPR_IF_NODEBUG friend - bool - operator<=(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; - -#ifndef _LIBCPP_CXX03_LANG - template - _LIBCPP_CONSTEXPR_IF_NODEBUG friend - auto - operator-(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT - -> decltype(__x.base() - __y.base()); -#else - template - _LIBCPP_CONSTEXPR_IF_NODEBUG friend - typename __wrap_iter<_Iter1>::difference_type - operator-(const __wrap_iter<_Iter1>&, const __wrap_iter<_Iter2>&) _NOEXCEPT; -#endif - - template - _LIBCPP_CONSTEXPR_IF_NODEBUG friend - __wrap_iter<_Iter1> - operator+(typename __wrap_iter<_Iter1>::difference_type, __wrap_iter<_Iter1>) _NOEXCEPT; -}; - -#if _LIBCPP_STD_VER <= 17 -template -struct __is_cpp17_contiguous_iterator<__wrap_iter<_It> > : true_type {}; -#endif - -template -_LIBCPP_CONSTEXPR -decltype(_VSTD::__to_address(declval<_Iter>())) -__to_address(__wrap_iter<_Iter> __w) _NOEXCEPT { - return _VSTD::__to_address(__w.base()); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator==(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT -{ - return __x.base() == __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator<(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT -{ -#if _LIBCPP_DEBUG_LEVEL == 2 - _LIBCPP_ASSERT(__get_const_db()->__less_than_comparable(&__x, &__y), - "Attempted to compare incomparable iterators"); -#endif - return __x.base() < __y.base(); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator!=(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT -{ - return !(__x == __y); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator>(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT -{ - return __y < __x; -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator>=(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT -{ - return !(__x < __y); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator<=(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT -{ - return !(__y < __x); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator!=(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter1>& __y) _NOEXCEPT -{ - return !(__x == __y); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator>(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter1>& __y) _NOEXCEPT -{ - return __y < __x; -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator>=(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter1>& __y) _NOEXCEPT -{ - return !(__x < __y); -} - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -bool -operator<=(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter1>& __y) _NOEXCEPT -{ - return !(__y < __x); -} - -#ifndef _LIBCPP_CXX03_LANG -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -auto -operator-(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT --> decltype(__x.base() - __y.base()) -{ -#if _LIBCPP_DEBUG_LEVEL == 2 - _LIBCPP_ASSERT(__get_const_db()->__less_than_comparable(&__x, &__y), - "Attempted to subtract incompatible iterators"); -#endif - return __x.base() - __y.base(); -} -#else -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -typename __wrap_iter<_Iter1>::difference_type -operator-(const __wrap_iter<_Iter1>& __x, const __wrap_iter<_Iter2>& __y) _NOEXCEPT -{ -#if _LIBCPP_DEBUG_LEVEL == 2 - _LIBCPP_ASSERT(__get_const_db()->__less_than_comparable(&__x, &__y), - "Attempted to subtract incompatible iterators"); -#endif - return __x.base() - __y.base(); -} -#endif - -template -inline _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_IF_NODEBUG -__wrap_iter<_Iter> -operator+(typename __wrap_iter<_Iter>::difference_type __n, - __wrap_iter<_Iter> __x) _NOEXCEPT -{ - __x += __n; - return __x; -} - template _LIBCPP_INLINE_VISIBILITY _LIBCPP_CONSTEXPR_AFTER_CXX11 _Tp* diff --git a/libcxx/include/map b/libcxx/include/map index 0da590fd71148..513a04dd79230 100644 --- a/libcxx/include/map +++ b/libcxx/include/map @@ -491,6 +491,7 @@ erase_if(multimap& c, Predicate pred); // C++20 #include <__config> #include <__debug> +#include <__functional/is_transparent.h> #include <__node_handle> #include <__tree> #include <__utility/forward.h> diff --git a/libcxx/include/memory b/libcxx/include/memory index 62dd992b47278..4f73a81a2d86e 100644 --- a/libcxx/include/memory +++ b/libcxx/include/memory @@ -672,6 +672,7 @@ void* align(size_t alignment, size_t size, void*& ptr, size_t& space); #include <__memory/addressof.h> #include <__memory/allocation_guard.h> #include <__memory/allocator.h> +#include <__memory/allocator_arg_t.h> #include <__memory/allocator_traits.h> #include <__memory/compressed_pair.h> #include <__memory/construct_at.h> @@ -682,6 +683,7 @@ void* align(size_t alignment, size_t size, void*& ptr, size_t& space); #include <__memory/temporary_buffer.h> #include <__memory/uninitialized_algorithms.h> #include <__memory/unique_ptr.h> +#include <__memory/uses_allocator.h> #include #include #include diff --git a/libcxx/include/module.modulemap b/libcxx/include/module.modulemap index 48573377bb7b0..7549815d4d9e8 100644 --- a/libcxx/include/module.modulemap +++ b/libcxx/include/module.modulemap @@ -407,11 +407,32 @@ module std [system] { module functional { header "functional" export * + module __functional { - module hash { header "__functional/hash.h" } - module search { header "__functional/search.h" } - module unary_function { header "__functional/unary_function.h" } - module unwrap_ref { header "__functional/unwrap_ref.h" } + module binary_function { header "__functional/binary_function.h" } + module binary_negate { header "__functional/binary_negate.h" } + module bind { header "__functional/bind.h" } + module bind_front { header "__functional/bind_front.h" } + module binder1st { header "__functional/binder1st.h" } + module binder2nd { header "__functional/binder2nd.h" } + module default_searcher { header "__functional/default_searcher.h" } + module function { header "__functional/function.h" } + module hash { header "__functional/hash.h" } + module identity { header "__functional/identity.h" } + module invoke { header "__functional/invoke.h" } + module mem_fn { header "__functional/mem_fn.h" } + module mem_fun_ref { header "__functional/mem_fun_ref.h" } + module not_fn { header "__functional/not_fn.h" } + module operations { header "__functional/operations.h" } + module perfect_forward { header "__functional/perfect_forward.h" } + module pointer_to_binary_function { header "__functional/pointer_to_binary_function.h" } + module pointer_to_unary_function { header "__functional/pointer_to_unary_function.h" } + module ranges_operations { header "__functional/ranges_operations.h" } + module reference_wrapper { header "__functional/reference_wrapper.h" } + module unary_function { header "__functional/unary_function.h" } + module unary_negate { header "__functional/unary_negate.h" } + module unwrap_ref { header "__functional/unwrap_ref.h" } + module weak_result_type { header "__functional/weak_result_type.h" } } } module future { @@ -453,17 +474,28 @@ module std [system] { export * module __iterator { - module advance { header "__iterator/advance.h" } - module concepts { header "__iterator/concepts.h" } - module default_sentinel { header "__iterator/default_sentinel.h" } - module incrementable_traits { header "__iterator/incrementable_traits.h" } - module iter_move { header "__iterator/iter_move.h" } - module iter_swap { header "__iterator/iter_swap.h" } - module iterator_traits { header "__iterator/iterator_traits.h" } - module next { header "__iterator/next.h" } - module prev { header "__iterator/prev.h" } - module projected { header "__iterator/projected.h" } - module readable_traits { header "__iterator/readable_traits.h" } + module advance { header "__iterator/advance.h" } + module back_insert_iterator { header "__iterator/back_insert_iterator.h" } + module concepts { header "__iterator/concepts.h" } + module default_sentinel { header "__iterator/default_sentinel.h" } + module front_insert_iterator { header "__iterator/front_insert_iterator.h" } + module incrementable_traits { header "__iterator/incrementable_traits.h" } + module insert_iterator { header "__iterator/insert_iterator.h" } + module istream_iterator { header "__iterator/istream_iterator.h" } + module istreambuf_iterator { header "__iterator/istreambuf_iterator.h" } + module iter_move { header "__iterator/iter_move.h" } + module iter_swap { header "__iterator/iter_swap.h" } + module iterator { header "__iterator/iterator.h" } + module iterator_traits { header "__iterator/iterator_traits.h" } + module move_iterator { header "__iterator/move_iterator.h" } + module next { header "__iterator/next.h" } + module ostream_iterator { header "__iterator/ostream_iterator.h" } + module ostreambuf_iterator { header "__iterator/ostreambuf_iterator.h" } + module prev { header "__iterator/prev.h" } + module projected { header "__iterator/projected.h" } + module readable_traits { header "__iterator/readable_traits.h" } + module reverse_iterator { header "__iterator/reverse_iterator.h" } + module wrap_iter { header "__iterator/wrap_iter.h" } } } module latch { @@ -497,6 +529,7 @@ module std [system] { module addressof { header "__memory/addressof.h" } module allocation_guard { header "__memory/allocation_guard.h" } module allocator_traits { header "__memory/allocator_traits.h" } + module allocator_arg_t { header "__memory/allocator_arg_t.h" } module allocator { header "__memory/allocator.h" } module auto_ptr { header "__memory/auto_ptr.h" } module compressed_pair { header "__memory/compressed_pair.h" } @@ -715,7 +748,6 @@ module std [system] { module __debug { header "__debug" export * } module __errc { header "__errc" export * } module __function_like { header "__function_like.h" export * } - module __functional_base { header "__functional_base" export * } module __hash_table { header "__hash_table" export * } module __locale { header "__locale" export * } module __mutex_base { header "__mutex_base" export * } diff --git a/libcxx/include/optional b/libcxx/include/optional index 0e6c1b88f52cf..118db66a4abc9 100644 --- a/libcxx/include/optional +++ b/libcxx/include/optional @@ -906,7 +906,7 @@ public: _LIBCPP_INLINE_VISIBILITY constexpr const value_type& - operator*() const& + operator*() const& noexcept { _LIBCPP_ASSERT(this->has_value(), "optional operator* called on a disengaged value"); return this->__get(); @@ -915,7 +915,7 @@ public: _LIBCPP_INLINE_VISIBILITY constexpr value_type& - operator*() & + operator*() & noexcept { _LIBCPP_ASSERT(this->has_value(), "optional operator* called on a disengaged value"); return this->__get(); @@ -924,7 +924,7 @@ public: _LIBCPP_INLINE_VISIBILITY constexpr value_type&& - operator*() && + operator*() && noexcept { _LIBCPP_ASSERT(this->has_value(), "optional operator* called on a disengaged value"); return _VSTD::move(this->__get()); @@ -933,7 +933,7 @@ public: _LIBCPP_INLINE_VISIBILITY constexpr const value_type&& - operator*() const&& + operator*() const&& noexcept { _LIBCPP_ASSERT(this->has_value(), "optional operator* called on a disengaged value"); return _VSTD::move(this->__get()); diff --git a/libcxx/include/ostream b/libcxx/include/ostream index 81ba565e67f53..efeaee253eb97 100644 --- a/libcxx/include/ostream +++ b/libcxx/include/ostream @@ -165,27 +165,21 @@ public: { this->init(__sb); } virtual ~basic_ostream(); protected: -#ifndef _LIBCPP_CXX03_LANG inline _LIBCPP_INLINE_VISIBILITY basic_ostream(basic_ostream&& __rhs); // 27.7.2.3 Assign/swap inline _LIBCPP_INLINE_VISIBILITY basic_ostream& operator=(basic_ostream&& __rhs); -#endif + inline _LIBCPP_HIDE_FROM_ABI_AFTER_V1 void swap(basic_ostream& __rhs) { basic_ios::swap(__rhs); } -#ifndef _LIBCPP_CXX03_LANG basic_ostream (const basic_ostream& __rhs) = delete; basic_ostream& operator=(const basic_ostream& __rhs) = delete; -#else - basic_ostream (const basic_ostream& __rhs); // not defined - basic_ostream& operator=(const basic_ostream& __rhs); // not defined -#endif -public: +public: // 27.7.2.4 Prefix/suffix: class _LIBCPP_TEMPLATE_VIS sentry; @@ -291,8 +285,6 @@ basic_ostream<_CharT, _Traits>::sentry::~sentry() } } -#ifndef _LIBCPP_CXX03_LANG - template basic_ostream<_CharT, _Traits>::basic_ostream(basic_ostream&& __rhs) { @@ -307,8 +299,6 @@ basic_ostream<_CharT, _Traits>::operator=(basic_ostream&& __rhs) return *this; } -#endif // _LIBCPP_CXX03_LANG - template basic_ostream<_CharT, _Traits>::~basic_ostream() { diff --git a/libcxx/include/queue b/libcxx/include/queue index 3c7bbf2f6adb7..42470e3a10224 100644 --- a/libcxx/include/queue +++ b/libcxx/include/queue @@ -179,6 +179,7 @@ template */ #include <__config> +#include <__memory/uses_allocator.h> #include <__utility/forward.h> #include #include diff --git a/libcxx/include/regex b/libcxx/include/regex index 5d4c52c40a18f..55f1d34b51f5a 100644 --- a/libcxx/include/regex +++ b/libcxx/include/regex @@ -764,7 +764,7 @@ typedef regex_token_iterator wsregex_token_iterator; #include <__config> #include <__debug> -#include <__functional/search.h> +#include <__iterator/wrap_iter.h> #include <__locale> #include #include diff --git a/libcxx/include/set b/libcxx/include/set index 0da484b2248d1..21ec8435dd840 100644 --- a/libcxx/include/set +++ b/libcxx/include/set @@ -435,6 +435,7 @@ erase_if(multiset& c, Predicate pred); // C++20 #include <__config> #include <__debug> +#include <__functional/is_transparent.h> #include <__node_handle> #include <__tree> #include <__utility/forward.h> diff --git a/libcxx/include/span b/libcxx/include/span index 80c550daa3a5d..0892e25a59bc2 100644 --- a/libcxx/include/span +++ b/libcxx/include/span @@ -129,6 +129,7 @@ template #include <__config> #include <__debug> +#include <__iterator/wrap_iter.h> #include <__ranges/enable_borrowed_range.h> #include <__ranges/enable_view.h> #include // for array diff --git a/libcxx/include/sstream b/libcxx/include/sstream index 0b614a0b09562..fbe5ffcab4c6e 100644 --- a/libcxx/include/sstream +++ b/libcxx/include/sstream @@ -219,19 +219,13 @@ private: public: // 30.8.2.1 [stringbuf.cons], constructors -#ifndef _LIBCPP_CXX03_LANG _LIBCPP_INLINE_VISIBILITY - basic_stringbuf() : basic_stringbuf(ios_base::in | ios_base::out) {} + basic_stringbuf() + : __hm_(nullptr), __mode_(ios_base::in | ios_base::out) {} _LIBCPP_INLINE_VISIBILITY explicit basic_stringbuf(ios_base::openmode __wch) : __hm_(nullptr), __mode_(__wch) {} -#else - _LIBCPP_INLINE_VISIBILITY - explicit basic_stringbuf(ios_base::openmode __wch = ios_base::in | - ios_base::out) - : __hm_(nullptr), __mode_(__wch) {} -#endif _LIBCPP_INLINE_VISIBILITY explicit basic_stringbuf(const string_type& __s, @@ -643,18 +637,13 @@ private: public: // 30.8.3.1 [istringstream.cons], constructors -#ifndef _LIBCPP_CXX03_LANG _LIBCPP_INLINE_VISIBILITY - basic_istringstream() : basic_istringstream(ios_base::in) {} + basic_istringstream() + : basic_istream<_CharT, _Traits>(&__sb_), __sb_(ios_base::in) {} _LIBCPP_INLINE_VISIBILITY explicit basic_istringstream(ios_base::openmode __wch) : basic_istream<_CharT, _Traits>(&__sb_), __sb_(__wch | ios_base::in) {} -#else - _LIBCPP_INLINE_VISIBILITY - explicit basic_istringstream(ios_base::openmode __wch = ios_base::in) - : basic_istream<_CharT, _Traits>(&__sb_), __sb_(__wch | ios_base::in) {} -#endif _LIBCPP_INLINE_VISIBILITY explicit basic_istringstream(const string_type& __s, @@ -728,20 +717,13 @@ private: public: // 30.8.4.1 [ostringstream.cons], constructors -#ifndef _LIBCPP_CXX03_LANG _LIBCPP_INLINE_VISIBILITY - basic_ostringstream() : basic_ostringstream(ios_base::out) {} + basic_ostringstream() + : basic_ostream<_CharT, _Traits>(&__sb_), __sb_(ios_base::out) {} _LIBCPP_INLINE_VISIBILITY explicit basic_ostringstream(ios_base::openmode __wch) - : basic_ostream<_CharT, _Traits>(&__sb_), - __sb_(__wch | ios_base::out) {} -#else - _LIBCPP_INLINE_VISIBILITY - explicit basic_ostringstream(ios_base::openmode __wch = ios_base::out) - : basic_ostream<_CharT, _Traits>(&__sb_), - __sb_(__wch | ios_base::out) {} -#endif + : basic_ostream<_CharT, _Traits>(&__sb_), __sb_(__wch | ios_base::out) {} _LIBCPP_INLINE_VISIBILITY explicit basic_ostringstream(const string_type& __s, @@ -816,19 +798,13 @@ private: public: // 30.8.5.1 [stringstream.cons], constructors -#ifndef _LIBCPP_CXX03_LANG _LIBCPP_INLINE_VISIBILITY - basic_stringstream() : basic_stringstream(ios_base::in | ios_base::out) {} + basic_stringstream() + : basic_iostream<_CharT, _Traits>(&__sb_), __sb_(ios_base::in | ios_base::out) {} _LIBCPP_INLINE_VISIBILITY explicit basic_stringstream(ios_base::openmode __wch) : basic_iostream<_CharT, _Traits>(&__sb_), __sb_(__wch) {} -#else - _LIBCPP_INLINE_VISIBILITY - explicit basic_stringstream(ios_base::openmode __wch = ios_base::in | - ios_base::out) - : basic_iostream<_CharT, _Traits>(&__sb_), __sb_(__wch) {} -#endif _LIBCPP_INLINE_VISIBILITY explicit basic_stringstream(const string_type& __s, diff --git a/libcxx/include/stack b/libcxx/include/stack index 6dd055e86860f..aefef31ac97b4 100644 --- a/libcxx/include/stack +++ b/libcxx/include/stack @@ -88,6 +88,7 @@ template */ #include <__config> +#include <__memory/uses_allocator.h> #include <__utility/forward.h> #include diff --git a/libcxx/include/string b/libcxx/include/string index 9b76be30ad7d4..3917c07a1f744 100644 --- a/libcxx/include/string +++ b/libcxx/include/string @@ -516,6 +516,7 @@ basic_string operator "" s( const char32_t *str, size_t len ); // C++1 #include <__config> #include <__debug> #include <__functional_base> +#include <__iterator/wrap_iter.h> #include #include #include // EOF @@ -4438,8 +4439,6 @@ basic_istream<_CharT, _Traits>& getline(basic_istream<_CharT, _Traits>& __is, basic_string<_CharT, _Traits, _Allocator>& __str); -#ifndef _LIBCPP_CXX03_LANG - template inline _LIBCPP_INLINE_VISIBILITY basic_istream<_CharT, _Traits>& @@ -4452,8 +4451,6 @@ basic_istream<_CharT, _Traits>& getline(basic_istream<_CharT, _Traits>&& __is, basic_string<_CharT, _Traits, _Allocator>& __str); -#endif // _LIBCPP_CXX03_LANG - #if _LIBCPP_STD_VER > 17 template inline _LIBCPP_INLINE_VISIBILITY diff --git a/libcxx/include/system_error b/libcxx/include/system_error index 564f37a96b4f0..aab97681156cf 100644 --- a/libcxx/include/system_error +++ b/libcxx/include/system_error @@ -144,7 +144,8 @@ template <> struct hash; #include <__config> #include <__errc> -#include <__functional_base> // unary_function +#include <__functional/unary_function.h> +#include <__functional_base> #include #include #include diff --git a/libcxx/include/tuple b/libcxx/include/tuple index 42e05b988faa8..032ac861d22ff 100644 --- a/libcxx/include/tuple +++ b/libcxx/include/tuple @@ -150,11 +150,13 @@ template */ #include <__config> -#include <__functional_base> #include <__functional/unwrap_ref.h> +#include <__functional_base> +#include <__memory/allocator_arg_t.h> +#include <__memory/uses_allocator.h> +#include <__tuple> #include <__utility/forward.h> #include <__utility/move.h> -#include <__tuple> #include #include #include diff --git a/libcxx/include/type_traits b/libcxx/include/type_traits index 09b66c7871d80..cc364ce3b1f49 100644 --- a/libcxx/include/type_traits +++ b/libcxx/include/type_traits @@ -99,7 +99,7 @@ namespace std template struct is_trivial; template struct is_trivially_copyable; template struct is_standard_layout; - template struct is_literal_type; + template struct is_literal_type; // Deprecated in C++17; removed in C++20 template struct is_empty; template struct is_polymorphic; template struct is_abstract; @@ -165,8 +165,8 @@ namespace std template struct decay; template struct common_type; template struct underlying_type; - template class result_of; // undefined - template class result_of; + template class result_of; // undefined; deprecated in C++17; removed in C++20 + template class result_of; // deprecated in C++17; removed in C++20 template struct invoke_result; // C++17 // const-volatile modifications: @@ -233,7 +233,7 @@ namespace std template using underlying_type_t = typename underlying_type::type; // C++14 template - using result_of_t = typename result_of::type; // C++14 + using result_of_t = typename result_of::type; // C++14; deprecated in C++17; removed in C++20 template using invoke_result_t = typename invoke_result::type; // C++17 @@ -302,7 +302,7 @@ namespace std template inline constexpr bool is_pod_v = is_pod::value; // C++17 template inline constexpr bool is_literal_type_v - = is_literal_type::value; // C++17 + = is_literal_type::value; // C++17; deprecated in C++17; removed in C++20 template inline constexpr bool is_empty_v = is_empty::value; // C++17 template inline constexpr bool is_polymorphic_v @@ -3677,15 +3677,17 @@ _LIBCPP_INLINE_VAR _LIBCPP_CONSTEXPR bool is_pod_v // is_literal_type; -template struct _LIBCPP_TEMPLATE_VIS is_literal_type +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS) +template struct _LIBCPP_TEMPLATE_VIS _LIBCPP_DEPRECATED_IN_CXX17 is_literal_type : public integral_constant {}; #if _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES) template -_LIBCPP_INLINE_VAR _LIBCPP_CONSTEXPR bool is_literal_type_v +_LIBCPP_DEPRECATED_IN_CXX17 _LIBCPP_INLINE_VAR _LIBCPP_CONSTEXPR bool is_literal_type_v = is_literal_type<_Tp>::value; -#endif +#endif // _LIBCPP_STD_VER > 14 && !defined(_LIBCPP_HAS_NO_VARIABLE_TEMPLATES) +#endif // _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS) // is_standard_layout; @@ -4003,7 +4005,8 @@ struct __invoke_of // result_of -template class result_of; +#if _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS) +template class _LIBCPP_DEPRECATED_IN_CXX17 result_of; #ifndef _LIBCPP_CXX03_LANG @@ -4091,8 +4094,9 @@ class _LIBCPP_TEMPLATE_VIS result_of<_Fn(_Args...)> #endif // C++03 #if _LIBCPP_STD_VER > 11 -template using result_of_t = typename result_of<_Tp>::type; -#endif +template using result_of_t _LIBCPP_DEPRECATED_IN_CXX17 = typename result_of<_Tp>::type; +#endif // _LIBCPP_STD_VER > 11 +#endif // _LIBCPP_STD_VER <= 17 || defined(_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS) #if _LIBCPP_STD_VER > 14 diff --git a/libcxx/include/typeindex b/libcxx/include/typeindex index 36d8bfd88ec3f..88bb9ef03d61e 100644 --- a/libcxx/include/typeindex +++ b/libcxx/include/typeindex @@ -45,6 +45,7 @@ struct hash */ #include <__config> +#include <__functional/unary_function.h> #include <__functional_base> #include #include diff --git a/libcxx/include/typeinfo b/libcxx/include/typeinfo index 65ce53a0e9d7e..6026038ba5f94 100644 --- a/libcxx/include/typeinfo +++ b/libcxx/include/typeinfo @@ -249,7 +249,7 @@ struct __type_info_implementations { _LIBCPP_INLINE_VISIBILITY _LIBCPP_ALWAYS_INLINE static size_t __hash(__type_name_t __v) _NOEXCEPT { if (__is_type_name_unique(__v)) - return reinterpret_cast(__v); + return __v; return __non_unique_impl::__hash(__type_name_to_string(__v)); } _LIBCPP_INLINE_VISIBILITY _LIBCPP_ALWAYS_INLINE diff --git a/libcxx/include/unordered_map b/libcxx/include/unordered_map index 6e58fa9bf4fbe..ea0382de7d401 100644 --- a/libcxx/include/unordered_map +++ b/libcxx/include/unordered_map @@ -433,6 +433,7 @@ template #include <__config> #include <__debug> +#include <__functional/is_transparent.h> #include <__hash_table> #include <__node_handle> #include <__utility/forward.h> diff --git a/libcxx/include/unordered_set b/libcxx/include/unordered_set index 0e4901d6c8190..a775a9250268d 100644 --- a/libcxx/include/unordered_set +++ b/libcxx/include/unordered_set @@ -388,6 +388,7 @@ template #include <__config> #include <__debug> +#include <__functional/is_transparent.h> #include <__hash_table> #include <__node_handle> #include <__utility/forward.h> diff --git a/libcxx/include/vector b/libcxx/include/vector index bf193e5ba4c90..52ddd45ffa86b 100644 --- a/libcxx/include/vector +++ b/libcxx/include/vector @@ -144,7 +144,7 @@ public: public: reference(const reference&) noexcept; operator bool() const noexcept; - reference& operator=(const bool x) noexcept; + reference& operator=(bool x) noexcept; reference& operator=(const reference& x) noexcept; iterator operator&() const noexcept; void flip() noexcept; @@ -275,6 +275,7 @@ erase_if(vector& c, Predicate pred); // C++20 #include <__bit_reference> #include <__debug> #include <__functional_base> +#include <__iterator/wrap_iter.h> #include <__split_buffer> #include <__utility/forward.h> #include diff --git a/libcxx/src/string.cpp b/libcxx/src/string.cpp index 63b81d67049d4..97a773f79a3be 100644 --- a/libcxx/src/string.cpp +++ b/libcxx/src/string.cpp @@ -423,7 +423,7 @@ get_swprintf() } template -S i_to_string(const V v) +S i_to_string(V v) { // numeric_limits::digits10 returns value less on 1 than desired for unsigned numbers. // For example, for 1-byte unsigned value digits10 is 2 (999 can not be represented), diff --git a/libcxx/test/CMakeLists.txt b/libcxx/test/CMakeLists.txt index 429b7905fdce6..71a7d16772d35 100644 --- a/libcxx/test/CMakeLists.txt +++ b/libcxx/test/CMakeLists.txt @@ -55,9 +55,6 @@ if(LIBCXX_INCLUDE_TESTS AND NOT LIBCXX_LINK_TESTS_WITH_SHARED_LIBCXX AND NOT LIB message(FATAL_ERROR "LIBCXX_LINK_TESTS_WITH_SHARED_LIBCXX being OFF requires LIBCXX_ENABLE_STATIC to be ON") endif() -pythonize_bool(LIBCXX_ENABLE_EXCEPTIONS) -pythonize_bool(LIBCXX_ENABLE_EXPERIMENTAL_LIBRARY) -pythonize_bool(LIBCXX_ENABLE_RTTI) pythonize_bool(LIBCXX_ENABLE_SHARED) pythonize_bool(LIBCXX_LINK_TESTS_WITH_SHARED_LIBCXX) pythonize_bool(LIBCXX_LINK_TESTS_WITH_SHARED_LIBCXXABI) @@ -71,7 +68,6 @@ pythonize_bool(LIBCXX_HAS_ATOMIC_LIB) pythonize_bool(LIBCXX_HAVE_CXX_ATOMICS_WITH_LIB) pythonize_bool(LIBCXX_BUILD_EXTERNAL_THREAD_LIBRARY) pythonize_bool(LIBCXX_DEBUG_BUILD) -pythonize_bool(LIBCXX_ENABLE_DEBUG_MODE_SUPPORT) pythonize_bool(LIBCXX_ENABLE_PARALLEL_ALGORITHMS) # By default, for non-standalone builds, libcxx and libcxxabi share a library @@ -87,6 +83,35 @@ set(LIBCXX_EXECUTOR "\\\"${Python3_EXECUTABLE}\\\" ${CMAKE_CURRENT_LIST_DIR}/../ "Executor to use when running tests.") set(AUTO_GEN_COMMENT "## Autogenerated by libcxx configuration.\n# Do not edit!") +set(SERIALIZED_LIT_PARAMS "# Lit parameters serialized here for llvm-lit to pick them up\n") + +macro(serialize_lit_param param value) + string(APPEND SERIALIZED_LIT_PARAMS "config.${param} = ${value}\n") +endmacro() + +if (NOT LIBCXX_ENABLE_EXCEPTIONS) + serialize_lit_param(enable_exceptions False) +endif() + +if (NOT LIBCXX_ENABLE_EXPERIMENTAL_LIBRARY) + serialize_lit_param(enable_experimental False) +endif() + +if (NOT LIBCXX_ENABLE_RTTI) + serialize_lit_param(enable_rtti False) +endif() + +if (NOT LIBCXX_ENABLE_DEBUG_MODE_SUPPORT) + serialize_lit_param(enable_debug_tests False) +endif() + +if (TARGET_TRIPLE) + serialize_lit_param(target_triple "\"${TARGET_TRIPLE}\"") +endif() + +if (LLVM_USE_SANITIZER) + serialize_lit_param(use_sanitizer "\"${LLVM_USE_SANITIZER}\"") +endif() if (NOT DEFINED LIBCXX_TEST_DEPS) message(FATAL_ERROR "Expected LIBCXX_TEST_DEPS to be defined") diff --git a/libcxx/test/configs/legacy.cfg.in b/libcxx/test/configs/legacy.cfg.in index 9e501a68c3531..adb813644fec7 100644 --- a/libcxx/test/configs/legacy.cfg.in +++ b/libcxx/test/configs/legacy.cfg.in @@ -1,5 +1,7 @@ @AUTO_GEN_COMMENT@ +@SERIALIZED_LIT_PARAMS@ + import os import site @@ -10,19 +12,11 @@ config.libcxx_src_root = "@LIBCXX_SOURCE_DIR@" config.libcxx_obj_root = "@LIBCXX_BINARY_DIR@" config.cxx_library_root = "@LIBCXX_LIBRARY_DIR@" config.abi_library_root = "@LIBCXX_CXX_ABI_LIBRARY_PATH@" -config.enable_exceptions = @LIBCXX_ENABLE_EXCEPTIONS@ -config.enable_debug_tests = @LIBCXX_ENABLE_DEBUG_MODE_SUPPORT@ -config.enable_experimental = @LIBCXX_ENABLE_EXPERIMENTAL_LIBRARY@ -config.enable_rtti = @LIBCXX_ENABLE_RTTI@ config.enable_shared = @LIBCXX_LINK_TESTS_WITH_SHARED_LIBCXX@ config.enable_32bit = @LIBCXX_BUILD_32_BITS@ config.cxx_abi = "@LIBCXX_CXX_ABI_LIBNAME@" -config.use_sanitizer = "@LLVM_USE_SANITIZER@" -config.sanitizer_library = "@LIBCXX_SANITIZER_LIBRARY@" config.configuration_variant = "@LIBCXX_LIT_VARIANT@" config.host_triple = "@LLVM_HOST_TRIPLE@" -if "@TARGET_TRIPLE@": - config.target_triple = "@TARGET_TRIPLE@" config.sysroot = "@LIBCXX_SYSROOT@" config.gcc_toolchain = "@LIBCXX_GCC_TOOLCHAIN@" config.generate_coverage = @LIBCXX_GENERATE_COVERAGE@ diff --git a/libcxx/test/configs/libcxx-trunk-shared.cfg.in b/libcxx/test/configs/libcxx-trunk-shared.cfg.in index 127d824f3ecf8..4bb4c43dc752e 100644 --- a/libcxx/test/configs/libcxx-trunk-shared.cfg.in +++ b/libcxx/test/configs/libcxx-trunk-shared.cfg.in @@ -1,11 +1,12 @@ @AUTO_GEN_COMMENT@ +@SERIALIZED_LIT_PARAMS@ + LIBCXX_ROOT = "@LIBCXX_SOURCE_DIR@" INSTALL_ROOT = "@CMAKE_BINARY_DIR@" COMPILER = "@CMAKE_CXX_COMPILER@" EXEC_ROOT = "@LIBCXX_BINARY_DIR@" CMAKE_OSX_SYSROOT = "@CMAKE_OSX_SYSROOT@" -TARGET_TRIPLE = "@TARGET_TRIPLE@" import os import pipes @@ -23,8 +24,6 @@ config.test_source_root = os.path.join(LIBCXX_ROOT, 'test') config.test_format = libcxx.test.format.CxxStandardLibraryTest() config.recursiveExpansionLimit = 10 config.test_exec_root = EXEC_ROOT -if TARGET_TRIPLE: - config.target_triple = TARGET_TRIPLE # Configure basic substitutions runPy = os.path.join(LIBCXX_ROOT, 'utils', 'run.py') diff --git a/libcxx/test/configs/libcxx-trunk-static.cfg.in b/libcxx/test/configs/libcxx-trunk-static.cfg.in index 4a6b4f19ec458..5a111e05fe956 100644 --- a/libcxx/test/configs/libcxx-trunk-static.cfg.in +++ b/libcxx/test/configs/libcxx-trunk-static.cfg.in @@ -1,11 +1,12 @@ @AUTO_GEN_COMMENT@ +@SERIALIZED_LIT_PARAMS@ + LIBCXX_ROOT = "@LIBCXX_SOURCE_DIR@" INSTALL_ROOT = "@CMAKE_BINARY_DIR@" COMPILER = "@CMAKE_CXX_COMPILER@" EXEC_ROOT = "@LIBCXX_BINARY_DIR@" CMAKE_OSX_SYSROOT = "@CMAKE_OSX_SYSROOT@" -TARGET_TRIPLE = "@TARGET_TRIPLE@" import os import pipes @@ -23,8 +24,6 @@ config.test_source_root = os.path.join(LIBCXX_ROOT, 'test') config.test_format = libcxx.test.format.CxxStandardLibraryTest() config.recursiveExpansionLimit = 10 config.test_exec_root = EXEC_ROOT -if TARGET_TRIPLE: - config.target_triple = TARGET_TRIPLE # Configure basic substitutions runPy = os.path.join(LIBCXX_ROOT, 'utils', 'run.py') diff --git a/libcxx/test/libcxx/input.output/filesystems/class.path/path.itr/reverse_iterator_produces_diagnostic.fail.cpp b/libcxx/test/libcxx/input.output/filesystems/class.path/path.itr/reverse_iterator_produces_diagnostic.verify.cpp similarity index 75% rename from libcxx/test/libcxx/input.output/filesystems/class.path/path.itr/reverse_iterator_produces_diagnostic.fail.cpp rename to libcxx/test/libcxx/input.output/filesystems/class.path/path.itr/reverse_iterator_produces_diagnostic.verify.cpp index 84dcbfa49c8d5..c4abf6d89f9da 100644 --- a/libcxx/test/libcxx/input.output/filesystems/class.path/path.itr/reverse_iterator_produces_diagnostic.fail.cpp +++ b/libcxx/test/libcxx/input.output/filesystems/class.path/path.itr/reverse_iterator_produces_diagnostic.verify.cpp @@ -20,7 +20,7 @@ int main(int, char**) { using namespace fs; using RIt = std::reverse_iterator; - // expected-error-re@iterator:* {{static_assert failed{{.*}} "The specified iterator type cannot be used with reverse_iterator; Using stashing iterators with reverse_iterator causes undefined behavior"}} + // expected-error-re@*:* {{static_assert failed{{.*}} "The specified iterator type cannot be used with reverse_iterator; Using stashing iterators with reverse_iterator causes undefined behavior"}} { RIt r; ((void)r); diff --git a/libcxx/test/libcxx/language.support/cxa_deleted_virtual.pass.cpp b/libcxx/test/libcxx/language.support/cxa_deleted_virtual.pass.cpp index 68c610af526d7..2f63ee3ceb7c2 100644 --- a/libcxx/test/libcxx/language.support/cxa_deleted_virtual.pass.cpp +++ b/libcxx/test/libcxx/language.support/cxa_deleted_virtual.pass.cpp @@ -11,12 +11,7 @@ // Test exporting the symbol: "__cxa_deleted_virtual" in macosx // But don't expect the symbol to be exported in previous versions. // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13}} struct S { virtual void f() = delete; virtual ~S() {} }; int main(int, char**) { diff --git a/libcxx/test/libcxx/language.support/support.dynamic/aligned_alloc_availability.verify.cpp b/libcxx/test/libcxx/language.support/support.dynamic/aligned_alloc_availability.verify.cpp index 3f4f3a1ce14c6..8d5a73060e673 100644 --- a/libcxx/test/libcxx/language.support/support.dynamic/aligned_alloc_availability.verify.cpp +++ b/libcxx/test/libcxx/language.support/support.dynamic/aligned_alloc_availability.verify.cpp @@ -16,11 +16,7 @@ // UNSUPPORTED: apple-clang-9, apple-clang-10 // UNSUPPORTED: clang-5, clang-6, clang-7 -// REQUIRES: use_system_cxx_lib && (x86_64-apple-macosx10.13 || \ -// REQUIRES: x86_64-apple-macosx10.12 || \ -// REQUIRES: x86_64-apple-macosx10.11 || \ -// REQUIRES: x86_64-apple-macosx10.10 || \ -// REQUIRES: x86_64-apple-macosx10.9) +// REQUIRES: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13}} #include #include diff --git a/libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp b/libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp index 34905bb2e2885..66627d9fa6767 100644 --- a/libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp +++ b/libcxx/test/libcxx/language.support/support.dynamic/libcpp_deallocate.sh.cpp @@ -16,10 +16,7 @@ // The dylibs shipped before macosx10.13 do not contain the aligned allocation // functions, so trying to force using those with -faligned-allocation results // in a link error. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} // AppleClang < 10 incorrectly warns that aligned allocation is not supported // even when it is supported. diff --git a/libcxx/test/libcxx/language.support/support.dynamic/new_faligned_allocation.pass.cpp b/libcxx/test/libcxx/language.support/support.dynamic/new_faligned_allocation.pass.cpp index d423fc4d86c77..5060f062c34ca 100644 --- a/libcxx/test/libcxx/language.support/support.dynamic/new_faligned_allocation.pass.cpp +++ b/libcxx/test/libcxx/language.support/support.dynamic/new_faligned_allocation.pass.cpp @@ -16,10 +16,7 @@ // The dylibs shipped before macosx10.13 do not contain the aligned allocation // functions, so trying to force using those with -faligned-allocation results // in a link error. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} // REQUIRES: -faligned-allocation // ADDITIONAL_COMPILE_FLAGS: -faligned-allocation diff --git a/libcxx/test/libcxx/memory/aligned_allocation_macro.compile.pass.cpp b/libcxx/test/libcxx/memory/aligned_allocation_macro.compile.pass.cpp index fbf8f41314c8b..2704c9584d435 100644 --- a/libcxx/test/libcxx/memory/aligned_allocation_macro.compile.pass.cpp +++ b/libcxx/test/libcxx/memory/aligned_allocation_macro.compile.pass.cpp @@ -15,11 +15,7 @@ // GCC 5 doesn't support aligned allocation // UNSUPPORTED: gcc-5 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13}} #include diff --git a/libcxx/test/libcxx/selftest/dsl/dsl.sh.py b/libcxx/test/libcxx/selftest/dsl/dsl.sh.py index e27c13a9d2056..1901ddb9964d0 100644 --- a/libcxx/test/libcxx/selftest/dsl/dsl.sh.py +++ b/libcxx/test/libcxx/selftest/dsl/dsl.sh.py @@ -435,6 +435,26 @@ def test_boolean_value_from_false_boolean_parameter(self): a.applyTo(self.config) self.assertIn('-fno-exceptions', self.config.available_features) + def test_list_parsed_from_comma_delimited_string_empty(self): + self.litConfig.params['additional_features'] = "" + param = dsl.Parameter(name='additional_features', type=list, help='', actions=lambda f: f) + self.assertEqual(param.getActions(self.config, self.litConfig.params), []) + + def test_list_parsed_from_comma_delimited_string_1(self): + self.litConfig.params['additional_features'] = "feature1" + param = dsl.Parameter(name='additional_features', type=list, help='', actions=lambda f: f) + self.assertEqual(param.getActions(self.config, self.litConfig.params), ['feature1']) + + def test_list_parsed_from_comma_delimited_string_2(self): + self.litConfig.params['additional_features'] = "feature1,feature2" + param = dsl.Parameter(name='additional_features', type=list, help='', actions=lambda f: f) + self.assertEqual(param.getActions(self.config, self.litConfig.params), ['feature1', 'feature2']) + + def test_list_parsed_from_comma_delimited_string_3(self): + self.litConfig.params['additional_features'] = "feature1,feature2, feature3" + param = dsl.Parameter(name='additional_features', type=list, help='', actions=lambda f: f) + self.assertEqual(param.getActions(self.config, self.litConfig.params), ['feature1', 'feature2', 'feature3']) + if __name__ == '__main__': unittest.main(verbosity=2) diff --git a/libcxx/test/libcxx/thread/atomic.availability.verify.cpp b/libcxx/test/libcxx/thread/atomic.availability.verify.cpp index 8321193da8838..e96d461a45720 100644 --- a/libcxx/test/libcxx/thread/atomic.availability.verify.cpp +++ b/libcxx/test/libcxx/thread/atomic.availability.verify.cpp @@ -7,13 +7,7 @@ //===----------------------------------------------------------------------===// // UNSUPPORTED: c++03, c++11 -// REQUIRES: use_system_cxx_lib && (x86_64-apple-macosx10.9 || \ -// REQUIRES: x86_64-apple-macosx10.10 || \ -// REQUIRES: x86_64-apple-macosx10.11 || \ -// REQUIRES: x86_64-apple-macosx10.12 || \ -// REQUIRES: x86_64-apple-macosx10.13 || \ -// REQUIRES: x86_64-apple-macosx10.14 || \ -// REQUIRES: x86_64-apple-macosx10.15) +// REQUIRES: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // Test the availability markup on the C++20 Synchronization Library diff --git a/libcxx/test/libcxx/thread/barrier.availability.verify.cpp b/libcxx/test/libcxx/thread/barrier.availability.verify.cpp index eda89bb058649..8da39fe3c2dfd 100644 --- a/libcxx/test/libcxx/thread/barrier.availability.verify.cpp +++ b/libcxx/test/libcxx/thread/barrier.availability.verify.cpp @@ -7,13 +7,7 @@ //===----------------------------------------------------------------------===// // UNSUPPORTED: c++03, c++11 -// REQUIRES: use_system_cxx_lib && (x86_64-apple-macosx10.9 || \ -// REQUIRES: x86_64-apple-macosx10.10 || \ -// REQUIRES: x86_64-apple-macosx10.11 || \ -// REQUIRES: x86_64-apple-macosx10.12 || \ -// REQUIRES: x86_64-apple-macosx10.13 || \ -// REQUIRES: x86_64-apple-macosx10.14 || \ -// REQUIRES: x86_64-apple-macosx10.15) +// REQUIRES: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // Test the availability markup on std::barrier. diff --git a/libcxx/test/libcxx/thread/latch.availability.verify.cpp b/libcxx/test/libcxx/thread/latch.availability.verify.cpp index 402c73181ce3e..8555e0e70267a 100644 --- a/libcxx/test/libcxx/thread/latch.availability.verify.cpp +++ b/libcxx/test/libcxx/thread/latch.availability.verify.cpp @@ -7,13 +7,7 @@ //===----------------------------------------------------------------------===// // UNSUPPORTED: c++03, c++11 -// REQUIRES: use_system_cxx_lib && (x86_64-apple-macosx10.9 || \ -// REQUIRES: x86_64-apple-macosx10.10 || \ -// REQUIRES: x86_64-apple-macosx10.11 || \ -// REQUIRES: x86_64-apple-macosx10.12 || \ -// REQUIRES: x86_64-apple-macosx10.13 || \ -// REQUIRES: x86_64-apple-macosx10.14 || \ -// REQUIRES: x86_64-apple-macosx10.15) +// REQUIRES: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // Test the availability markup on std::latch. diff --git a/libcxx/test/libcxx/thread/semaphore.availability.verify.cpp b/libcxx/test/libcxx/thread/semaphore.availability.verify.cpp index 7b7688bd6a061..a6d5c36678284 100644 --- a/libcxx/test/libcxx/thread/semaphore.availability.verify.cpp +++ b/libcxx/test/libcxx/thread/semaphore.availability.verify.cpp @@ -7,13 +7,7 @@ //===----------------------------------------------------------------------===// // UNSUPPORTED: c++03, c++11 -// REQUIRES: use_system_cxx_lib && (x86_64-apple-macosx10.9 || \ -// REQUIRES: x86_64-apple-macosx10.10 || \ -// REQUIRES: x86_64-apple-macosx10.11 || \ -// REQUIRES: x86_64-apple-macosx10.12 || \ -// REQUIRES: x86_64-apple-macosx10.13 || \ -// REQUIRES: x86_64-apple-macosx10.14 || \ -// REQUIRES: x86_64-apple-macosx10.15) +// REQUIRES: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // Test the availability markup on std::counting_semaphore and std::binary_semaphore. diff --git a/libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp b/libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp index 6c084e0c5cb5d..30c0391368814 100644 --- a/libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp +++ b/libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp @@ -14,10 +14,7 @@ // UNSUPPORTED: c++03 // PR30202 was fixed starting in macosx10.13. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} // diff --git a/libcxx/test/libcxx/thread/thread.threads/thread.thread.this/sleep_for.pass.cpp b/libcxx/test/libcxx/thread/thread.threads/thread.thread.this/sleep_for.pass.cpp index dafa16667871b..474520c339296 100644 --- a/libcxx/test/libcxx/thread/thread.threads/thread.thread.this/sleep_for.pass.cpp +++ b/libcxx/test/libcxx/thread/thread.threads/thread.thread.this/sleep_for.pass.cpp @@ -11,9 +11,7 @@ // Until 58a0a70fb2f1, this_thread::sleep_for could sometimes get interrupted // by signals and this test would fail spuriously. Disable the test on the // corresponding system libraries. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/libcxx/thread/thread.threads/thread.thread.this/sleep_for.signals.pass.cpp b/libcxx/test/libcxx/thread/thread.threads/thread.thread.this/sleep_for.signals.pass.cpp index 59e3b28fcfdc7..3cdb6735218b8 100644 --- a/libcxx/test/libcxx/thread/thread.threads/thread.thread.this/sleep_for.signals.pass.cpp +++ b/libcxx/test/libcxx/thread/thread.threads/thread.thread.this/sleep_for.signals.pass.cpp @@ -14,9 +14,7 @@ // Until 58a0a70fb2f1, this_thread::sleep_for misbehaves when interrupted by // a signal, as tested here. Disable the test on the corresponding system // libraries. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/libcxx/utilities/charconv/charconv.to.chars/availability.fail.cpp b/libcxx/test/libcxx/utilities/charconv/charconv.to.chars/availability.fail.cpp index 8c4b1e9b5ac2e..e1ca28a20b67c 100644 --- a/libcxx/test/libcxx/utilities/charconv/charconv.to.chars/availability.fail.cpp +++ b/libcxx/test/libcxx/utilities/charconv/charconv.to.chars/availability.fail.cpp @@ -7,12 +7,7 @@ //===----------------------------------------------------------------------===// // UNSUPPORTED: c++03 -// REQUIRES: use_system_cxx_lib && (x86_64-apple-macosx10.9 || \ -// REQUIRES: x86_64-apple-macosx10.10 || \ -// REQUIRES: x86_64-apple-macosx10.11 || \ -// REQUIRES: x86_64-apple-macosx10.12 || \ -// REQUIRES: x86_64-apple-macosx10.13 || \ -// REQUIRES: x86_64-apple-macosx10.14) +// REQUIRES: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // Test the availability markup on std::to_chars. diff --git a/libcxx/test/std/atomics/atomics.types.generic/standard_layout.compile.pass.cpp b/libcxx/test/std/atomics/atomics.types.generic/standard_layout.compile.pass.cpp new file mode 100644 index 0000000000000..a95986283e2fa --- /dev/null +++ b/libcxx/test/std/atomics/atomics.types.generic/standard_layout.compile.pass.cpp @@ -0,0 +1,35 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// UNSUPPORTED: libcpp-has-no-threads +// UNSUPPORTED: c++03 + +// + +#include +#include +#include + +#include "test_macros.h" +#include "atomic_helpers.h" + +template +struct CheckStandardLayout { + void operator()() const { + typedef std::atomic Atomic; + static_assert(std::is_standard_layout::value, ""); + } +}; + +int main(int, char**) { + TestEachIntegralType()(); + TestEachFloatingPointType()(); + TestEachPointerType()(); + + return 0; +} diff --git a/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_helpers.h b/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_helpers.h deleted file mode 100644 index 40514f078ac51..0000000000000 --- a/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/atomic_helpers.h +++ /dev/null @@ -1,131 +0,0 @@ -//===----------------------------------------------------------------------===// -// -// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. -// See https://llvm.org/LICENSE.txt for license information. -// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -// -//===----------------------------------------------------------------------===// - -#ifndef ATOMIC_HELPERS_H -#define ATOMIC_HELPERS_H - -#include - -#include "test_macros.h" - -struct UserAtomicType -{ - int i; - - explicit UserAtomicType(int d = 0) TEST_NOEXCEPT : i(d) {} - - friend bool operator==(const UserAtomicType& x, const UserAtomicType& y) - { return x.i == y.i; } -}; - -/* - -Enable these once we have P0528 - -struct WeirdUserAtomicType -{ - char i, j, k; // the 3 chars of doom - - explicit WeirdUserAtomicType(int d = 0) TEST_NOEXCEPT : i(d) {} - - friend bool operator==(const WeirdUserAtomicType& x, const WeirdUserAtomicType& y) - { return x.i == y.i; } -}; - -struct PaddedUserAtomicType -{ - char i; int j; // probably lock-free? - - explicit PaddedUserAtomicType(int d = 0) TEST_NOEXCEPT : i(d) {} - - friend bool operator==(const PaddedUserAtomicType& x, const PaddedUserAtomicType& y) - { return x.i == y.i; } -}; - -*/ - -struct LargeUserAtomicType -{ - int a[128]; /* decidedly not lock-free */ - - LargeUserAtomicType(int d = 0) TEST_NOEXCEPT - { - for (auto && e : a) - e = d++; - } - - friend bool operator==(LargeUserAtomicType const& x, LargeUserAtomicType const& y) TEST_NOEXCEPT - { - for (int i = 0; i < 128; ++i) - if (x.a[i] != y.a[i]) - return false; - return true; - } -}; - -template < template class TestFunctor > -struct TestEachIntegralType { - void operator()() const { - TestFunctor()(); - TestFunctor()(); - TestFunctor()(); - TestFunctor()(); - TestFunctor()(); - TestFunctor()(); - TestFunctor()(); - TestFunctor()(); - TestFunctor()(); - TestFunctor()(); - TestFunctor()(); - TestFunctor(); -#if TEST_STD_VER > 17 && defined(__cpp_char8_t) - TestFunctor()(); -#endif -#ifndef _LIBCPP_HAS_NO_UNICODE_CHARS - TestFunctor()(); - TestFunctor()(); -#endif - TestFunctor< int8_t>()(); - TestFunctor< uint8_t>()(); - TestFunctor< int16_t>()(); - TestFunctor()(); - TestFunctor< int32_t>()(); - TestFunctor()(); - TestFunctor< int64_t>()(); - TestFunctor()(); - } -}; - -template < template class TestFunctor > -struct TestEachAtomicType { - void operator()() const { - TestEachIntegralType()(); - TestFunctor()(); - /* - Note: These aren't going to be lock-free, - so some libatomic.a is necessary. To handle - the case where the support functions are - missing, all tests that use this file should add: - XFAIL: !non-lockfree-atomics - */ - TestFunctor()(); -/* - Enable these once we have P0528 - - TestFunctor()(); - TestFunctor()(); -*/ - TestFunctor()(); - TestFunctor()(); - TestFunctor()(); - TestFunctor()(); - } -}; - - -#endif // ATOMIC_HELPER_H diff --git a/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/ctor.pass.cpp b/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/ctor.pass.cpp index 5cfad1116dfe0..6036d8e05ac26 100644 --- a/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/ctor.pass.cpp +++ b/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/ctor.pass.cpp @@ -21,42 +21,37 @@ #include "atomic_helpers.h" struct UserType { - int i; + int i; - UserType() noexcept {} - constexpr explicit UserType(int d) noexcept : i(d) {} + UserType() noexcept {} + constexpr explicit UserType(int d) noexcept : i(d) {} - friend bool operator==(const UserType& x, const UserType& y) { - return x.i == y.i; - } + friend bool operator==(const UserType& x, const UserType& y) { return x.i == y.i; } }; template struct TestFunc { - void operator()() const { - typedef std::atomic Atomic; - static_assert(std::is_literal_type::value, ""); - constexpr Tp t(42); - { - constexpr Atomic a(t); - assert(a == t); - } - { - constexpr Atomic a{t}; - assert(a == t); - } - { - constexpr Atomic a = ATOMIC_VAR_INIT(t); - assert(a == t); - } + void operator()() const { + typedef std::atomic Atomic; + constexpr Tp t(42); + { + constexpr Atomic a(t); + assert(a == t); + } + { + constexpr Atomic a{t}; + assert(a == t); } + { + constexpr Atomic a = ATOMIC_VAR_INIT(t); + assert(a == t); + } + } }; - -int main(int, char**) -{ - TestFunc()(); - TestEachIntegralType()(); +int main(int, char**) { + TestFunc()(); + TestEachIntegralType()(); return 0; } diff --git a/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/dtor.pass.cpp b/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/dtor.pass.cpp new file mode 100644 index 0000000000000..ea85cde7860a7 --- /dev/null +++ b/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.req/dtor.pass.cpp @@ -0,0 +1,37 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// UNSUPPORTED: libcpp-has-no-threads +// UNSUPPORTED: c++03 + +// + +// constexpr atomic::~atomic() + +#include +#include +#include + +#include "test_macros.h" +#include "atomic_helpers.h" + +template +struct CheckTriviallyDestructible { + void operator()() const { + typedef std::atomic Atomic; + static_assert(std::is_trivially_destructible::value, ""); + } +}; + +int main(int, char**) { + TestEachIntegralType()(); + TestEachFloatingPointType()(); + TestEachPointerType()(); + + return 0; +} diff --git a/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_wait.pass.cpp b/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_wait.pass.cpp index a54988dd73312..9e918e201dfda 100644 --- a/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_wait.pass.cpp +++ b/libcxx/test/std/atomics/atomics.types.operations/atomics.types.operations.wait/atomic_wait.pass.cpp @@ -12,13 +12,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // @@ -29,7 +23,7 @@ #include "make_test_thread.h" #include "test_macros.h" -#include "../atomics.types.operations.req/atomic_helpers.h" +#include "atomic_helpers.h" template struct TestFn { diff --git a/libcxx/test/std/containers/associative/map/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/associative/map/iterator_concept_conformance.compile.pass.cpp index 43fa91d8a451a..08be1b48725e7 100644 --- a/libcxx/test/std/containers/associative/map/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/associative/map/iterator_concept_conformance.compile.pass.cpp @@ -35,6 +35,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert( std::indirectly_movable*>); static_assert(!std::indirectly_movable_storable*>); +static_assert(!std::indirectly_swappable); static_assert(std::bidirectional_iterator); static_assert(!std::random_access_iterator); @@ -47,3 +48,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/associative/map/map.cons/copy_assign.pass.cpp b/libcxx/test/std/containers/associative/map/map.cons/copy_assign.pass.cpp index 50b44446d117a..bcae4b462a3cb 100644 --- a/libcxx/test/std/containers/associative/map/map.cons/copy_assign.pass.cpp +++ b/libcxx/test/std/containers/associative/map/map.cons/copy_assign.pass.cpp @@ -40,12 +40,12 @@ class counting_allocatorT { template bool operator==(const counting_allocatorT& other) const noexcept { return foo == other.foo; } template bool operator!=(const counting_allocatorT& other) const noexcept { return foo != other.foo; } - T * allocate(const size_t n) const { + T* allocate(size_t n) const { ca_allocs.push_back(foo); void * const pv = ::malloc(n * sizeof(T)); return static_cast(pv); } - void deallocate(T * const p, size_t) const noexcept { + void deallocate(T* p, size_t) const noexcept { ca_deallocs.push_back(foo); free(p); } @@ -63,12 +63,12 @@ class counting_allocatorF { template bool operator==(const counting_allocatorF& other) const noexcept { return foo == other.foo; } template bool operator!=(const counting_allocatorF& other) const noexcept { return foo != other.foo; } - T * allocate(const size_t n) const { + T* allocate(size_t n) const { ca_allocs.push_back(foo); void * const pv = ::malloc(n * sizeof(T)); return static_cast(pv); } - void deallocate(T * const p, size_t) const noexcept { + void deallocate(T* p, size_t) const noexcept { ca_deallocs.push_back(foo); free(p); } diff --git a/libcxx/test/std/containers/associative/multimap/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/associative/multimap/iterator_concept_conformance.compile.pass.cpp index 539d01e002ef0..d768e3152d287 100644 --- a/libcxx/test/std/containers/associative/multimap/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/associative/multimap/iterator_concept_conformance.compile.pass.cpp @@ -35,6 +35,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert( std::indirectly_movable*>); static_assert(!std::indirectly_movable_storable*>); +static_assert(!std::indirectly_swappable); static_assert(std::bidirectional_iterator); static_assert(!std::random_access_iterator); @@ -47,3 +48,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/associative/multiset/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/associative/multiset/iterator_concept_conformance.compile.pass.cpp index 0b44c3ed40694..61a200cfb7a92 100644 --- a/libcxx/test/std/containers/associative/multiset/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/associative/multiset/iterator_concept_conformance.compile.pass.cpp @@ -35,6 +35,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); static_assert(std::bidirectional_iterator); static_assert(!std::random_access_iterator); @@ -47,3 +48,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/associative/set/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/associative/set/iterator_concept_conformance.compile.pass.cpp index 76b42fef33943..5bcf23d10906e 100644 --- a/libcxx/test/std/containers/associative/set/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/associative/set/iterator_concept_conformance.compile.pass.cpp @@ -35,6 +35,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); static_assert(std::bidirectional_iterator); static_assert(!std::random_access_iterator); @@ -47,3 +48,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/sequences/array/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/sequences/array/iterator_concept_conformance.compile.pass.cpp index 29a0f3ade42a8..24c13d25d8eea 100644 --- a/libcxx/test/std/containers/sequences/array/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/sequences/array/iterator_concept_conformance.compile.pass.cpp @@ -39,6 +39,7 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert( std::indirectly_swappable); static_assert(std::contiguous_iterator); static_assert(!std::indirectly_writable); @@ -58,3 +59,4 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/sequences/deque/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/sequences/deque/iterator_concept_conformance.compile.pass.cpp index 1b1bf60272f2e..c66b818c2862a 100644 --- a/libcxx/test/std/containers/sequences/deque/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/sequences/deque/iterator_concept_conformance.compile.pass.cpp @@ -41,6 +41,7 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(std::indirectly_swappable); static_assert(std::random_access_iterator); static_assert(!std::contiguous_iterator); @@ -61,3 +62,4 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/sequences/forwardlist/forwardlist.iter/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/sequences/forwardlist/forwardlist.iter/iterator_concept_conformance.compile.pass.cpp index 8caa26e1fde3f..bf4cc81a0cdfb 100644 --- a/libcxx/test/std/containers/sequences/forwardlist/forwardlist.iter/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/sequences/forwardlist/forwardlist.iter/iterator_concept_conformance.compile.pass.cpp @@ -31,6 +31,7 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -43,3 +44,4 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/sequences/list/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/sequences/list/iterator_concept_conformance.compile.pass.cpp index 2a4ffe57d9000..bf0553107a88c 100644 --- a/libcxx/test/std/containers/sequences/list/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/sequences/list/iterator_concept_conformance.compile.pass.cpp @@ -41,6 +41,7 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(std::indirectly_swappable); static_assert(std::bidirectional_iterator); static_assert(!std::random_access_iterator); @@ -61,3 +62,4 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/sequences/vector.bool/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/sequences/vector.bool/iterator_concept_conformance.compile.pass.cpp index 037383af0308f..d051f7e36645a 100644 --- a/libcxx/test/std/containers/sequences/vector.bool/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/sequences/vector.bool/iterator_concept_conformance.compile.pass.cpp @@ -37,6 +37,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(std::indirectly_swappable); static_assert( std::random_access_iterator); static_assert( std::random_access_iterator); @@ -51,3 +52,4 @@ static_assert( std::sized_sentinel_for); static_assert( std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/sequences/vector/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/sequences/vector/iterator_concept_conformance.compile.pass.cpp index 3af726723176b..3280402a620cc 100644 --- a/libcxx/test/std/containers/sequences/vector/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/sequences/vector/iterator_concept_conformance.compile.pass.cpp @@ -42,6 +42,7 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(std::indirectly_swappable); static_assert( std::contiguous_iterator); static_assert( std::random_access_iterator); @@ -63,3 +64,4 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/unord/unord.map/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/unord/unord.map/iterator_concept_conformance.compile.pass.cpp index 7f8403029f2d9..b2bcabf1a7afb 100644 --- a/libcxx/test/std/containers/unord/unord.map/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/unord/unord.map/iterator_concept_conformance.compile.pass.cpp @@ -35,6 +35,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable*>); static_assert(!std::indirectly_movable_storable*>); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -47,6 +48,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -61,6 +63,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable*>); static_assert(!std::indirectly_movable_storable*>); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -73,3 +76,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/unord/unord.multimap/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/unord/unord.multimap/iterator_concept_conformance.compile.pass.cpp index b5afdc11a2f7e..2223ce7a0ee76 100644 --- a/libcxx/test/std/containers/unord/unord.multimap/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/unord/unord.multimap/iterator_concept_conformance.compile.pass.cpp @@ -35,6 +35,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable*>); static_assert(!std::indirectly_movable_storable*>); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -47,6 +48,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -61,6 +63,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable*>); static_assert(!std::indirectly_movable_storable*>); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -73,3 +76,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/unord/unord.multiset/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/unord/unord.multiset/iterator_concept_conformance.compile.pass.cpp index eb318ca19e954..9063d604b059d 100644 --- a/libcxx/test/std/containers/unord/unord.multiset/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/unord/unord.multiset/iterator_concept_conformance.compile.pass.cpp @@ -35,6 +35,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -47,6 +48,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -61,6 +63,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -73,3 +76,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/unord/unord.set/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/unord/unord.set/iterator_concept_conformance.compile.pass.cpp index db4d5c1159897..d77df390de576 100644 --- a/libcxx/test/std/containers/unord/unord.set/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/unord/unord.set/iterator_concept_conformance.compile.pass.cpp @@ -35,6 +35,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -47,6 +48,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -60,6 +62,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); static_assert(std::forward_iterator); static_assert(!std::bidirectional_iterator); @@ -72,3 +75,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/containers/views/span.iterators/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/containers/views/span.iterators/iterator_concept_conformance.compile.pass.cpp index bbbddcd211e33..a64f8a69c136b 100644 --- a/libcxx/test/std/containers/views/span.iterators/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/containers/views/span.iterators/iterator_concept_conformance.compile.pass.cpp @@ -28,3 +28,4 @@ static_assert(std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(std::indirectly_swappable); diff --git a/libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/generic_category.pass.cpp b/libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/generic_category.pass.cpp index cd8d10b40b91f..d90834681bb84 100644 --- a/libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/generic_category.pass.cpp +++ b/libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/generic_category.pass.cpp @@ -7,10 +7,7 @@ //===----------------------------------------------------------------------===// // XFAIL: suse-linux-enterprise-server-11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} // diff --git a/libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/system_category.pass.cpp b/libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/system_category.pass.cpp index 1e25e90547ac7..0e82934e870b0 100644 --- a/libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/system_category.pass.cpp +++ b/libcxx/test/std/diagnostics/syserr/syserr.errcat/syserr.errcat.objects/system_category.pass.cpp @@ -13,10 +13,7 @@ // const error_category& system_category(); // XFAIL: suse-linux-enterprise-server-11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} #include #include diff --git a/libcxx/test/std/input.output/file.streams/fstreams/filebuf.assign/move_assign.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/filebuf.assign/move_assign.pass.cpp index 69ccd202564db..173c9d110ffc4 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/filebuf.assign/move_assign.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/filebuf.assign/move_assign.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > diff --git a/libcxx/test/std/input.output/file.streams/fstreams/filebuf.cons/move.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/filebuf.cons/move.pass.cpp index 0a541670858e0..38aba56540f0d 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/filebuf.cons/move.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/filebuf.cons/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > @@ -31,7 +29,7 @@ int main(int, char**) assert(f.sputn("123", 3) == 3); f.pubseekoff(1, std::ios_base::beg); assert(f.sgetc() == '2'); - std::filebuf f2(move(f)); + std::filebuf f2(std::move(f)); assert(!f.is_open()); assert(f2.is_open()); assert(f2.sgetc() == '2'); @@ -45,7 +43,7 @@ int main(int, char**) assert(f.sputn(L"123", 3) == 3); f.pubseekoff(1, std::ios_base::beg); assert(f.sgetc() == L'2'); - std::wfilebuf f2(move(f)); + std::wfilebuf f2(std::move(f)); assert(!f.is_open()); assert(f2.is_open()); assert(f2.sgetc() == L'2'); diff --git a/libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/open_path.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/open_path.pass.cpp index da5e01e6bab8a..cf852964b9114 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/open_path.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/filebuf.members/open_path.pass.cpp @@ -10,12 +10,7 @@ // UNSUPPORTED: libcpp-has-no-filesystem-library // Filesystem is supported on Apple platforms starting with macosx10.15. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.14 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/file.streams/fstreams/fstream.assign/move_assign.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/fstream.assign/move_assign.pass.cpp index 6032b21c579c3..9bc7887f839fd 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/fstream.assign/move_assign.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/fstream.assign/move_assign.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > diff --git a/libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/move.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/move.pass.cpp index 9166737543a0e..e210b562ac949 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/move.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > @@ -26,7 +24,7 @@ int main(int, char**) { std::fstream fso(temp, std::ios_base::in | std::ios_base::out | std::ios_base::trunc); - std::fstream fs = move(fso); + std::fstream fs = std::move(fso); double x = 0; fs << 3.25; fs.seekg(0); @@ -37,7 +35,7 @@ int main(int, char**) { std::wfstream fso(temp, std::ios_base::in | std::ios_base::out | std::ios_base::trunc); - std::wfstream fs = move(fso); + std::wfstream fs = std::move(fso); double x = 0; fs << 3.25; fs.seekg(0); diff --git a/libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/path.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/path.pass.cpp index 9bb5665aef48e..364fe72817aeb 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/path.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/fstream.cons/path.pass.cpp @@ -10,12 +10,7 @@ // UNSUPPORTED: libcpp-has-no-filesystem-library // Filesystem is supported on Apple platforms starting with macosx10.15. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.14 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/file.streams/fstreams/fstream.members/open_path.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/fstream.members/open_path.pass.cpp index 0ca2f06d553bf..824201a7cf074 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/fstream.members/open_path.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/fstream.members/open_path.pass.cpp @@ -10,12 +10,7 @@ // UNSUPPORTED: libcpp-has-no-filesystem-library // Filesystem is supported on Apple platforms starting with macosx10.15. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.14 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/file.streams/fstreams/ifstream.assign/move_assign.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/ifstream.assign/move_assign.pass.cpp index b9df31149efdc..439db87a0eba3 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/ifstream.assign/move_assign.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/ifstream.assign/move_assign.pass.cpp @@ -6,7 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 // FILE_DEPENDENCIES: test.dat // diff --git a/libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/move.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/move.pass.cpp index 03475e17beef0..28f55f6a857db 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/move.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/move.pass.cpp @@ -6,7 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 // FILE_DEPENDENCIES: test.dat // @@ -25,14 +24,14 @@ int main(int, char**) { { std::ifstream fso("test.dat"); - std::ifstream fs = move(fso); + std::ifstream fs = std::move(fso); double x = 0; fs >> x; assert(x == 3.25); } { std::wifstream fso("test.dat"); - std::wifstream fs = move(fso); + std::wifstream fs = std::move(fso); double x = 0; fs >> x; assert(x == 3.25); diff --git a/libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/path.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/path.pass.cpp index 2309caf9e8c47..aef3014f670a4 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/path.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/ifstream.cons/path.pass.cpp @@ -10,12 +10,7 @@ // UNSUPPORTED: libcpp-has-no-filesystem-library // Filesystem is supported on Apple platforms starting with macosx10.15. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.14 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // FILE_DEPENDENCIES: test.dat diff --git a/libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/open_path.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/open_path.pass.cpp index 24922d6fe3e62..2bb46b876b14e 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/open_path.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/ifstream.members/open_path.pass.cpp @@ -10,12 +10,7 @@ // UNSUPPORTED: libcpp-has-no-filesystem-library // Filesystem is supported on Apple platforms starting with macosx10.15. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.14 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // FILE_DEPENDENCIES: test.dat diff --git a/libcxx/test/std/input.output/file.streams/fstreams/ofstream.assign/move_assign.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/ofstream.assign/move_assign.pass.cpp index 720bcf0e77486..4db1e6c3b35fb 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/ofstream.assign/move_assign.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/ofstream.assign/move_assign.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > diff --git a/libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/move.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/move.pass.cpp index 60fbf2b9e360e..01676f0e75a0d 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/move.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > @@ -25,7 +23,7 @@ int main(int, char**) std::string temp = get_temp_file_name(); { std::ofstream fso(temp.c_str()); - std::ofstream fs = move(fso); + std::ofstream fs = std::move(fso); fs << 3.25; } { @@ -37,7 +35,7 @@ int main(int, char**) std::remove(temp.c_str()); { std::wofstream fso(temp.c_str()); - std::wofstream fs = move(fso); + std::wofstream fs = std::move(fso); fs << 3.25; } { diff --git a/libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/path.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/path.pass.cpp index 8e3261450bde4..5dc1f74bdaf9d 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/path.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/ofstream.cons/path.pass.cpp @@ -10,12 +10,7 @@ // UNSUPPORTED: libcpp-has-no-filesystem-library // Filesystem is supported on Apple platforms starting with macosx10.15. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.14 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/open_path.pass.cpp b/libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/open_path.pass.cpp index 495f8134b5df9..2c8fa8ad846cf 100644 --- a/libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/open_path.pass.cpp +++ b/libcxx/test/std/input.output/file.streams/fstreams/ofstream.members/open_path.pass.cpp @@ -10,12 +10,7 @@ // UNSUPPORTED: libcpp-has-no-filesystem-library // Filesystem is supported on Apple platforms starting with macosx10.15. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.14 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.mods/refresh.pass.cpp b/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.mods/refresh.pass.cpp index f32608687d113..da436fc6b959c 100644 --- a/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.mods/refresh.pass.cpp +++ b/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.mods/refresh.pass.cpp @@ -10,7 +10,7 @@ // The string reported on errors changed, which makes those tests fail when run // against already-released libc++'s. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.15 // diff --git a/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/file_size.pass.cpp b/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/file_size.pass.cpp index 0dba01fe1a9c0..271a6e826f2b7 100644 --- a/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/file_size.pass.cpp +++ b/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/file_size.pass.cpp @@ -10,7 +10,7 @@ // The string reported on errors changed, which makes those tests fail when run // against already-released libc++'s. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.15 // diff --git a/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/hard_link_count.pass.cpp b/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/hard_link_count.pass.cpp index 8875c39ceef3b..44eac78fe8f46 100644 --- a/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/hard_link_count.pass.cpp +++ b/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/hard_link_count.pass.cpp @@ -10,7 +10,7 @@ // The string reported on errors changed, which makes those tests fail when run // against already-released libc++'s. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.15 // diff --git a/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/last_write_time.pass.cpp b/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/last_write_time.pass.cpp index cb8fb3f6a7688..928248b3c2b87 100644 --- a/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/last_write_time.pass.cpp +++ b/libcxx/test/std/input.output/filesystems/class.directory_entry/directory_entry.obs/last_write_time.pass.cpp @@ -10,7 +10,7 @@ // The string reported on errors changed, which makes those tests fail when run // against already-released libc++'s. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.15 // diff --git a/libcxx/test/std/input.output/filesystems/class.directory_iterator/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/input.output/filesystems/class.directory_iterator/iterator_concept_conformance.compile.pass.cpp index 1d3016ca9833b..ac168a08aab2a 100644 --- a/libcxx/test/std/input.output/filesystems/class.directory_iterator/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/input.output/filesystems/class.directory_iterator/iterator_concept_conformance.compile.pass.cpp @@ -26,6 +26,7 @@ static_assert(std::sentinel_for) static_assert(!std::sized_sentinel_for); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); static_assert(std::input_iterator); static_assert(!std::forward_iterator); @@ -35,3 +36,4 @@ static_assert(std::sentinel_for); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.copy_file/copy_file.pass.cpp b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.copy_file/copy_file.pass.cpp index 4e40906a8d848..88e272433fb2d 100644 --- a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.copy_file/copy_file.pass.cpp +++ b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.copy_file/copy_file.pass.cpp @@ -10,7 +10,7 @@ // The string reported on errors changed, which makes those tests fail when run // against already-released libc++'s. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.15 // diff --git a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directories/create_directories.pass.cpp b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directories/create_directories.pass.cpp index 5174b7d454e06..d6b18e2e043be 100644 --- a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directories/create_directories.pass.cpp +++ b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directories/create_directories.pass.cpp @@ -9,7 +9,7 @@ // UNSUPPORTED: c++03 // This test requires the dylib support introduced in D92769. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.15 // diff --git a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directory/create_directory.pass.cpp b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directory/create_directory.pass.cpp index cad76aa751993..51c9180f81604 100644 --- a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directory/create_directory.pass.cpp +++ b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directory/create_directory.pass.cpp @@ -9,7 +9,7 @@ // UNSUPPORTED: c++03 // This test requires the dylib support introduced in D92769. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.15 // diff --git a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directory/create_directory_with_attributes.pass.cpp b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directory/create_directory_with_attributes.pass.cpp index e5f610c80a280..4d5cdf31e5b59 100644 --- a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directory/create_directory_with_attributes.pass.cpp +++ b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.create_directory/create_directory_with_attributes.pass.cpp @@ -9,7 +9,7 @@ // UNSUPPORTED: c++03 // This test requires the dylib support introduced in D92769. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.15 // diff --git a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.file_size/file_size.pass.cpp b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.file_size/file_size.pass.cpp index 51f2fa841e53a..413ba881b59f1 100644 --- a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.file_size/file_size.pass.cpp +++ b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.file_size/file_size.pass.cpp @@ -10,7 +10,7 @@ // The string reported on errors changed, which makes those tests fail when run // against already-released libc++'s. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.15 // diff --git a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.last_write_time/last_write_time.pass.cpp b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.last_write_time/last_write_time.pass.cpp index 930dae563b1f5..f3a4bb5013f45 100644 --- a/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.last_write_time/last_write_time.pass.cpp +++ b/libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.last_write_time/last_write_time.pass.cpp @@ -10,7 +10,7 @@ // The string reported on errors changed, which makes those tests fail when run // against already-released libc++'s. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.15 // diff --git a/libcxx/test/std/input.output/filesystems/lit.local.cfg b/libcxx/test/std/input.output/filesystems/lit.local.cfg index fbd625d21ff52..95e9ec4ccd979 100644 --- a/libcxx/test/std/input.output/filesystems/lit.local.cfg +++ b/libcxx/test/std/input.output/filesystems/lit.local.cfg @@ -3,7 +3,7 @@ # suite against an older macOS. too_old = {'10.9', '10.10', '10.11', '10.12', '10.13', '10.14'} if 'use_system_cxx_lib' in config.available_features: - if any('x86_64-apple-macosx{}'.format(v) in config.available_features for v in too_old): + if any('target=x86_64-apple-macosx{}'.format(v) in config.available_features for v in too_old): config.unsupported = True if 'libcpp-has-no-filesystem-library' in config.available_features: diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.assign/move_assign.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.assign/move_assign.pass.cpp index 7b02842610d5b..fb1f524c7123e 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.assign/move_assign.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.assign/move_assign.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.cons/move.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.cons/move.pass.cpp index 514cde055875a..2a4e1a6b1123b 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.cons/move.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/iostreamclass/iostream.cons/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/bool.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/bool.pass.cpp index e152f4ab4d8c0..ea354a487e7b8 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/bool.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/bool.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/double.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/double.pass.cpp index eaad095cae568..a3f977bcd1e8b 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/double.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/double.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/float.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/float.pass.cpp index 2a303c691a342..2d68dfddd076e 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/float.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/float.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/int.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/int.pass.cpp index 5250b30c103e8..563b8d2dff7e6 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/int.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/int.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long.pass.cpp index 8cb545cb38742..5d00260a64703 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_double.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_double.pass.cpp index dfb4afc966dbb..ed198d54a5463 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_double.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_double.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_long.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_long.pass.cpp index 06130c1d9a1b9..d6ccc11ee9927 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_long.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/long_long.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/pointer.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/pointer.pass.cpp index db7fe577a233c..9b9fab8b9e790 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/pointer.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/pointer.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/short.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/short.pass.cpp index 8a6d94417a989..dbecc33c5308c 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/short.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/short.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_int.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_int.pass.cpp index a5d179d936c9f..d0ad52174524a 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_int.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_int.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long.pass.cpp index bad99e42059f3..984c18890e9ce 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long_long.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long_long.pass.cpp index d87088bc546be..a67ae60a8322b 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long_long.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_long_long.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_short.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_short.pass.cpp index 00dc9d0e3baae..7157c885cc368 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_short.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream.formatted.arithmetic/unsigned_short.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/streambuf.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/streambuf.pass.cpp index 580f9f7bf0d4b..d71f29595e251 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/streambuf.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.formatted/istream_extractors/streambuf.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get.pass.cpp index 9d5710bbbef9b..91ae1045b3b7c 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_chart.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_chart.pass.cpp index 6a561c1c03ec4..fb3c2d07d36e8 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_chart.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_chart.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size.pass.cpp index 1d3957a6d93a5..b3af36e32b398 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size.pass.cpp @@ -8,12 +8,7 @@ // In macosx10.9 to macosx10.14, streams are provided in the dylib AND they // have a bug in how they handle null-termination in case of errors (see D40677). -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size_chart.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size_chart.pass.cpp index cb822177bc3bf..11b820ef4d617 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size_chart.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_pointer_size_chart.pass.cpp @@ -8,12 +8,7 @@ // In macosx10.9 to macosx10.14, streams are provided in the dylib AND they // have a bug in how they handle null-termination in case of errors (see D40677). -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf.pass.cpp index e932ca4071494..8067792e09de2 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf_chart.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf_chart.pass.cpp index e30ea1225eed8..dceb06ada7945 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf_chart.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/get_streambuf_chart.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size.pass.cpp index 50a1184f74910..44fa59501a511 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size.pass.cpp @@ -8,12 +8,7 @@ // In macosx10.9 to macosx10.14, streams are provided in the dylib AND they // have a bug in how they handle null-termination in case of errors (see D40677). -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size_chart.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size_chart.pass.cpp index edebd020a2782..72bc2a4c00ccd 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size_chart.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/getline_pointer_size_chart.pass.cpp @@ -8,12 +8,7 @@ // In macosx10.9 to macosx10.14, streams are provided in the dylib AND they // have a bug in how they handle null-termination in case of errors (see D40677). -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/ignore.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/ignore.pass.cpp index 4555c6c1ea910..0d0b4a8f40c45 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/ignore.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/ignore.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/peek.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/peek.pass.cpp index acde79b71f50d..be9600cf15614 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/peek.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/peek.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/read.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/read.pass.cpp index 3ef761c00980d..2e6c2a2082164 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/read.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/read.pass.cpp @@ -6,12 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/seekg_off.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/seekg_off.pass.cpp index ebd3a25486b10..d9412bf920ba0 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/seekg_off.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream.unformatted/seekg_off.pass.cpp @@ -6,9 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.assign/move_assign.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.assign/move_assign.pass.cpp index bd901171cc8ee..7899c63e8293e 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.assign/move_assign.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.assign/move_assign.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/copy.fail.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/copy.fail.cpp index c5f10fa0145c2..90e5315a662b3 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/copy.fail.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/copy.fail.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > @@ -47,10 +45,7 @@ struct test_istream }; - int main(int, char**) { - - return 0; } diff --git a/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/move.pass.cpp b/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/move.pass.cpp index 22163156c2c82..fb071ba970163 100644 --- a/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/move.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/input.streams/istream/istream.cons/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > diff --git a/libcxx/test/std/input.output/iostream.format/output.streams/ostream.assign/move_assign.pass.cpp b/libcxx/test/std/input.output/iostream.format/output.streams/ostream.assign/move_assign.pass.cpp index b529970a2883c..8fcb0c2b1ee97 100644 --- a/libcxx/test/std/input.output/iostream.format/output.streams/ostream.assign/move_assign.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/output.streams/ostream.assign/move_assign.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > diff --git a/libcxx/test/std/input.output/iostream.format/output.streams/ostream.cons/move.pass.cpp b/libcxx/test/std/input.output/iostream.format/output.streams/ostream.cons/move.pass.cpp index 345388baf6e94..73991b36f6c9b 100644 --- a/libcxx/test/std/input.output/iostream.format/output.streams/ostream.cons/move.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/output.streams/ostream.cons/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template > diff --git a/libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.inserters.arithmetic/minmax_showbase.pass.cpp b/libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.inserters.arithmetic/minmax_showbase.pass.cpp index 36ca0155c5a7b..126151221aa4b 100644 --- a/libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.inserters.arithmetic/minmax_showbase.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.inserters.arithmetic/minmax_showbase.pass.cpp @@ -25,9 +25,7 @@ // This test exposes a regression that was not fixed yet in the libc++ // shipped with macOS 10.12, 10.13 and 10.14. See D32670 for details. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{12|13|14}} #include #include diff --git a/libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.inserters.arithmetic/minus1.pass.cpp b/libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.inserters.arithmetic/minus1.pass.cpp index 4b9cbd479c6cb..8e3b77c420bea 100644 --- a/libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.inserters.arithmetic/minus1.pass.cpp +++ b/libcxx/test/std/input.output/iostream.format/output.streams/ostream.formatted/ostream.inserters.arithmetic/minus1.pass.cpp @@ -6,7 +6,7 @@ // //===----------------------------------------------------------------------===// -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.12 // diff --git a/libcxx/test/std/input.output/iostreams.base/ios.base/ios.types/ios_Init/ios_Init.multiple.pass.cpp b/libcxx/test/std/input.output/iostreams.base/ios.base/ios.types/ios_Init/ios_Init.multiple.pass.cpp index 22f2c74898ddb..1a9aaa96162aa 100644 --- a/libcxx/test/std/input.output/iostreams.base/ios.base/ios.types/ios_Init/ios_Init.multiple.pass.cpp +++ b/libcxx/test/std/input.output/iostreams.base/ios.base/ios.types/ios_Init/ios_Init.multiple.pass.cpp @@ -16,12 +16,7 @@ // The dylibs shipped on macOS so far do not contain the fix for PR43300, so // this test fails. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} int main(int, char**) { diff --git a/libcxx/test/std/input.output/iostreams.base/is_error_code_enum_io_errc.pass.cpp b/libcxx/test/std/input.output/iostreams.base/is_error_code_enum_io_errc.pass.cpp index 76eb83148b398..13f90d92899ed 100644 --- a/libcxx/test/std/input.output/iostreams.base/is_error_code_enum_io_errc.pass.cpp +++ b/libcxx/test/std/input.output/iostreams.base/is_error_code_enum_io_errc.pass.cpp @@ -5,8 +5,6 @@ // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception // //===----------------------------------------------------------------------===// -// -// UNSUPPORTED: c++03 // diff --git a/libcxx/test/std/input.output/string.streams/istringstream/istringstream.assign/move.pass.cpp b/libcxx/test/std/input.output/string.streams/istringstream/istringstream.assign/move.pass.cpp index c9b701397d761..93c8313d85909 100644 --- a/libcxx/test/std/input.output/string.streams/istringstream/istringstream.assign/move.pass.cpp +++ b/libcxx/test/std/input.output/string.streams/istringstream/istringstream.assign/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template , class Allocator = allocator > diff --git a/libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/move.pass.cpp b/libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/move.pass.cpp index e4f1f2b4ddbf3..650284d87b706 100644 --- a/libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/move.pass.cpp +++ b/libcxx/test/std/input.output/string.streams/istringstream/istringstream.cons/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template , class Allocator = allocator > diff --git a/libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.assign/move.pass.cpp b/libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.assign/move.pass.cpp index 52e4ace45efff..8be3a43fe38db 100644 --- a/libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.assign/move.pass.cpp +++ b/libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.assign/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template , class Allocator = allocator > diff --git a/libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/move.pass.cpp b/libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/move.pass.cpp index 3a3f42f009c20..6823bb69bc627 100644 --- a/libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/move.pass.cpp +++ b/libcxx/test/std/input.output/string.streams/ostringstream/ostringstream.cons/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template , class Allocator = allocator > diff --git a/libcxx/test/std/input.output/string.streams/stringbuf/stringbuf.cons/move.pass.cpp b/libcxx/test/std/input.output/string.streams/stringbuf/stringbuf.cons/move.pass.cpp index 9fb588d1a4304..af1eb38c349b4 100644 --- a/libcxx/test/std/input.output/string.streams/stringbuf/stringbuf.cons/move.pass.cpp +++ b/libcxx/test/std/input.output/string.streams/stringbuf/stringbuf.cons/move.pass.cpp @@ -22,32 +22,32 @@ int main(int, char**) { { std::stringbuf buf1("testing"); - std::stringbuf buf(move(buf1)); + std::stringbuf buf(std::move(buf1)); assert(buf.str() == "testing"); } { std::stringbuf buf1("testing", std::ios_base::in); - std::stringbuf buf(move(buf1)); + std::stringbuf buf(std::move(buf1)); assert(buf.str() == "testing"); } { std::stringbuf buf1("testing", std::ios_base::out); - std::stringbuf buf(move(buf1)); + std::stringbuf buf(std::move(buf1)); assert(buf.str() == "testing"); } { std::wstringbuf buf1(L"testing"); - std::wstringbuf buf(move(buf1)); + std::wstringbuf buf(std::move(buf1)); assert(buf.str() == L"testing"); } { std::wstringbuf buf1(L"testing", std::ios_base::in); - std::wstringbuf buf(move(buf1)); + std::wstringbuf buf(std::move(buf1)); assert(buf.str() == L"testing"); } { std::wstringbuf buf1(L"testing", std::ios_base::out); - std::wstringbuf buf(move(buf1)); + std::wstringbuf buf(std::move(buf1)); assert(buf.str() == L"testing"); } diff --git a/libcxx/test/std/input.output/string.streams/stringstream.cons/move.pass.cpp b/libcxx/test/std/input.output/string.streams/stringstream.cons/move.pass.cpp index 71c385a068060..642fd752a8f46 100644 --- a/libcxx/test/std/input.output/string.streams/stringstream.cons/move.pass.cpp +++ b/libcxx/test/std/input.output/string.streams/stringstream.cons/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template , class Allocator = allocator > diff --git a/libcxx/test/std/input.output/string.streams/stringstream.cons/stringstream.assign/move.pass.cpp b/libcxx/test/std/input.output/string.streams/stringstream.cons/stringstream.assign/move.pass.cpp index e2a750651c6eb..91a685d2db9f7 100644 --- a/libcxx/test/std/input.output/string.streams/stringstream.cons/stringstream.assign/move.pass.cpp +++ b/libcxx/test/std/input.output/string.streams/stringstream.cons/stringstream.assign/move.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template , class Allocator = allocator > diff --git a/libcxx/test/std/iterators/iterator.requirements/alg.req.ind.swap/indirectly_swappable.compile.pass.cpp b/libcxx/test/std/iterators/iterator.requirements/alg.req.ind.swap/indirectly_swappable.compile.pass.cpp new file mode 100644 index 0000000000000..d91d81e2fe888 --- /dev/null +++ b/libcxx/test/std/iterators/iterator.requirements/alg.req.ind.swap/indirectly_swappable.compile.pass.cpp @@ -0,0 +1,80 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +// UNSUPPORTED: c++03, c++11, c++14, c++17 +// UNSUPPORTED: libcpp-no-concepts +// UNSUPPORTED: gcc-10 + +// template +// concept indirectly_swappable; + +#include + +#include "test_macros.h" + +template +struct PointerTo { + using value_type = ValueType; + T& operator*() const; +}; + +static_assert(std::indirectly_swappable>); +static_assert(std::indirectly_swappable, PointerTo>); + +struct B; + +struct A { + friend void iter_swap(const PointerTo&, const PointerTo&); +}; + +// Is indirectly swappable. +struct B { + friend void iter_swap(const PointerTo&, const PointerTo&); + friend void iter_swap(const PointerTo&, const PointerTo&); + friend void iter_swap(const PointerTo&, const PointerTo&); +}; + +// Valid except ranges::iter_swap(i2, i1). +struct C { + friend void iter_swap(const PointerTo&, const PointerTo&); + friend void iter_swap(const PointerTo&, const PointerTo&); + friend void iter_swap(const PointerTo&, const PointerTo&) = delete; +}; + +// Valid except ranges::iter_swap(i1, i2). +struct D { + friend void iter_swap(const PointerTo&, const PointerTo&); + friend void iter_swap(const PointerTo&, const PointerTo&) = delete; + friend void iter_swap(const PointerTo&, const PointerTo&); +}; + +// Valid except ranges::iter_swap(i2, i2). +struct E { + E operator=(const E&) = delete; + friend void iter_swap(const PointerTo&, const PointerTo&) = delete; + friend void iter_swap(const PointerTo&, const PointerTo&); + friend void iter_swap(const PointerTo&, const PointerTo&); +}; + +struct F { + friend void iter_swap(const PointerTo&, const PointerTo&) = delete; +}; + +// Valid except ranges::iter_swap(i1, i1). +struct G { + friend void iter_swap(const PointerTo&, const PointerTo&); + friend void iter_swap(const PointerTo&, const PointerTo&); + friend void iter_swap(const PointerTo&, const PointerTo&); +}; + + +static_assert( std::indirectly_swappable, PointerTo>); +static_assert(!std::indirectly_swappable, PointerTo>); +static_assert(!std::indirectly_swappable, PointerTo>); +static_assert(!std::indirectly_swappable, PointerTo>); +static_assert(!std::indirectly_swappable, PointerTo>); diff --git a/libcxx/test/std/iterators/iterator.requirements/alg.req.ind.swap/indirectly_swappable.subsumption.compile.pass.cpp b/libcxx/test/std/iterators/iterator.requirements/alg.req.ind.swap/indirectly_swappable.subsumption.compile.pass.cpp new file mode 100644 index 0000000000000..adbc6fa26d517 --- /dev/null +++ b/libcxx/test/std/iterators/iterator.requirements/alg.req.ind.swap/indirectly_swappable.subsumption.compile.pass.cpp @@ -0,0 +1,32 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +// UNSUPPORTED: c++03, c++11, c++14, c++17 +// UNSUPPORTED: libcpp-no-concepts +// UNSUPPORTED: gcc-10 + +// template +// concept indirectly_swappable; + +#include + +#include + +template + requires std::indirectly_readable && std::indirectly_readable +constexpr bool indirectly_swappable_subsumption() { + return false; +} + +template + requires std::indirectly_swappable +constexpr bool indirectly_swappable_subsumption() { + return true; +} + +static_assert(indirectly_swappable_subsumption()); diff --git a/libcxx/test/std/iterators/predef.iterators/insert.iterators/back.insert.iterator/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/iterators/predef.iterators/insert.iterators/back.insert.iterator/iterator_concept_conformance.compile.pass.cpp index ea04ea8482b22..536f1df2249ae 100644 --- a/libcxx/test/std/iterators/predef.iterators/insert.iterators/back.insert.iterator/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/iterators/predef.iterators/insert.iterators/back.insert.iterator/iterator_concept_conformance.compile.pass.cpp @@ -26,3 +26,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::input_iterator); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/iterators/predef.iterators/insert.iterators/front.insert.iterator/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/iterators/predef.iterators/insert.iterators/front.insert.iterator/iterator_concept_conformance.compile.pass.cpp index 13e8b0352baf9..ec488240c7e3c 100644 --- a/libcxx/test/std/iterators/predef.iterators/insert.iterators/front.insert.iterator/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/iterators/predef.iterators/insert.iterators/front.insert.iterator/iterator_concept_conformance.compile.pass.cpp @@ -26,3 +26,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::input_iterator); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/iterators/predef.iterators/insert.iterators/insert.iterator/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/iterators/predef.iterators/insert.iterators/insert.iterator/iterator_concept_conformance.compile.pass.cpp index b73ca79491474..3f95ccd99a504 100644 --- a/libcxx/test/std/iterators/predef.iterators/insert.iterators/insert.iterator/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/iterators/predef.iterators/insert.iterators/insert.iterator/iterator_concept_conformance.compile.pass.cpp @@ -25,3 +25,4 @@ static_assert(!std::sentinel_for); static_assert(!std::input_iterator); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/iterators/predef.iterators/move.iterators/move.iterator/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/iterators/predef.iterators/move.iterators/move.iterator/iterator_concept_conformance.compile.pass.cpp index bd28036dc6de3..4f01334412b92 100644 --- a/libcxx/test/std/iterators/predef.iterators/move.iterators/move.iterator/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/iterators/predef.iterators/move.iterators/move.iterator/iterator_concept_conformance.compile.pass.cpp @@ -16,7 +16,6 @@ using iterator = std::move_iterator; - static_assert(std::input_iterator); static_assert(!std::forward_iterator); static_assert(!std::indirectly_writable); @@ -25,3 +24,4 @@ static_assert(std::sentinel_for); static_assert(std::sized_sentinel_for); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/iterators/predef.iterators/reverse.iterators/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/iterators/predef.iterators/reverse.iterators/iterator_concept_conformance.compile.pass.cpp index 687d37db30cd8..25e208e27153a 100644 --- a/libcxx/test/std/iterators/predef.iterators/reverse.iterators/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/iterators/predef.iterators/reverse.iterators/iterator_concept_conformance.compile.pass.cpp @@ -32,6 +32,7 @@ static_assert(!std::random_access_iterator); static_assert(!std::sized_sentinel_for); static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); +static_assert( std::indirectly_swappable); using reverse_random_access_iterator = std::reverse_iterator>; static_assert(common_reverse_iterator_checks()); @@ -40,6 +41,7 @@ static_assert(!std::contiguous_iterator); static_assert(std::sized_sentinel_for); static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); +static_assert( std::indirectly_swappable); using reverse_contiguous_iterator = std::reverse_iterator>; static_assert(common_reverse_iterator_checks()); @@ -48,3 +50,4 @@ static_assert(!std::contiguous_iterator); static_assert(std::sized_sentinel_for); static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); +static_assert( std::indirectly_swappable); diff --git a/libcxx/test/std/iterators/stream.iterators/istream.iterator/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/iterators/stream.iterators/istream.iterator/iterator_concept_conformance.compile.pass.cpp index 8bb5e94218f42..e4116cb67b2c0 100644 --- a/libcxx/test/std/iterators/stream.iterators/istream.iterator/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/iterators/stream.iterators/istream.iterator/iterator_concept_conformance.compile.pass.cpp @@ -26,3 +26,4 @@ static_assert(!std::sized_sentinel_for); static_assert(std::input_iterator); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/iterators/stream.iterators/istreambuf.iterator/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/iterators/stream.iterators/istreambuf.iterator/iterator_concept_conformance.compile.pass.cpp index 2e529ca1fe2a1..cd4fe7690eb70 100644 --- a/libcxx/test/std/iterators/stream.iterators/istreambuf.iterator/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/iterators/stream.iterators/istreambuf.iterator/iterator_concept_conformance.compile.pass.cpp @@ -27,3 +27,4 @@ static_assert(std::sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/iterators/stream.iterators/ostream.iterator/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/iterators/stream.iterators/ostream.iterator/iterator_concept_conformance.compile.pass.cpp index 068692e637742..9ce64a71a3bf2 100644 --- a/libcxx/test/std/iterators/stream.iterators/ostream.iterator/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/iterators/stream.iterators/ostream.iterator/iterator_concept_conformance.compile.pass.cpp @@ -26,3 +26,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::input_iterator); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/iterators/stream.iterators/ostreambuf.iterator/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/iterators/stream.iterators/ostreambuf.iterator/iterator_concept_conformance.compile.pass.cpp index 2b2d0f9cbdd97..18c3608d77fe5 100644 --- a/libcxx/test/std/iterators/stream.iterators/ostreambuf.iterator/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/iterators/stream.iterators/ostreambuf.iterator/iterator_concept_conformance.compile.pass.cpp @@ -27,3 +27,4 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::input_iterator); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/delete_align_val_t_replace.pass.cpp b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/delete_align_val_t_replace.pass.cpp index 968fe205b3969..b6c6d40342717 100644 --- a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/delete_align_val_t_replace.pass.cpp +++ b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/delete_align_val_t_replace.pass.cpp @@ -18,11 +18,7 @@ // However, support for that was broken prior to Clang 8 and AppleClang 11. // UNSUPPORTED: apple-clang-9, apple-clang-10 // UNSUPPORTED: clang-5, clang-6, clang-7 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13}} // On Windows libc++ doesn't provide its own definitions for new/delete // but instead depends on the ones in VCRuntime. However VCRuntime does not diff --git a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t.pass.cpp b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t.pass.cpp index ec53942de44a2..08350e59cda67 100644 --- a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t.pass.cpp +++ b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t.pass.cpp @@ -16,11 +16,7 @@ // However, support for that was broken prior to Clang 8 and AppleClang 11. // UNSUPPORTED: apple-clang-9, apple-clang-10 // UNSUPPORTED: clang-5, clang-6, clang-7 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13}} // test operator new diff --git a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t_nothrow.pass.cpp b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t_nothrow.pass.cpp index c085ceed5c353..159d39af12b3c 100644 --- a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t_nothrow.pass.cpp +++ b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t_nothrow.pass.cpp @@ -16,11 +16,7 @@ // However, support for that was broken prior to Clang 8 and AppleClang 11. // UNSUPPORTED: apple-clang-9, apple-clang-10 // UNSUPPORTED: clang-5, clang-6, clang-7 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13}} // test operator new (nothrow) diff --git a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t_nothrow_replace.pass.cpp b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t_nothrow_replace.pass.cpp index b631f8a8ce204..b407207cc3263 100644 --- a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t_nothrow_replace.pass.cpp +++ b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/new_align_val_t_nothrow_replace.pass.cpp @@ -14,11 +14,7 @@ // However, support for that was broken prior to Clang 8 and AppleClang 11. // UNSUPPORTED: apple-clang-9, apple-clang-10 // UNSUPPORTED: clang-5, clang-6, clang-7 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13}} // test operator new nothrow by replacing only operator new diff --git a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array_fsizeddeallocation.pass.cpp b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array_fsizeddeallocation.pass.cpp index b40e5ff1408b1..2a5bb21fcdd16 100644 --- a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array_fsizeddeallocation.pass.cpp +++ b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.array/sized_delete_array_fsizeddeallocation.pass.cpp @@ -12,9 +12,7 @@ // when sized deallocation is not supported, e.g., prior to C++14. // UNSUPPORTED: sanitizer-new-delete -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // REQUIRES: -fsized-deallocation // ADDITIONAL_COMPILE_FLAGS: -fsized-deallocation diff --git a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/delete_align_val_t_replace.pass.cpp b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/delete_align_val_t_replace.pass.cpp index 4189ad9658b4c..336a163784bdb 100644 --- a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/delete_align_val_t_replace.pass.cpp +++ b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/delete_align_val_t_replace.pass.cpp @@ -18,11 +18,7 @@ // However, support for that was broken prior to Clang 8 and AppleClang 11. // UNSUPPORTED: apple-clang-9, apple-clang-10 // UNSUPPORTED: clang-5, clang-6, clang-7 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13}} // On Windows libc++ doesn't provide its own definitions for new/delete // but instead depends on the ones in VCRuntime. However VCRuntime does not diff --git a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t.pass.cpp b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t.pass.cpp index 7030e08a404d1..d2fc41751ae74 100644 --- a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t.pass.cpp +++ b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t.pass.cpp @@ -13,11 +13,7 @@ // However, support for that was broken prior to Clang 8 and AppleClang 11. // UNSUPPORTED: apple-clang-9, apple-clang-10 // UNSUPPORTED: clang-5, clang-6, clang-7 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13}} // asan and msan will not call the new handler. // UNSUPPORTED: sanitizer-new-delete diff --git a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t_nothrow.pass.cpp b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t_nothrow.pass.cpp index c3d1d6b199444..e65280bb25a11 100644 --- a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t_nothrow.pass.cpp +++ b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t_nothrow.pass.cpp @@ -13,11 +13,7 @@ // However, support for that was broken prior to Clang 8 and AppleClang 11. // UNSUPPORTED: apple-clang-9, apple-clang-10 // UNSUPPORTED: clang-5, clang-6, clang-7 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13}} // asan and msan will not call the new handler. // UNSUPPORTED: sanitizer-new-delete diff --git a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t_nothrow_replace.pass.cpp b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t_nothrow_replace.pass.cpp index 843a3f83f3c31..657f8e0fd38af 100644 --- a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t_nothrow_replace.pass.cpp +++ b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/new_align_val_t_nothrow_replace.pass.cpp @@ -14,11 +14,7 @@ // However, support for that was broken prior to Clang 8 and AppleClang 11. // UNSUPPORTED: apple-clang-9, apple-clang-10 // UNSUPPORTED: clang-5, clang-6, clang-7 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13}} // test operator new nothrow by replacing only operator new diff --git a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete_fsizeddeallocation.pass.cpp b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete_fsizeddeallocation.pass.cpp index 25af691897a63..da296f1a3f933 100644 --- a/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete_fsizeddeallocation.pass.cpp +++ b/libcxx/test/std/language.support/support.dynamic/new.delete/new.delete.single/sized_delete_fsizeddeallocation.pass.cpp @@ -12,9 +12,7 @@ // when sized deallocation is not supported, e.g., prior to C++14. // UNSUPPORTED: sanitizer-new-delete -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // NOTE: Only clang-3.7 and GCC 5.1 and greater support -fsized-deallocation. // REQUIRES: -fsized-deallocation diff --git a/libcxx/test/std/language.support/support.exception/uncaught/uncaught_exceptions.pass.cpp b/libcxx/test/std/language.support/support.exception/uncaught/uncaught_exceptions.pass.cpp index 4f6c1ba15c373..658c0a822ed9c 100644 --- a/libcxx/test/std/language.support/support.exception/uncaught/uncaught_exceptions.pass.cpp +++ b/libcxx/test/std/language.support/support.exception/uncaught/uncaught_exceptions.pass.cpp @@ -9,14 +9,11 @@ // UNSUPPORTED: no-exceptions // std::uncaught_exceptions() was introduced in the dylib on Mac OS 10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // However, std::uncaught_exceptions() gives the wrong answer in Mac OS 10.12 // and 10.13, where it only gives 0 or 1. This was fixed later. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{12|13}} // test uncaught_exceptions diff --git a/libcxx/test/std/localization/locale.categories/category.collate/locale.collate.byname/compare.pass.cpp b/libcxx/test/std/localization/locale.categories/category.collate/locale.collate.byname/compare.pass.cpp index 792292dc927a0..8d759ac7eac89 100644 --- a/libcxx/test/std/localization/locale.categories/category.collate/locale.collate.byname/compare.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.collate/locale.collate.byname/compare.pass.cpp @@ -20,9 +20,8 @@ // up the OS's collation files. // TODO investigation needed. -// Glibc seems to collate files differently from the way Apple's C library does -// it. -// XFAIL: linux-gnu +// Glibc seems to collate files differently from the way Apple's C library does it. +// XFAIL: target={{.*}}-linux-gnu{{.*}} // XFAIL: LIBCXX-WINDOWS-FIXME diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt.byname/ctor_char16_t_char8_t.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt.byname/ctor_char16_t_char8_t.pass.cpp index 67a9bfed9abfa..d1da936d8faa6 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt.byname/ctor_char16_t_char8_t.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt.byname/ctor_char16_t_char8_t.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt.byname/ctor_char32_t_char8_t.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt.byname/ctor_char32_t_char8_t.pass.cpp index e077c870501b3..9bd7a2e8489cb 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt.byname/ctor_char32_t_char8_t.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt.byname/ctor_char32_t_char8_t.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/ctor_char16_t_char8_t.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/ctor_char16_t_char8_t.pass.cpp index eb3e2c969d025..5621f3b35b749 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/ctor_char16_t_char8_t.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/ctor_char16_t_char8_t.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/ctor_char32_t_char8_t.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/ctor_char32_t_char8_t.pass.cpp index faf29fd2e1b06..4499d8a1a076f 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/ctor_char32_t_char8_t.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/ctor_char32_t_char8_t.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_always_noconv.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_always_noconv.pass.cpp index c6a7a46ef81f9..56a56ac159996 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_always_noconv.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_always_noconv.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_encoding.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_encoding.pass.cpp index 5167bcc345435..570d017a1df17 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_encoding.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_encoding.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_in.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_in.pass.cpp index d40d4e5b817d5..81dcb922f623c 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_in.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_in.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_length.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_length.pass.cpp index 3f1afb280bee3..752eea4c80247 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_length.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_length.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_max_length.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_max_length.pass.cpp index 0c359d0b68501..eb77c8237f6ff 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_max_length.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_max_length.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_out.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_out.pass.cpp index c4844e5558fd7..4a8093228359b 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_out.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_out.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_unshift.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_unshift.pass.cpp index 32da259d50ae0..790fd1d3ddd18 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_unshift.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char16_t_char8_t_unshift.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_always_noconv.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_always_noconv.pass.cpp index 0cf2c2ecd3501..e3f9384f3b4a6 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_always_noconv.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_always_noconv.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_encoding.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_encoding.pass.cpp index 1976234e1bb3c..f193b8568efcd 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_encoding.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_encoding.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_in.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_in.pass.cpp index baaadb2bca236..c7d50f29dbcf2 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_in.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_in.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_length.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_length.pass.cpp index d95ba2a84e4a3..75cce8154c240 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_length.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_length.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_max_length.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_max_length.pass.cpp index 31aad35c9ae55..436535bb82fa5 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_max_length.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_max_length.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_out.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_out.pass.cpp index 3649597fec2d1..30743d5946e9c 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_out.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_out.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_unshift.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_unshift.pass.cpp index be865e15ed075..7b6124457a17f 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_unshift.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/char32_t_char8_t_unshift.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/utf_sanity_check.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/utf_sanity_check.pass.cpp index 8bbe9e0e0dde1..31fd07fd1dc57 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/utf_sanity_check.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/locale.codecvt.members/utf_sanity_check.pass.cpp @@ -9,13 +9,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/types_char16_t_char8_t.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/types_char16_t_char8_t.pass.cpp index 82fd14c4e4520..95ee89a73cb0a 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/types_char16_t_char8_t.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/types_char16_t_char8_t.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/types_char32_t_char8_t.pass.cpp b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/types_char32_t_char8_t.pass.cpp index 2beb60c80be53..c009b1f20d297 100644 --- a/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/types_char32_t_char8_t.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.ctype/locale.codecvt/types_char32_t_char8_t.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_zh_CN.pass.cpp b/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_zh_CN.pass.cpp index 69331bba6ff5d..8cf77b47a0bd5 100644 --- a/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_zh_CN.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.get/locale.money.get.members/get_long_double_zh_CN.pass.cpp @@ -21,7 +21,7 @@ // ios_base::iostate& err, long double& v) const; // TODO For zh_CN GLIBC puts the negative sign after the currency symbol. -// XFAIL: linux-gnu +// XFAIL: target={{.*}}-linux-gnu{{.*}} #include #include diff --git a/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_zh_CN.pass.cpp b/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_zh_CN.pass.cpp index b8cc831f15a5c..0e5254cb9bd65 100644 --- a/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_zh_CN.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.monetary/locale.money.put/locale.money.put.members/put_long_double_zh_CN.pass.cpp @@ -21,7 +21,7 @@ // long double units) const; // TODO For zh_CN GLIBC puts the negative sign after the currency symbol. -// XFAIL: linux-gnu +// XFAIL: target={{.*}}-linux-gnu{{.*}} #include #include diff --git a/libcxx/test/std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_long_double.pass.cpp b/libcxx/test/std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_long_double.pass.cpp index a7bcacb7408f2..ae0837b9e5df6 100644 --- a/libcxx/test/std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_long_double.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.numeric/locale.nm.put/facet.num.put.members/put_long_double.pass.cpp @@ -13,7 +13,7 @@ // iter_type put(iter_type s, ios_base& iob, char_type fill, long double v) const; // TODO GLIBC uses a different string for positive and negative NAN numbers. -// XFAIL: linux-gnu +// XFAIL: target={{.*}}-linux-gnu{{.*}} // XFAIL: LIBCXX-WINDOWS-FIXME diff --git a/libcxx/test/std/localization/locale.categories/category.numeric/locale.num.get/facet.num.get.members/get_long.pass.cpp b/libcxx/test/std/localization/locale.categories/category.numeric/locale.num.get/facet.num.get.members/get_long.pass.cpp index f81bff0086978..47e4ab502b876 100644 --- a/libcxx/test/std/localization/locale.categories/category.numeric/locale.num.get/facet.num.get.members/get_long.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.numeric/locale.num.get/facet.num.get.members/get_long.pass.cpp @@ -15,12 +15,7 @@ // This test exercises the fix for PR28704, which isn't in the dylib for // some systems. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} #include #include diff --git a/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_one.pass.cpp b/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_one.pass.cpp index 8c2712dc1838f..791a71c17bc39 100644 --- a/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_one.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_one.pass.cpp @@ -24,7 +24,7 @@ // ios_base::iostate& err, tm *t, char format, char modifier = 0) const; // TODO: investigation needed -// XFAIL: linux-gnu +// XFAIL: target={{.*}}-linux-gnu{{.*}} #include #include diff --git a/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_one_wide.pass.cpp b/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_one_wide.pass.cpp index 3246b4dee1599..d3315d6faee68 100644 --- a/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_one_wide.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_one_wide.pass.cpp @@ -24,7 +24,7 @@ // ios_base::iostate& err, tm *t, char format, char modifier = 0) const; // TODO: investigation needed -// XFAIL: linux-gnu +// XFAIL: target={{.*}}-linux-gnu{{.*}} #include #include diff --git a/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_weekday.pass.cpp b/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_weekday.pass.cpp index c2c2a98442a45..0ddef03215500 100644 --- a/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_weekday.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_weekday.pass.cpp @@ -22,7 +22,7 @@ // ios_base::iostate& err, tm* t) const; // TODO: investigation needed -// XFAIL: linux-gnu +// XFAIL: target={{.*}}-linux-gnu{{.*}} #include #include diff --git a/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_weekday_wide.pass.cpp b/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_weekday_wide.pass.cpp index 856cf3f60b6ca..9ff73e9c2ad0b 100644 --- a/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_weekday_wide.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.time/locale.time.get.byname/get_weekday_wide.pass.cpp @@ -20,7 +20,7 @@ // ios_base::iostate& err, tm* t) const; // TODO: investigation needed -// XFAIL: linux-gnu +// XFAIL: target={{.*}}-linux-gnu{{.*}} #include #include diff --git a/libcxx/test/std/localization/locale.categories/category.time/locale.time.put.byname/put1.pass.cpp b/libcxx/test/std/localization/locale.categories/category.time/locale.time.put.byname/put1.pass.cpp index 8daf3405d86b5..0a4d5df78019a 100644 --- a/libcxx/test/std/localization/locale.categories/category.time/locale.time.put.byname/put1.pass.cpp +++ b/libcxx/test/std/localization/locale.categories/category.time/locale.time.put.byname/put1.pass.cpp @@ -29,7 +29,7 @@ // }; // TODO: investigation needed -// XFAIL: linux-gnu +// XFAIL: target={{.*}}-linux-gnu{{.*}} #include #include diff --git a/libcxx/test/std/localization/locales/locale/locale.cons/assign.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.cons/assign.pass.cpp index b078cbcdb4ab4..94e2d26f2c63e 100644 --- a/libcxx/test/std/localization/locales/locale/locale.cons/assign.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.cons/assign.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locales/locale/locale.cons/char_pointer.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.cons/char_pointer.pass.cpp index af9299af22f30..42b99d3347e02 100644 --- a/libcxx/test/std/localization/locales/locale/locale.cons/char_pointer.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.cons/char_pointer.pass.cpp @@ -15,13 +15,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locales/locale/locale.cons/copy.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.cons/copy.pass.cpp index 0660b331eb8d3..012086a626d7f 100644 --- a/libcxx/test/std/localization/locales/locale/locale.cons/copy.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.cons/copy.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locales/locale/locale.cons/default.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.cons/default.pass.cpp index a9a1656de1583..c7a67595d1755 100644 --- a/libcxx/test/std/localization/locales/locale/locale.cons/default.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.cons/default.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locales/locale/locale.cons/locale_char_pointer_cat.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.cons/locale_char_pointer_cat.pass.cpp index 23bbc13540b59..694af889dc0e1 100644 --- a/libcxx/test/std/localization/locales/locale/locale.cons/locale_char_pointer_cat.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.cons/locale_char_pointer_cat.pass.cpp @@ -13,13 +13,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locales/locale/locale.cons/locale_facetptr.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.cons/locale_facetptr.pass.cpp index dba31ef8759cb..1ae3f59a8bd8a 100644 --- a/libcxx/test/std/localization/locales/locale/locale.cons/locale_facetptr.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.cons/locale_facetptr.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locales/locale/locale.cons/locale_locale_cat.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.cons/locale_locale_cat.pass.cpp index fb926768e8d37..09889087890c6 100644 --- a/libcxx/test/std/localization/locales/locale/locale.cons/locale_locale_cat.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.cons/locale_locale_cat.pass.cpp @@ -13,13 +13,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locales/locale/locale.cons/locale_string_cat.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.cons/locale_string_cat.pass.cpp index 3d97944444c57..5745f8a8448c7 100644 --- a/libcxx/test/std/localization/locales/locale/locale.cons/locale_string_cat.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.cons/locale_string_cat.pass.cpp @@ -13,13 +13,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locales/locale/locale.cons/string.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.cons/string.pass.cpp index 1e2fde612b1fe..733c7e93275b0 100644 --- a/libcxx/test/std/localization/locales/locale/locale.cons/string.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.cons/string.pass.cpp @@ -12,13 +12,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locales/locale/locale.members/combine.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.members/combine.pass.cpp index 10fca15564a89..5914bb7774434 100644 --- a/libcxx/test/std/localization/locales/locale/locale.members/combine.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.members/combine.pass.cpp @@ -9,13 +9,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locales/locale/locale.statics/classic.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.statics/classic.pass.cpp index f873b911aee67..f32c2432123a2 100644 --- a/libcxx/test/std/localization/locales/locale/locale.statics/classic.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.statics/classic.pass.cpp @@ -9,13 +9,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/localization/locales/locale/locale.statics/global.pass.cpp b/libcxx/test/std/localization/locales/locale/locale.statics/global.pass.cpp index 38ec71ea0a201..458fe0866a1b0 100644 --- a/libcxx/test/std/localization/locales/locale/locale.statics/global.pass.cpp +++ b/libcxx/test/std/localization/locales/locale/locale.statics/global.pass.cpp @@ -11,13 +11,7 @@ // This test relies on P0482 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // This test runs in C++20, but we have deprecated codecvt in C++20. // ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS diff --git a/libcxx/test/std/numerics/rand/rand.device/ctor.pass.cpp b/libcxx/test/std/numerics/rand/rand.device/ctor.pass.cpp index bcbb9ec8569eb..4cef9bd160af7 100644 --- a/libcxx/test/std/numerics/rand/rand.device/ctor.pass.cpp +++ b/libcxx/test/std/numerics/rand/rand.device/ctor.pass.cpp @@ -8,9 +8,7 @@ // See bugs.llvm.org/PR20183 // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // UNSUPPORTED: libcpp-has-no-random-device diff --git a/libcxx/test/std/numerics/rand/rand.device/eval.pass.cpp b/libcxx/test/std/numerics/rand/rand.device/eval.pass.cpp index a55915d121b38..f91850f0cd5df 100644 --- a/libcxx/test/std/numerics/rand/rand.device/eval.pass.cpp +++ b/libcxx/test/std/numerics/rand/rand.device/eval.pass.cpp @@ -8,9 +8,7 @@ // See bugs.llvm.org/PR20183 // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // UNSUPPORTED: libcpp-has-no-random-device diff --git a/libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp b/libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp index a93a2694464b7..7588f2d365442 100644 --- a/libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp +++ b/libcxx/test/std/re/re.alg/re.alg.match/awk.locale.pass.cpp @@ -18,7 +18,7 @@ // TODO: investigation needed // TODO(netbsd): incomplete support for locales -// XFAIL: linux-gnu, netbsd, freebsd +// XFAIL: target={{.*}}-linux-gnu{{.*}}, netbsd, freebsd // REQUIRES: locale.cs_CZ.ISO8859-2 #include diff --git a/libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp b/libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp index 1cec602096484..3b9b8e2a83018 100644 --- a/libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp +++ b/libcxx/test/std/re/re.alg/re.alg.match/basic.locale.pass.cpp @@ -21,7 +21,7 @@ // regex_constants::match_flag_type flags = regex_constants::match_default); // TODO: investigation needed -// XFAIL: linux-gnu, freebsd +// XFAIL: target={{.*}}-linux-gnu{{.*}}, freebsd #include #include diff --git a/libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp b/libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp index 8e651f6d0301e..26be2069fab5e 100644 --- a/libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp +++ b/libcxx/test/std/re/re.alg/re.alg.match/ecma.locale.pass.cpp @@ -21,7 +21,7 @@ // regex_constants::match_flag_type flags = regex_constants::match_default); // TODO: investigation needed -// XFAIL: linux-gnu, freebsd +// XFAIL: target={{.*}}-linux-gnu{{.*}}, freebsd #include #include diff --git a/libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp b/libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp index ea77dd83fc979..5a0dd18c821e2 100644 --- a/libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp +++ b/libcxx/test/std/re/re.alg/re.alg.match/extended.locale.pass.cpp @@ -21,7 +21,7 @@ // regex_constants::match_flag_type flags = regex_constants::match_default); // TODO: investigation needed -// XFAIL: linux-gnu, freebsd +// XFAIL: target={{.*}}-linux-gnu{{.*}}, freebsd #include #include diff --git a/libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp b/libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp index 4ba87bb45232c..275927841c242 100644 --- a/libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp +++ b/libcxx/test/std/re/re.alg/re.alg.search/awk.locale.pass.cpp @@ -21,7 +21,7 @@ // regex_constants::match_flag_type flags = regex_constants::match_default); // TODO: investigation needed -// XFAIL: linux-gnu, freebsd +// XFAIL: target={{.*}}-linux-gnu{{.*}}, freebsd #include #include diff --git a/libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp b/libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp index fe3435eae9298..130ef49e81e41 100644 --- a/libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp +++ b/libcxx/test/std/re/re.alg/re.alg.search/basic.locale.pass.cpp @@ -21,7 +21,7 @@ // regex_constants::match_flag_type flags = regex_constants::match_default); // TODO: investigation needed -// XFAIL: linux-gnu, freebsd +// XFAIL: target={{.*}}-linux-gnu{{.*}}, freebsd #include #include diff --git a/libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp b/libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp index 840cc634a3da5..e97c4df3473ff 100644 --- a/libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp +++ b/libcxx/test/std/re/re.alg/re.alg.search/ecma.locale.pass.cpp @@ -21,7 +21,7 @@ // regex_constants::match_flag_type flags = regex_constants::match_default); // TODO: investigation needed -// XFAIL: linux-gnu, freebsd +// XFAIL: target={{.*}}-linux-gnu{{.*}}, freebsd #include #include diff --git a/libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp b/libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp index 3a171f81e6966..8902d06183b16 100644 --- a/libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp +++ b/libcxx/test/std/re/re.alg/re.alg.search/extended.locale.pass.cpp @@ -21,7 +21,7 @@ // regex_constants::match_flag_type flags = regex_constants::match_default); // TODO: investigation needed -// XFAIL: linux-gnu, freebsd +// XFAIL: target={{.*}}-linux-gnu{{.*}}, freebsd #include #include diff --git a/libcxx/test/std/re/re.iter/re.regiter/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/re/re.iter/re.regiter/iterator_concept_conformance.compile.pass.cpp index 7818c475330c6..d13f770c241dd 100644 --- a/libcxx/test/std/re/re.iter/re.regiter/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/re/re.iter/re.regiter/iterator_concept_conformance.compile.pass.cpp @@ -23,3 +23,4 @@ static_assert(std::sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/re/re.iter/re.tokiter/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/re/re.iter/re.tokiter/iterator_concept_conformance.compile.pass.cpp index b1ed97a9173b7..a5c40e54c1817 100644 --- a/libcxx/test/std/re/re.iter/re.tokiter/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/re/re.iter/re.tokiter/iterator_concept_conformance.compile.pass.cpp @@ -23,3 +23,4 @@ static_assert(std::sentinel_for); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp b/libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp index aeb7c50bb8177..27ff6eef38dc9 100644 --- a/libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp +++ b/libcxx/test/std/re/re.traits/lookup_collatename.pass.cpp @@ -20,7 +20,7 @@ // lookup_collatename(ForwardIterator first, ForwardIterator last) const; // TODO: investigation needed -// XFAIL: linux-gnu +// XFAIL: target={{.*}}-linux-gnu{{.*}} #include #include diff --git a/libcxx/test/std/strings/basic.string/string.capacity/over_max_size.pass.cpp b/libcxx/test/std/strings/basic.string/string.capacity/over_max_size.pass.cpp index d7d2efca9042a..54d9c4ee69cb8 100644 --- a/libcxx/test/std/strings/basic.string/string.capacity/over_max_size.pass.cpp +++ b/libcxx/test/std/strings/basic.string/string.capacity/over_max_size.pass.cpp @@ -7,9 +7,7 @@ //===----------------------------------------------------------------------===// // UNSUPPORTED: no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/strings/basic.string/string.capacity/reserve_size.pass.cpp b/libcxx/test/std/strings/basic.string/string.capacity/reserve_size.pass.cpp index a14ec20c651ae..c6e2cd14dceed 100644 --- a/libcxx/test/std/strings/basic.string/string.capacity/reserve_size.pass.cpp +++ b/libcxx/test/std/strings/basic.string/string.capacity/reserve_size.pass.cpp @@ -13,13 +13,7 @@ // This test relies on https://llvm.org/PR45368 being fixed, which isn't in // older Apple dylibs // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} #include #include diff --git a/libcxx/test/std/strings/basic.string/string.iterators/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/strings/basic.string/string.iterators/iterator_concept_conformance.compile.pass.cpp index 6efb5ae836b5b..98b0cec9c7662 100644 --- a/libcxx/test/std/strings/basic.string/string.iterators/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/strings/basic.string/string.iterators/iterator_concept_conformance.compile.pass.cpp @@ -40,6 +40,7 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert( std::indirectly_swappable); static_assert(std::contiguous_iterator); static_assert(!std::indirectly_writable); @@ -59,3 +60,4 @@ static_assert( std::indirectly_movable); static_assert( std::indirectly_movable_storable); static_assert(!std::indirectly_movable); static_assert(!std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/strings/basic.string/string.nonmembers/string.io/get_line_delim_rv.pass.cpp b/libcxx/test/std/strings/basic.string/string.nonmembers/string.io/get_line_delim_rv.pass.cpp index af2e62a5c808b..d2e5ab5488bdd 100644 --- a/libcxx/test/std/strings/basic.string/string.nonmembers/string.io/get_line_delim_rv.pass.cpp +++ b/libcxx/test/std/strings/basic.string/string.nonmembers/string.io/get_line_delim_rv.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template @@ -35,13 +33,13 @@ int main(int, char**) assert(s == L" abc"); } { - typedef std::basic_string, min_allocator> S; + typedef std::basic_string, min_allocator > S; S s("initial text"); getline(std::istringstream(" abc* def* ghij"), s, '*'); assert(s == " abc"); } { - typedef std::basic_string, min_allocator> S; + typedef std::basic_string, min_allocator > S; S s(L"initial text"); getline(std::wistringstream(L" abc* def* ghij"), s, L'*'); assert(s == L" abc"); diff --git a/libcxx/test/std/strings/basic.string/string.nonmembers/string.io/get_line_rv.pass.cpp b/libcxx/test/std/strings/basic.string/string.nonmembers/string.io/get_line_rv.pass.cpp index 322b49b9c6e7e..3fb35cc24d66b 100644 --- a/libcxx/test/std/strings/basic.string/string.nonmembers/string.io/get_line_rv.pass.cpp +++ b/libcxx/test/std/strings/basic.string/string.nonmembers/string.io/get_line_rv.pass.cpp @@ -6,8 +6,6 @@ // //===----------------------------------------------------------------------===// -// UNSUPPORTED: c++03 - // // template @@ -35,13 +33,13 @@ int main(int, char**) assert(s == L" abc"); } { - typedef std::basic_string, min_allocator> S; + typedef std::basic_string, min_allocator > S; S s("initial text"); getline(std::istringstream(" abc\n def\n ghij"), s); assert(s == " abc"); } { - typedef std::basic_string, min_allocator> S; + typedef std::basic_string, min_allocator > S; S s(L"initial text"); getline(std::wistringstream(L" abc\n def\n ghij"), s); assert(s == L" abc"); diff --git a/libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char/lt.pass.cpp b/libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char/lt.pass.cpp index fa14e666e9e90..81a8574eac8bd 100644 --- a/libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char/lt.pass.cpp +++ b/libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.char/lt.pass.cpp @@ -19,18 +19,18 @@ int main(int, char**) { - assert( std::char_traits::lt('\0', 'A')); - assert(!std::char_traits::lt('A', '\0')); + assert(std::char_traits::lt('\0', 'A') == ('\0' < 'A')); + assert(std::char_traits::lt('A', '\0') == ('A' < '\0')); - assert(!std::char_traits::lt('a', 'a')); - assert( std::char_traits::lt('A', 'a')); - assert(!std::char_traits::lt('a', 'A')); + assert(std::char_traits::lt('a', 'a') == ('a' < 'a')); + assert(std::char_traits::lt('A', 'a') == ('A' < 'a')); + assert(std::char_traits::lt('a', 'A') == ('a' < 'A')); - assert( std::char_traits::lt('a', 'z')); - assert( std::char_traits::lt('A', 'Z')); + assert(std::char_traits::lt('a', 'z') == ('a' < 'z')); + assert(std::char_traits::lt('A', 'Z') == ('A' < 'Z')); - assert( std::char_traits::lt(' ', 'A')); - assert( std::char_traits::lt('A', '~')); + assert(std::char_traits::lt(' ', 'A') == (' ' < 'A')); + assert(std::char_traits::lt('A', '~') == ('A' < '~')); return 0; } diff --git a/libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.wchar.t/lt.pass.cpp b/libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.wchar.t/lt.pass.cpp index 15a16b0cd92da..5664692addb41 100644 --- a/libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.wchar.t/lt.pass.cpp +++ b/libcxx/test/std/strings/char.traits/char.traits.specializations/char.traits.specializations.wchar.t/lt.pass.cpp @@ -19,8 +19,18 @@ int main(int, char**) { - assert(!std::char_traits::lt(L'a', L'a')); - assert( std::char_traits::lt(L'A', L'a')); + assert(std::char_traits::lt(L'\0', L'A') == (L'\0' < L'A')); + assert(std::char_traits::lt(L'A', L'\0') == (L'A' < L'\0')); + + assert(std::char_traits::lt(L'a', L'a') == (L'a' < L'a')); + assert(std::char_traits::lt(L'A', L'a') == (L'A' < L'a')); + assert(std::char_traits::lt(L'a', L'A') == (L'a' < L'A')); + + assert(std::char_traits::lt(L'a', L'z') == (L'a' < L'z')); + assert(std::char_traits::lt(L'A', L'Z') == (L'A' < L'Z')); + + assert(std::char_traits::lt(L' ', L'A') == (L' ' < L'A')); + assert(std::char_traits::lt(L'A', L'~') == (L'A' < L'~')); return 0; } diff --git a/libcxx/test/std/strings/string.view/string.view.find/find_last_not_of_char_size.pass.cpp b/libcxx/test/std/strings/string.view/string.view.find/find_last_not_of_char_size.pass.cpp index d2cf8d5d94f9b..798c899e80f28 100644 --- a/libcxx/test/std/strings/string.view/string.view.find/find_last_not_of_char_size.pass.cpp +++ b/libcxx/test/std/strings/string.view/string.view.find/find_last_not_of_char_size.pass.cpp @@ -8,7 +8,7 @@ // -// const size_type find_last_not_of(charT c, size_type pos = npos) const; +// size_type find_last_not_of(charT c, size_type pos = npos) const; #include #include diff --git a/libcxx/test/std/strings/string.view/string.view.iterators/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/strings/string.view/string.view.iterators/iterator_concept_conformance.compile.pass.cpp index fb12fa84491a1..0dfce8ea8b0c6 100644 --- a/libcxx/test/std/strings/string.view/string.view.iterators/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/strings/string.view/string.view.iterators/iterator_concept_conformance.compile.pass.cpp @@ -33,6 +33,7 @@ static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(std::indirectly_movable); static_assert(std::indirectly_movable_storable); +static_assert(!std::indirectly_swappable); static_assert(std::contiguous_iterator); static_assert(!std::indirectly_writable); @@ -44,3 +45,4 @@ static_assert(std::sized_sentinel_for); static_assert(std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); static_assert(!std::sized_sentinel_for); +static_assert(!std::indirectly_swappable); diff --git a/libcxx/test/std/thread/futures/futures.async/async_race.38682.pass.cpp b/libcxx/test/std/thread/futures/futures.async/async_race.38682.pass.cpp index c8686a3dc2e56..4fe7cd0543398 100644 --- a/libcxx/test/std/thread/futures/futures.async/async_race.38682.pass.cpp +++ b/libcxx/test/std/thread/futures/futures.async/async_race.38682.pass.cpp @@ -11,12 +11,7 @@ // There's currently no release of OS X whose dylib contains the patch for // PR38682. Since the fix for future is in the dylib, this test may fail. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.14 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // This test is designed to cause and allow TSAN to detect a race condition // in std::async, as reported in https://llvm.org/PR38682. diff --git a/libcxx/test/std/thread/futures/futures.future_error/what.pass.cpp b/libcxx/test/std/thread/futures/futures.future_error/what.pass.cpp index 4b256111a4422..0b093fc235bcb 100644 --- a/libcxx/test/std/thread/futures/futures.future_error/what.pass.cpp +++ b/libcxx/test/std/thread/futures/futures.future_error/what.pass.cpp @@ -11,9 +11,7 @@ // LWG 2056 changed the values of future_errc, so if we're using new headers // with an old library we'll get incorrect messages. // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.barrier/arrive.pass.cpp b/libcxx/test/std/thread/thread.barrier/arrive.pass.cpp index e19695e760c57..31df3714315d6 100644 --- a/libcxx/test/std/thread/thread.barrier/arrive.pass.cpp +++ b/libcxx/test/std/thread/thread.barrier/arrive.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/thread/thread.barrier/arrive_and_drop.pass.cpp b/libcxx/test/std/thread/thread.barrier/arrive_and_drop.pass.cpp index 7f6ce35396040..038c5ac169e2a 100644 --- a/libcxx/test/std/thread/thread.barrier/arrive_and_drop.pass.cpp +++ b/libcxx/test/std/thread/thread.barrier/arrive_and_drop.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/thread/thread.barrier/arrive_and_wait.pass.cpp b/libcxx/test/std/thread/thread.barrier/arrive_and_wait.pass.cpp index 920281981e46a..de3f9f785af0d 100644 --- a/libcxx/test/std/thread/thread.barrier/arrive_and_wait.pass.cpp +++ b/libcxx/test/std/thread/thread.barrier/arrive_and_wait.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/thread/thread.barrier/completion.pass.cpp b/libcxx/test/std/thread/thread.barrier/completion.pass.cpp index abbfb869895ce..baa73fb3ae772 100644 --- a/libcxx/test/std/thread/thread.barrier/completion.pass.cpp +++ b/libcxx/test/std/thread/thread.barrier/completion.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/thread/thread.latch/arrive_and_wait.pass.cpp b/libcxx/test/std/thread/thread.latch/arrive_and_wait.pass.cpp index 69160fe89a8e2..5d0a01206492b 100644 --- a/libcxx/test/std/thread/thread.latch/arrive_and_wait.pass.cpp +++ b/libcxx/test/std/thread/thread.latch/arrive_and_wait.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/thread/thread.latch/count_down.pass.cpp b/libcxx/test/std/thread/thread.latch/count_down.pass.cpp index e33590f1c78af..0038bf1ca86d2 100644 --- a/libcxx/test/std/thread/thread.latch/count_down.pass.cpp +++ b/libcxx/test/std/thread/thread.latch/count_down.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/thread/thread.latch/try_wait.pass.cpp b/libcxx/test/std/thread/thread.latch/try_wait.pass.cpp index 8283aa3546a10..b627bbb264393 100644 --- a/libcxx/test/std/thread/thread.latch/try_wait.pass.cpp +++ b/libcxx/test/std/thread/thread.latch/try_wait.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/default.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/default.pass.cpp index d6081a63c3c15..3f3868e1289f4 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/default.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/default.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/move_assign.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/move_assign.pass.cpp index d251b0d147772..07b1b32108910 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/move_assign.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/move_assign.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/move_ctor.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/move_ctor.pass.cpp index d16bf5441eedd..612fc34e8acde 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/move_ctor.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/move_ctor.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex.pass.cpp index 250ba77025bd4..d09cde085db3d 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // ALLOW_RETRIES: 2 diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_adopt_lock.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_adopt_lock.pass.cpp index 0147a32e46d75..4e1ffd5d3e556 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_adopt_lock.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_adopt_lock.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_defer_lock.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_defer_lock.pass.cpp index 16719e0f92a15..fac91220eafc9 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_defer_lock.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_defer_lock.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_duration.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_duration.pass.cpp index 29160d5e76a89..66e810b02cc5c 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_duration.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_duration.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_time_point.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_time_point.pass.cpp index 9f242f484a48e..074c906b2d0f3 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_time_point.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_time_point.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_try_to_lock.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_try_to_lock.pass.cpp index 60c85945b904e..0e3721bb0de72 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_try_to_lock.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.cons/mutex_try_to_lock.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // ALLOW_RETRIES: 2 diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.locking/lock.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.locking/lock.pass.cpp index fb0650ba79b79..dc980ae463411 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.locking/lock.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.locking/lock.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // ALLOW_RETRIES: 2 diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.obs/mutex.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.obs/mutex.pass.cpp index d3ae30e578c28..7c2fdcddf082a 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.obs/mutex.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.obs/mutex.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.obs/owns_lock.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.obs/owns_lock.pass.cpp index a8c6bcb6d7d64..23eae754bcfef 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.obs/owns_lock.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.lock/thread.lock.shared/thread.lock.shared.obs/owns_lock.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // dylib support for shared_mutex was added in macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/assign.fail.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/assign.fail.cpp index 2b71e9cadab65..7fc5442c64fb8 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/assign.fail.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/assign.fail.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // shared_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/copy.fail.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/copy.fail.cpp index 402735ac39476..27086a84919c9 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/copy.fail.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/copy.fail.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // shared_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/default.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/default.pass.cpp index ce659e8463978..76c6cebbee49e 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/default.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/default.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // shared_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/lock.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/lock.pass.cpp index c442c4ce747b9..4d97129cd38d2 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/lock.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/lock.pass.cpp @@ -12,9 +12,7 @@ // ALLOW_RETRIES: 2 // shared_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/lock_shared.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/lock_shared.pass.cpp index b6c42085d6baf..fec48900fab4c 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/lock_shared.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/lock_shared.pass.cpp @@ -12,9 +12,7 @@ // ALLOW_RETRIES: 2 // shared_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/try_lock.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/try_lock.pass.cpp index 075074419cedd..f1d18c80d6a8e 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/try_lock.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/try_lock.pass.cpp @@ -12,9 +12,7 @@ // ALLOW_RETRIES: 2 // shared_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/try_lock_shared.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/try_lock_shared.pass.cpp index 7c8dcc2a62c17..fc9eb36937ff4 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/try_lock_shared.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.shared_mutex.requirements/thread.shared_mutex.class/try_lock_shared.pass.cpp @@ -12,9 +12,7 @@ // ALLOW_RETRIES: 2 // shared_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/assign.compile.fail.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/assign.compile.fail.cpp index 6474fd9e7cc02..9af5a4fc0a065 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/assign.compile.fail.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/assign.compile.fail.cpp @@ -9,9 +9,7 @@ // UNSUPPORTED: c++03, c++11 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/copy.compile.fail.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/copy.compile.fail.cpp index a9f9b7e6c7d2e..c9ec2483a6649 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/copy.compile.fail.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/copy.compile.fail.cpp @@ -9,9 +9,7 @@ // UNSUPPORTED: c++03, c++11 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/default.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/default.pass.cpp index e966622dae85b..cd27c79cc9422 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/default.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/default.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/lock.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/lock.pass.cpp index ef0c39729df70..f0bdf0dfa75ed 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/lock.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/lock.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/lock_shared.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/lock_shared.pass.cpp index ac2f702db4b18..d8a02a6bc4c0f 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/lock_shared.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/lock_shared.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock.pass.cpp index ffc9eeabc6385..172742161d81a 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock.pass.cpp @@ -12,9 +12,7 @@ // ALLOW_RETRIES: 2 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_for.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_for.pass.cpp index 481741fbcda0b..20bf000d3fe0f 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_for.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_for.pass.cpp @@ -12,9 +12,7 @@ // ALLOW_RETRIES: 2 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared.pass.cpp index a42fdc1b73cc1..16e9291876333 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared.pass.cpp @@ -12,9 +12,7 @@ // ALLOW_RETRIES: 2 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared_for.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared_for.pass.cpp index 61c569cf6e690..eda6453d58eeb 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared_for.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared_for.pass.cpp @@ -12,9 +12,7 @@ // ALLOW_RETRIES: 2 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared_until.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared_until.pass.cpp index 324870a50e3b0..02ee39876a7a3 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared_until.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_shared_until.pass.cpp @@ -12,9 +12,7 @@ // ALLOW_RETRIES: 2 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_until.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_until.pass.cpp index 5ea731afbe088..3118893efd21c 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_until.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_until.pass.cpp @@ -12,9 +12,7 @@ // ALLOW_RETRIES: 2 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_until_deadlock_bug.pass.cpp b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_until_deadlock_bug.pass.cpp index c817c5ff1ac2c..5dd2b7cf2fa4c 100644 --- a/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_until_deadlock_bug.pass.cpp +++ b/libcxx/test/std/thread/thread.mutex/thread.mutex.requirements/thread.sharedtimedmutex.requirements/thread.sharedtimedmutex.class/try_lock_until_deadlock_bug.pass.cpp @@ -10,9 +10,7 @@ // UNSUPPORTED: c++03, c++11 // shared_timed_mutex was introduced in macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11}} // diff --git a/libcxx/test/std/thread/thread.semaphore/acquire.pass.cpp b/libcxx/test/std/thread/thread.semaphore/acquire.pass.cpp index 547594b71e591..cd08e2ba81017 100644 --- a/libcxx/test/std/thread/thread.semaphore/acquire.pass.cpp +++ b/libcxx/test/std/thread/thread.semaphore/acquire.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/thread/thread.semaphore/binary.pass.cpp b/libcxx/test/std/thread/thread.semaphore/binary.pass.cpp index 2ebee35e3608f..b80c9fea0295c 100644 --- a/libcxx/test/std/thread/thread.semaphore/binary.pass.cpp +++ b/libcxx/test/std/thread/thread.semaphore/binary.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/thread/thread.semaphore/release.pass.cpp b/libcxx/test/std/thread/thread.semaphore/release.pass.cpp index 76dac0cc403e2..e491e13e50f95 100644 --- a/libcxx/test/std/thread/thread.semaphore/release.pass.cpp +++ b/libcxx/test/std/thread/thread.semaphore/release.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/thread/thread.semaphore/timed.pass.cpp b/libcxx/test/std/thread/thread.semaphore/timed.pass.cpp index 34520ecfae05d..0954341adfae9 100644 --- a/libcxx/test/std/thread/thread.semaphore/timed.pass.cpp +++ b/libcxx/test/std/thread/thread.semaphore/timed.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/thread/thread.semaphore/try_acquire.pass.cpp b/libcxx/test/std/thread/thread.semaphore/try_acquire.pass.cpp index f71d12f8740e8..35cb6ce7dc822 100644 --- a/libcxx/test/std/thread/thread.semaphore/try_acquire.pass.cpp +++ b/libcxx/test/std/thread/thread.semaphore/try_acquire.pass.cpp @@ -11,13 +11,7 @@ // This test requires the dylib support introduced in D68480, which shipped in // macOS 11.0. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/utilities/any/any.class/any.assign/copy.pass.cpp b/libcxx/test/std/utilities/any/any.class/any.assign/copy.pass.cpp index 0e41114af3bb4..b59bb76e5b760 100644 --- a/libcxx/test/std/utilities/any/any.class/any.assign/copy.pass.cpp +++ b/libcxx/test/std/utilities/any/any.class/any.assign/copy.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.class/any.assign/move.pass.cpp b/libcxx/test/std/utilities/any/any.class/any.assign/move.pass.cpp index fff04834fadd1..4a1b0fc8eed1d 100644 --- a/libcxx/test/std/utilities/any/any.class/any.assign/move.pass.cpp +++ b/libcxx/test/std/utilities/any/any.class/any.assign/move.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.class/any.assign/value.pass.cpp b/libcxx/test/std/utilities/any/any.class/any.assign/value.pass.cpp index 5065ed607624a..f054cd8a719aa 100644 --- a/libcxx/test/std/utilities/any/any.class/any.assign/value.pass.cpp +++ b/libcxx/test/std/utilities/any/any.class/any.assign/value.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.class/any.cons/copy.pass.cpp b/libcxx/test/std/utilities/any/any.class/any.cons/copy.pass.cpp index 06d1825afa0b7..579ea24cc18ef 100644 --- a/libcxx/test/std/utilities/any/any.class/any.cons/copy.pass.cpp +++ b/libcxx/test/std/utilities/any/any.class/any.cons/copy.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.class/any.cons/in_place_type.pass.cpp b/libcxx/test/std/utilities/any/any.class/any.cons/in_place_type.pass.cpp index 1a7baa4baf1c7..0c8b668ddaa4f 100644 --- a/libcxx/test/std/utilities/any/any.class/any.cons/in_place_type.pass.cpp +++ b/libcxx/test/std/utilities/any/any.class/any.cons/in_place_type.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.class/any.cons/move.pass.cpp b/libcxx/test/std/utilities/any/any.class/any.cons/move.pass.cpp index fe908bf07cd06..d8710213f1715 100644 --- a/libcxx/test/std/utilities/any/any.class/any.cons/move.pass.cpp +++ b/libcxx/test/std/utilities/any/any.class/any.cons/move.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.class/any.cons/value.pass.cpp b/libcxx/test/std/utilities/any/any.class/any.cons/value.pass.cpp index 75e8ad9ee9f73..d55bbda741439 100644 --- a/libcxx/test/std/utilities/any/any.class/any.cons/value.pass.cpp +++ b/libcxx/test/std/utilities/any/any.class/any.cons/value.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.class/any.modifiers/emplace.pass.cpp b/libcxx/test/std/utilities/any/any.class/any.modifiers/emplace.pass.cpp index feec4c00ddc43..5168d69ddea4a 100644 --- a/libcxx/test/std/utilities/any/any.class/any.modifiers/emplace.pass.cpp +++ b/libcxx/test/std/utilities/any/any.class/any.modifiers/emplace.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.class/any.modifiers/reset.pass.cpp b/libcxx/test/std/utilities/any/any.class/any.modifiers/reset.pass.cpp index 5f1ba18b2c83e..4b4aa2923662c 100644 --- a/libcxx/test/std/utilities/any/any.class/any.modifiers/reset.pass.cpp +++ b/libcxx/test/std/utilities/any/any.class/any.modifiers/reset.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.class/any.modifiers/swap.pass.cpp b/libcxx/test/std/utilities/any/any.class/any.modifiers/swap.pass.cpp index 7839d4b4fcf1a..ee5684ee2ea8c 100644 --- a/libcxx/test/std/utilities/any/any.class/any.modifiers/swap.pass.cpp +++ b/libcxx/test/std/utilities/any/any.class/any.modifiers/swap.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_pointer.pass.cpp b/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_pointer.pass.cpp index e62b74f083378..1a50a694ef8d7 100644 --- a/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_pointer.pass.cpp +++ b/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_pointer.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_reference.pass.cpp b/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_reference.pass.cpp index 2d6562a3b55c8..79d9a440dba17 100644 --- a/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_reference.pass.cpp +++ b/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_reference.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_request_invalid_value_category.fail.cpp b/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_request_invalid_value_category.fail.cpp index ac793b2bc7a69..73cdad798cfbe 100644 --- a/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_request_invalid_value_category.fail.cpp +++ b/libcxx/test/std/utilities/any/any.nonmembers/any.cast/any_cast_request_invalid_value_category.fail.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} // diff --git a/libcxx/test/std/utilities/any/any.nonmembers/any.cast/const_correctness.fail.cpp b/libcxx/test/std/utilities/any/any.nonmembers/any.cast/const_correctness.fail.cpp index 6b9a5e9e4034d..234efc83423bb 100644 --- a/libcxx/test/std/utilities/any/any.nonmembers/any.cast/const_correctness.fail.cpp +++ b/libcxx/test/std/utilities/any/any.nonmembers/any.cast/const_correctness.fail.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} // diff --git a/libcxx/test/std/utilities/any/any.nonmembers/any.cast/not_copy_constructible.fail.cpp b/libcxx/test/std/utilities/any/any.nonmembers/any.cast/not_copy_constructible.fail.cpp index 9c3238879469b..44a67f7aa03dc 100644 --- a/libcxx/test/std/utilities/any/any.nonmembers/any.cast/not_copy_constructible.fail.cpp +++ b/libcxx/test/std/utilities/any/any.nonmembers/any.cast/not_copy_constructible.fail.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} // diff --git a/libcxx/test/std/utilities/any/any.nonmembers/make_any.pass.cpp b/libcxx/test/std/utilities/any/any.nonmembers/make_any.pass.cpp index 6b2883ed3ce27..6b8f93073b030 100644 --- a/libcxx/test/std/utilities/any/any.nonmembers/make_any.pass.cpp +++ b/libcxx/test/std/utilities/any/any.nonmembers/make_any.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/any/any.nonmembers/swap.pass.cpp b/libcxx/test/std/utilities/any/any.nonmembers/swap.pass.cpp index 05027bacf8a83..440159f12d72f 100644 --- a/libcxx/test/std/utilities/any/any.nonmembers/swap.pass.cpp +++ b/libcxx/test/std/utilities/any/any.nonmembers/swap.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_any_cast is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/charconv/charconv.from.chars/integral.roundtrip.pass.cpp b/libcxx/test/std/utilities/charconv/charconv.from.chars/integral.roundtrip.pass.cpp index 5329bd3a0a406..88450a33afdc9 100644 --- a/libcxx/test/std/utilities/charconv/charconv.from.chars/integral.roundtrip.pass.cpp +++ b/libcxx/test/std/utilities/charconv/charconv.from.chars/integral.roundtrip.pass.cpp @@ -13,12 +13,7 @@ // The roundtrip test uses to_chars, which requires functions in the dylib // that were introduced in Mac OS 10.15. // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/utilities/charconv/charconv.to.chars/integral.pass.cpp b/libcxx/test/std/utilities/charconv/charconv.to.chars/integral.pass.cpp index 3548b65724a17..4afe49190603d 100644 --- a/libcxx/test/std/utilities/charconv/charconv.to.chars/integral.pass.cpp +++ b/libcxx/test/std/utilities/charconv/charconv.to.chars/integral.pass.cpp @@ -12,12 +12,7 @@ // to_chars requires functions in the dylib that were introduced in Mac OS 10.15. // -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/utilities/format/format.error/format.error.pass.cpp b/libcxx/test/std/utilities/format/format.error/format.error.pass.cpp index 88958e460ff6d..979a3fed463b2 100644 --- a/libcxx/test/std/utilities/format/format.error/format.error.pass.cpp +++ b/libcxx/test/std/utilities/format/format.error/format.error.pass.cpp @@ -9,13 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14, c++17 // This test requires the dylib support introduced in D92214. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/check_arg_id.pass.cpp b/libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/check_arg_id.pass.cpp index 68e99578b0c9b..5b18834e51462 100644 --- a/libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/check_arg_id.pass.cpp +++ b/libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/check_arg_id.pass.cpp @@ -10,13 +10,7 @@ // UNSUPPORTED: no-exceptions // This test requires the dylib support introduced in D92214. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/next_arg_id.pass.cpp b/libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/next_arg_id.pass.cpp index 3b2304f61f5ed..6d53995a627ad 100644 --- a/libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/next_arg_id.pass.cpp +++ b/libcxx/test/std/utilities/format/format.formatter/format.parse.ctx/next_arg_id.pass.cpp @@ -10,13 +10,7 @@ // UNSUPPORTED: no-exceptions // This test requires the dylib support introduced in D92214. -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.15 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.14 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14|15}} // diff --git a/libcxx/test/std/utilities/function.objects/func.invoke/invoke.pass.cpp b/libcxx/test/std/utilities/function.objects/func.invoke/invoke.pass.cpp index 455d8dd24779a..82849a815e7e3 100644 --- a/libcxx/test/std/utilities/function.objects/func.invoke/invoke.pass.cpp +++ b/libcxx/test/std/utilities/function.objects/func.invoke/invoke.pass.cpp @@ -10,6 +10,9 @@ // +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS + // template // invoke_result_t invoke(F&& f, Args&&... args) // C++17 // noexcept(is_nothrow_invocable_v<_Fn, _Args...>); diff --git a/libcxx/test/std/utilities/function.objects/func.invoke/invoke_constexpr.pass.cpp b/libcxx/test/std/utilities/function.objects/func.invoke/invoke_constexpr.pass.cpp index 8bfc7428fad9d..bfd8765b7d779 100644 --- a/libcxx/test/std/utilities/function.objects/func.invoke/invoke_constexpr.pass.cpp +++ b/libcxx/test/std/utilities/function.objects/func.invoke/invoke_constexpr.pass.cpp @@ -10,6 +10,9 @@ // +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS + // template // constexpr // constexpr in C++20 // invoke_result_t invoke(F&& f, Args&&... args) diff --git a/libcxx/test/std/utilities/memory/temporary.buffer/overaligned.pass.cpp b/libcxx/test/std/utilities/memory/temporary.buffer/overaligned.pass.cpp index b5286fb529948..a4911a5a445e3 100644 --- a/libcxx/test/std/utilities/memory/temporary.buffer/overaligned.pass.cpp +++ b/libcxx/test/std/utilities/memory/temporary.buffer/overaligned.pass.cpp @@ -11,10 +11,7 @@ // Aligned allocations are not supported on macOS < 10.13 // Note: use 'unsupported' instead of 'xfail' to ensure // we won't pass prior to c++17. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} // diff --git a/libcxx/test/std/utilities/memory/unique.ptr/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/utilities/memory/unique.ptr/iterator_concept_conformance.compile.pass.cpp index 68c06bb8168ff..9a64d0f414cbf 100644 --- a/libcxx/test/std/utilities/memory/unique.ptr/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/utilities/memory/unique.ptr/iterator_concept_conformance.compile.pass.cpp @@ -21,6 +21,7 @@ static_assert(std::indirectly_writable, int>); static_assert(!std::weakly_incrementable >); static_assert(std::indirectly_movable, std::unique_ptr>); static_assert(std::indirectly_movable_storable, std::unique_ptr>); +static_assert(std::indirectly_swappable, std::unique_ptr >); static_assert(!std::indirectly_readable >); static_assert(!std::indirectly_writable, void>); diff --git a/libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/iterator_concept_conformance.compile.pass.cpp b/libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/iterator_concept_conformance.compile.pass.cpp index 4fe7710f85ba4..df8df75aa315a 100644 --- a/libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/iterator_concept_conformance.compile.pass.cpp +++ b/libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.shared/iterator_concept_conformance.compile.pass.cpp @@ -21,6 +21,7 @@ static_assert(std::indirectly_writable, int>); static_assert(!std::weakly_incrementable >); static_assert(std::indirectly_movable, std::shared_ptr>); static_assert(std::indirectly_movable_storable, std::shared_ptr>); +static_assert(std::indirectly_swappable, std::shared_ptr >); static_assert(!std::indirectly_readable >); static_assert(!std::indirectly_writable, void>); diff --git a/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/common_type.pass.cpp b/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/common_type.pass.cpp index e4668b08d1d65..f070b2770d0a0 100644 --- a/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/common_type.pass.cpp +++ b/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/common_type.pass.cpp @@ -261,39 +261,6 @@ void test_bullet_four() { } } - -// The example code specified in Note B for common_type -namespace note_b_example { - -typedef bool (&PF1)(); -typedef short (*PF2)(long); - -struct S { - operator PF2() const; - double operator()(char, int&); - void fn(long) const; - char data; -}; - -typedef void (S::*PMF)(long) const; -typedef char S::*PMD; - -using std::is_same; -using std::result_of; -using std::unique_ptr; - -static_assert((is_same::type, short>::value), "Error!"); -static_assert((is_same::type, double>::value), "Error!"); -static_assert((is_same::type, bool>::value), "Error!"); -static_assert((is_same, int)>::type, void>::value), "Error!"); -#if TEST_STD_VER >= 11 -static_assert((is_same::type, char&&>::value), "Error!"); -#endif -static_assert((is_same::type, const char&>::value), "Error!"); - -} // namespace note_b_example - - int main(int, char**) { static_assert((std::is_same::type, int>::value), ""); diff --git a/libcxx/test/std/utilities/any/any.class/not_literal_type.pass.cpp b/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of.deprecated.fail.cpp similarity index 69% rename from libcxx/test/std/utilities/any/any.class/not_literal_type.pass.cpp rename to libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of.deprecated.fail.cpp index d1b649dc46c44..aece06674cf01 100644 --- a/libcxx/test/std/utilities/any/any.class/not_literal_type.pass.cpp +++ b/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of.deprecated.fail.cpp @@ -7,18 +7,16 @@ //===----------------------------------------------------------------------===// // UNSUPPORTED: c++03, c++11, c++14 +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS -// +// type_traits -// [Note any is a not a literal type --end note] +// result_of -#include #include #include "test_macros.h" int main(int, char**) { - static_assert(!std::is_literal_type::value, ""); - - return 0; + [[maybe_unused]] std::result_of a; // expected-warning {{'result_of' is deprecated}} } diff --git a/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of.pass.cpp b/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of.pass.cpp index e6897be11867a..78ff8fbd1170c 100644 --- a/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of.pass.cpp +++ b/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of.pass.cpp @@ -10,9 +10,13 @@ // result_of +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS + #include -#include #include +#include +#include #include "test_macros.h" struct S diff --git a/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of11.pass.cpp b/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of11.pass.cpp index 844e11eef7bbf..e98df1ef96be9 100644 --- a/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of11.pass.cpp +++ b/libcxx/test/std/utilities/meta/meta.trans/meta.trans.other/result_of11.pass.cpp @@ -12,7 +12,11 @@ // // result_of +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS + #include +#include #include #include #include "test_macros.h" diff --git a/libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_literal_type.deprecated.fail.cpp b/libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_literal_type.deprecated.fail.cpp new file mode 100644 index 0000000000000..c63524da5b40a --- /dev/null +++ b/libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_literal_type.deprecated.fail.cpp @@ -0,0 +1,24 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +// UNSUPPORTED: c++03, c++11, c++14 +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS + +// type_traits + +// is_literal_type + +#include + +#include "test_macros.h" + +int main(int, char**) { + static_assert(std::is_literal_type::value, ""); // expected-warning {{'is_literal_type' is deprecated}} + + return 0; +} diff --git a/libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_literal_type.pass.cpp b/libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_literal_type.pass.cpp index b86ff5a854656..1c85560ba7b2a 100644 --- a/libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_literal_type.pass.cpp +++ b/libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_literal_type.pass.cpp @@ -10,6 +10,9 @@ // is_literal_type +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_ENABLE_CXX20_REMOVED_TYPE_TRAITS +// ADDITIONAL_COMPILE_FLAGS: -D_LIBCPP_DISABLE_DEPRECATION_WARNINGS + #include #include // for std::nullptr_t #include "test_macros.h" diff --git a/libcxx/test/std/utilities/optional/optional.bad_optional_access/default.pass.cpp b/libcxx/test/std/utilities/optional/optional.bad_optional_access/default.pass.cpp index 517e0d64d4017..7f0439be216da 100644 --- a/libcxx/test/std/utilities/optional/optional.bad_optional_access/default.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.bad_optional_access/default.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_optional_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} // diff --git a/libcxx/test/std/utilities/optional/optional.bad_optional_access/derive.pass.cpp b/libcxx/test/std/utilities/optional/optional.bad_optional_access/derive.pass.cpp index 34b770e368586..ad1112f2583db 100644 --- a/libcxx/test/std/utilities/optional/optional.bad_optional_access/derive.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.bad_optional_access/derive.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_optional_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} // diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/U.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/U.pass.cpp index c9058a305880f..e99c872d64f32 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/U.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/U.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_optional_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_T.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_T.pass.cpp index 45c3c66a5cb5a..ddfc491c1696c 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_T.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/const_T.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_optional_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/move.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/move.pass.cpp index 4e86bcd49bb15..e4918f7cac118 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/move.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/move.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_optional_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/rvalue_T.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/rvalue_T.pass.cpp index e10346e14eb19..dddd8facff05b 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/rvalue_T.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.ctor/rvalue_T.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_optional_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference.pass.cpp index 98216df242cce..5b04e5a35aafa 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference.pass.cpp @@ -44,6 +44,7 @@ int main(int, char**) { optional opt; ((void)opt); ASSERT_SAME_TYPE(decltype(*opt), X&); + LIBCPP_STATIC_ASSERT(noexcept(*opt)); // ASSERT_NOT_NOEXCEPT(*opt); // FIXME: This assertion fails with GCC because it can see that // (A) operator*() is constexpr, and diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_const.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_const.pass.cpp index f61cfcee75066..f323cd1a5e405 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_const.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_const.pass.cpp @@ -37,6 +37,7 @@ int main(int, char**) { const optional opt; ((void)opt); ASSERT_SAME_TYPE(decltype(*opt), X const&); + LIBCPP_STATIC_ASSERT(noexcept(*opt)); // ASSERT_NOT_NOEXCEPT(*opt); // FIXME: This assertion fails with GCC because it can see that // (A) operator*() is constexpr, and diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_const_rvalue.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_const_rvalue.pass.cpp index bc6745de161d8..68591c5e2dbcb 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_const_rvalue.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_const_rvalue.pass.cpp @@ -37,6 +37,7 @@ int main(int, char**) { const optional opt; ((void)opt); ASSERT_SAME_TYPE(decltype(*std::move(opt)), X const &&); + LIBCPP_STATIC_ASSERT(noexcept(*opt)); // ASSERT_NOT_NOEXCEPT(*std::move(opt)); // FIXME: This assertion fails with GCC because it can see that // (A) operator*() is constexpr, and diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_rvalue.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_rvalue.pass.cpp index c8ee573aea9ad..67edbb903353e 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_rvalue.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/dereference_rvalue.pass.cpp @@ -44,6 +44,7 @@ int main(int, char**) { optional opt; ((void)opt); ASSERT_SAME_TYPE(decltype(*std::move(opt)), X&&); + LIBCPP_STATIC_ASSERT(noexcept(*opt)); // ASSERT_NOT_NOEXCEPT(*std::move(opt)); // FIXME: This assertion fails with GCC because it can see that // (A) operator*() is constexpr, and diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value.pass.cpp index eba21bb9db0d4..8cd9bcb2fa695 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_optional_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_const.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_const.pass.cpp index 03aa47454808e..103a6317b24e7 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_const.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_const.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_optional_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_const_rvalue.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_const_rvalue.pass.cpp index dff3dca9a62c7..7402e98b663fd 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_const_rvalue.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_const_rvalue.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_optional_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_rvalue.pass.cpp b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_rvalue.pass.cpp index d677b9a8a0508..28856997c562e 100644 --- a/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_rvalue.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.object/optional.object.observe/value_rvalue.pass.cpp @@ -10,10 +10,7 @@ // // Throwing bad_optional_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // constexpr T& optional::value() &&; diff --git a/libcxx/test/std/utilities/optional/optional.specalg/make_optional.pass.cpp b/libcxx/test/std/utilities/optional/optional.specalg/make_optional.pass.cpp index c1ad1f09c5cc0..681fe28a2a9b2 100644 --- a/libcxx/test/std/utilities/optional/optional.specalg/make_optional.pass.cpp +++ b/libcxx/test/std/utilities/optional/optional.specalg/make_optional.pass.cpp @@ -9,10 +9,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_optional_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // // diff --git a/libcxx/test/std/utilities/time/time.clock/time.clock.file/now.pass.cpp b/libcxx/test/std/utilities/time/time.clock/time.clock.file/now.pass.cpp index dc050818da11d..6011424f6e7ee 100644 --- a/libcxx/test/std/utilities/time/time.clock/time.clock.file/now.pass.cpp +++ b/libcxx/test/std/utilities/time/time.clock/time.clock.file/now.pass.cpp @@ -10,12 +10,7 @@ // UNSUPPORTED: libcpp-has-no-filesystem-library // Filesystem is supported on Apple platforms starting with macosx10.15. -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.14 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.13 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.12 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.11 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.10 -// UNSUPPORTED: use_system_cxx_lib && x86_64-apple-macosx10.9 +// UNSUPPORTED: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12|13|14}} // diff --git a/libcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/deduct.pass.cpp b/libcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/deduct.pass.cpp index 4951ae22d4069..e8c0fbf66937f 100644 --- a/libcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/deduct.pass.cpp +++ b/libcxx/test/std/utilities/tuple/tuple.tuple/tuple.cnstr/deduct.pass.cpp @@ -22,8 +22,9 @@ // possible that they provide explicit guides to make it work. #include -#include #include +#include +#include #include "test_macros.h" #include "archetypes.h" diff --git a/libcxx/test/std/utilities/variant/variant.bad_variant_access/bad_variant_access.pass.cpp b/libcxx/test/std/utilities/variant/variant.bad_variant_access/bad_variant_access.pass.cpp index 751c6551e115a..cb020b04a4216 100644 --- a/libcxx/test/std/utilities/variant/variant.bad_variant_access/bad_variant_access.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.bad_variant_access/bad_variant_access.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} // diff --git a/libcxx/test/std/utilities/variant/variant.get/get_index.pass.cpp b/libcxx/test/std/utilities/variant/variant.get/get_index.pass.cpp index 830d4a4465a84..bed0026ccc506 100644 --- a/libcxx/test/std/utilities/variant/variant.get/get_index.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.get/get_index.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.get/get_type.pass.cpp b/libcxx/test/std/utilities/variant/variant.get/get_type.pass.cpp index 9f0889c089b18..e96269b4fadf1 100644 --- a/libcxx/test/std/utilities/variant/variant.get/get_type.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.get/get_type.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.assign/T.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.assign/T.pass.cpp index 546273187c66c..816578c0af670 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.assign/T.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.assign/T.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.assign/copy.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.assign/copy.pass.cpp index 6c85377bb9b96..2e6f51ee2faf4 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.assign/copy.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.assign/copy.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.assign/move.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.assign/move.pass.cpp index db8db2e8059ba..bdda20d7f4b42 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.assign/move.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.assign/move.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/T.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/T.pass.cpp index 340c270ad84e8..78ac9e14407ed 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/T.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/T.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/copy.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/copy.pass.cpp index 1270598020329..810d12139063c 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/copy.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/copy.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/default.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/default.pass.cpp index ca391666835c1..a61e0377bce3e 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/default.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/default.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_index_args.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_index_args.pass.cpp index 77a85ccee226b..f39e21ceb1339 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_index_args.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_index_args.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_index_init_list_args.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_index_init_list_args.pass.cpp index eb25721fb6262..248730f568068 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_index_init_list_args.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_index_init_list_args.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_type_args.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_type_args.pass.cpp index 075f9687d6c8d..05a0121fd4985 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_type_args.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_type_args.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_type_init_list_args.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_type_init_list_args.pass.cpp index 8e26c86f4e10e..a77aa40fb3b95 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_type_init_list_args.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/in_place_type_init_list_args.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/move.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/move.pass.cpp index aabfbf1e93bae..cb6a44b143598 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/move.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.ctor/move.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_index_args.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_index_args.pass.cpp index 691cb35382c9a..cbe3e53f46363 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_index_args.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_index_args.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_index_init_list_args.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_index_init_list_args.pass.cpp index 67587d418ddf9..e838c1359bb17 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_index_init_list_args.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_index_init_list_args.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_type_args.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_type_args.pass.cpp index a2b77c28cc76f..9dbf41f986e2e 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_type_args.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_type_args.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_type_init_list_args.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_type_init_list_args.pass.cpp index 03fad25caa061..721ebfe8e488e 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_type_init_list_args.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.mod/emplace_type_init_list_args.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.variant/variant.swap/swap.pass.cpp b/libcxx/test/std/utilities/variant/variant.variant/variant.swap/swap.pass.cpp index aa699860a31db..9fff8fee64b06 100644 --- a/libcxx/test/std/utilities/variant/variant.variant/variant.swap/swap.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.variant/variant.swap/swap.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // diff --git a/libcxx/test/std/utilities/variant/variant.visit/robust_against_adl.pass.cpp b/libcxx/test/std/utilities/variant/variant.visit/robust_against_adl.pass.cpp index 3b81a66508aad..5886162dbab8f 100644 --- a/libcxx/test/std/utilities/variant/variant.visit/robust_against_adl.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.visit/robust_against_adl.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // // template diff --git a/libcxx/test/std/utilities/variant/variant.visit/visit.pass.cpp b/libcxx/test/std/utilities/variant/variant.visit/visit.pass.cpp index d720fa968fff2..9bb4311c6629f 100644 --- a/libcxx/test/std/utilities/variant/variant.visit/visit.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.visit/visit.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // // template diff --git a/libcxx/test/std/utilities/variant/variant.visit/visit_return_type.pass.cpp b/libcxx/test/std/utilities/variant/variant.visit/visit_return_type.pass.cpp index 60fd7b3f91990..5b9d59567eaa0 100644 --- a/libcxx/test/std/utilities/variant/variant.visit/visit_return_type.pass.cpp +++ b/libcxx/test/std/utilities/variant/variant.visit/visit_return_type.pass.cpp @@ -10,10 +10,7 @@ // UNSUPPORTED: c++03, c++11, c++14, c++17 // Throwing bad_variant_access is supported starting in macosx10.13 -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.12 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.11 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.10 && !no-exceptions -// XFAIL: use_system_cxx_lib && x86_64-apple-macosx10.9 && !no-exceptions +// XFAIL: use_system_cxx_lib && target={{.+}}-apple-macosx10.{{9|10|11|12}} && !no-exceptions // // template diff --git a/libcxx/test/support/atomic_helpers.h b/libcxx/test/support/atomic_helpers.h new file mode 100644 index 0000000000000..a5c17035d0d90 --- /dev/null +++ b/libcxx/test/support/atomic_helpers.h @@ -0,0 +1,142 @@ +//===----------------------------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef ATOMIC_HELPERS_H +#define ATOMIC_HELPERS_H + +#include + +#include "test_macros.h" + +struct UserAtomicType { + int i; + + explicit UserAtomicType(int d = 0) TEST_NOEXCEPT : i(d) {} + + friend bool operator==(const UserAtomicType& x, const UserAtomicType& y) { return x.i == y.i; } +}; + +/* + +Enable these once we have P0528 + +struct WeirdUserAtomicType +{ + char i, j, k; // the 3 chars of doom + + explicit WeirdUserAtomicType(int d = 0) TEST_NOEXCEPT : i(d) {} + + friend bool operator==(const WeirdUserAtomicType& x, const WeirdUserAtomicType& y) + { return x.i == y.i; } +}; + +struct PaddedUserAtomicType +{ + char i; int j; // probably lock-free? + + explicit PaddedUserAtomicType(int d = 0) TEST_NOEXCEPT : i(d) {} + + friend bool operator==(const PaddedUserAtomicType& x, const PaddedUserAtomicType& y) + { return x.i == y.i; } +}; + +*/ + +struct LargeUserAtomicType { + int a[128]; /* decidedly not lock-free */ + + LargeUserAtomicType(int d = 0) TEST_NOEXCEPT { + for (auto&& e : a) + e = d++; + } + + friend bool operator==(LargeUserAtomicType const& x, LargeUserAtomicType const& y) TEST_NOEXCEPT { + for (int i = 0; i < 128; ++i) + if (x.a[i] != y.a[i]) + return false; + return true; + } +}; + +template