diff --git a/devops/actions/clang-format/action.yml b/devops/actions/clang-format/action.yml index 723ea3cbfeffa..4e893c629c5be 100644 --- a/devops/actions/clang-format/action.yml +++ b/devops/actions/clang-format/action.yml @@ -4,9 +4,10 @@ runs: using: "composite" steps: - name: Run clang-format for the patch - shell: bash + shell: bash {0} run: | - git diff --no-color ${GITHUB_SHA}^1 ${GITHUB_SHA} --name-only -- | grep -v "/test/" | xargs git diff -U0 --no-color ${GITHUB_SHA}^1 ${GITHUB_SHA} -- | ./clang/tools/clang-format/clang-format-diff.py -p1 -binary clang-format > ./clang-format.patch + git clang-format ${GITHUB_SHA}^1 + git diff > ./clang-format.patch # Add patch with formatting fixes to CI job artifacts - uses: actions/upload-artifact@v1 with: diff --git a/sycl/test/check_device_code/no_offset.cpp b/sycl/test/check_device_code/no_offset.cpp index b2329b010e11e..0f0d5ab88f721 100644 --- a/sycl/test/check_device_code/no_offset.cpp +++ b/sycl/test/check_device_code/no_offset.cpp @@ -15,7 +15,7 @@ int main() { sycl::ext::oneapi::accessor_property_list PL{sycl::ext::oneapi::no_offset, sycl::no_init}; sycl::accessor acc_a(a, cgh, sycl::write_only, PL); sycl::accessor acc_b{b, cgh, sycl::read_only}; - // CHECK: define weak_odr dso_local spir_kernel void @_ZTSZZ4mainENKUlRN2cl4sycl7handlerEE_clES2_EUlT_E_(i32 addrspace(1)* %_arg_, i32 addrspace(1)* readonly %_arg_4, %"class.cl::sycl::id"* byval(%"class.cl::sycl::id") align 8 %_arg_8) + // CHECK: define weak_odr dso_local spir_kernel void @_ZTSZZ4mainENKUlRN2cl4sycl7handlerEE_clES2_EUlT_E_(i32 addrspace(1)* {{.*}}, i32 addrspace(1)* readonly {{.*}}, %"class.cl::sycl::id"* byval(%"class.cl::sycl::id") align 8 {{.*}}) cgh.parallel_for(size, [=](auto i) { acc_a[i] = acc_b[i]; }); @@ -33,7 +33,7 @@ int main() { q.submit([&](sycl::handler &cgh) { sycl::accessor acc_a(a, cgh, sycl::write_only); sycl::accessor acc_b{b, cgh, sycl::read_only}; - // CHECK: define weak_odr dso_local spir_kernel void @_ZTSZZ4mainENKUlRN2cl4sycl7handlerEE0_clES2_EUlT_E_(i32 addrspace(1)* %_arg_, %"class.cl::sycl::id"* byval(%"class.cl::sycl::id") align 8 %_arg_3, i32 addrspace(1)* readonly %_arg_4, %"class.cl::sycl::id"* byval(%"class.cl::sycl::id") align 8 %_arg_8) + // CHECK: define weak_odr dso_local spir_kernel void @_ZTSZZ4mainENKUlRN2cl4sycl7handlerEE0_clES2_EUlT_E_(i32 addrspace(1)* {{.*}}, %"class.cl::sycl::id"* byval(%"class.cl::sycl::id") align 8 {{.*}}, i32 addrspace(1)* readonly {{.*}}, %"class.cl::sycl::id"* byval(%"class.cl::sycl::id") align 8 {{.*}}) cgh.parallel_for(size, [=](auto i) { acc_a[i] = acc_b[i]; });