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[VPlan] Fold PredPHI constant -> constant
1 parent b430d33 commit 8a197b8

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4 files changed

+15
-20
lines changed

4 files changed

+15
-20
lines changed

llvm/lib/Transforms/Vectorize/VPlan.cpp

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -317,13 +317,7 @@ Value *VPTransformState::get(const VPValue *Def, bool NeedsScalar) {
317317
LastLane = 0;
318318
}
319319

320-
auto *LastInst = dyn_cast<Instruction>(get(Def, LastLane));
321-
if (!LastInst) {
322-
Value *VectorValue = GetBroadcastInstrs(ScalarValue);
323-
set(Def, VectorValue);
324-
return VectorValue;
325-
}
326-
320+
auto *LastInst = cast<Instruction>(get(Def, LastLane));
327321
// Set the insert point after the last scalarized instruction or after the
328322
// last PHI, if LastInst is a PHI. This ensures the insertelement sequence
329323
// will directly follow the scalar definitions.

llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

Lines changed: 2 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -2804,15 +2804,8 @@ InstructionCost VPBranchOnMaskRecipe::computeCost(ElementCount VF,
28042804

28052805
void VPPredInstPHIRecipe::execute(VPTransformState &State) {
28062806
assert(State.Lane && "Predicated instruction PHI works per instance.");
2807-
Value *ScalarPred = State.get(getOperand(0), *State.Lane);
2808-
Instruction *ScalarPredInst = dyn_cast<Instruction>(ScalarPred);
2809-
if (!ScalarPredInst) {
2810-
if (State.hasScalarValue(this, *State.Lane))
2811-
State.reset(this, ScalarPred, *State.Lane);
2812-
else
2813-
State.set(this, ScalarPred, *State.Lane);
2814-
return;
2815-
}
2807+
Instruction *ScalarPredInst =
2808+
cast<Instruction>(State.get(getOperand(0), *State.Lane));
28162809
BasicBlock *PredicatedBB = ScalarPredInst->getParent();
28172810
BasicBlock *PredicatingBB = PredicatedBB->getSinglePredecessor();
28182811
assert(PredicatingBB && "Predicated block has no single predecessor.");

llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1011,6 +1011,16 @@ static void simplifyRecipe(VPRecipeBase &R, VPTypeAnalysis &TypeInfo) {
10111011
.Default([](auto *) { return false; }))
10121012
return;
10131013

1014+
// Fold PredPHI constant -> constant.
1015+
if (auto *PredPHI = dyn_cast<VPPredInstPHIRecipe>(&R)) {
1016+
VPlan *Plan = R.getParent()->getPlan();
1017+
VPValue *Op = PredPHI->getOperand(0);
1018+
if (!Op->isLiveIn() || !Op->getLiveInIRValue())
1019+
return;
1020+
if (auto *C = dyn_cast<Constant>(Op->getLiveInIRValue()))
1021+
PredPHI->replaceAllUsesWith(Plan->getOrAddLiveIn(C));
1022+
}
1023+
10141024
// VPScalarIVSteps can only be simplified after unrolling. VPScalarIVSteps for
10151025
// part 0 can be replaced by their start value, if only the first lane is
10161026
// demanded.

llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -690,8 +690,7 @@ define void @pr70590_recipe_without_underlying_instr(i64 %n, ptr noalias %dst) {
690690
; CHECK: [[PRED_SREM_IF5]]:
691691
; CHECK-NEXT: br label %[[PRED_SREM_CONTINUE6]]
692692
; CHECK: [[PRED_SREM_CONTINUE6]]:
693-
; CHECK-NEXT: [[TMP11:%.*]] = add i64 poison, -3
694-
; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[INDEX]], [[TMP11]]
693+
; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[INDEX]], poison
695694
; CHECK-NEXT: [[TMP13:%.*]] = getelementptr [5 x i8], ptr @c, i64 0, i64 [[TMP12]]
696695
; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[TMP13]], i32 0
697696
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr [[TMP14]], align 1
@@ -768,8 +767,7 @@ define void @recipe_without_underlying_instr_lanes_used(i64 %n, ptr noalias %dst
768767
; CHECK: [[PRED_SREM_IF5]]:
769768
; CHECK-NEXT: br label %[[PRED_SREM_CONTINUE6]]
770769
; CHECK: [[PRED_SREM_CONTINUE6]]:
771-
; CHECK-NEXT: [[TMP6:%.*]] = add i64 poison, -3
772-
; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], [[TMP6]]
770+
; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], poison
773771
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr [5 x i8], ptr @c, i64 0, i64 [[TMP7]]
774772
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[TMP8]], i32 0
775773
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x i8>, ptr [[TMP9]], align 1

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