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AMDGPU: Remove wavefrontsize64 feature from dummy target
This is a refinement for the existing hack. With this, the default target will have neither wavefrontsize feature present, unless it was explicitly specified. That is, getWavefrontSize() == 64 no longer implies +wavefrontsize64. getWavefrontSize() == 32 does imply +wavefrontsize32. Continue to assume the value is 64 with no wavesize feature. This maintains the codegenable property without any code that directly cares about the wavesize needs to worry about it. Introduce an isWaveSizeKnown helper to check if we know the wavesize is accurate based on having one of the features explicitly set, or a known target-cpu.
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4 files changed

+20
-14
lines changed

4 files changed

+20
-14
lines changed

llvm/lib/Target/AMDGPU/GCNProcessors.td

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -9,11 +9,11 @@
99
// The code produced for "generic" is only useful for tests and cannot
1010
// reasonably be expected to execute on any particular target.
1111
def : ProcessorModel<"generic", NoSchedModel,
12-
[FeatureWavefrontSize64, FeatureGDS, FeatureGWS]
12+
[FeatureGDS, FeatureGWS]
1313
>;
1414

1515
def : ProcessorModel<"generic-hsa", NoSchedModel,
16-
[FeatureWavefrontSize64, FeatureGDS, FeatureGWS, FeatureFlatAddressSpace]
16+
[FeatureGDS, FeatureGWS, FeatureFlatAddressSpace]
1717
>;
1818

1919
//===------------------------------------------------------------===//

llvm/lib/Target/AMDGPU/GCNSubtarget.cpp

Lines changed: 7 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -100,14 +100,16 @@ GCNSubtarget &GCNSubtarget::initializeSubtargetDependencies(const Triple &TT,
100100
if (Gen == AMDGPUSubtarget::INVALID) {
101101
Gen = TT.getOS() == Triple::AMDHSA ? AMDGPUSubtarget::SEA_ISLANDS
102102
: AMDGPUSubtarget::SOUTHERN_ISLANDS;
103-
}
104-
105-
if (!hasFeature(AMDGPU::FeatureWavefrontSize32) &&
106-
!hasFeature(AMDGPU::FeatureWavefrontSize64)) {
103+
// Assume wave64 for the unknown target, if not explicitly set.
104+
if (getWavefrontSizeLog2() == 0)
105+
WavefrontSizeLog2 = 6;
106+
} else if (!hasFeature(AMDGPU::FeatureWavefrontSize32) &&
107+
!hasFeature(AMDGPU::FeatureWavefrontSize64)) {
107108
// If there is no default wave size it must be a generation before gfx10,
108109
// these have FeatureWavefrontSize64 in their definition already. For gfx10+
109110
// set wave32 as a default.
110111
ToggleFeature(AMDGPU::FeatureWavefrontSize32);
112+
WavefrontSizeLog2 = getGeneration() >= AMDGPUSubtarget::GFX10 ? 5 : 6;
111113
}
112114

113115
// We don't support FP64 for EG/NI atm.
@@ -147,10 +149,6 @@ GCNSubtarget &GCNSubtarget::initializeSubtargetDependencies(const Triple &TT,
147149
!getFeatureBits().test(AMDGPU::FeatureCuMode))
148150
LocalMemorySize *= 2;
149151

150-
// Don't crash on invalid devices.
151-
if (WavefrontSizeLog2 == 0)
152-
WavefrontSizeLog2 = 5;
153-
154152
HasFminFmaxLegacy = getGeneration() < AMDGPUSubtarget::VOLCANIC_ISLANDS;
155153
HasSMulHi = getGeneration() >= AMDGPUSubtarget::GFX9;
156154

@@ -166,7 +164,7 @@ GCNSubtarget &GCNSubtarget::initializeSubtargetDependencies(const Triple &TT,
166164

167165
void GCNSubtarget::checkSubtargetFeatures(const Function &F) const {
168166
LLVMContext &Ctx = F.getContext();
169-
if (hasFeature(AMDGPU::FeatureWavefrontSize32) ==
167+
if (hasFeature(AMDGPU::FeatureWavefrontSize32) &&
170168
hasFeature(AMDGPU::FeatureWavefrontSize64)) {
171169
Ctx.diagnose(DiagnosticInfoUnsupported(
172170
F, "must specify exactly one of wavefrontsize32 and wavefrontsize64"));

llvm/lib/Target/AMDGPU/GCNSubtarget.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1564,6 +1564,14 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
15641564
return getWavefrontSize() == 64;
15651565
}
15661566

1567+
/// Returns if the wavesize of this subtarget is known reliable. This is false
1568+
/// only for the a default target-cpu that does not have an explicit
1569+
/// +wavefrontsize target feature.
1570+
bool isWaveSizeKnown() const {
1571+
return hasFeature(AMDGPU::FeatureWavefrontSize32) ||
1572+
hasFeature(AMDGPU::FeatureWavefrontSize64);
1573+
}
1574+
15671575
const TargetRegisterClass *getBoolRC() const {
15681576
return getRegisterInfo()->getBoolRC();
15691577
}

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -649,9 +649,9 @@ void AMDGPUInstPrinter::printDefaultVccOperand(bool FirstOperand,
649649
raw_ostream &O) {
650650
if (!FirstOperand)
651651
O << ", ";
652-
printRegOperand(STI.hasFeature(AMDGPU::FeatureWavefrontSize64)
653-
? AMDGPU::VCC
654-
: AMDGPU::VCC_LO,
652+
printRegOperand(STI.hasFeature(AMDGPU::FeatureWavefrontSize32)
653+
? AMDGPU::VCC_LO
654+
: AMDGPU::VCC,
655655
O, MRI);
656656
if (FirstOperand)
657657
O << ", ";

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