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[X86] Split vector schedule classes by vector width only as necessary #36272

@RKSimon

Description

@RKSimon
Bugzilla Link 36924
Resolution FIXED
Resolved on Aug 09, 2018 06:25
Version trunk
OS Windows NT
Blocks #31672 #36479 #36256
CC @adibiagio,@atrick,@legrosbuffle,@topperc,@filcab,@fhahn,@gregbedwell,@rotateright
Fixed by commit(s) 334389

Extended Description

Many targets have different schedule costs for 128/256/512-bit rr and rm versions of various SSE instructions (e.g. WriteFADD: ADDSS/ADDPS/VADDPS/VADDPSY/VADDPSZ).

Given that we're overriding them anyhow means that we will generate multiple scheduler class entries so we should probably just create separate schedule classes for them.

But, similar to [Bug #​35608], it'd be useful to avoid having to define all these classes for cases where they don't differ or are not supported - so some kind of default inheritence would be very useful.

e.g.

WriteFADD_SSE : WriteFADD
WriteFADD_AVX128 : WriteFADD
WriteFADD_AVX256 : WriteFADD
WriteFADD_AVX512 : WriteFADD

Or maybe some mechanism with SchedAlias, or could we introduce something like SchedDefaultAlias?

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