Search results

[Reland][InstCombine] Iterative replacement in PtrReplacer

backend:AMDGPU

llvm:instcombineCovers the InstCombine, InstSimplify and AggressiveInstCombine passesCovers the InstCombine, InstSimplify and AggressiveInstCombine passes

llvm:transforms

Status: Open (in progress).

llvm/llvm-projectnumber 145410

#145410 In llvm/llvm-project;

· gandhi56 opened on Jun 23, 2025

[AMDGPU] Adding AMDGPU dialect wrapper for ROCDL transpose loads.

backend:AMDGPU

mlir

mlir:amdgpu

mlir:gpu

Status: Open (in progress).

llvm/llvm-projectnumber 145395

#145395 In llvm/llvm-project;

· lialan opened on Jun 23, 2025

[NFC][AMDGPU] Update and.ll test and automate check line generation

backend:AMDGPU

Status: Open (in progress).

llvm/llvm-projectnumber 145371

#145371 In llvm/llvm-project;

· chrisjbris opened on Jun 23, 2025

[AMDGPU][SDAG] Handle ISD::PTRADD in various special cases

backend:AMDGPU

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Open (in progress).

llvm/llvm-projectnumber 145330

#145330 In llvm/llvm-project;

· ritter-x2a opened on Jun 23, 2025

[AMDGPU][SDAG] Test ISD::PTRADD handling in various special cases

backend:AMDGPU

Status: Open (in progress).

llvm/llvm-projectnumber 145329

#145329 In llvm/llvm-project;

· ritter-x2a opened on Jun 23, 2025

[AMDGPU][NFC] Refactor D16 folding for image samples with multiple ExtractElement+FPTrunc chains

backend:AMDGPU

Status: Open (in progress).

llvm/llvm-projectnumber 145312

#145312 In llvm/llvm-project;

· harrisonGPU opened on Jun 23, 2025

[SelectionDAG] Optimize MPI for align(1) GEPs using base pointer

backend:AMDGPU

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Open (in progress).

llvm/llvm-projectnumber 145309

#145309 In llvm/llvm-project;

· Acthinks opened on Jun 23, 2025

[AMDGPU] Add alignment attr & propagate alignment through make.buffer.rsrc inst

backend:AMDGPU

llvm:transforms

Status: Open (in progress).

llvm/llvm-projectnumber 145278

#145278 In llvm/llvm-project;

· Shoreshen opened on Jun 23, 2025

[AMDGPU] Optimize image sample followed by llvm.amdgcn.cvt.pkrtz into d16 variant

backend:AMDGPU

llvm:instcombineCovers the InstCombine, InstSimplify and AggressiveInstCombine passesCovers the InstCombine, InstSimplify and AggressiveInstCombine passes

llvm:transforms

Status: Open (in progress).

llvm/llvm-projectnumber 145203

#145203 In llvm/llvm-project;

· harrisonGPU opened on Jun 22, 2025

AMDGPU: Avoid report_fatal_error in image intrinsic lowering

backend:AMDGPU

Status: Open (in progress).

llvm/llvm-projectnumber 145201

#145201 In llvm/llvm-project;

· arsenm opened on Jun 22, 2025

DAG: Emit an error if trying to legalize read/write register with illegal types

backend:AArch64

backend:AMDGPU

backend:ARM

backend:Hexagon

backend:Lanai

backend:loongarch

backend:MIPS

backend:PowerPC

backend:RISC-V

backend:Sparc

backend:SystemZ

backend:X86

llvm:codegen

llvm:globalisel

llvm:ir

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Open (in progress).

llvm/llvm-projectnumber 145197

#145197 In llvm/llvm-project;

· arsenm opened on Jun 22, 2025

AMDGPU: Avoid report_fatal_error for unsupported ds_ordered_count

backend:AMDGPU

Status: Open (in progress).

llvm/llvm-projectnumber 145172

#145172 In llvm/llvm-project;

· arsenm opened on Jun 21, 2025