diff --git a/llvm/lib/CodeGen/PHIElimination.cpp b/llvm/lib/CodeGen/PHIElimination.cpp index 640f3678d23f1..86523c22a419d 100644 --- a/llvm/lib/CodeGen/PHIElimination.cpp +++ b/llvm/lib/CodeGen/PHIElimination.cpp @@ -584,9 +584,13 @@ void PHIEliminationImpl::LowerPHINode(MachineBasicBlock &MBB, // Reuse an existing copy in the block if possible. if (IncomingReg.isVirtual()) { MachineInstr *DefMI = MRI->getUniqueVRegDef(SrcReg); + const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcReg); + const TargetRegisterClass *IncomingRC = MRI->getRegClass(IncomingReg); if (DefMI && DefMI->isCopy() && DefMI->getParent() == &opBlock && - MRI->use_empty(SrcReg)) { + MRI->use_empty(SrcReg) && IncomingRC->hasSuperClassEq(SrcRC)) { DefMI->getOperand(0).setReg(IncomingReg); + if (LV) + LV->getVarInfo(SrcReg).AliveBlocks.clear(); continue; } } diff --git a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir b/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir index 6b026fbabc65e..20020a8ed3fb7 100644 --- a/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir +++ b/llvm/test/CodeGen/AArch64/PHIElimination-reuse-copy.mir @@ -1,5 +1,5 @@ # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5 -# RUN: llc -run-pass=phi-node-elimination -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s +# RUN: llc -run-pass=livevars,phi-node-elimination -verify-machineinstrs -mtriple=aarch64-linux-gnu -o - %s | FileCheck %s # Verify that the original COPY in bb.1 is reappropriated as the PHI source in bb.2, # instead of creating a new COPY with the same source register. @@ -13,18 +13,18 @@ body: | ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) ; CHECK-NEXT: liveins: $nzcv, $w0 ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: %a:gpr32 = COPY $w0 + ; CHECK-NEXT: %a:gpr32 = COPY killed $w0 ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF - ; CHECK-NEXT: Bcc 8, %bb.2, implicit $nzcv + ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY %a + ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed %a ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: - ; CHECK-NEXT: %c:gpr32 = COPY [[DEF]] - ; CHECK-NEXT: %d:gpr32 = COPY %c + ; CHECK-NEXT: %c:gpr32 = COPY killed [[DEF]] + ; CHECK-NEXT: dead %d:gpr32 = COPY killed %c bb.0: liveins: $nzcv, $w0 %a:gpr32 = COPY $w0 @@ -46,16 +46,16 @@ body: | ; CHECK-NEXT: liveins: $nzcv, $w0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = IMPLICIT_DEF - ; CHECK-NEXT: Bcc 8, %bb.2, implicit $nzcv + ; CHECK-NEXT: Bcc 8, %bb.2, implicit killed $nzcv ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: $x0 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY $w0 + ; CHECK-NEXT: dead $x0 = IMPLICIT_DEF implicit-def $w0 + ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr32 = COPY killed $w0 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: - ; CHECK-NEXT: %b:gpr32 = COPY [[DEF]] + ; CHECK-NEXT: dead %b:gpr32 = COPY killed [[DEF]] bb.0: liveins: $nzcv, $w0 Bcc 8, %bb.2, implicit $nzcv @@ -83,15 +83,15 @@ body: | ; CHECK-NEXT: bb.1: ; CHECK-NEXT: successors: %bb.2(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF1:%[0-9]+]]:gpr64 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF1:%[0-9]+]]:gpr64 = IMPLICIT_DEF ; CHECK-NEXT: B %bb.2 ; CHECK-NEXT: {{ $}} ; CHECK-NEXT: bb.2: ; CHECK-NEXT: successors: %bb.1(0x80000000) ; CHECK-NEXT: {{ $}} - ; CHECK-NEXT: [[DEF2:%[0-9]+]]:gpr64 = IMPLICIT_DEF - ; CHECK-NEXT: [[DEF3:%[0-9]+]]:gpr64 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF2:%[0-9]+]]:gpr64 = IMPLICIT_DEF + ; CHECK-NEXT: dead [[DEF3:%[0-9]+]]:gpr64 = IMPLICIT_DEF ; CHECK-NEXT: B %bb.1 bb.0: liveins: $wzr, $xzr @@ -117,3 +117,77 @@ body: | ... +--- +name: update_livevars +tracksRegLiveness: true +body: | + ; CHECK-LABEL: name: update_livevars + ; CHECK: bb.0: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: liveins: $w0, $w1, $nzcv + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY killed $w0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY killed $w1 + ; CHECK-NEXT: B %bb.1 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: bb.1: + ; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000) + ; CHECK-NEXT: liveins: $nzcv + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]] + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[COPY]] + ; CHECK-NEXT: Bcc 1, %bb.1, implicit $nzcv + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: bb.2: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: liveins: $nzcv + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = IMPLICIT_DEF + ; CHECK-NEXT: B %bb.1 + bb.0: + successors: %bb.1 + liveins: $w0, $w1, $nzcv + + %0:gpr32 = COPY killed $w0 + %1:gpr32 = COPY killed $w1 + B %bb.1 + + bb.1: + successors: %bb.2, %bb.1 + liveins: $nzcv + + %2:gpr32 = PHI %3, %bb.2, %1, %bb.0, %3, %bb.1 + %3:gpr32 = COPY %0 + Bcc 1, %bb.1, implicit $nzcv + + bb.2: + successors: %bb.1 + liveins: $nzcv + + B %bb.1 +... + +--- +name: copy_subreg +tracksRegLiveness: true +body: | + ; CHECK-LABEL: name: copy_subreg + ; CHECK: bb.0: + ; CHECK-NEXT: successors: %bb.1(0x80000000) + ; CHECK-NEXT: liveins: $x0 + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr64 = COPY killed $x0 + ; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr64 = COPY killed [[COPY]] + ; CHECK-NEXT: {{ $}} + ; CHECK-NEXT: bb.1: + ; CHECK-NEXT: dead [[COPY2:%[0-9]+]]:gpr32 = COPY killed [[COPY1]].sub_32 + bb.0: + successors: %bb.1 + liveins: $x0 + + %0:gpr64 = COPY killed $x0 + %1:gpr64 = COPY killed %0 + + bb.1: + %2:gpr32 = PHI %1.sub_32, %bb.0 +... diff --git a/llvm/test/CodeGen/AArch64/tbl-loops.ll b/llvm/test/CodeGen/AArch64/tbl-loops.ll index e73cbf1ee5df0..b5d64112db727 100644 --- a/llvm/test/CodeGen/AArch64/tbl-loops.ll +++ b/llvm/test/CodeGen/AArch64/tbl-loops.ll @@ -17,18 +17,18 @@ define void @loop1(ptr noalias nocapture noundef writeonly %dst, ptr nocapture n ; CHECK-NEXT: .LBB0_3: // %vector.ph ; CHECK-NEXT: add x11, x8, #1 ; CHECK-NEXT: mov w8, #1132396544 // =0x437f0000 -; CHECK-NEXT: add x13, x0, #4 +; CHECK-NEXT: add x12, x0, #4 ; CHECK-NEXT: and x10, x11, #0x1fffffff8 ; CHECK-NEXT: dup v0.4s, w8 -; CHECK-NEXT: add x14, x1, #16 +; CHECK-NEXT: add x13, x1, #16 ; CHECK-NEXT: add x8, x1, x10, lsl #2 -; CHECK-NEXT: mov x12, x10 ; CHECK-NEXT: add x9, x0, x10 +; CHECK-NEXT: mov x14, x10 ; CHECK-NEXT: .LBB0_4: // %vector.body ; CHECK-NEXT: // =>This Inner Loop Header: Depth=1 -; CHECK-NEXT: ldp q1, q2, [x14, #-16] -; CHECK-NEXT: subs x12, x12, #8 -; CHECK-NEXT: add x14, x14, #32 +; CHECK-NEXT: ldp q1, q2, [x13, #-16] +; CHECK-NEXT: subs x14, x14, #8 +; CHECK-NEXT: add x13, x13, #32 ; CHECK-NEXT: fcmgt v3.4s, v1.4s, v0.4s ; CHECK-NEXT: fcmgt v4.4s, v2.4s, v0.4s ; CHECK-NEXT: fcmlt v5.4s, v1.4s, #0.0 @@ -44,8 +44,8 @@ define void @loop1(ptr noalias nocapture noundef writeonly %dst, ptr nocapture n ; CHECK-NEXT: uzp1 v1.8b, v1.8b, v0.8b ; CHECK-NEXT: uzp1 v2.8b, v2.8b, v0.8b ; CHECK-NEXT: mov v1.s[1], v2.s[0] -; CHECK-NEXT: stur d1, [x13, #-4] -; CHECK-NEXT: add x13, x13, #8 +; CHECK-NEXT: stur d1, [x12, #-4] +; CHECK-NEXT: add x12, x12, #8 ; CHECK-NEXT: b.ne .LBB0_4 ; CHECK-NEXT: // %bb.5: // %middle.block ; CHECK-NEXT: cmp x11, x10