diff --git a/clang/lib/Basic/Targets/AArch64.cpp b/clang/lib/Basic/Targets/AArch64.cpp index c8d243a8fb7ae..e34fc90847fbd 100644 --- a/clang/lib/Basic/Targets/AArch64.cpp +++ b/clang/lib/Basic/Targets/AArch64.cpp @@ -532,10 +532,10 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, Builder.defineMacro("__ARM_FEATURE_SVE_BF16", "1"); } - if ((FPU & SveMode) && HasMatmulFP64) + if ((FPU & SveMode) && HasF64MM) Builder.defineMacro("__ARM_FEATURE_SVE_MATMUL_FP64", "1"); - if ((FPU & SveMode) && HasMatmulFP32) + if ((FPU & SveMode) && HasF32MM) Builder.defineMacro("__ARM_FEATURE_SVE_MATMUL_FP32", "1"); if ((FPU & SveMode) && HasMatMul) @@ -575,7 +575,7 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts, if (HasLS64) Builder.defineMacro("__ARM_FEATURE_LS64", "1"); - if (HasRandGen) + if (HasRNG) Builder.defineMacro("__ARM_FEATURE_RNG", "1"); if (HasMOPS) @@ -698,7 +698,7 @@ bool AArch64TargetInfo::hasFeature(StringRef Feature) const { .Cases("neon", "simd", FPU & NeonMode) .Case("jscvt", HasJSCVT) .Case("fcma", HasFCMA) - .Case("rng", HasRandGen) + .Case("rng", HasRNG) .Case("flagm", HasFlagM) .Case("flagm2", HasAlternativeNZCV) .Case("fp16fml", HasFP16FML) @@ -721,8 +721,8 @@ bool AArch64TargetInfo::hasFeature(StringRef Feature) const { .Case("sve", FPU & SveMode) .Case("sve-bf16", FPU & SveMode && HasBFloat16) .Case("sve-i8mm", FPU & SveMode && HasMatMul) - .Case("f32mm", FPU & SveMode && HasMatmulFP32) - .Case("f64mm", FPU & SveMode && HasMatmulFP64) + .Case("f32mm", FPU & SveMode && HasF32MM) + .Case("f64mm", FPU & SveMode && HasF64MM) .Case("sve2", FPU & SveMode && HasSVE2) .Case("sve2-pmull128", FPU & SveMode && HasSVE2AES) .Case("sve2-bitperm", FPU & SveMode && HasSVE2BitPerm) @@ -837,13 +837,13 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector &Features, FPU |= NeonMode; FPU |= SveMode; HasFullFP16 = true; - HasMatmulFP32 = true; + HasF32MM = true; } if (Feature == "+f64mm") { FPU |= NeonMode; FPU |= SveMode; HasFullFP16 = true; - HasMatmulFP64 = true; + HasF64MM = true; } if (Feature == "+sme") { HasSME = true; @@ -1001,8 +1001,8 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector &Features, HasLSE = true; if (Feature == "+ls64") HasLS64 = true; - if (Feature == "+rand") - HasRandGen = true; + if (Feature == "+rng") + HasRNG = true; if (Feature == "+flagm") HasFlagM = true; if (Feature == "+altnzcv") { diff --git a/clang/lib/Basic/Targets/AArch64.h b/clang/lib/Basic/Targets/AArch64.h index 12fb50286f751..4209c01a67f80 100644 --- a/clang/lib/Basic/Targets/AArch64.h +++ b/clang/lib/Basic/Targets/AArch64.h @@ -45,7 +45,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo { bool HasTME = false; bool HasPAuth = false; bool HasLS64 = false; - bool HasRandGen = false; + bool HasRNG = false; bool HasMatMul = false; bool HasBFloat16 = false; bool HasSVE2 = false; @@ -53,8 +53,8 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo { bool HasSVE2SHA3 = false; bool HasSVE2SM4 = false; bool HasSVE2BitPerm = false; - bool HasMatmulFP64 = false; - bool HasMatmulFP32 = false; + bool HasF64MM = false; + bool HasF32MM = false; bool HasLSE = false; bool HasFlagM = false; bool HasAlternativeNZCV = false; diff --git a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp index 2cd2b35ee51bc..947e412d67720 100644 --- a/clang/lib/Driver/ToolChains/Arch/AArch64.cpp +++ b/clang/lib/Driver/ToolChains/Arch/AArch64.cpp @@ -99,7 +99,7 @@ static bool DecodeAArch64Mcpu(const Driver &D, StringRef Mcpu, StringRef &CPU, CPU = llvm::sys::getHostCPUName(); if (CPU == "generic") { - Extensions.enable(llvm::AArch64::AEK_SIMD); + Extensions.enable(llvm::AArch64::AEK_NEON); } else { const std::optional CpuInfo = llvm::AArch64::parseCpu(CPU); @@ -245,7 +245,7 @@ void aarch64::getAArch64TargetFeatures(const Driver &D, // -mgeneral-regs-only disables all floating-point features. if (Args.getLastArg(options::OPT_mgeneral_regs_only)) { - Extensions.disable(llvm::AArch64::AEK_FP); + Extensions.disable(llvm::AArch64::AEK_FPARMV8); } // En/disable crc diff --git a/clang/test/CodeGen/aarch64-mixed-target-attributes.c b/clang/test/CodeGen/aarch64-mixed-target-attributes.c index aef6ce36ab1c0..569e1cb5d9f43 100644 --- a/clang/test/CodeGen/aarch64-mixed-target-attributes.c +++ b/clang/test/CodeGen/aarch64-mixed-target-attributes.c @@ -259,12 +259,12 @@ __attribute__((target_version("jscvt"))) int default_def_with_version_decls(void // //. // CHECK: attributes #[[ATTR0]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="-v9.5a" } -// CHECK: attributes #[[ATTR1]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+jsconv,+neon,-v9.5a" } +// CHECK: attributes #[[ATTR1]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+jscvt,+neon,-v9.5a" } // CHECK: attributes #[[ATTR2]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+dotprod,+fp-armv8,+neon,-v9.5a" } // CHECK: attributes #[[ATTR3]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+lse,-v9.5a" } // CHECK: attributes #[[ATTR4]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon,+rdm,-v9.5a" } // CHECK: attributes #[[ATTR5:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+dotprod,+fp-armv8,+neon,-v9.5a" } -// CHECK: attributes #[[ATTR6:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+jsconv,+neon,-v9.5a" } +// CHECK: attributes #[[ATTR6:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+jscvt,+neon,-v9.5a" } // CHECK: attributes #[[ATTR7:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="-v9.5a" } // CHECK: attributes #[[ATTR8:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+lse,-v9.5a" } //. diff --git a/clang/test/CodeGen/aarch64-targetattr.c b/clang/test/CodeGen/aarch64-targetattr.c index bf4c1476d8815..3c0abf5215067 100644 --- a/clang/test/CodeGen/aarch64-targetattr.c +++ b/clang/test/CodeGen/aarch64-targetattr.c @@ -97,19 +97,19 @@ void minusarch() {} // CHECK: attributes #0 = { {{.*}} "target-features"="+crc,+fp-armv8,+lse,+neon,+ras,+rdm,+v8.1a,+v8.2a,+v8a" } // CHECK: attributes #1 = { {{.*}} "target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+v8.1a,+v8.2a,+v8a" } // CHECK: attributes #2 = { {{.*}} "target-features"="+crc,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8a" } -// CHECK: attributes #3 = { {{.*}} "target-features"="+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+ras,+rcpc,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" } -// CHECK: attributes #4 = { {{.*}} "target-cpu"="cortex-a710" "target-features"="+bf16,+complxnum,+crc,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+mte,+neon,+pauth,+ras,+rcpc,+rdm,+sb,+sve,+sve2,+sve2-bitperm" } +// CHECK: attributes #3 = { {{.*}} "target-features"="+bf16,+fcma,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+jscvt,+lse,+neon,+pauth,+ras,+rcpc,+rdm,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" } +// CHECK: attributes #4 = { {{.*}} "target-cpu"="cortex-a710" "target-features"="+bf16,+fcma,+crc,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jscvt,+lse,+mte,+neon,+pauth,+ras,+rcpc,+rdm,+sb,+sve,+sve2,+sve2-bitperm" } // CHECK: attributes #5 = { {{.*}} "tune-cpu"="cortex-a710" } // CHECK: attributes #6 = { {{.*}} "target-cpu"="generic" } // CHECK: attributes #7 = { {{.*}} "tune-cpu"="generic" } -// CHECK: attributes #8 = { {{.*}} "target-cpu"="neoverse-n1" "target-features"="+aes,+crc,+dotprod,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+spe,+ssbs" "tune-cpu"="cortex-a710" } +// CHECK: attributes #8 = { {{.*}} "target-cpu"="neoverse-n1" "target-features"="+aes,+crc,+dotprod,+fp-armv8,+fullfp16,+lse,+neon,+ras,+rcpc,+rdm,+sha2,+profile,+ssbs" "tune-cpu"="cortex-a710" } // CHECK: attributes #9 = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+sve" "tune-cpu"="cortex-a710" } -// CHECK: attributes #10 = { {{.*}} "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+sve,+sve2" } -// CHECK: attributes #11 = { {{.*}} "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,-sve" } +// CHECK: attributes #10 = { {{.*}} "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+fcma,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jscvt,+lse,+neon,+pauth,+rng,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+profile,+ssbs,+sve,+sve2" } +// CHECK: attributes #11 = { {{.*}} "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+fcma,+crc,+dotprod,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jscvt,+lse,+neon,+pauth,+rng,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+profile,+ssbs,-sve" } // CHECK: attributes #12 = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+sve" } // CHECK: attributes #13 = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+sve,-sve2" } // CHECK: attributes #14 = { {{.*}} "target-features"="+fullfp16" } -// CHECK: attributes #15 = { {{.*}} "target-cpu"="neoverse-n1" "target-features"="+aes,+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+ras,+rcpc,+rdm,+sha2,+spe,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" "tune-cpu"="cortex-a710" } -// CHECK: attributes #16 = { {{.*}} "branch-target-enforcement"="true" "guarded-control-stack"="true" {{.*}} "target-features"="+aes,+bf16,+complxnum,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+ras,+rcpc,+rdm,+sha2,+spe,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" "tune-cpu"="cortex-a710" } +// CHECK: attributes #15 = { {{.*}} "target-cpu"="neoverse-n1" "target-features"="+aes,+bf16,+fcma,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+jscvt,+lse,+neon,+pauth,+ras,+rcpc,+rdm,+sha2,+profile,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" "tune-cpu"="cortex-a710" } +// CHECK: attributes #16 = { {{.*}} "branch-target-enforcement"="true" "guarded-control-stack"="true" {{.*}} "target-features"="+aes,+bf16,+fcma,+crc,+dotprod,+fp-armv8,+fullfp16,+i8mm,+jscvt,+lse,+neon,+pauth,+ras,+rcpc,+rdm,+sha2,+profile,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" "tune-cpu"="cortex-a710" } // CHECK: attributes #17 = { {{.*}} "target-features"="-neon" } // CHECK: attributes #18 = { {{.*}} "target-features"="-v9.3a" } diff --git a/clang/test/CodeGen/arm_acle.c b/clang/test/CodeGen/arm_acle.c index 00afaf15fded3..69ee575b48654 100644 --- a/clang/test/CodeGen/arm_acle.c +++ b/clang/test/CodeGen/arm_acle.c @@ -2,8 +2,8 @@ // RUN: %clang_cc1 -ffreestanding -triple armv8a-none-eabi -target-feature +crc -target-feature +dsp -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s -check-prefixes=ARM,AArch32 // RUN: %clang_cc1 -ffreestanding -Wno-error=implicit-function-declaration -triple aarch64-none-elf -target-feature +neon -target-feature +crc -target-feature +crypto -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s -check-prefixes=ARM,AArch64 // RUN: %clang_cc1 -ffreestanding -triple aarch64-none-elf -target-feature +v8.3a -target-feature +crc -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s -check-prefixes=ARM,AArch64,AArch6483 -// RUN: %clang_cc1 -ffreestanding -triple aarch64-none-elf -target-feature +v8.5a -target-feature +crc -target-feature +rand -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s -check-prefixes=ARM,AArch64,AArch6483,AArch6485 -// RUN: %clang_cc1 -ffreestanding -triple aarch64-none-elf -target-feature +v9.4a -target-feature +crc -target-feature +rand -target-feature +d128 -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s -check-prefixes=ARM,AArch64,AArch6483,AArch6485,AArch6494D128 +// RUN: %clang_cc1 -ffreestanding -triple aarch64-none-elf -target-feature +v8.5a -target-feature +crc -target-feature +rng -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s -check-prefixes=ARM,AArch64,AArch6483,AArch6485 +// RUN: %clang_cc1 -ffreestanding -triple aarch64-none-elf -target-feature +v9.4a -target-feature +crc -target-feature +rng -target-feature +d128 -O0 -disable-O0-optnone -S -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s -check-prefixes=ARM,AArch64,AArch6483,AArch6485,AArch6494D128 #include diff --git a/clang/test/CodeGen/attr-target-clones-aarch64.c b/clang/test/CodeGen/attr-target-clones-aarch64.c index 8c8b951e9118d..c6f7d37ddf7fc 100644 --- a/clang/test/CodeGen/attr-target-clones-aarch64.c +++ b/clang/test/CodeGen/attr-target-clones-aarch64.c @@ -412,8 +412,8 @@ inline int __attribute__((target_clones("fp16", "sve2-bitperm+fcma", "default")) // CHECK: attributes #[[ATTR5:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc,+dotprod,+fp-armv8,+neon" } // CHECK: attributes #[[ATTR6:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" } // CHECK: attributes #[[ATTR7:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon" } -// CHECK: attributes #[[ATTR8:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+complxnum,+fp-armv8,+fullfp16,+neon,+sve,+sve2,+sve2-bitperm" } -// CHECK: attributes #[[ATTR9:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon,+rand" } +// CHECK: attributes #[[ATTR8:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fcma,+fp-armv8,+fullfp16,+neon,+sve,+sve2,+sve2-bitperm" } +// CHECK: attributes #[[ATTR9:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+neon,+rng" } // CHECK: attributes #[[ATTR10:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+predres,+rcpc" } // CHECK: attributes #[[ATTR11:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+neon,+sve,+sve2,+sve2-aes,+wfxt" } // CHECK: attributes #[[ATTR12:[0-9]+]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bti" } diff --git a/clang/test/CodeGen/attr-target-version.c b/clang/test/CodeGen/attr-target-version.c index dd4cbbf5a8986..768aaf314b935 100644 --- a/clang/test/CodeGen/attr-target-version.c +++ b/clang/test/CodeGen/attr-target-version.c @@ -1129,7 +1129,7 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de // CHECK-NOFMV-NEXT: ret i32 0 // //. -// CHECK: attributes #[[ATTR0]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+flagm,+fp16fml,+fullfp16,+neon,+rand,-fp-armv8,-v9.5a" } +// CHECK: attributes #[[ATTR0]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+flagm,+fp16fml,+fullfp16,+neon,+rng,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR1]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+altnzcv,+bf16,+flagm,+sme,+sme-i16i64,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR2]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+lse,+neon,+sha2,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR3]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+dotprod,+ls64,+neon,-fp-armv8,-v9.5a" } @@ -1148,15 +1148,15 @@ int caller(void) { return used_def_without_default_decl() + used_decl_without_de // CHECK: attributes #[[ATTR16]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fullfp16,+neon,+sve,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR17]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+lse,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR18]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+neon,+rdm,-fp-armv8,-v9.5a" } -// CHECK: attributes #[[ATTR19:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+jsconv,+neon,-fp-armv8,-v9.5a" } +// CHECK: attributes #[[ATTR19:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+jscvt,+neon,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR20:[0-9]+]] = { "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+neon,+rdm,-fp-armv8,-v9.5a" } -// CHECK: attributes #[[ATTR21]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+jsconv,+neon,-fp-armv8,-v9.5a" } +// CHECK: attributes #[[ATTR21]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+jscvt,+neon,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR22]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+aes,+f64mm,+fullfp16,+neon,+sve,-fp-armv8,-v9.5a" } -// CHECK: attributes #[[ATTR23]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+complxnum,+fullfp16,+neon,+rdm,+sme,-fp-armv8,-v9.5a" } +// CHECK: attributes #[[ATTR23]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+fcma,+fullfp16,+neon,+rdm,+sme,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR24]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+f32mm,+fullfp16,+i8mm,+neon,+sha2,+sha3,+sve,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR25]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+dit,+fullfp16,+neon,+sve,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR26]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ccpp,+rcpc,-fp-armv8,-v9.5a" } -// CHECK: attributes #[[ATTR27]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ccdp,+ccpp,+jsconv,+neon,-fp-armv8,-v9.5a" } +// CHECK: attributes #[[ATTR27]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+ccdp,+ccpp,+jscvt,+neon,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR28]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fptoint,+rcpc,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR29]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+fullfp16,+neon,+sve,-fp-armv8,-v9.5a" } // CHECK: attributes #[[ATTR30]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fullfp16,+neon,+sve,+sve2,+sve2-aes,+sve2-sha3,-fp-armv8,-v9.5a" } diff --git a/clang/test/Driver/aarch64-fp16.c b/clang/test/Driver/aarch64-fp16.c index 4da1834cf6876..796dd8c36ddbf 100644 --- a/clang/test/Driver/aarch64-fp16.c +++ b/clang/test/Driver/aarch64-fp16.c @@ -34,8 +34,8 @@ // GENERICV82A-FP16-NOT: "-target-feature" "{{[+-]}}fp16fml" // GENERICV82A-FP16-SAME: {{$}} -// RUN: %clang --target=aarch64 -march=armv8.2-a+profile -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV82A-SPE %s -// GENERICV82A-SPE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v8.2a"{{.*}} "-target-feature" "+spe"{{.*}} "-target-feature" "+neon" +// RUN: %clang --target=aarch64 -march=armv8.2-a+profile -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV82A-PROFILE %s +// GENERICV82A-PROFILE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "generic" "-target-feature" "+v8.2a"{{.*}} "-target-feature" "+profile"{{.*}} "-target-feature" "+neon" // RUN: %clang --target=aarch64 -march=armv8.2a+fp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV82A-FP16FML %s // RUN: %clang --target=aarch64 -march=armv8.2-a+fp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV82A-FP16FML %s @@ -57,11 +57,11 @@ // RUN: %clang --target=aarch64 -march=armv8.2-a+nofp16+fp16fml -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV82A-NO-FP16-FP16FML %s // GENERICV82A-NO-FP16-FP16FML: "-target-feature" "+fullfp16" "-target-feature" "+fp16fml" -// RUN: %clang --target=aarch64 -march=armv8.2a+fp16+profile -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV82A-FP16-SPE %s -// RUN: %clang --target=aarch64 -march=armv8.2-a+fp16+profile -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV82A-FP16-SPE %s -// GENERICV82A-FP16-SPE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}"{{.*}} "-target-cpu" "generic"{{.*}} "-target-feature" "+v8.2a"{{.*}} "-target-feature" "+fullfp16"{{.*}} "-target-feature" "+spe"{{.*}} "-target-feature" "+neon" -// GENERICV82A-FP16-SPE-NOT: "-target-feature" "{{[+-]}}fp16fml" -// GENERICV82A-FP16-SPE-SAME: {{$}} +// RUN: %clang --target=aarch64 -march=armv8.2a+fp16+profile -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV82A-FP16-PROFILE %s +// RUN: %clang --target=aarch64 -march=armv8.2-a+fp16+profile -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV82A-FP16-PROFILE %s +// GENERICV82A-FP16-PROFILE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}"{{.*}} "-target-cpu" "generic"{{.*}} "-target-feature" "+v8.2a"{{.*}} "-target-feature" "+fullfp16"{{.*}} "-target-feature" "+profile"{{.*}} "-target-feature" "+neon" +// GENERICV82A-FP16-PROFILE-NOT: "-target-feature" "{{[+-]}}fp16fml" +// GENERICV82A-FP16-PROFILE-SAME: {{$}} // RUN: %clang --target=aarch64 -march=armv8.3a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV83A-NO-FP16FML %s // RUN: %clang --target=aarch64 -march=armv8.3-a -### -c %s 2>&1 | FileCheck -check-prefix=GENERICV83A-NO-FP16FML %s diff --git a/clang/test/Driver/aarch64-perfmon.c b/clang/test/Driver/aarch64-perfmon.c index 071be278497e0..37edbc7c99992 100644 --- a/clang/test/Driver/aarch64-perfmon.c +++ b/clang/test/Driver/aarch64-perfmon.c @@ -1,14 +1,14 @@ -// RUN: %clang -### --target=aarch64-none-elf -march=armv8.4a+pmuv3 %s 2>&1 | FileCheck --check-prefix=CHECK-PERFMON %s -// RUN: %clang -### --target=aarch64-none-elf -march=armv8.2a+pmuv3 %s 2>&1 | FileCheck --check-prefix=CHECK-PERFMON %s -// CHECK-PERFMON: "-target-feature" "+perfmon" +// RUN: %clang -### --target=aarch64-none-elf -march=armv8.4a+pmuv3 %s 2>&1 | FileCheck --check-prefix=CHECK-PMUV3 %s +// RUN: %clang -### --target=aarch64-none-elf -march=armv8.2a+pmuv3 %s 2>&1 | FileCheck --check-prefix=CHECK-PMUV3 %s +// CHECK-PMUV3: "-target-feature" "+pmuv3" -// RUN: %clang -### --target=aarch64-none-elf -mcpu=cortex-a520+nopmuv3 %s 2>&1 | FileCheck --check-prefix=CHECK-NOPERFMON %s -// CHECK-NOPERFMON: "-target-feature" "-perfmon" +// RUN: %clang -### --target=aarch64-none-elf -mcpu=cortex-a520+nopmuv3 %s 2>&1 | FileCheck --check-prefix=CHECK-NO-PMUv3 %s +// CHECK-NO-PMUv3: "-target-feature" "-pmuv3" -// RUN: %clang -### --target=aarch64-none-elf %s 2>&1 | FileCheck %s --check-prefix=ABSENTPERFMON -// RUN: %clang -### --target=aarch64-none-elf -march=armv8.4a %s 2>&1 | FileCheck %s --check-prefix=ABSENTPERFMON -// RUN: %clang -### --target=aarch64-none-elf -march=armv8.2a %s 2>&1 | FileCheck %s --check-prefix=ABSENTPERFMON -// RUN: %clang -### --target=aarch64-none-elf -march=armv8.4a+nopmuv3 %s 2>&1 | FileCheck --check-prefix=ABSENTPERFMON %s -// RUN: %clang -### --target=aarch64-none-elf -march=armv8.2a+nopmuv3 %s 2>&1 | FileCheck --check-prefix=ABSENTPERFMON %s -// ABSENTPERFMON-NOT: "-target-feature" "+perfmon" -// ABSENTPERFMON-NOT: "-target-feature" "-perfmon" +// RUN: %clang -### --target=aarch64-none-elf %s 2>&1 | FileCheck %s --check-prefix=ABSENT-PMUV3 +// RUN: %clang -### --target=aarch64-none-elf -march=armv8.4a %s 2>&1 | FileCheck %s --check-prefix=ABSENT-PMUV3 +// RUN: %clang -### --target=aarch64-none-elf -march=armv8.2a %s 2>&1 | FileCheck %s --check-prefix=ABSENT-PMUV3 +// RUN: %clang -### --target=aarch64-none-elf -march=armv8.4a+nopmuv3 %s 2>&1 | FileCheck --check-prefix=ABSENT-PMUV3 %s +// RUN: %clang -### --target=aarch64-none-elf -march=armv8.2a+nopmuv3 %s 2>&1 | FileCheck --check-prefix=ABSENT-PMUV3 %s +// ABSENT-PMUV3-NOT: "-target-feature" "+pmuv3" +// ABSENT-PMUV3-NOT: "-target-feature" "-pmuv3" diff --git a/clang/test/Driver/aarch64-rand.c b/clang/test/Driver/aarch64-rand.c index 80891ec3f5482..30d42b2c582a3 100644 --- a/clang/test/Driver/aarch64-rand.c +++ b/clang/test/Driver/aarch64-rand.c @@ -1,12 +1,12 @@ // RUN: %clang -### --target=aarch64-none-elf -march=armv8.4a+rng %s 2>&1 | FileCheck %s // RUN: %clang -### --target=aarch64-none-elf -march=armv8.5a+rng %s 2>&1 | FileCheck %s -// CHECK: "-target-feature" "+rand" +// CHECK: "-target-feature" "+rng" // RUN: %clang -### --target=aarch64-none-elf -mcpu=neoverse-v1+norng %s 2>&1 | FileCheck %s --check-prefix=NORAND -// NORAND: "-target-feature" "-rand" +// NORAND: "-target-feature" "-rng" // RUN: %clang -### --target=aarch64-none-elf %s 2>&1 | FileCheck %s --check-prefix=ABSENTRAND // RUN: %clang -### --target=aarch64-none-elf -march=armv8.4a %s 2>&1 | FileCheck %s --check-prefix=ABSENTRAND // RUN: %clang -### --target=aarch64-none-elf -march=armv8.5a %s 2>&1 | FileCheck %s --check-prefix=ABSENTRAND -// ABSENTRAND-NOT: "-target-feature" "+rand" -// ABSENTRAND-NOT: "-target-feature" "-rand" +// ABSENTRAND-NOT: "-target-feature" "+rng" +// ABSENTRAND-NOT: "-target-feature" "-rng" diff --git a/clang/test/Preprocessor/aarch64-target-features.c b/clang/test/Preprocessor/aarch64-target-features.c index 4d10eeafa8847..f96ab9dd669be 100644 --- a/clang/test/Preprocessor/aarch64-target-features.c +++ b/clang/test/Preprocessor/aarch64-target-features.c @@ -318,15 +318,15 @@ // CHECK-MCPU-APPLE-A7: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8a" "-target-feature" "+aes"{{.*}} "-target-feature" "+fp-armv8" "-target-feature" "+sha2" "-target-feature" "+neon" // CHECK-MCPU-APPLE-A10: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8a" "-target-feature" "+aes"{{.*}} "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+neon" // CHECK-MCPU-APPLE-A11: "-cc1"{{.*}} "-triple" "aarch64{{.*}}"{{.*}}"-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8.2a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+lse" "-target-feature" "+ras" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+neon" -// CHECK-MCPU-APPLE-A12: "-cc1"{{.*}} "-triple" "aarch64"{{.*}} "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8.3a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+complxnum" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+jsconv" "-target-feature" "+lse" "-target-feature" "+pauth" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+neon" +// CHECK-MCPU-APPLE-A12: "-cc1"{{.*}} "-triple" "aarch64"{{.*}} "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8.3a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fcma" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+jscvt" "-target-feature" "+lse" "-target-feature" "+pauth" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+neon" // CHECK-MCPU-A34: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+sha2" "-target-feature" "+neon" -// CHECK-MCPU-APPLE-A13: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "apple-a13" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8.4a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature" "+complxnum" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+fp16fml" "-target-feature" "+jsconv" "-target-feature" "+lse" "-target-feature" "+pauth" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+sha3" "-target-feature" "+neon" +// CHECK-MCPU-APPLE-A13: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "apple-a13" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8.4a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature" "+fcma" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+fp16fml" "-target-feature" "+jscvt" "-target-feature" "+lse" "-target-feature" "+pauth" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+sha3" "-target-feature" "+neon" // CHECK-MCPU-A35: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+sha2" "-target-feature" "+neon" // CHECK-MCPU-A53: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+sha2" "-target-feature" "+neon" // CHECK-MCPU-A57: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+sha2" "-target-feature" "+neon" // CHECK-MCPU-A72: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+sha2" "-target-feature" "+neon" // CHECK-MCPU-CORTEX-A73: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+sha2" "-target-feature" "+neon" -// CHECK-MCPU-CORTEX-R82: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8r" "-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature" "+complxnum" "-target-feature" "+flagm" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+fp16fml" "-target-feature" "+jsconv" "-target-feature" "+lse" "-target-feature" "+pauth" "-target-feature" "+perfmon" "-target-feature" "+predres" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sb" "-target-feature" "+neon" "-target-feature" "+ssbs" +// CHECK-MCPU-CORTEX-R82: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8r" "-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature" "+fcma" "-target-feature" "+flagm" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+fp16fml" "-target-feature" "+jscvt" "-target-feature" "+lse" "-target-feature" "+pauth" "-target-feature" "+pmuv3" "-target-feature" "+predres" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sb" "-target-feature" "+neon" "-target-feature" "+ssbs" // CHECK-MCPU-M3: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+sha2" "-target-feature" "+neon" // CHECK-MCPU-M4: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+lse" "-target-feature" "+ras" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+neon" // CHECK-MCPU-KRYO: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+sha2" "-target-feature" "+neon" @@ -335,10 +335,10 @@ // CHECK-MCPU-CARMEL: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-feature" "+v8.2a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+lse" "-target-feature" "+ras" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+neon" // RUN: %clang -target x86_64-apple-macosx -arch arm64 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64 %s -// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8.5a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature" "+complxnum" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+fp16fml" "-target-feature" "+jsconv" "-target-feature" "+lse" "-target-feature" "+pauth" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+sha3" "-target-feature" "+neon" +// CHECK-ARCH-ARM64: "-target-cpu" "apple-m1" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8.5a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+dotprod" "-target-feature" "+fcma" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+fp16fml" "-target-feature" "+jscvt" "-target-feature" "+lse" "-target-feature" "+pauth" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+sha3" "-target-feature" "+neon" // RUN: %clang -target x86_64-apple-macosx -arch arm64_32 -### -c %s 2>&1 | FileCheck --check-prefix=CHECK-ARCH-ARM64_32 %s -// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8.3a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+complxnum" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+jsconv" "-target-feature" "+lse" "-target-feature" "+pauth" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+neon" +// CHECK-ARCH-ARM64_32: "-target-cpu" "apple-s4" "-target-feature" "+zcm" "-target-feature" "+zcz" "-target-feature" "+v8.3a" "-target-feature" "+aes" "-target-feature" "+crc" "-target-feature" "+fcma" "-target-feature" "+fp-armv8" "-target-feature" "+fullfp16" "-target-feature" "+jscvt" "-target-feature" "+lse" "-target-feature" "+pauth" "-target-feature" "+ras" "-target-feature" "+rcpc" "-target-feature" "+rdm" "-target-feature" "+sha2" "-target-feature" "+neon" // RUN: %clang -target aarch64 -march=armv8-a+fp+simd+crc+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARCH-1 %s // RUN: %clang -target aarch64 -march=armv8-a+nofp+nosimd+nocrc+nocrypto+fp+simd+crc+crypto -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARCH-1 %s diff --git a/lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s b/lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s index e154f544e7cc6..9f9d636b34ac6 100644 --- a/lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s +++ b/lldb/test/Shell/Commands/command-disassemble-aarch64-extensions.s @@ -22,8 +22,8 @@ fn: fmmla z0.s, z1.s, z2.s // AEK_F32MM fmmla z0.d, z1.d, z2.d // AEK_F64MM cfinv // AEK_FLAGM - fcvt d0, s0 // AEK_FP - fabs h1, h2 // AEK_FP16 + fcvt d0, s0 // AEK_FPARMV8 + fabs h1, h2 // AEK_FULLFP16 fmlal v0.2s, v1.2h, v2.2h // AEK_FP16FML bc.eq lbl // AEK_HBC smmla v1.4s, v16.16b, v31.16b // AEK_I8MM @@ -33,18 +33,18 @@ fn: irg x0, x0 // AEK_MTE cpyfp [x0]!, [x1]!, x2! // AEK_MOPS pacia x0, x1 // AEK_PAUTH - mrs x0, pmccntr_el0 // AEK_PERFMON + mrs x0, pmccntr_el0 // AEK_PMUV3 cfp rctx, x0 // AEK_PREDRES - psb csync // AEK_PROFILE/SPE + psb csync // AEK_PROFILE msr erxpfgctl_el1, x0 // AEK_RAS ldaprb w0, [x0, #0] // AEK_RCPC stilp w26, w2, [x18] // AEK_RCPC3 sqrdmlah v0.4h, v1.4h, v2.4h // AEK_RDM - mrs x0, rndr // AEK_RAND + mrs x0, rndr // AEK_RNG sb // AEK_SB sha256h q0, q0, v0.4s // AEK_SHA2 bcax v0.16b, v0.16b, v0.16b, v0.16b // AEK_SHA3 - addp v0.4s, v0.4s, v0.4s // AEK_SIMD (neon) + addp v0.4s, v0.4s, v0.4s // AEK_NEON sm4e v0.4s, v0.4s // AEK_SM4 addha za0.s, p0/m, p0/m, z0.s // AEK_SME fadd za.h[w11, 7], {z12.h - z13.h} // AEK_SMEF16F16 @@ -59,7 +59,7 @@ fn: bdep z0.b, z1.b, z31.b // AEK_SVE2BITPERM rax1 z0.d, z0.d, z0.d // AEK_SVE2SHA3 sm4e z0.s, z0.s, z0.s // AEK_SVE2SM4 - addqv v0.8h, p0, z0.h // AEK_SVE2p1 / AEK_SME2p1 + addqv v0.8h, p0, z0.h // AEK_SVE2P1 / AEK_SME2P1 rcwswp x0, x1, [x2] // AEK_THE tcommit // AEK_TME lbl: diff --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h index 04fbaf07adfbc..05043f857aff2 100644 --- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h +++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h @@ -108,24 +108,7 @@ enum ArchExtKind : unsigned { AEK_NONE = 1, #define ARM_EXTENSION(NAME, ENUM) ENUM, #include "llvm/TargetParser/AArch64TargetParserDef.inc" - AEK_NUM_EXTENSIONS, - - // FIXME temporary fixes for inconsistent naming. - AEK_F32MM = AEK_MATMULFP32, - AEK_F64MM = AEK_MATMULFP64, - AEK_FCMA = AEK_COMPLXNUM, - AEK_FP = AEK_FPARMV8, - AEK_FP16 = AEK_FULLFP16, - AEK_I8MM = AEK_MATMULINT8, - AEK_JSCVT = AEK_JS, - AEK_PROFILE = AEK_SPE, - AEK_RASv2 = AEK_RASV2, - AEK_RAND = AEK_RANDGEN, - AEK_SIMD = AEK_NEON, - AEK_SME2p1 = AEK_SME2P1, - AEK_SVE2p1 = AEK_SVE2P1, - AEK_SME_LUTv2 = AEK_SME_LUTV2, - + AEK_NUM_EXTENSIONS }; using ExtensionBitset = Bitset; @@ -137,8 +120,8 @@ struct ExtensionInfo { StringRef Name; // Human readable name, e.g. "profile". ArchExtKind ID; // Corresponding to the ArchExtKind, this // extensions representation in the bitfield. - StringRef Feature; // -mattr enable string, e.g. "+spe" - StringRef NegFeature; // -mattr disable string, e.g. "-spe" + StringRef Feature; // -mattr enable string, e.g. "+profile" + StringRef NegFeature; // -mattr disable string, e.g. "-profile" CPUFeatures CPUFeature; // Function Multi Versioning (FMV) bitfield value // set in __aarch64_cpu_features StringRef DependentFeatures; // FMV enabled features string, @@ -169,17 +152,17 @@ inline constexpr ExtensionInfo Extensions[] = { {"ebf16", AArch64::AEK_NONE, {}, {}, FEAT_EBF16, "+bf16", 290}, {"f32mm", AArch64::AEK_F32MM, "+f32mm", "-f32mm", FEAT_SVE_F32MM, "+sve,+f32mm,+fullfp16,+fp-armv8,+neon", 350}, {"f64mm", AArch64::AEK_F64MM, "+f64mm", "-f64mm", FEAT_SVE_F64MM, "+sve,+f64mm,+fullfp16,+fp-armv8,+neon", 360}, - {"fcma", AArch64::AEK_FCMA, "+complxnum", "-complxnum", FEAT_FCMA, "+fp-armv8,+neon,+complxnum", 220}, + {"fcma", AArch64::AEK_FCMA, "+fcma", "-fcma", FEAT_FCMA, "+fp-armv8,+neon,+fcma", 220}, {"flagm", AArch64::AEK_FLAGM, "+flagm", "-flagm", FEAT_FLAGM, "+flagm", 20}, {"flagm2", AArch64::AEK_NONE, {}, {}, FEAT_FLAGM2, "+flagm,+altnzcv", 30}, - {"fp", AArch64::AEK_FP, "+fp-armv8", "-fp-armv8", FEAT_FP, "+fp-armv8,+neon", 90}, - {"fp16", AArch64::AEK_FP16, "+fullfp16", "-fullfp16", FEAT_FP16, "+fullfp16,+fp-armv8,+neon", 170}, + {"fp", AArch64::AEK_FPARMV8, "+fp-armv8", "-fp-armv8", FEAT_FP, "+fp-armv8,+neon", 90}, + {"fp16", AArch64::AEK_FULLFP16, "+fullfp16", "-fullfp16", FEAT_FP16, "+fullfp16,+fp-armv8,+neon", 170}, {"fp16fml", AArch64::AEK_FP16FML, "+fp16fml", "-fp16fml", FEAT_FP16FML, "+fp16fml,+fullfp16,+fp-armv8,+neon", 175}, {"frintts", AArch64::AEK_NONE, {}, {}, FEAT_FRINTTS, "+fptoint", 250}, {"hbc", AArch64::AEK_HBC, "+hbc", "-hbc", FEAT_INIT, "", 0}, {"i8mm", AArch64::AEK_I8MM, "+i8mm", "-i8mm", FEAT_I8MM, "+i8mm", 270}, {"ite", AArch64::AEK_ITE, "+ite", "-ite", FEAT_INIT, "", 0}, - {"jscvt", AArch64::AEK_JSCVT, "+jsconv", "-jsconv", FEAT_JSCVT, "+fp-armv8,+neon,+jsconv", 210}, + {"jscvt", AArch64::AEK_JSCVT, "+jscvt", "-jscvt", FEAT_JSCVT, "+fp-armv8,+neon,+jscvt", 210}, {"ls64_accdata", AArch64::AEK_NONE, {}, {}, FEAT_LS64_ACCDATA, "+ls64", 540}, {"ls64_v", AArch64::AEK_NONE, {}, {}, FEAT_LS64_V, "", 530}, {"ls64", AArch64::AEK_LS64, "+ls64", "-ls64", FEAT_LS64, "", 520}, @@ -191,30 +174,30 @@ inline constexpr ExtensionInfo Extensions[] = { {"mops", AArch64::AEK_MOPS, "+mops", "-mops", FEAT_MOPS, "+mops", 650}, {"pauth", AArch64::AEK_PAUTH, "+pauth", "-pauth", FEAT_INIT, "", 0}, {"pmull", AArch64::AEK_NONE, {}, {}, FEAT_PMULL, "+aes,+fp-armv8,+neon", 160}, - {"pmuv3", AArch64::AEK_PERFMON, "+perfmon", "-perfmon", FEAT_INIT, "", 0}, + {"pmuv3", AArch64::AEK_PMUV3, "+pmuv3", "-pmuv3", FEAT_INIT, "", 0}, {"predres", AArch64::AEK_PREDRES, "+predres", "-predres", FEAT_PREDRES, "+predres", 480}, - {"predres2", AArch64::AEK_SPECRES2, "+specres2", "-specres2", FEAT_INIT, "", 0}, - {"profile", AArch64::AEK_PROFILE, "+spe", "-spe", FEAT_INIT, "", 0}, + {"predres2", AArch64::AEK_SPECRES2, "+predres2", "-predres2", FEAT_INIT, "", 0}, + {"profile", AArch64::AEK_PROFILE, "+profile", "-profile", FEAT_INIT, "", 0}, {"ras", AArch64::AEK_RAS, "+ras", "-ras", FEAT_INIT, "", 0}, - {"rasv2", AArch64::AEK_RASv2, "+rasv2", "-rasv2", FEAT_INIT, "", 0}, + {"rasv2", AArch64::AEK_RASV2, "+rasv2", "-rasv2", FEAT_INIT, "", 0}, {"rcpc", AArch64::AEK_RCPC, "+rcpc", "-rcpc", FEAT_RCPC, "+rcpc", 230}, {"rcpc2", AArch64::AEK_NONE, {}, {}, FEAT_RCPC2, "+rcpc", 240}, {"rcpc3", AArch64::AEK_RCPC3, "+rcpc3", "-rcpc3", FEAT_RCPC3, "+rcpc,+rcpc3", 241}, {"rdm", AArch64::AEK_RDM, "+rdm", "-rdm", FEAT_RDM, "+rdm,+fp-armv8,+neon", 108}, - {"rng", AArch64::AEK_RAND, "+rand", "-rand", FEAT_RNG, "+rand", 10}, + {"rng", AArch64::AEK_RNG, "+rng", "-rng", FEAT_RNG, "+rng", 10}, {"rpres", AArch64::AEK_NONE, {}, {}, FEAT_RPRES, "", 300}, {"sb", AArch64::AEK_SB, "+sb", "-sb", FEAT_SB, "+sb", 470}, {"sha1", AArch64::AEK_NONE, {}, {}, FEAT_SHA1, "+fp-armv8,+neon", 120}, {"sha2", AArch64::AEK_SHA2, "+sha2", "-sha2", FEAT_SHA2, "+sha2,+fp-armv8,+neon", 130}, {"sha3", AArch64::AEK_SHA3, "+sha3", "-sha3", FEAT_SHA3, "+sha3,+sha2,+fp-armv8,+neon", 140}, - {"simd", AArch64::AEK_SIMD, "+neon", "-neon", FEAT_SIMD, "+fp-armv8,+neon", 100}, + {"simd", AArch64::AEK_NEON, "+neon", "-neon", FEAT_SIMD, "+fp-armv8,+neon", 100}, {"sm4", AArch64::AEK_SM4, "+sm4", "-sm4", FEAT_SM4, "+sm4,+fp-armv8,+neon", 106}, {"sme-f16f16", AArch64::AEK_SMEF16F16, "+sme-f16f16", "-sme-f16f16", FEAT_INIT, "+sme2,+sme-f16f16", 0}, {"sme-f64f64", AArch64::AEK_SMEF64F64, "+sme-f64f64", "-sme-f64f64", FEAT_SME_F64, "+sme,+sme-f64f64,+bf16", 560}, {"sme-i16i64", AArch64::AEK_SMEI16I64, "+sme-i16i64", "-sme-i16i64", FEAT_SME_I64, "+sme,+sme-i16i64,+bf16", 570}, {"sme", AArch64::AEK_SME, "+sme", "-sme", FEAT_SME, "+sme,+bf16", 430}, {"sme2", AArch64::AEK_SME2, "+sme2", "-sme2", FEAT_SME2, "+sme2,+sme,+bf16", 580}, - {"sme2p1", AArch64::AEK_SME2p1, "+sme2p1", "-sme2p1", FEAT_INIT, "+sme2p1,+sme2,+sme,+bf16", 0}, + {"sme2p1", AArch64::AEK_SME2P1, "+sme2p1", "-sme2p1", FEAT_INIT, "+sme2p1,+sme2,+sme,+bf16", 0}, {"ssbs", AArch64::AEK_SSBS, "+ssbs", "-ssbs", FEAT_SSBS, "", 490}, {"ssbs2", AArch64::AEK_NONE, {}, {}, FEAT_SSBS2, "+ssbs", 500}, {"sve-bf16", AArch64::AEK_NONE, {}, {}, FEAT_SVE_BF16, "+sve,+bf16,+fullfp16,+fp-armv8,+neon", 320}, @@ -227,7 +210,7 @@ inline constexpr ExtensionInfo Extensions[] = { {"sve2-sha3", AArch64::AEK_SVE2SHA3, "+sve2-sha3", "-sve2-sha3", FEAT_SVE_SHA3, "+sve2,+sve,+sve2-sha3,+fullfp16,+fp-armv8,+neon", 410}, {"sve2-sm4", AArch64::AEK_SVE2SM4, "+sve2-sm4", "-sve2-sm4", FEAT_SVE_SM4, "+sve2,+sve,+sve2-sm4,+fullfp16,+fp-armv8,+neon", 420}, {"sve2", AArch64::AEK_SVE2, "+sve2", "-sve2", FEAT_SVE2, "+sve2,+sve,+fullfp16,+fp-armv8,+neon", 370}, - {"sve2p1", AArch64::AEK_SVE2p1, "+sve2p1", "-sve2p1", FEAT_INIT, "+sve2p1,+sve2,+sve,+fullfp16,+fp-armv8,+neon", 0}, + {"sve2p1", AArch64::AEK_SVE2P1, "+sve2p1", "-sve2p1", FEAT_INIT, "+sve2p1,+sve2,+sve,+fullfp16,+fp-armv8,+neon", 0}, {"the", AArch64::AEK_THE, "+the", "-the", FEAT_INIT, "", 0}, {"tme", AArch64::AEK_TME, "+tme", "-tme", FEAT_INIT, "", 0}, {"wfxt", AArch64::AEK_NONE, {}, {}, FEAT_WFXT, "+wfxt", 550}, @@ -242,7 +225,7 @@ inline constexpr ExtensionInfo Extensions[] = { {"fp8dot4", AArch64::AEK_FP8DOT4, "+fp8dot4", "-fp8dot4", FEAT_INIT, "", 0}, {"ssve-fp8dot4", AArch64::AEK_SSVE_FP8DOT4, "+ssve-fp8dot4", "-ssve-fp8dot4", FEAT_INIT, "+sme2", 0}, {"lut", AArch64::AEK_LUT, "+lut", "-lut", FEAT_INIT, "", 0}, - {"sme-lutv2", AArch64::AEK_SME_LUTv2, "+sme-lutv2", "-sme-lutv2", FEAT_INIT, "", 0}, + {"sme-lutv2", AArch64::AEK_SME_LUTV2, "+sme-lutv2", "-sme-lutv2", FEAT_INIT, "", 0}, {"sme-f8f16", AArch64::AEK_SMEF8F16, "+sme-f8f16", "-sme-f8f16", FEAT_INIT, "+fp8,+sme2", 0}, {"sme-f8f32", AArch64::AEK_SMEF8F32, "+sme-f8f32", "-sme-f8f32", FEAT_INIT, "+sme2,+fp8", 0}, {"sme-fa64", AArch64::AEK_SMEFA64, "+sme-fa64", "-sme-fa64", FEAT_INIT, "", 0}, @@ -309,26 +292,26 @@ struct ExtensionDependency { // Each entry here is a link in the dependency chain starting from the // extension that was added to the architecture first. inline constexpr ExtensionDependency ExtensionDependencies[] = { - {AEK_FP, AEK_FP16}, - {AEK_FP, AEK_SIMD}, - {AEK_FP, AEK_JSCVT}, - {AEK_FP, AEK_FP8}, - {AEK_SIMD, AEK_CRYPTO}, - {AEK_SIMD, AEK_AES}, - {AEK_SIMD, AEK_SHA2}, - {AEK_SIMD, AEK_SHA3}, - {AEK_SIMD, AEK_SM4}, - {AEK_SIMD, AEK_RDM}, - {AEK_SIMD, AEK_DOTPROD}, - {AEK_SIMD, AEK_FCMA}, - {AEK_FP16, AEK_FP16FML}, - {AEK_FP16, AEK_SVE}, + {AEK_FPARMV8, AEK_FULLFP16}, + {AEK_FPARMV8, AEK_NEON}, + {AEK_FPARMV8, AEK_JSCVT}, + {AEK_FPARMV8, AEK_FP8}, + {AEK_NEON, AEK_CRYPTO}, + {AEK_NEON, AEK_AES}, + {AEK_NEON, AEK_SHA2}, + {AEK_NEON, AEK_SHA3}, + {AEK_NEON, AEK_SM4}, + {AEK_NEON, AEK_RDM}, + {AEK_NEON, AEK_DOTPROD}, + {AEK_NEON, AEK_FCMA}, + {AEK_FULLFP16, AEK_FP16FML}, + {AEK_FULLFP16, AEK_SVE}, {AEK_BF16, AEK_SME}, {AEK_BF16, AEK_B16B16}, {AEK_SVE, AEK_SVE2}, {AEK_SVE, AEK_F32MM}, {AEK_SVE, AEK_F64MM}, - {AEK_SVE2, AEK_SVE2p1}, + {AEK_SVE2, AEK_SVE2P1}, {AEK_SVE2, AEK_SVE2BITPERM}, {AEK_SVE2, AEK_SVE2AES}, {AEK_SVE2, AEK_SVE2SHA3}, @@ -340,7 +323,7 @@ inline constexpr ExtensionDependency ExtensionDependencies[] = { {AEK_SME, AEK_SMEF64F64}, {AEK_SME, AEK_SMEI16I64}, {AEK_SME, AEK_SMEFA64}, - {AEK_SME2, AEK_SME2p1}, + {AEK_SME2, AEK_SME2P1}, {AEK_SME2, AEK_SSVE_FP8FMA}, {AEK_SME2, AEK_SSVE_FP8DOT2}, {AEK_SME2, AEK_SSVE_FP8DOT4}, @@ -349,8 +332,8 @@ inline constexpr ExtensionDependency ExtensionDependencies[] = { {AEK_FP8, AEK_SMEF8F16}, {AEK_FP8, AEK_SMEF8F32}, {AEK_LSE, AEK_LSE128}, - {AEK_PREDRES, AEK_SPECRES2}, - {AEK_RAS, AEK_RASv2}, + {AEK_PREDRES, AEK_PREDRES2}, + {AEK_RAS, AEK_RASV2}, {AEK_RCPC, AEK_RCPC3}, }; // clang-format on @@ -413,7 +396,7 @@ struct ArchInfo { // clang-format off inline constexpr ArchInfo ARMV8A = { VersionTuple{8, 0}, AProfile, "armv8-a", "+v8a", ( - AArch64::ExtensionBitset({AArch64::AEK_FP, AArch64::AEK_SIMD})), }; + AArch64::ExtensionBitset({AArch64::AEK_FPARMV8, AArch64::AEK_NEON})), }; inline constexpr ArchInfo ARMV8_1A = { VersionTuple{8, 1}, AProfile, "armv8.1-a", "+v8.1a", (ARMV8A.DefaultExts | AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_LSE, AArch64::AEK_RDM}))}; inline constexpr ArchInfo ARMV8_2A = { VersionTuple{8, 2}, AProfile, "armv8.2-a", "+v8.2a", (ARMV8_1A.DefaultExts | @@ -429,22 +412,22 @@ inline constexpr ArchInfo ARMV8_7A = { VersionTuple{8, 7}, AProfile, "armv8.7-a inline constexpr ArchInfo ARMV8_8A = { VersionTuple{8, 8}, AProfile, "armv8.8-a", "+v8.8a", (ARMV8_7A.DefaultExts | AArch64::ExtensionBitset({AArch64::AEK_MOPS, AArch64::AEK_HBC}))}; inline constexpr ArchInfo ARMV8_9A = { VersionTuple{8, 9}, AProfile, "armv8.9-a", "+v8.9a", (ARMV8_8A.DefaultExts | - AArch64::ExtensionBitset({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, AArch64::AEK_RASv2}))}; + AArch64::ExtensionBitset({AArch64::AEK_PREDRES2, AArch64::AEK_CSSC, AArch64::AEK_RASV2}))}; inline constexpr ArchInfo ARMV9A = { VersionTuple{9, 0}, AProfile, "armv9-a", "+v9a", (ARMV8_5A.DefaultExts | - AArch64::ExtensionBitset({AArch64::AEK_FP16, AArch64::AEK_SVE, AArch64::AEK_SVE2}))}; + AArch64::ExtensionBitset({AArch64::AEK_FULLFP16, AArch64::AEK_SVE, AArch64::AEK_SVE2}))}; inline constexpr ArchInfo ARMV9_1A = { VersionTuple{9, 1}, AProfile, "armv9.1-a", "+v9.1a", (ARMV9A.DefaultExts | AArch64::ExtensionBitset({AArch64::AEK_BF16, AArch64::AEK_I8MM}))}; inline constexpr ArchInfo ARMV9_2A = { VersionTuple{9, 2}, AProfile, "armv9.2-a", "+v9.2a", (ARMV9_1A.DefaultExts)}; inline constexpr ArchInfo ARMV9_3A = { VersionTuple{9, 3}, AProfile, "armv9.3-a", "+v9.3a", (ARMV9_2A.DefaultExts | AArch64::ExtensionBitset({AArch64::AEK_MOPS, AArch64::AEK_HBC}))}; inline constexpr ArchInfo ARMV9_4A = { VersionTuple{9, 4}, AProfile, "armv9.4-a", "+v9.4a", (ARMV9_3A.DefaultExts | - AArch64::ExtensionBitset({AArch64::AEK_SPECRES2, AArch64::AEK_CSSC, AArch64::AEK_RASv2}))}; + AArch64::ExtensionBitset({AArch64::AEK_PREDRES2, AArch64::AEK_CSSC, AArch64::AEK_RASV2}))}; inline constexpr ArchInfo ARMV9_5A = { VersionTuple{9, 5}, AProfile, "armv9.5-a", "+v9.5a", (ARMV9_4A.DefaultExts | AArch64::ExtensionBitset({AArch64::AEK_CPA}))}; // For v8-R, we do not enable crypto and align with GCC that enables a more minimal set of optional architecture extensions. inline constexpr ArchInfo ARMV8R = { VersionTuple{8, 0}, RProfile, "armv8-r", "+v8r", (ARMV8_5A.DefaultExts | AArch64::ExtensionBitset({AArch64::AEK_SSBS, - AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_SB}).flip(AArch64::AEK_LSE))}; + AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_SB}).flip(AArch64::AEK_LSE))}; // clang-format on // The set of all architectures @@ -482,7 +465,7 @@ inline constexpr CpuInfo CpuInfos[] = { {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})}, {"cortex-a55", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC})}, {"cortex-a510", ARMV9A, AArch64::ExtensionBitset( @@ -494,22 +477,22 @@ inline constexpr CpuInfo CpuInfos[] = { AArch64::ExtensionBitset( {AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM, - AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})}, + AArch64::AEK_FLAGM, AArch64::AEK_PMUV3, AArch64::AEK_PREDRES})}, {"cortex-a520ae", ARMV9_2A, AArch64::ExtensionBitset( {AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM, - AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})}, + AArch64::AEK_FLAGM, AArch64::AEK_PMUV3, AArch64::AEK_PREDRES})}, {"cortex-a57", ARMV8A, AArch64::ExtensionBitset( {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})}, {"cortex-a65", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_RCPC, AArch64::AEK_SSBS})}, {"cortex-a65ae", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_RCPC, AArch64::AEK_SSBS})}, {"cortex-a72", ARMV8A, AArch64::ExtensionBitset( @@ -519,33 +502,33 @@ inline constexpr CpuInfo CpuInfos[] = { {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})}, {"cortex-a75", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC})}, {"cortex-a76", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS})}, {"cortex-a76ae", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS})}, {"cortex-a77", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP16, AArch64::AEK_RCPC, + AArch64::AEK_FULLFP16, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_SSBS})}, {"cortex-a78", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS, AArch64::AEK_PROFILE})}, {"cortex-a78ae", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS, AArch64::AEK_PROFILE})}, {"cortex-a78c", ARMV8_2A, AArch64::ExtensionBitset( - {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16, + {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS, AArch64::AEK_PROFILE, AArch64::AEK_FLAGM, AArch64::AEK_PAUTH})}, {"cortex-a710", ARMV9A, @@ -557,36 +540,36 @@ inline constexpr CpuInfo CpuInfos[] = { {"cortex-a715", ARMV9A, AArch64::ExtensionBitset( {AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE, - AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, - AArch64::AEK_I8MM, AArch64::AEK_PREDRES, AArch64::AEK_PERFMON, + AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, + AArch64::AEK_I8MM, AArch64::AEK_PREDRES, AArch64::AEK_PMUV3, AArch64::AEK_PROFILE, AArch64::AEK_SVE, AArch64::AEK_SVE2BITPERM, AArch64::AEK_BF16, AArch64::AEK_FLAGM})}, {"cortex-a720", ARMV9_2A, AArch64::ExtensionBitset({AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM, - AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, + AArch64::AEK_FLAGM, AArch64::AEK_PMUV3, AArch64::AEK_PREDRES, AArch64::AEK_PROFILE})}, {"cortex-a720ae", ARMV9_2A, AArch64::ExtensionBitset({AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM, - AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, + AArch64::AEK_FLAGM, AArch64::AEK_PMUV3, AArch64::AEK_PREDRES, AArch64::AEK_PROFILE})}, {"cortex-r82", ARMV8R, AArch64::ExtensionBitset({AArch64::AEK_LSE, AArch64::AEK_FLAGM, - AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})}, + AArch64::AEK_PMUV3, AArch64::AEK_PREDRES})}, {"cortex-r82ae", ARMV8R, AArch64::ExtensionBitset({AArch64::AEK_LSE, AArch64::AEK_FLAGM, - AArch64::AEK_PERFMON, AArch64::AEK_PREDRES})}, + AArch64::AEK_PMUV3, AArch64::AEK_PREDRES})}, {"cortex-x1", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS, AArch64::AEK_PROFILE})}, {"cortex-x1c", ARMV8_2A, AArch64::ExtensionBitset( - {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16, + {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS, AArch64::AEK_PAUTH, AArch64::AEK_PROFILE, AArch64::AEK_FLAGM})}, {"cortex-x2", ARMV9A, @@ -597,57 +580,56 @@ inline constexpr CpuInfo CpuInfos[] = { AArch64::AEK_FP16FML, AArch64::AEK_FLAGM})}, {"cortex-x3", ARMV9A, AArch64::ExtensionBitset( - {AArch64::AEK_SVE, AArch64::AEK_PERFMON, AArch64::AEK_PROFILE, + {AArch64::AEK_SVE, AArch64::AEK_PMUV3, AArch64::AEK_PROFILE, AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_MTE, AArch64::AEK_SVE2BITPERM, AArch64::AEK_SB, AArch64::AEK_PAUTH, - AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_PREDRES, + AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_PREDRES, AArch64::AEK_FLAGM, AArch64::AEK_SSBS})}, {"cortex-x4", ARMV9_2A, AArch64::ExtensionBitset({AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM, - AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, + AArch64::AEK_FLAGM, AArch64::AEK_PMUV3, AArch64::AEK_PREDRES, AArch64::AEK_PROFILE})}, {"neoverse-e1", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_RCPC, AArch64::AEK_SSBS})}, {"neoverse-n1", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_PROFILE, AArch64::AEK_RCPC, AArch64::AEK_SSBS})}, {"neoverse-n2", ARMV9A, AArch64::ExtensionBitset( - {AArch64::AEK_BF16, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + {AArch64::AEK_BF16, AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_I8MM, AArch64::AEK_MTE, AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM})}, {"neoverse-n3", ARMV9_2A, - AArch64::ExtensionBitset({AArch64::AEK_MTE, AArch64::AEK_SSBS, - AArch64::AEK_SB, AArch64::AEK_PREDRES, - AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, - AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, - AArch64::AEK_RAND, AArch64::AEK_SVE2BITPERM, - AArch64::AEK_PROFILE, AArch64::AEK_PERFMON})}, + AArch64::ExtensionBitset( + {AArch64::AEK_MTE, AArch64::AEK_SSBS, AArch64::AEK_SB, + AArch64::AEK_PREDRES, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, + AArch64::AEK_FLAGM, AArch64::AEK_PMUV3, AArch64::AEK_RNG, + AArch64::AEK_SVE2BITPERM, AArch64::AEK_PROFILE, AArch64::AEK_PMUV3})}, {"neoverse-512tvb", ARMV8_4A, AArch64::ExtensionBitset( {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, AArch64::AEK_SM4, AArch64::AEK_SVE, AArch64::AEK_SSBS, - AArch64::AEK_FP16, AArch64::AEK_BF16, AArch64::AEK_DOTPROD, - AArch64::AEK_PROFILE, AArch64::AEK_RAND, AArch64::AEK_FP16FML, + AArch64::AEK_FULLFP16, AArch64::AEK_BF16, AArch64::AEK_DOTPROD, + AArch64::AEK_PROFILE, AArch64::AEK_RNG, AArch64::AEK_FP16FML, AArch64::AEK_I8MM})}, {"neoverse-v1", ARMV8_4A, AArch64::ExtensionBitset( {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, AArch64::AEK_SM4, AArch64::AEK_SVE, AArch64::AEK_SSBS, - AArch64::AEK_FP16, AArch64::AEK_BF16, AArch64::AEK_DOTPROD, - AArch64::AEK_PROFILE, AArch64::AEK_RAND, AArch64::AEK_FP16FML, + AArch64::AEK_FULLFP16, AArch64::AEK_BF16, AArch64::AEK_DOTPROD, + AArch64::AEK_PROFILE, AArch64::AEK_RNG, AArch64::AEK_FP16FML, AArch64::AEK_I8MM})}, {"neoverse-v2", ARMV9A, AArch64::ExtensionBitset( {AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SSBS, - AArch64::AEK_FP16, AArch64::AEK_BF16, AArch64::AEK_RAND, + AArch64::AEK_FULLFP16, AArch64::AEK_BF16, AArch64::AEK_RNG, AArch64::AEK_DOTPROD, AArch64::AEK_PROFILE, AArch64::AEK_SVE2BITPERM, AArch64::AEK_FP16FML, AArch64::AEK_I8MM, AArch64::AEK_MTE})}, {"neoverse-v3", ARMV9_2A, @@ -655,14 +637,14 @@ inline constexpr CpuInfo CpuInfos[] = { {AArch64::AEK_PROFILE, AArch64::AEK_MTE, AArch64::AEK_SSBS, AArch64::AEK_SB, AArch64::AEK_PREDRES, AArch64::AEK_LS64, AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM, - AArch64::AEK_PERFMON, AArch64::AEK_RAND, AArch64::AEK_SVE2BITPERM, + AArch64::AEK_PMUV3, AArch64::AEK_RNG, AArch64::AEK_SVE2BITPERM, AArch64::AEK_FP16FML})}, {"neoverse-v3ae", ARMV9_2A, (AArch64::ExtensionBitset( {AArch64::AEK_PROFILE, AArch64::AEK_MTE, AArch64::AEK_SSBS, AArch64::AEK_SB, AArch64::AEK_PREDRES, AArch64::AEK_LS64, AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM, - AArch64::AEK_PERFMON, AArch64::AEK_RAND, AArch64::AEK_SVE2BITPERM, + AArch64::AEK_PMUV3, AArch64::AEK_RNG, AArch64::AEK_SVE2BITPERM, AArch64::AEK_FP16FML}))}, {"cyclone", ARMV8A, AArch64::ExtensionBitset( @@ -681,59 +663,59 @@ inline constexpr CpuInfo CpuInfos[] = { AArch64::AEK_CRC, AArch64::AEK_RDM})}, {"apple-a11", ARMV8_2A, AArch64::ExtensionBitset( - {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})}, + {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FULLFP16})}, {"apple-a12", ARMV8_3A, AArch64::ExtensionBitset( - {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})}, + {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FULLFP16})}, {"apple-a13", ARMV8_4A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP16, + AArch64::AEK_SHA3, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML})}, {"apple-a14", ARMV8_5A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP16, + AArch64::AEK_SHA3, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML})}, {"apple-a15", ARMV8_6A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP16, + AArch64::AEK_SHA3, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML})}, {"apple-a16", ARMV8_6A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP16, + AArch64::AEK_SHA3, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML})}, {"apple-a17", ARMV8_6A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP16, + AArch64::AEK_SHA3, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML})}, {"apple-m1", ARMV8_5A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP16, + AArch64::AEK_SHA3, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML})}, {"apple-m2", ARMV8_6A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP16, + AArch64::AEK_SHA3, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML})}, {"apple-m3", ARMV8_6A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP16, + AArch64::AEK_SHA3, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML})}, {"apple-s4", ARMV8_3A, AArch64::ExtensionBitset( - {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})}, + {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FULLFP16})}, {"apple-s5", ARMV8_3A, AArch64::ExtensionBitset( - {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})}, + {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FULLFP16})}, {"exynos-m3", ARMV8A, AArch64::ExtensionBitset( {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})}, {"exynos-m4", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_DOTPROD, AArch64::AEK_FP16})}, + AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16})}, {"exynos-m5", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_DOTPROD, AArch64::AEK_FP16})}, + AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16})}, {"falkor", ARMV8A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC, AArch64::AEK_RDM})}, @@ -761,27 +743,27 @@ inline constexpr CpuInfo CpuInfos[] = { {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_CRC})}, {"tsv110", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_PROFILE, AArch64::AEK_JSCVT, AArch64::AEK_FCMA})}, {"a64fx", ARMV8_2A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP16, AArch64::AEK_SVE})}, + AArch64::AEK_FULLFP16, AArch64::AEK_SVE})}, {"carmel", ARMV8_2A, AArch64::ExtensionBitset( - {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16})}, + {AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FULLFP16})}, {"ampere1", ARMV8_6A, AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP16, + AArch64::AEK_SHA3, AArch64::AEK_FULLFP16, AArch64::AEK_SB, AArch64::AEK_SSBS, - AArch64::AEK_RAND})}, + AArch64::AEK_RNG})}, {"ampere1a", ARMV8_6A, AArch64::ExtensionBitset( - {AArch64::AEK_FP16, AArch64::AEK_RAND, AArch64::AEK_SM4, + {AArch64::AEK_FULLFP16, AArch64::AEK_RNG, AArch64::AEK_SM4, AArch64::AEK_SHA3, AArch64::AEK_SHA2, AArch64::AEK_AES, AArch64::AEK_MTE, AArch64::AEK_SB, AArch64::AEK_SSBS})}, {"ampere1b", ARMV8_7A, - AArch64::ExtensionBitset({AArch64::AEK_FP16, AArch64::AEK_RAND, + AArch64::ExtensionBitset({AArch64::AEK_FULLFP16, AArch64::AEK_RNG, AArch64::AEK_SM4, AArch64::AEK_SHA3, AArch64::AEK_SHA2, AArch64::AEK_AES, AArch64::AEK_MTE, AArch64::AEK_SB, diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.def b/llvm/include/llvm/TargetParser/ARMTargetParser.def index b821d224d7a82..75fae04e1b082 100644 --- a/llvm/include/llvm/TargetParser/ARMTargetParser.def +++ b/llvm/include/llvm/TargetParser/ARMTargetParser.def @@ -217,17 +217,17 @@ ARM_ARCH_EXT_NAME("sha2", ARM::AEK_SHA2, "+sha2", "-sha2") ARM_ARCH_EXT_NAME("aes", ARM::AEK_AES, "+aes", "-aes") ARM_ARCH_EXT_NAME("dotprod", ARM::AEK_DOTPROD, "+dotprod", "-dotprod") ARM_ARCH_EXT_NAME("dsp", ARM::AEK_DSP, "+dsp", "-dsp") -ARM_ARCH_EXT_NAME("fp", ARM::AEK_FP, {}, {}) +ARM_ARCH_EXT_NAME("fp", ARM::AEK_FPARMV8, {}, {}) ARM_ARCH_EXT_NAME("fp.dp", ARM::AEK_FP_DP, {}, {}) -ARM_ARCH_EXT_NAME("mve", (ARM::AEK_DSP | ARM::AEK_SIMD), "+mve", "-mve") -ARM_ARCH_EXT_NAME("mve.fp", (ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP), +ARM_ARCH_EXT_NAME("mve", (ARM::AEK_DSP | ARM::AEK_NEON), "+mve", "-mve") +ARM_ARCH_EXT_NAME("mve.fp", (ARM::AEK_DSP | ARM::AEK_NEON | ARM::AEK_FPARMV8), "+mve.fp", "-mve.fp") ARM_ARCH_EXT_NAME("idiv", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB), {}, {}) ARM_ARCH_EXT_NAME("mp", ARM::AEK_MP, {}, {}) -ARM_ARCH_EXT_NAME("simd", ARM::AEK_SIMD, {}, {}) +ARM_ARCH_EXT_NAME("simd", ARM::AEK_NEON, {}, {}) ARM_ARCH_EXT_NAME("sec", ARM::AEK_SEC, {}, {}) ARM_ARCH_EXT_NAME("virt", ARM::AEK_VIRT, {}, {}) -ARM_ARCH_EXT_NAME("fp16", ARM::AEK_FP16, "+fullfp16", "-fullfp16") +ARM_ARCH_EXT_NAME("fp16", ARM::AEK_FULLFP16, "+fullfp16", "-fullfp16") ARM_ARCH_EXT_NAME("ras", ARM::AEK_RAS, "+ras", "-ras") ARM_ARCH_EXT_NAME("os", ARM::AEK_OS, {}, {}) ARM_ARCH_EXT_NAME("iwmmxt", ARM::AEK_IWMMXT, {}, {}) @@ -338,55 +338,55 @@ ARM_CPU_NAME("cortex-m23", ARMV8MBaseline, FK_NONE, false, ARM::AEK_NONE) ARM_CPU_NAME("cortex-m33", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP) ARM_CPU_NAME("cortex-m35p", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP) ARM_CPU_NAME("cortex-m55", ARMV8_1MMainline, FK_FP_ARMV8_FULLFP16_D16, false, - (ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP | ARM::AEK_FP16)) + (ARM::AEK_DSP | ARM::AEK_NEON | ARM::AEK_FPARMV8 | ARM::AEK_FULLFP16)) ARM_CPU_NAME("cortex-m85", ARMV8_1MMainline, FK_FP_ARMV8_FULLFP16_D16, false, - (ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP | ARM::AEK_FP16 | + (ARM::AEK_DSP | ARM::AEK_NEON | ARM::AEK_FPARMV8 | ARM::AEK_FULLFP16 | ARM::AEK_RAS | ARM::AEK_PACBTI)) ARM_CPU_NAME("cortex-m52", ARMV8_1MMainline, FK_FP_ARMV8_FULLFP16_D16, false, - (ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP | ARM::AEK_FP16 | + (ARM::AEK_DSP | ARM::AEK_NEON | ARM::AEK_FPARMV8 | ARM::AEK_FULLFP16 | ARM::AEK_RAS | ARM::AEK_PACBTI)) ARM_CPU_NAME("cortex-a32", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("cortex-a35", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("cortex-a53", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("cortex-a55", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) + (ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("cortex-a57", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("cortex-a72", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("cortex-a73", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("cortex-a75", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) + (ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("cortex-a76", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) + (ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("cortex-a76ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) + (ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("cortex-a77", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) + (ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("cortex-a78", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) + (ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("cortex-a78ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, (ARM::AEK_RAS | ARM::AEK_DOTPROD)) ARM_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - ARM::AEK_FP16 | ARM::AEK_DOTPROD) + ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD) ARM_CPU_NAME("cortex-a710", ARMV9A, FK_NEON_FP_ARMV8, false, (ARM::AEK_DOTPROD | ARM::AEK_FP16FML | ARM::AEK_BF16 | ARM::AEK_SB | ARM::AEK_I8MM)) ARM_CPU_NAME("cortex-x1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) + (ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("cortex-x1c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) + (ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("neoverse-n1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) + (ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("neoverse-n2", ARMV9A, FK_NEON_FP_ARMV8, false, (ARM::AEK_BF16 | ARM::AEK_DOTPROD | ARM::AEK_FP16FML | ARM::AEK_I8MM | ARM::AEK_RAS | ARM::AEK_SB )) ARM_CPU_NAME("neoverse-v1", ARMV8_4A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_BF16 | ARM::AEK_DOTPROD)) + (ARM::AEK_RAS | ARM::AEK_FULLFP16 | ARM::AEK_BF16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("exynos-m3", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) ARM_CPU_NAME("exynos-m4", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) + (ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("exynos-m5", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, - (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) + (ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD)) ARM_CPU_NAME("kryo", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) // Non-standard Arch names. ARM_CPU_NAME("iwmmxt", IWMMXT, FK_NONE, true, ARM::AEK_NONE) diff --git a/llvm/include/llvm/TargetParser/ARMTargetParser.h b/llvm/include/llvm/TargetParser/ARMTargetParser.h index 2b0ef76a6b51f..9b422afaac631 100644 --- a/llvm/include/llvm/TargetParser/ARMTargetParser.h +++ b/llvm/include/llvm/TargetParser/ARMTargetParser.h @@ -33,15 +33,15 @@ enum ArchExtKind : uint64_t { AEK_NONE = 1, AEK_CRC = 1 << 1, AEK_CRYPTO = 1 << 2, - AEK_FP = 1 << 3, + AEK_FPARMV8 = 1 << 3, AEK_HWDIVTHUMB = 1 << 4, AEK_HWDIVARM = 1 << 5, AEK_MP = 1 << 6, - AEK_SIMD = 1 << 7, + AEK_NEON = 1 << 7, AEK_SEC = 1 << 8, AEK_VIRT = 1 << 9, AEK_DSP = 1 << 10, - AEK_FP16 = 1 << 11, + AEK_FULLFP16 = 1 << 11, AEK_RAS = 1 << 12, AEK_DOTPROD = 1 << 13, AEK_SHA2 = 1 << 14, diff --git a/llvm/lib/Target/AArch64/AArch64Features.td b/llvm/lib/Target/AArch64/AArch64Features.td index b6c8e5f160891..7f7eed311bb8f 100644 --- a/llvm/lib/Target/AArch64/AArch64Features.td +++ b/llvm/lib/Target/AArch64/AArch64Features.td @@ -102,7 +102,7 @@ def FeatureVH : SubtargetFeature<"vh", "HasVH", "true", // This SubtargetFeature is special. It controls only whether codegen will turn // `llvm.readcyclecounter()` into an access to a PMUv3 System Register. The // `FEAT_PMUv3*` system registers are always available for assembly/disassembly. -def FeaturePerfMon : Extension<"perfmon", "PerfMon", +def FeaturePMUv3 : Extension<"pmuv3", "PMUv3", "Enable Code Generation for ARMv8 PMUv3 Performance Monitors extension (FEAT_PMUv3)">; def FeatureFullFP16 : Extension<"fullfp16", "FullFP16", @@ -111,7 +111,7 @@ def FeatureFullFP16 : Extension<"fullfp16", "FullFP16", def FeatureFP16FML : Extension<"fp16fml", "FP16FML", "Enable FP16 FML instructions (FEAT_FHM)", [FeatureFullFP16]>; -def FeatureSPE : Extension<"spe", "SPE", +def FeatureProfile : Extension<"profile", "Profile", "Enable Statistical Profiling extension (FEAT_SPE)">; def FeaturePAN_RWV : SubtargetFeature< @@ -329,8 +329,8 @@ def FeaturePAuth : Extension< "pauth", "PAuth", "Enable v8.3-A Pointer Authentication extension (FEAT_PAuth)">; -def FeatureJS : Extension< - "jsconv", "JS", +def FeatureJSCVT : Extension< + "jscvt", "JSCVT", "Enable v8.3-A JavaScript FP conversion instructions (FEAT_JSCVT)", [FeatureFPARMv8]>; @@ -338,8 +338,8 @@ def FeatureCCIDX : SubtargetFeature< "ccidx", "HasCCIDX", "true", "Enable v8.3-A Extend of the CCSIDR number of sets (FEAT_CCIDX)">; -def FeatureComplxNum : Extension< - "complxnum", "ComplxNum", +def FeatureFCMA : Extension< + "fcma", "FCMA", "Enable v8.3-A Floating-point complex number support (FEAT_FCMA)", [FeatureNEON]>; @@ -440,7 +440,7 @@ def FeatureCacheDeepPersist : Extension<"ccdp", "CCDP", def FeatureBranchTargetId : Extension<"bti", "BTI", "Enable Branch Target Identification (FEAT_BTI)" >; -def FeatureRandGen : Extension<"rand", "RandGen", +def FeatureRNG : Extension<"rng", "RNG", "Enable Random Number generation instructions (FEAT_RNG)" >; def FeatureMTE : Extension<"mte", "MTE", @@ -461,13 +461,13 @@ def FeatureTaggedGlobals : SubtargetFeature<"tagged-globals", "true", "Use an instruction sequence for taking the address of a global " "that allows a memory tag in the upper address bits">; -def FeatureMatMulInt8 : Extension<"i8mm", "MatMulInt8", +def FeatureI8MM : Extension<"i8mm", "I8MM", "Enable Matrix Multiply Int8 Extension (FEAT_I8MM)">; -def FeatureMatMulFP32 : Extension<"f32mm", "MatMulFP32", +def FeatureF32MM : Extension<"f32mm", "F32MM", "Enable Matrix Multiply FP32 Extension (FEAT_F32MM)", [FeatureSVE]>; -def FeatureMatMulFP64 : Extension<"f64mm", "MatMulFP64", +def FeatureF64MM : Extension<"f64mm", "F64MM", "Enable Matrix Multiply FP64 Extension (FEAT_F64MM)", [FeatureSVE]>; def FeatureXS : SubtargetFeature<"xs", "HasXS", @@ -592,7 +592,7 @@ def FeatureCLRBHB : SubtargetFeature<"clrbhb", "HasCLRBHB", def FeaturePRFM_SLC : SubtargetFeature<"prfm-slc-target", "HasPRFM_SLC", "true", "Enable SLC target for PRFM instruction">; -def FeatureSPECRES2 : Extension<"specres2", "SPECRES2", +def FeaturePredRes2 : Extension<"predres2", "PredRes2", "Enable Speculation Restriction Instruction (FEAT_SPECRES2)", [FeaturePredRes]>; @@ -661,7 +661,7 @@ def HasV8_2aOps : SubtargetFeature<"v8.2a", "HasV8_2aOps", "true", def HasV8_3aOps : SubtargetFeature<"v8.3a", "HasV8_3aOps", "true", "Support ARM v8.3a instructions", [HasV8_2aOps, FeatureRCPC, FeaturePAuth, - FeatureJS, FeatureCCIDX, FeatureComplxNum]>; + FeatureJSCVT, FeatureCCIDX, FeatureFCMA]>; def HasV8_4aOps : SubtargetFeature<"v8.4a", "HasV8_4aOps", "true", "Support ARM v8.4a instructions", [HasV8_3aOps, FeatureDotProd, @@ -678,7 +678,7 @@ def HasV8_5aOps : SubtargetFeature< def HasV8_6aOps : SubtargetFeature< "v8.6a", "HasV8_6aOps", "true", "Support ARM v8.6a instructions", [HasV8_5aOps, FeatureAMVS, FeatureBF16, FeatureFineGrainedTraps, - FeatureEnhancedCounterVirtualization, FeatureMatMulInt8]>; + FeatureEnhancedCounterVirtualization, FeatureI8MM]>; def HasV8_7aOps : SubtargetFeature< "v8.7a", "HasV8_7aOps", "true", "Support ARM v8.7a instructions", @@ -690,7 +690,7 @@ def HasV8_8aOps : SubtargetFeature< def HasV8_9aOps : SubtargetFeature< "v8.9a", "HasV8_9aOps", "true", "Support ARM v8.9a instructions", - [HasV8_8aOps, FeatureCLRBHB, FeaturePRFM_SLC, FeatureSPECRES2, + [HasV8_8aOps, FeatureCLRBHB, FeaturePRFM_SLC, FeaturePredRes2, FeatureCSSC, FeatureRASv2, FeatureCHK]>; def HasV9_0aOps : SubtargetFeature< diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index 2af679e0755b5..ca1bc068ca51e 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -27705,8 +27705,7 @@ bool AArch64TargetLowering::isTargetCanonicalConstantNode(SDValue Op) const { } bool AArch64TargetLowering::isComplexDeinterleavingSupported() const { - return Subtarget->hasSVE() || Subtarget->hasSVE2() || - Subtarget->hasComplxNum(); + return Subtarget->hasSVE() || Subtarget->hasSVE2() || Subtarget->hasFCMA(); } bool AArch64TargetLowering::isComplexDeinterleavingOperationSupported( @@ -27717,7 +27716,7 @@ bool AArch64TargetLowering::isComplexDeinterleavingOperationSupported( // If the vector is scalable, SVE is enabled, implying support for complex // numbers. Otherwise, we need to ensure complex number support is available - if (!VTy->isScalableTy() && !Subtarget->hasComplxNum()) + if (!VTy->isScalableTy() && !Subtarget->hasFCMA()) return false; auto *ScalarTy = VTy->getScalarType(); diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td index 1f437d0ed6f8d..cad38cf2e6727 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td +++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td @@ -11351,7 +11351,7 @@ class BaseSIMDThreeSameVectorComplex size, bits<3> opcode, //8.3 CompNum - Floating-point complex number support multiclass SIMDThreeSameVectorComplexHSD opcode, Operand rottype, string asm, SDPatternOperator OpNode>{ - let Predicates = [HasComplxNum, HasNEON, HasFullFP16] in { + let Predicates = [HasFCMA, HasNEON, HasFullFP16] in { def v4f16 : BaseSIMDThreeSameVectorComplex<0, U, 0b01, opcode, V64, rottype, asm, ".4h", [(set (v4f16 V64:$dst), (OpNode (v4f16 V64:$Rd), @@ -11367,7 +11367,7 @@ multiclass SIMDThreeSameVectorComplexHSD opcode, Operand rottype, (i32 rottype:$rot)))]>; } - let Predicates = [HasComplxNum, HasNEON] in { + let Predicates = [HasFCMA, HasNEON] in { def v2f32 : BaseSIMDThreeSameVectorComplex<0, U, 0b10, opcode, V64, rottype, asm, ".2s", [(set (v2f32 V64:$dst), (OpNode (v2f32 V64:$Rd), @@ -11423,7 +11423,7 @@ class BaseSIMDThreeSameVectorTiedComplex size, multiclass SIMDThreeSameVectorTiedComplexHSD opcode, Operand rottype, string asm, SDPatternOperator OpNode> { - let Predicates = [HasComplxNum, HasNEON, HasFullFP16] in { + let Predicates = [HasFCMA, HasNEON, HasFullFP16] in { def v4f16 : BaseSIMDThreeSameVectorTiedComplex<0, U, 0b01, opcode, V64, rottype, asm, ".4h", [(set (v4f16 V64:$dst), (OpNode (v4f16 V64:$Rd), @@ -11439,7 +11439,7 @@ multiclass SIMDThreeSameVectorTiedComplexHSD opcode, (i32 rottype:$rot)))]>; } - let Predicates = [HasComplxNum, HasNEON] in { + let Predicates = [HasFCMA, HasNEON] in { def v2f32 : BaseSIMDThreeSameVectorTiedComplex<0, U, 0b10, opcode, V64, rottype, asm, ".2s", [(set (v2f32 V64:$dst), (OpNode (v2f32 V64:$Rd), @@ -11505,7 +11505,7 @@ class BaseSIMDIndexedTiedComplex size, // classes. multiclass SIMDIndexedTiedComplexHSD { - let Predicates = [HasComplxNum, HasNEON, HasFullFP16] in { + let Predicates = [HasFCMA, HasNEON, HasFullFP16] in { def v4f16_indexed : BaseSIMDIndexedTiedComplex<0, 1, 0, 0b01, opc1, opc2, V64, V64, V128, VectorIndexD, rottype, asm, ".4h", ".4h", ".4h", ".h", []> { @@ -11521,9 +11521,9 @@ multiclass SIMDIndexedTiedComplexHSD { @@ -11531,7 +11531,7 @@ multiclass SIMDIndexedTiedComplexHSDhasPAuth()">, def HasPAuthLR : Predicate<"Subtarget->hasPAuthLR()">, AssemblerPredicateWithAll<(all_of FeaturePAuthLR), "pauth-lr">; -def HasJS : Predicate<"Subtarget->hasJS()">, - AssemblerPredicateWithAll<(all_of FeatureJS), "jsconv">; +def HasJSCVT : Predicate<"Subtarget->hasJSCVT()">, + AssemblerPredicateWithAll<(all_of FeatureJSCVT), "jscvt">; def HasCCIDX : Predicate<"Subtarget->hasCCIDX()">, AssemblerPredicateWithAll<(all_of FeatureCCIDX), "ccidx">; -def HasComplxNum : Predicate<"Subtarget->hasComplxNum()">, - AssemblerPredicateWithAll<(all_of FeatureComplxNum), "complxnum">; +def HasFCMA : Predicate<"Subtarget->hasFCMA()">, + AssemblerPredicateWithAll<(all_of FeatureFCMA), "fcma">; def HasNV : Predicate<"Subtarget->hasNV()">, AssemblerPredicateWithAll<(all_of FeatureNV), "nv">; @@ -136,8 +136,8 @@ def HasFullFP16 : Predicate<"Subtarget->hasFullFP16()">, def HasNoFullFP16 : Predicate<"!Subtarget->hasFullFP16()">; def HasFP16FML : Predicate<"Subtarget->hasFP16FML()">, AssemblerPredicateWithAll<(all_of FeatureFP16FML), "fp16fml">; -def HasSPE : Predicate<"Subtarget->hasSPE()">, - AssemblerPredicateWithAll<(all_of FeatureSPE), "spe">; +def HasProfile : Predicate<"Subtarget->hasProfile()">, + AssemblerPredicateWithAll<(all_of FeatureProfile), "profile">; def HasFuseAES : Predicate<"Subtarget->hasFuseAES()">, AssemblerPredicateWithAll<(all_of FeatureFuseAES), "fuse-aes">; @@ -267,12 +267,12 @@ def HasTRBE : Predicate<"Subtarget->hasTRBE()">, def HasBF16 : Predicate<"Subtarget->hasBF16()">, AssemblerPredicateWithAll<(all_of FeatureBF16), "bf16">; def HasNoBF16 : Predicate<"!Subtarget->hasBF16()">; -def HasMatMulInt8 : Predicate<"Subtarget->hasMatMulInt8()">, - AssemblerPredicateWithAll<(all_of FeatureMatMulInt8), "i8mm">; -def HasMatMulFP32 : Predicate<"Subtarget->hasMatMulFP32()">, - AssemblerPredicateWithAll<(all_of FeatureMatMulFP32), "f32mm">; -def HasMatMulFP64 : Predicate<"Subtarget->hasMatMulFP64()">, - AssemblerPredicateWithAll<(all_of FeatureMatMulFP64), "f64mm">; +def HasI8MM : Predicate<"Subtarget->hasI8MM()">, + AssemblerPredicateWithAll<(all_of FeatureI8MM), "i8mm">; +def HasF32MM : Predicate<"Subtarget->hasF32MM()">, + AssemblerPredicateWithAll<(all_of FeatureF32MM), "f32mm">; +def HasF64MM : Predicate<"Subtarget->hasF64MM()">, + AssemblerPredicateWithAll<(all_of FeatureF64MM), "f64mm">; def HasXS : Predicate<"Subtarget->hasXS()">, AssemblerPredicateWithAll<(all_of FeatureXS), "xs">; def HasWFxT : Predicate<"Subtarget->hasWFxT()">, @@ -289,8 +289,8 @@ def HasMOPS : Predicate<"Subtarget->hasMOPS()">, AssemblerPredicateWithAll<(all_of FeatureMOPS), "mops">; def HasCLRBHB : Predicate<"Subtarget->hasCLRBHB()">, AssemblerPredicateWithAll<(all_of FeatureCLRBHB), "clrbhb">; -def HasSPECRES2 : Predicate<"Subtarget->hasSPECRES2()">, - AssemblerPredicateWithAll<(all_of FeatureSPECRES2), "specres2">; +def HasPredRes2 : Predicate<"Subtarget->hasPredRes2()">, + AssemblerPredicateWithAll<(all_of FeaturePredRes2), "predres2">; def HasITE : Predicate<"Subtarget->hasITE()">, AssemblerPredicateWithAll<(all_of FeatureITE), "ite">; def HasTHE : Predicate<"Subtarget->hasTHE()">, @@ -1165,7 +1165,7 @@ def : InstAlias<"bti", (HINT 32)>, Requires<[HasBTI]>; def : InstAlias<"bti $op", (HINT btihint_op:$op)>, Requires<[HasBTI]>; // v8.2a Statistical Profiling extension -def : InstAlias<"psb $op", (HINT psbhint_op:$op)>, Requires<[HasSPE]>; +def : InstAlias<"psb $op", (HINT psbhint_op:$op)>, Requires<[HasProfile]>; // As far as LLVM is concerned this writes to the system's exclusive monitors. let mayLoad = 1, mayStore = 1 in @@ -1329,7 +1329,7 @@ def : Pat<(bf16 (any_fpround (f32 FPR32:$Rn))), (BFCVT $Rn)>; } // ARMv8.6A AArch64 matrix multiplication -let Predicates = [HasMatMulInt8] in { +let Predicates = [HasI8MM] in { def SMMLA : SIMDThreeSameVectorMatMul<0, 0, "smmla", int_aarch64_neon_smmla>; def UMMLA : SIMDThreeSameVectorMatMul<0, 1, "ummla", int_aarch64_neon_ummla>; def USMMLA : SIMDThreeSameVectorMatMul<1, 0, "usmmla", int_aarch64_neon_usmmla>; @@ -1499,7 +1499,7 @@ defm FCADD : SIMDThreeSameVectorComplexHSD<1, 0b111, complexrotateopodd, "fcadd", null_frag>; defm FCMLA : SIMDIndexedTiedComplexHSD<0, 1, complexrotateop, "fcmla">; -let Predicates = [HasComplxNum, HasNEON, HasFullFP16] in { +let Predicates = [HasFCMA, HasNEON, HasFullFP16] in { def : Pat<(v4f16 (int_aarch64_neon_vcadd_rot90 (v4f16 V64:$Rn), (v4f16 V64:$Rm))), (FCADDv4f16 (v4f16 V64:$Rn), (v4f16 V64:$Rm), (i32 0))>; def : Pat<(v4f16 (int_aarch64_neon_vcadd_rot270 (v4f16 V64:$Rn), (v4f16 V64:$Rm))), @@ -1510,7 +1510,7 @@ let Predicates = [HasComplxNum, HasNEON, HasFullFP16] in { (FCADDv8f16 (v8f16 V128:$Rn), (v8f16 V128:$Rm), (i32 1))>; } -let Predicates = [HasComplxNum, HasNEON] in { +let Predicates = [HasFCMA, HasNEON] in { def : Pat<(v2f32 (int_aarch64_neon_vcadd_rot90 (v2f32 V64:$Rn), (v2f32 V64:$Rm))), (FCADDv2f32 (v2f32 V64:$Rn), (v2f32 V64:$Rm), (i32 0))>; def : Pat<(v2f32 (int_aarch64_neon_vcadd_rot270 (v2f32 V64:$Rn), (v2f32 V64:$Rm))), @@ -1546,7 +1546,7 @@ multiclass FCMLA_LANE_PATS { } -let Predicates = [HasComplxNum, HasNEON, HasFullFP16] in { +let Predicates = [HasFCMA, HasNEON, HasFullFP16] in { defm : FCMLA_PATS; defm : FCMLA_PATS; @@ -1555,7 +1555,7 @@ let Predicates = [HasComplxNum, HasNEON, HasFullFP16] in { defm : FCMLA_LANE_PATS; } -let Predicates = [HasComplxNum, HasNEON] in { +let Predicates = [HasFCMA, HasNEON] in { defm : FCMLA_PATS; defm : FCMLA_PATS; defm : FCMLA_PATS; @@ -1746,13 +1746,13 @@ let Predicates = [HasPAuthLR] in { // v8.3a floating point conversion for javascript -let Predicates = [HasJS, HasFPARMv8], Defs = [NZCV] in +let Predicates = [HasJSCVT, HasFPARMv8], Defs = [NZCV] in def FJCVTZS : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32, "fjcvtzs", [(set GPR32:$Rd, (int_aarch64_fjcvtzs FPR64:$Rn))]> { let Inst{31} = 0; -} // HasJS, HasFPARMv8 +} // HasJSCVT, HasFPARMv8 // v8.4 Flag manipulation instructions let Predicates = [HasFlagM], Defs = [NZCV], Uses = [NZCV] in { diff --git a/llvm/lib/Target/AArch64/AArch64Processors.td b/llvm/lib/Target/AArch64/AArch64Processors.td index f2286ae17dba5..cb19a8d1dc14b 100644 --- a/llvm/lib/Target/AArch64/AArch64Processors.td +++ b/llvm/lib/Target/AArch64/AArch64Processors.td @@ -624,7 +624,7 @@ def ProcessorFeatures { FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureRCPC, FeaturePerfMon]; list A510 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon, - FeatureMatMulInt8, FeatureBF16, FeatureAM, + FeatureI8MM, FeatureBF16, FeatureAM, FeatureMTE, FeatureETE, FeatureSVE2BitPerm, FeatureFP16FML]; list A520 = [HasV9_2aOps, FeaturePerfMon, FeatureAM, @@ -645,65 +645,65 @@ def ProcessorFeatures { FeatureRCPC, FeaturePerfMon, FeatureSSBS]; list A78 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureFullFP16, FeatureDotProd, - FeatureRCPC, FeaturePerfMon, FeatureSPE, + FeatureRCPC, FeaturePerfMon, FeatureProfile, FeatureSSBS]; list A78AE = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureFullFP16, FeatureDotProd, - FeatureRCPC, FeaturePerfMon, FeatureSPE, + FeatureRCPC, FeaturePerfMon, FeatureProfile, FeatureSSBS]; list A78C = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureFullFP16, FeatureDotProd, FeatureFlagM, FeaturePAuth, - FeaturePerfMon, FeatureRCPC, FeatureSPE, + FeaturePerfMon, FeatureRCPC, FeatureProfile, FeatureSSBS]; list A710 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon, FeatureETE, FeatureMTE, FeatureFP16FML, - FeatureSVE2BitPerm, FeatureBF16, FeatureMatMulInt8]; + FeatureSVE2BitPerm, FeatureBF16, FeatureI8MM]; list A715 = [HasV9_0aOps, FeatureNEON, FeatureMTE, FeatureFP16FML, FeatureSVE, FeatureTRBE, FeatureSVE2BitPerm, FeatureBF16, FeatureETE, - FeaturePerfMon, FeatureMatMulInt8, FeatureSPE]; + FeaturePerfMon, FeatureI8MM, FeatureProfile]; list A720 = [HasV9_2aOps, FeatureMTE, FeatureFP16FML, FeatureTRBE, FeatureSVE2BitPerm, FeatureETE, - FeaturePerfMon, FeatureSPE, FeatureSPE_EEF]; + FeaturePerfMon, FeatureProfile, FeatureSPE_EEF]; list A720AE = [HasV9_2aOps, FeatureMTE, FeatureFP16FML, FeatureTRBE, FeatureSVE2BitPerm, FeatureETE, - FeaturePerfMon, FeatureSPE, FeatureSPE_EEF]; + FeaturePerfMon, FeatureProfile, FeatureSPE_EEF]; list R82 = [HasV8_0rOps, FeaturePerfMon, FeatureFullFP16, FeatureFP16FML, FeatureSSBS, FeaturePredRes, FeatureSB, FeatureRDM, FeatureDotProd, - FeatureComplxNum, FeatureJS, + FeatureFCMA, FeatureJSCVT, FeatureCacheDeepPersist]; list R82AE = [HasV8_0rOps, FeaturePerfMon, FeatureFullFP16, FeatureFP16FML, FeatureSSBS, FeaturePredRes, FeatureSB, FeatureRDM, FeatureDotProd, - FeatureComplxNum, FeatureJS, + FeatureFCMA, FeatureJSCVT, FeatureCacheDeepPersist]; list X1 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureRCPC, FeaturePerfMon, - FeatureSPE, FeatureFullFP16, FeatureDotProd, + FeatureProfile, FeatureFullFP16, FeatureDotProd, FeatureSSBS]; list X1C = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, FeatureNEON, FeatureRCPC_IMMO, FeaturePerfMon, - FeatureSPE, FeatureFullFP16, FeatureDotProd, + FeatureProfile, FeatureFullFP16, FeatureDotProd, FeaturePAuth, FeatureSSBS, FeatureFlagM, FeatureLSE2]; list X2 = [HasV9_0aOps, FeatureNEON, FeaturePerfMon, - FeatureMatMulInt8, FeatureBF16, FeatureAM, + FeatureI8MM, FeatureBF16, FeatureAM, FeatureMTE, FeatureETE, FeatureSVE2BitPerm, FeatureFP16FML]; list X3 = [HasV9_0aOps, FeatureSVE, FeatureNEON, FeaturePerfMon, FeatureETE, FeatureTRBE, - FeatureSPE, FeatureBF16, FeatureMatMulInt8, + FeatureProfile, FeatureBF16, FeatureI8MM, FeatureMTE, FeatureSVE2BitPerm, FeatureFullFP16, FeatureFP16FML]; list X4 = [HasV9_2aOps, FeaturePerfMon, FeatureETE, FeatureTRBE, - FeatureSPE, FeatureMTE, FeatureSVE2BitPerm, + FeatureProfile, FeatureMTE, FeatureSVE2BitPerm, FeatureFP16FML, FeatureSPE_EEF]; list A64FX = [HasV8_2aOps, FeatureFPARMv8, FeatureNEON, FeatureSHA2, FeaturePerfMon, FeatureFullFP16, - FeatureSVE, FeatureComplxNum]; + FeatureSVE, FeatureFCMA]; list Carmel = [HasV8_2aOps, FeatureNEON, FeatureCrypto, FeatureFullFP16]; list AppleA7 = [HasV8_0aOps, FeatureCrypto, FeatureFPARMv8, @@ -747,40 +747,40 @@ def ProcessorFeatures { FeatureRCPC, FeatureSSBS, FeaturePerfMon]; list NeoverseN1 = [HasV8_2aOps, FeatureCrypto, FeatureDotProd, FeatureFPARMv8, FeatureFullFP16, FeatureNEON, - FeatureRCPC, FeatureSPE, FeatureSSBS, + FeatureRCPC, FeatureProfile, FeatureSSBS, FeaturePerfMon]; list NeoverseN2 = [HasV9_0aOps, FeatureBF16, FeatureETE, FeatureFP16FML, - FeatureMatMulInt8, FeatureMTE, FeatureSVE2, + FeatureI8MM, FeatureMTE, FeatureSVE2, FeatureSVE2BitPerm, FeatureTRBE, FeaturePerfMon]; list NeoverseN3 = [HasV9_2aOps, FeatureETE, FeatureFP16FML, FeatureFullFP16, FeatureMTE, FeaturePerfMon, - FeatureRandGen, FeatureSPE, FeatureSPE_EEF, + FeatureRNG, FeatureProfile, FeatureSPE_EEF, FeatureSVE2BitPerm]; list Neoverse512TVB = [HasV8_4aOps, FeatureBF16, FeatureCacheDeepPersist, FeatureCrypto, FeatureFPARMv8, FeatureFP16FML, - FeatureFullFP16, FeatureMatMulInt8, FeatureNEON, - FeaturePerfMon, FeatureRandGen, FeatureSPE, + FeatureFullFP16, FeatureI8MM, FeatureNEON, + FeaturePerfMon, FeatureRNG, FeatureProfile, FeatureSSBS, FeatureSVE]; list NeoverseV1 = [HasV8_4aOps, FeatureBF16, FeatureCacheDeepPersist, FeatureCrypto, FeatureFPARMv8, FeatureFP16FML, - FeatureFullFP16, FeatureMatMulInt8, FeatureNEON, - FeaturePerfMon, FeatureRandGen, FeatureSPE, + FeatureFullFP16, FeatureI8MM, FeatureNEON, + FeaturePerfMon, FeatureRNG, FeatureProfile, FeatureSSBS, FeatureSVE]; - list NeoverseV2 = [HasV9_0aOps, FeatureBF16, FeatureSPE, - FeaturePerfMon, FeatureETE, FeatureMatMulInt8, + list NeoverseV2 = [HasV9_0aOps, FeatureBF16, FeatureProfile, + FeaturePerfMon, FeatureETE, FeatureI8MM, FeatureNEON, FeatureSVE2BitPerm, FeatureFP16FML, - FeatureMTE, FeatureRandGen]; + FeatureMTE, FeatureRNG]; list NeoverseV3 = [HasV9_2aOps, FeatureETE, FeatureFP16FML, FeatureFullFP16, FeatureLS64, FeatureMTE, - FeaturePerfMon, FeatureRandGen, FeatureSPE, + FeaturePerfMon, FeatureRNG, FeatureProfile, FeatureSPE_EEF, FeatureSVE2BitPerm, FeatureBRBE]; list NeoverseV3AE = [HasV9_2aOps, FeatureETE, FeatureFP16FML, FeatureFullFP16, FeatureLS64, FeatureMTE, - FeaturePerfMon, FeatureRandGen, FeatureSPE, + FeaturePerfMon, FeatureRNG, FeatureProfile, FeatureSPE_EEF, FeatureSVE2BitPerm, FeatureBRBE]; list Saphira = [HasV8_4aOps, FeatureCrypto, FeatureFPARMv8, - FeatureNEON, FeatureSPE, FeaturePerfMon]; + FeatureNEON, FeatureProfile, FeaturePerfMon]; list ThunderX = [HasV8_0aOps, FeatureCRC, FeatureCrypto, FeatureFPARMv8, FeaturePerfMon, FeatureNEON]; list ThunderX2T99 = [HasV8_1aOps, FeatureCRC, FeatureCrypto, @@ -789,18 +789,18 @@ def ProcessorFeatures { FeatureFPARMv8, FeatureNEON, FeatureLSE, FeaturePAuth, FeaturePerfMon]; list TSV110 = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8, - FeatureNEON, FeaturePerfMon, FeatureSPE, + FeatureNEON, FeaturePerfMon, FeatureProfile, FeatureFullFP16, FeatureFP16FML, FeatureDotProd, - FeatureJS, FeatureComplxNum]; + FeatureJSCVT, FeatureFCMA]; list Ampere1 = [HasV8_6aOps, FeatureNEON, FeaturePerfMon, - FeatureSSBS, FeatureRandGen, FeatureSB, + FeatureSSBS, FeatureRNG, FeatureSB, FeatureSHA2, FeatureSHA3, FeatureAES]; list Ampere1A = [HasV8_6aOps, FeatureNEON, FeaturePerfMon, - FeatureMTE, FeatureSSBS, FeatureRandGen, + FeatureMTE, FeatureSSBS, FeatureRNG, FeatureSB, FeatureSM4, FeatureSHA2, FeatureSHA3, FeatureAES]; list Ampere1B = [HasV8_7aOps, FeatureNEON, FeaturePerfMon, - FeatureMTE, FeatureSSBS, FeatureRandGen, + FeatureMTE, FeatureSSBS, FeatureRNG, FeatureSB, FeatureSM4, FeatureSHA2, FeatureSHA3, FeatureAES, FeatureCSSC, FeatureWFxT, FeatureFullFP16]; diff --git a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td index 62e68de1359f7..e6e613262a644 100644 --- a/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td @@ -3388,23 +3388,23 @@ let Predicates = [HasSVEorSME] in { (SUB_ZPmZ_D PPR:$pred, ZPR:$op, (DUP_ZI_D 255, 0))>; } // End HasSVEorSME -let Predicates = [HasSVE, HasMatMulInt8] in { +let Predicates = [HasSVE, HasI8MM] in { defm SMMLA_ZZZ : sve_int_matmul<0b00, "smmla", int_aarch64_sve_smmla>; defm UMMLA_ZZZ : sve_int_matmul<0b11, "ummla", int_aarch64_sve_ummla>; defm USMMLA_ZZZ : sve_int_matmul<0b10, "usmmla", int_aarch64_sve_usmmla>; -} // End HasSVE, HasMatMulInt8 +} // End HasSVE, HasI8MM -let Predicates = [HasSVEorSME, HasMatMulInt8] in { +let Predicates = [HasSVEorSME, HasI8MM] in { defm USDOT_ZZZ : sve_int_dot_mixed<"usdot", int_aarch64_sve_usdot>; defm USDOT_ZZZI : sve_int_dot_mixed_indexed<0, "usdot", int_aarch64_sve_usdot_lane>; defm SUDOT_ZZZI : sve_int_dot_mixed_indexed<1, "sudot", int_aarch64_sve_sudot_lane>; -} // End HasSVEorSME, HasMatMulInt8 +} // End HasSVEorSME, HasI8MM -let Predicates = [HasSVE, HasMatMulFP32] in { +let Predicates = [HasSVE, HasF32MM] in { defm FMMLA_ZZZ_S : sve_fp_matrix_mla<0, "fmmla", ZPR32, int_aarch64_sve_fmmla, nxv4f32>; -} // End HasSVE, HasMatMulFP32 +} // End HasSVE, HasF32MM -let Predicates = [HasSVE, HasMatMulFP64] in { +let Predicates = [HasSVE, HasF64MM] in { defm FMMLA_ZZZ_D : sve_fp_matrix_mla<1, "fmmla", ZPR64, int_aarch64_sve_fmmla, nxv2f64>; defm LD1RO_B_IMM : sve_mem_ldor_si<0b00, "ld1rob", Z_b, ZPR8, nxv16i8, nxv16i1, AArch64ld1ro_z>; defm LD1RO_H_IMM : sve_mem_ldor_si<0b01, "ld1roh", Z_h, ZPR16, nxv8i16, nxv8i1, AArch64ld1ro_z>; @@ -3414,16 +3414,16 @@ let Predicates = [HasSVE, HasMatMulFP64] in { defm LD1RO_H : sve_mem_ldor_ss<0b01, "ld1roh", Z_h, ZPR16, GPR64NoXZRshifted16, nxv8i16, nxv8i1, AArch64ld1ro_z, am_sve_regreg_lsl1>; defm LD1RO_W : sve_mem_ldor_ss<0b10, "ld1row", Z_s, ZPR32, GPR64NoXZRshifted32, nxv4i32, nxv4i1, AArch64ld1ro_z, am_sve_regreg_lsl2>; defm LD1RO_D : sve_mem_ldor_ss<0b11, "ld1rod", Z_d, ZPR64, GPR64NoXZRshifted64, nxv2i64, nxv2i1, AArch64ld1ro_z, am_sve_regreg_lsl3>; -} // End HasSVE, HasMatMulFP64 +} // End HasSVE, HasF64MM -let Predicates = [HasSVEorSME, HasMatMulFP64] in { +let Predicates = [HasSVEorSME, HasF64MM] in { defm ZIP1_ZZZ_Q : sve_int_perm_bin_perm_128_zz<0b00, 0, "zip1", int_aarch64_sve_zip1q>; defm ZIP2_ZZZ_Q : sve_int_perm_bin_perm_128_zz<0b00, 1, "zip2", int_aarch64_sve_zip2q>; defm UZP1_ZZZ_Q : sve_int_perm_bin_perm_128_zz<0b01, 0, "uzp1", int_aarch64_sve_uzp1q>; defm UZP2_ZZZ_Q : sve_int_perm_bin_perm_128_zz<0b01, 1, "uzp2", int_aarch64_sve_uzp2q>; defm TRN1_ZZZ_Q : sve_int_perm_bin_perm_128_zz<0b11, 0, "trn1", int_aarch64_sve_trn1q>; defm TRN2_ZZZ_Q : sve_int_perm_bin_perm_128_zz<0b11, 1, "trn2", int_aarch64_sve_trn2q>; -} // End HasSVEorSME, HasMatMulFP64 +} // End HasSVEorSME, HasF64MM let Predicates = [HasSVE2orSME] in { // SVE2 integer multiply-add (indexed) diff --git a/llvm/lib/Target/AArch64/AArch64SchedA64FX.td b/llvm/lib/Target/AArch64/AArch64SchedA64FX.td index d6fe84a2c9c9b..eca3a08d9bcd9 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedA64FX.td +++ b/llvm/lib/Target/AArch64/AArch64SchedA64FX.td @@ -21,7 +21,7 @@ def A64FXModel : SchedMachineModel { let CompleteModel = 1; list UnsupportedFeatures = !listconcat(SMEUnsupported.F, SVEUnsupported.F, - [HasMTE, HasMatMulInt8, HasBF16, + [HasMTE, HasI8MM, HasBF16, HasPAuth, HasPAuthLR, HasCPA, HasCSSC]); let FullInstRWOverlapCheck = 0; diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td b/llvm/lib/Target/AArch64/AArch64SystemOperands.td index 0564741c49700..c654524362aba 100644 --- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td +++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td @@ -840,7 +840,7 @@ def : ROSysReg<"ERXFR_EL1", 0b11, 0b000, 0b0101, 0b0100, 0b000>; // v8.5a "random number" registers // Op0 Op1 CRn CRm Op2 -let Requires = [{ {AArch64::FeatureRandGen} }] in { +let Requires = [{ {AArch64::FeatureRNG} }] in { def : ROSysReg<"RNDR", 0b11, 0b011, 0b0010, 0b0100, 0b000>; def : ROSysReg<"RNDRRS", 0b11, 0b011, 0b0010, 0b0100, 0b001>; } @@ -1446,7 +1446,7 @@ def : RWSysReg<"UAO", 0b11, 0b000, 0b0100, 0b0010, 0b100>; // v8.2a "Statistical Profiling extension" registers // Op0 Op1 CRn CRm Op2 -let Requires = [{ {AArch64::FeatureSPE} }] in { +let Requires = [{ {AArch64::FeatureProfile} }] in { def : RWSysReg<"PMBLIMITR_EL1", 0b11, 0b000, 0b1001, 0b1010, 0b000>; def : RWSysReg<"PMBPTR_EL1", 0b11, 0b000, 0b1001, 0b1010, 0b001>; def : RWSysReg<"PMBSR_EL1", 0b11, 0b000, 0b1001, 0b1010, 0b011>; diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp index c9bba9bf63142..6da0c95c0bbbb 100644 --- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp +++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp @@ -3661,7 +3661,7 @@ static const struct Extension { {"rasv2", {AArch64::FeatureRASv2}}, {"lse", {AArch64::FeatureLSE}}, {"predres", {AArch64::FeaturePredRes}}, - {"predres2", {AArch64::FeatureSPECRES2}}, + {"predres2", {AArch64::FeaturePredRes2}}, {"ccdp", {AArch64::FeatureCacheDeepPersist}}, {"mte", {AArch64::FeatureMTE}}, {"memtag", {AArch64::FeatureMTE}}, @@ -3670,7 +3670,7 @@ static const struct Extension { {"pan-rwv", {AArch64::FeaturePAN_RWV}}, {"ccpp", {AArch64::FeatureCCPP}}, {"rcpc", {AArch64::FeatureRCPC}}, - {"rng", {AArch64::FeatureRandGen}}, + {"rng", {AArch64::FeatureRNG}}, {"sve", {AArch64::FeatureSVE}}, {"sve2", {AArch64::FeatureSVE2}}, {"sve2-aes", {AArch64::FeatureSVE2AES}}, @@ -3701,15 +3701,15 @@ static const struct Extension { {"rcpc3", {AArch64::FeatureRCPC3}}, {"gcs", {AArch64::FeatureGCS}}, {"bf16", {AArch64::FeatureBF16}}, - {"compnum", {AArch64::FeatureComplxNum}}, + {"compnum", {AArch64::FeatureFCMA}}, {"dotprod", {AArch64::FeatureDotProd}}, - {"f32mm", {AArch64::FeatureMatMulFP32}}, - {"f64mm", {AArch64::FeatureMatMulFP64}}, + {"f32mm", {AArch64::FeatureF32MM}}, + {"f64mm", {AArch64::FeatureF64MM}}, {"fp16", {AArch64::FeatureFullFP16}}, {"fp16fml", {AArch64::FeatureFP16FML}}, - {"i8mm", {AArch64::FeatureMatMulInt8}}, + {"i8mm", {AArch64::FeatureI8MM}}, {"lor", {AArch64::FeatureLOR}}, - {"profile", {AArch64::FeatureSPE}}, + {"profile", {AArch64::FeatureProfile}}, // "rdma" is the name documented by binutils for the feature, but // binutils also accepts incomplete prefixes of features, so "rdm" // works too. Support both spellings here. @@ -3731,7 +3731,7 @@ static const struct Extension { {"sme-lutv2", {AArch64::FeatureSME_LUTv2}}, {"sme-f8f16", {AArch64::FeatureSMEF8F16}}, {"sme-f8f32", {AArch64::FeatureSMEF8F32}}, - {"sme-fa64", {AArch64::FeatureSMEFA64}}, + {"sme-fa64", {AArch64::FeatureSMEFA64}}, {"cpa", {AArch64::FeatureCPA}}, {"tlbiw", {AArch64::FeatureTLBIW}}, }; @@ -3863,9 +3863,9 @@ bool AArch64AsmParser::parseSysAlias(StringRef Name, SMLoc NameLoc, bool hasAll = getSTI().hasFeature(AArch64::FeatureAll); bool hasPredres = hasAll || getSTI().hasFeature(AArch64::FeaturePredRes); - bool hasSpecres2 = hasAll || getSTI().hasFeature(AArch64::FeatureSPECRES2); + bool hasPredRes2 = hasAll || getSTI().hasFeature(AArch64::FeaturePredRes2); - if (Mnemonic == "cosp" && !hasSpecres2) + if (Mnemonic == "cosp" && !hasPredRes2) return TokError("COSP requires: predres2"); if (!hasPredres) return TokError(Mnemonic.upper() + "RCTX requires: predres"); diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp index c5de5b4de4aef..3009b573b2dee 100644 --- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp +++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp @@ -938,7 +938,7 @@ bool AArch64InstPrinter::printSysAlias(const MCInst *MI, return false; const auto Requires = - Op2Val == 6 ? AArch64::FeatureSPECRES2 : AArch64::FeaturePredRes; + Op2Val == 6 ? AArch64::FeaturePredRes2 : AArch64::FeaturePredRes; if (!(STI.hasFeature(AArch64::FeatureAll) || STI.hasFeature(Requires))) return false; diff --git a/llvm/lib/Target/ARM/ARMFeatures.td b/llvm/lib/Target/ARM/ARMFeatures.td index 84481af650be7..a855c1e41a5d4 100644 --- a/llvm/lib/Target/ARM/ARMFeatures.td +++ b/llvm/lib/Target/ARM/ARMFeatures.td @@ -513,7 +513,7 @@ def FeatureBF16 : SubtargetFeature<"bf16", "HasBF16", "true", "Enable support for BFloat16 instructions", [FeatureNEON]>; // True if subtarget supports 8-bit integer matrix multiply. -def FeatureMatMulInt8 : SubtargetFeature<"i8mm", "HasMatMulInt8", +def FeatureI8MM : SubtargetFeature<"i8mm", "HasI8MM", "true", "Enable Matrix Multiply Int8 Extension", [FeatureNEON]>; // Armv8.1-M extensions @@ -664,7 +664,7 @@ def HasV8_5aOps : SubtargetFeature<"v8.5a", "HasV8_5aOps", "true", def HasV8_6aOps : SubtargetFeature<"v8.6a", "HasV8_6aOps", "true", "Support ARM v8.6a instructions", [HasV8_5aOps, FeatureBF16, - FeatureMatMulInt8]>; + FeatureI8MM]>; def HasV8_7aOps : SubtargetFeature<"v8.7a", "HasV8_7aOps", "true", "Support ARM v8.7a instructions", diff --git a/llvm/lib/Target/ARM/ARMInstrNEON.td b/llvm/lib/Target/ARM/ARMInstrNEON.td index 21a5817252aea..e472a4dcad1f6 100644 --- a/llvm/lib/Target/ARM/ARMInstrNEON.td +++ b/llvm/lib/Target/ARM/ARMInstrNEON.td @@ -4868,7 +4868,7 @@ defm VSDOTQI : DOTI<"vsdot", "s8", 0b1, 0b0, QPR, v4i32, v16i8, int_arm_neon_sdot, (EXTRACT_SUBREG QPR:$Vm, dsub_0)>; // v8.6A matrix multiplication extension -let Predicates = [HasMatMulInt8] in { +let Predicates = [HasI8MM] in { class N3VMatMul : N3Vnp<{0b1100, B}, 0b10, 0b1100, 1, U, (outs QPR:$dst), diff --git a/llvm/lib/Target/ARM/ARMPredicates.td b/llvm/lib/Target/ARM/ARMPredicates.td index ddc5ad8754eee..c86778c444b47 100644 --- a/llvm/lib/Target/ARM/ARMPredicates.td +++ b/llvm/lib/Target/ARM/ARMPredicates.td @@ -117,8 +117,8 @@ def HasFP16FML : Predicate<"Subtarget->hasFP16FML()">, AssemblerPredicate<(all_of FeatureFP16FML),"full half-float fml">; def HasBF16 : Predicate<"Subtarget->hasBF16()">, AssemblerPredicate<(all_of FeatureBF16),"BFloat16 floating point extension">; -def HasMatMulInt8 : Predicate<"Subtarget->hasMatMulInt8()">, - AssemblerPredicate<(all_of FeatureMatMulInt8),"8-bit integer matrix multiply">; +def HasI8MM : Predicate<"Subtarget->hasI8MM()">, + AssemblerPredicate<(all_of FeatureI8MM),"8-bit integer matrix multiply">; def HasDivideInThumb : Predicate<"Subtarget->hasDivideInThumbMode()">, AssemblerPredicate<(all_of FeatureHWDivThumb), "divide in THUMB">; def HasDivideInARM : Predicate<"Subtarget->hasDivideInARMMode()">, diff --git a/llvm/lib/Target/ARM/ARMProcessors.td b/llvm/lib/Target/ARM/ARMProcessors.td index 2c55949764003..38310044bd975 100644 --- a/llvm/lib/Target/ARM/ARMProcessors.td +++ b/llvm/lib/Target/ARM/ARMProcessors.td @@ -502,7 +502,7 @@ def : ProcNoItin<"cortex-a710", [ARMv9a, ProcA710, FeatureHWDivARM, FeatureFP16FML, FeatureBF16, - FeatureMatMulInt8, + FeatureI8MM, FeatureSB]>; def : ProcNoItin<"cortex-x1", [ARMv82a, ProcX1, @@ -528,7 +528,7 @@ def : ProcNoItin<"neoverse-v1", [ARMv84a, FeatureCRC, FeatureFullFP16, FeatureBF16, - FeatureMatMulInt8]>; + FeatureI8MM]>; def : ProcNoItin<"neoverse-n1", [ARMv82a, FeatureHWDivThumb, @@ -540,7 +540,7 @@ def : ProcNoItin<"neoverse-n1", [ARMv82a, def : ProcNoItin<"neoverse-n2", [ARMv9a, FeatureBF16, FeatureFP16FML, - FeatureMatMulInt8]>; + FeatureI8MM]>; def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift, FeatureHasRetAddrStack, diff --git a/llvm/lib/Target/ARM/ARMScheduleA57.td b/llvm/lib/Target/ARM/ARMScheduleA57.td index 3baac6b233c45..d42ba3928502f 100644 --- a/llvm/lib/Target/ARM/ARMScheduleA57.td +++ b/llvm/lib/Target/ARM/ARMScheduleA57.td @@ -84,7 +84,7 @@ def CortexA57Model : SchedMachineModel { let FullInstRWOverlapCheck = 0; let UnsupportedFeatures = [HasV8_1MMainline, HasMVEInt, HasMVEFloat, IsMClass, - HasFPRegsV8_1M, HasFP16FML, HasMatMulInt8, HasBF16]; + HasFPRegsV8_1M, HasFP16FML, HasI8MM, HasBF16]; } //===----------------------------------------------------------------------===// diff --git a/llvm/lib/Target/ARM/ARMScheduleM55.td b/llvm/lib/Target/ARM/ARMScheduleM55.td index ff05936e8ba45..0a53b302817e4 100644 --- a/llvm/lib/Target/ARM/ARMScheduleM55.td +++ b/llvm/lib/Target/ARM/ARMScheduleM55.td @@ -90,7 +90,7 @@ def CortexM55Model : SchedMachineModel { let FullInstRWOverlapCheck = 1; let CompleteModel = 0; - let UnsupportedFeatures = [IsARM, HasNEON, HasDotProd, HasMatMulInt8, HasZCZ, + let UnsupportedFeatures = [IsARM, HasNEON, HasDotProd, HasI8MM, HasZCZ, IsNotMClass, HasV8, HasV8_3a, HasTrustZone, HasDFB, IsWindows]; } diff --git a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index e54314cc7d00a..fa28377775d40 100644 --- a/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -12916,10 +12916,10 @@ bool ARMAsmParser::enableArchExtFeature(StringRef Name, SMLoc &ExtLoc) { {ARM::AEK_CRYPTO, {Feature_HasV8Bit}, {ARM::FeatureCrypto, ARM::FeatureNEON, ARM::FeatureFPARMv8}}, - {(ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP), + {(ARM::AEK_DSP | ARM::AEK_NEON | ARM::AEK_FPARMV8), {Feature_HasV8_1MMainlineBit}, {ARM::HasMVEFloatOps}}, - {ARM::AEK_FP, + {ARM::AEK_FPARMV8, {Feature_HasV8Bit}, {ARM::FeatureVFP2_SP, ARM::FeatureFPARMv8}}, {(ARM::AEK_HWDIVTHUMB | ARM::AEK_HWDIVARM), @@ -12928,13 +12928,13 @@ bool ARMAsmParser::enableArchExtFeature(StringRef Name, SMLoc &ExtLoc) { {ARM::AEK_MP, {Feature_HasV7Bit, Feature_IsNotMClassBit}, {ARM::FeatureMP}}, - {ARM::AEK_SIMD, + {ARM::AEK_NEON, {Feature_HasV8Bit}, {ARM::FeatureNEON, ARM::FeatureVFP2_SP, ARM::FeatureFPARMv8}}, {ARM::AEK_SEC, {Feature_HasV6KBit}, {ARM::FeatureTrustZone}}, // FIXME: Only available in A-class, isel not predicated {ARM::AEK_VIRT, {Feature_HasV7Bit}, {ARM::FeatureVirtualization}}, - {ARM::AEK_FP16, + {ARM::AEK_FULLFP16, {Feature_HasV8_2aBit}, {ARM::FeatureFPARMv8, ARM::FeatureFullFP16}}, {ARM::AEK_RAS, {Feature_HasV8Bit}, {ARM::FeatureRAS}}, diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp index 1237e50c22fdc..8f537c2f3ef32 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp @@ -247,7 +247,7 @@ void ARMTargetStreamer::emitTargetAttributes(const MCSubtargetInfo &STI) { emitFPU(STI.hasFeature(ARM::FeatureFP64) ? ARM::FK_FPV5_D16 : ARM::FK_FPV5_SP_D16); if (STI.hasFeature(ARM::HasMVEFloatOps)) - emitArchExtension(ARM::AEK_SIMD | ARM::AEK_DSP | ARM::AEK_FP); + emitArchExtension(ARM::AEK_NEON | ARM::AEK_DSP | ARM::AEK_FPARMV8); } } else if (STI.hasFeature(ARM::FeatureVFP4_D16_SP)) emitFPU(STI.hasFeature(ARM::FeatureD32) diff --git a/llvm/lib/TargetParser/AArch64TargetParser.cpp b/llvm/lib/TargetParser/AArch64TargetParser.cpp index 71099462d5ecf..a44b76b7df5bc 100644 --- a/llvm/lib/TargetParser/AArch64TargetParser.cpp +++ b/llvm/lib/TargetParser/AArch64TargetParser.cpp @@ -187,7 +187,7 @@ void AArch64::ExtensionSet::enable(ArchExtKind E) { // architecture version. if (BaseArch) { // +fp16 implies +fp16fml for v8.4A+, but not v9.0-A+ - if (E == AEK_FP16 && BaseArch->is_superset(ARMV8_4A) && + if (E == AEK_FULLFP16 && BaseArch->is_superset(ARMV8_4A) && !BaseArch->is_superset(ARMV9A)) enable(AEK_FP16FML); diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-contract.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-contract.ll index 09672d1be2161..2bf8e0b5a2c42 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-contract.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-contract.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma,+neon -o - | FileCheck %s target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-fast.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-fast.ll index 7692b1cf0aaae..3c7a44290134a 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-fast.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-add-mull-fixed-fast.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma,+neon -o - | FileCheck %s target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-crash.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-crash.ll index 68cb29f8f5c8f..b8e9ab0cb5eeb 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-crash.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-crash.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2 -; RUN: llc %s --mattr=+complxnum -o - | FileCheck %s +; RUN: llc %s --mattr=+fcma -o - | FileCheck %s target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128-ni:1-p2:32:8:8:32-ni:2" target triple = "aarch64-none-linux-gnu" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add.ll index a5c64c0982d0f..a436c2d1f21b7 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-add.ll @@ -1,10 +1,10 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16 -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD -; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16,+sve -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD -; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16,+sve2 -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD -; RUN: llc < %s --global-isel --global-isel-abort=2 --mattr=+complxnum,+neon,+fullfp16 -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI -; RUN: llc < %s --global-isel --global-isel-abort=2 --mattr=+complxnum,+neon,+fullfp16,+sve -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI -; RUN: llc < %s --global-isel --global-isel-abort=2 --mattr=+complxnum,+neon,+fullfp16,+sve2 -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI +; RUN: llc < %s --mattr=+fcma,+neon,+fullfp16 -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD +; RUN: llc < %s --mattr=+fcma,+neon,+fullfp16,+sve -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD +; RUN: llc < %s --mattr=+fcma,+neon,+fullfp16,+sve2 -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD +; RUN: llc < %s --global-isel --global-isel-abort=2 --mattr=+fcma,+neon,+fullfp16 -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI +; RUN: llc < %s --global-isel --global-isel-abort=2 --mattr=+fcma,+neon,+fullfp16,+sve -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI +; RUN: llc < %s --global-isel --global-isel-abort=2 --mattr=+fcma,+neon,+fullfp16,+sve2 -o - 2>&1 | FileCheck %s --check-prefixes=CHECK,CHECK-GI target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-mul.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-mul.ll index fbe913e5472cc..96c7ff996671b 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-mul.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f16-mul.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16 -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma,+neon,+fullfp16 -o - | FileCheck %s target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-add.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-add.ll index c4d0c9364f1be..e59522df634d5 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-add.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-add.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16 -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma,+neon,+fullfp16 -o - | FileCheck %s target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-mul.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-mul.ll index 5f30d9642ce8b..8f4c4cab0234c 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-mul.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f32-mul.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16 -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma,+neon,+fullfp16 -o - | FileCheck %s target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-add.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-add.ll index e0c76b7bbe716..108f47c8cd122 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-add.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-add.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16 -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma,+neon,+fullfp16 -o - | FileCheck %s target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-mul.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-mul.ll index 6d7b156c3b64c..e525c0b498f9d 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-mul.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-f64-mul.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16 -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma,+neon,+fullfp16 -o - | FileCheck %s target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-mixed-cases.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-mixed-cases.ll index 1ed9cf2db24f7..9646faa0dbb70 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-mixed-cases.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-mixed-cases.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16 -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma,+neon,+fullfp16 -o - | FileCheck %s target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-multiuses.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-multiuses.ll index 039025dafa0d6..7b5bf64d25517 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-multiuses.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-multiuses.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma,+neon -o - | FileCheck %s target triple = "aarch64" ; Expected to transform diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions.ll index 44d0a9392ba62..a08f1f3fa7caf 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-reductions.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma,+neon -o - | FileCheck %s target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-splat.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-splat.ll index ad9240b0922bd..d4bcf71d081b0 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-splat.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-splat.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma -o - | FileCheck %s target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/complex-deinterleaving-uniform-cases.ll b/llvm/test/CodeGen/AArch64/complex-deinterleaving-uniform-cases.ll index e8d9ec7dc85de..084792168d1e4 100644 --- a/llvm/test/CodeGen/AArch64/complex-deinterleaving-uniform-cases.ll +++ b/llvm/test/CodeGen/AArch64/complex-deinterleaving-uniform-cases.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s --mattr=+complxnum,+neon,+fullfp16 -o - | FileCheck %s +; RUN: llc < %s --mattr=+fcma,+neon,+fullfp16 -o - | FileCheck %s target triple = "aarch64" diff --git a/llvm/test/CodeGen/AArch64/fjcvtzs.ll b/llvm/test/CodeGen/AArch64/fjcvtzs.ll index 017694dcd7b19..1c59030dd4a3d 100644 --- a/llvm/test/CodeGen/AArch64/fjcvtzs.ll +++ b/llvm/test/CodeGen/AArch64/fjcvtzs.ll @@ -1,4 +1,4 @@ -; RUN: llc -mtriple=arm64-eabi -mattr=+jsconv -o - %s | FileCheck %s +; RUN: llc -mtriple=arm64-eabi -mattr=+jscvt -o - %s | FileCheck %s define i32 @test_jcvt(double %v) { ; CHECK-LABEL: test_jcvt: diff --git a/llvm/test/CodeGen/AArch64/fjcvtzs.mir b/llvm/test/CodeGen/AArch64/fjcvtzs.mir index efdee63669e29..50509bdddef9e 100644 --- a/llvm/test/CodeGen/AArch64/fjcvtzs.mir +++ b/llvm/test/CodeGen/AArch64/fjcvtzs.mir @@ -1,4 +1,4 @@ -# RUN: not llc -o - %s -mtriple=arm64-eabi -mattr=+jsconv -run-pass=legalizer 2>&1 | FileCheck %s +# RUN: not llc -o - %s -mtriple=arm64-eabi -mattr=+jscvt -run-pass=legalizer 2>&1 | FileCheck %s # CHECK: [[@LINE+11]]:49: missing implicit register operand 'implicit-def $nzcv' diff --git a/llvm/test/CodeGen/AArch64/rand.ll b/llvm/test/CodeGen/AArch64/rand.ll index 706774d83b187..10d22c1bc632f 100644 --- a/llvm/test/CodeGen/AArch64/rand.ll +++ b/llvm/test/CodeGen/AArch64/rand.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mtriple=aarch64 -mattr=+v8.5a,+rand -aarch64-enable-sink-fold=true %s -o - | FileCheck %s +; RUN: llc -mtriple=aarch64 -mattr=+v8.5a,+rng -aarch64-enable-sink-fold=true %s -o - | FileCheck %s define i32 @rndr(ptr %__addr) { ; CHECK-LABEL: rndr: diff --git a/llvm/test/MC/AArch64/armv8.2a-statistical-profiling.s b/llvm/test/MC/AArch64/armv8.2a-statistical-profiling.s index 25fff6ac56ae9..068b66a0240a6 100644 --- a/llvm/test/MC/AArch64/armv8.2a-statistical-profiling.s +++ b/llvm/test/MC/AArch64/armv8.2a-statistical-profiling.s @@ -1,9 +1,9 @@ -// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+spe < %s 2> %t | FileCheck %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+profile < %s 2> %t | FileCheck %s // RUN: FileCheck --check-prefix=ERROR %s < %t // RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=neoverse-n1 < %s 2> %t | FileCheck %s // RUN: FileCheck --check-prefix=ERROR %s < %t // RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding < %s 2> %t | FileCheck --check-prefix=NO_SPE_OUT %s -// RUN: FileCheck --check-prefix=NO_SPE %s < %t +// RUN: FileCheck --check-prefix=NO-PROFILE %s < %t // NO_SPE_OUT-NOT: msr // NO_SPE_OUT-NOT: mrs @@ -11,7 +11,7 @@ psb csync // CHECK: psb csync // encoding: [0x3f,0x22,0x03,0xd5] -// NO_SPE: instruction requires: spe +// NO-PROFILE: instruction requires: profile msr pmblimitr_el1, x0 msr pmbptr_el1, x0 @@ -35,17 +35,17 @@ // CHECK: msr PMSFCR_EL1, x0 // encoding: [0x80,0x99,0x18,0xd5] // CHECK: msr PMSEVFR_EL1, x0 // encoding: [0xa0,0x99,0x18,0xd5] // CHECK: msr PMSLATFR_EL1, x0 // encoding: [0xc0,0x99,0x18,0xd5] -// NO_SPE: error: expected writable system register or pstate -// NO_SPE: error: expected writable system register or pstate -// NO_SPE: error: expected writable system register or pstate -// NO_SPE: error: expected writable system register or pstate -// NO_SPE: error: expected writable system register or pstate -// NO_SPE: error: expected writable system register or pstate -// NO_SPE: error: expected writable system register or pstate -// NO_SPE: error: expected writable system register or pstate -// NO_SPE: error: expected writable system register or pstate -// NO_SPE: error: expected writable system register or pstate -// NO_SPE: error: expected writable system register or pstate +// NO-PROFILE: error: expected writable system register or pstate +// NO-PROFILE: error: expected writable system register or pstate +// NO-PROFILE: error: expected writable system register or pstate +// NO-PROFILE: error: expected writable system register or pstate +// NO-PROFILE: error: expected writable system register or pstate +// NO-PROFILE: error: expected writable system register or pstate +// NO-PROFILE: error: expected writable system register or pstate +// NO-PROFILE: error: expected writable system register or pstate +// NO-PROFILE: error: expected writable system register or pstate +// NO-PROFILE: error: expected writable system register or pstate +// NO-PROFILE: error: expected writable system register or pstate // Readonly system registers: writing to them gives an error @@ -53,8 +53,8 @@ msr pmsidr_el1, x0 // ERROR: :[[@LINE-2]]:7: error: expected writable system register or pstate // ERROR: :[[@LINE-2]]:7: error: expected writable system register or pstate -// NO_SPE: :[[@LINE-4]]:7: error: expected writable system register or pstate -// NO_SPE: :[[@LINE-4]]:7: error: expected writable system register or pstate +// NO-PROFILE: :[[@LINE-4]]:7: error: expected writable system register or pstate +// NO-PROFILE: :[[@LINE-4]]:7: error: expected writable system register or pstate mrs x0, pmblimitr_el1 mrs x0, pmbptr_el1 @@ -83,16 +83,16 @@ mrs x0, pmblimitr_el1 // CHECK: mrs x0, PMSEVFR_EL1 // encoding: [0xa0,0x99,0x38,0xd5] // CHECK: mrs x0, PMSLATFR_EL1 // encoding: [0xc0,0x99,0x38,0xd5] // CHECK: mrs x0, PMSIDR_EL1 // encoding: [0xe0,0x99,0x38,0xd5] -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register -// NO_SPE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register +// NO-PROFILE: error: expected readable system register diff --git a/llvm/test/MC/AArch64/armv8.3a-complex.s b/llvm/test/MC/AArch64/armv8.3a-complex.s index dae5d47795100..12c7cc557a4de 100644 --- a/llvm/test/MC/AArch64/armv8.3a-complex.s +++ b/llvm/test/MC/AArch64/armv8.3a-complex.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+complxnum,+fullfp16 -o - %s 2>%t | FileCheck %s +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+fcma,+fullfp16 -o - %s 2>%t | FileCheck %s // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.3a,+fullfp16 -o - %s 2>%t | FileCheck %s fcmla v0.4h, v1.4h, v2.4h, #0 fcmla v0.8h, v1.8h, v2.8h, #0 diff --git a/llvm/test/MC/AArch64/armv8.3a-complex_bad.s b/llvm/test/MC/AArch64/armv8.3a-complex_bad.s index cdc023445ca07..a3490c245447d 100644 --- a/llvm/test/MC/AArch64/armv8.3a-complex_bad.s +++ b/llvm/test/MC/AArch64/armv8.3a-complex_bad.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+complxnum,+fullfp16 -o - %s 2>&1 | FileCheck %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+fcma,+fullfp16 -o - %s 2>&1 | FileCheck %s fcmla v0.2s, v1.2s, v2.2s, #1 fcmla v0.2s, v1.2s, v2.2s, #360 fcmla v0.2s, v1.2s, v2.2s, #-90 diff --git a/llvm/test/MC/AArch64/armv8.3a-complex_missing.s b/llvm/test/MC/AArch64/armv8.3a-complex_missing.s index 75008106575e9..a98f1cf18215b 100644 --- a/llvm/test/MC/AArch64/armv8.3a-complex_missing.s +++ b/llvm/test/MC/AArch64/armv8.3a-complex_missing.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.3a,-complxnum,+fullfp16 -o - %s 2>&1 | FileCheck %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.3a,-fcma,+fullfp16 -o - %s 2>&1 | FileCheck %s // RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+fullfp16 -o - %s 2>&1 | FileCheck %s fcmla v0.4h, v1.4h, v2.4h, #0 fcmla v0.8h, v1.8h, v2.8h, #0 @@ -25,79 +25,79 @@ fcmla v0.4s, v1.4s, v2.s[0], #270 fcmla v0.4h, v1.4h, v2.h[1], #0 fcmla v0.8h, v1.8h, v2.h[3], #0 fcmla v0.4s, v1.4s, v2.s[1], #0 -//CHECK: {{.*}} error: instruction requires: complxnum +//CHECK: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.4h, v1.4h, v2.4h, #0 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.8h, v1.8h, v2.8h, #0 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.2s, v1.2s, v2.2s, #0 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.4s, v1.4s, v2.4s, #0 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.2d, v1.2d, v2.2d, #0 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.2s, v1.2s, v2.2s, #0 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.2s, v1.2s, v2.2s, #90 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.2s, v1.2s, v2.2s, #180 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.2s, v1.2s, v2.2s, #270 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcadd v0.4h, v1.4h, v2.4h, #90 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcadd v0.8h, v1.8h, v2.8h, #90 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcadd v0.2s, v1.2s, v2.2s, #90 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcadd v0.4s, v1.4s, v2.4s, #90 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcadd v0.2d, v1.2d, v2.2d, #90 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcadd v0.2s, v1.2s, v2.2s, #90 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcadd v0.2s, v1.2s, v2.2s, #270 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.4h, v1.4h, v2.h[0], #0 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.8h, v1.8h, v2.h[0], #0 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.4s, v1.4s, v2.s[0], #0 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.4s, v1.4s, v2.s[0], #90 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.4s, v1.4s, v2.s[0], #180 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.4s, v1.4s, v2.s[0], #270 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.4h, v1.4h, v2.h[1], #0 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.8h, v1.8h, v2.h[3], #0 //CHECK-NEXT: ^ -//CHECK-NEXT: {{.*}} error: instruction requires: complxnum +//CHECK-NEXT: {{.*}} error: instruction requires: fcma //CHECK-NEXT: fcmla v0.4s, v1.4s, v2.s[1], #0 //CHECK-NEXT: ^ diff --git a/llvm/test/MC/AArch64/armv8.3a-complex_nofp16.s b/llvm/test/MC/AArch64/armv8.3a-complex_nofp16.s index 63d6d3c52c97d..9ba5ac06f8d85 100644 --- a/llvm/test/MC/AArch64/armv8.3a-complex_nofp16.s +++ b/llvm/test/MC/AArch64/armv8.3a-complex_nofp16.s @@ -1,4 +1,4 @@ -// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+complxnum -o - %s 2>%t | FileCheck %s +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+fcma -o - %s 2>%t | FileCheck %s fcmla v0.2s, v1.2s, v2.2s, #0 fcmla v0.4s, v1.4s, v2.4s, #0 fcmla v0.2d, v1.2d, v2.2d, #0 diff --git a/llvm/test/MC/AArch64/armv8.3a-complex_nofp16_bad.s b/llvm/test/MC/AArch64/armv8.3a-complex_nofp16_bad.s index 2d4679805549f..ea3584b09b68e 100644 --- a/llvm/test/MC/AArch64/armv8.3a-complex_nofp16_bad.s +++ b/llvm/test/MC/AArch64/armv8.3a-complex_nofp16_bad.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+complxnum -o - %s 2>&1 | FileCheck %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+fcma -o - %s 2>&1 | FileCheck %s fcmla v0.4h, v1.4h, v2.4h, #0 fcmla v0.8h, v1.8h, v2.8h, #0 fcadd v0.4h, v1.4h, v2.4h, #90 diff --git a/llvm/test/MC/AArch64/armv8.3a-js.s b/llvm/test/MC/AArch64/armv8.3a-js.s index e3e4f9121acf9..e37ebea472b74 100644 --- a/llvm/test/MC/AArch64/armv8.3a-js.s +++ b/llvm/test/MC/AArch64/armv8.3a-js.s @@ -1,20 +1,20 @@ // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.3a -o - %s 2>&1 | \ // RUN: FileCheck %s -// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+jsconv -o - %s 2>&1 | \ +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+jscvt -o - %s 2>&1 | \ // RUN: FileCheck %s // RUN: not llvm-mc -triple aarch64-none-linux-gnu %s 2>&1 | \ // RUN: FileCheck --check-prefix=CHECK-JS %s -// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+jsconv,-fp-armv8 -o - %s 2>&1 |\ +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+jscvt,-fp-armv8 -o - %s 2>&1 |\ // RUN: FileCheck --check-prefix=CHECK-REQ %s fjcvtzs w0, d0 // CHECK: fjcvtzs w0, d0 // encoding: [0x00,0x00,0x7e,0x1e] -// CHECK-JS: error: instruction requires: jsconv +// CHECK-JS: error: instruction requires: jscvt -// NOJS: error: instruction requires: jsconv +// NOJS: error: instruction requires: jscvt -// CHECK-REQ: error: instruction requires: fp-armv8 jsconv +// CHECK-REQ: error: instruction requires: fp-armv8 jscvt diff --git a/llvm/test/MC/AArch64/armv8.5a-rand-error.s b/llvm/test/MC/AArch64/armv8.5a-rand-error.s index c4cca8a87b2ae..82dd371db4667 100644 --- a/llvm/test/MC/AArch64/armv8.5a-rand-error.s +++ b/llvm/test/MC/AArch64/armv8.5a-rand-error.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=+rand < %s 2>&1| FileCheck %s +// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=+rng < %s 2>&1| FileCheck %s mrs rndr mrs rndrrs diff --git a/llvm/test/MC/AArch64/armv8.5a-rand.s b/llvm/test/MC/AArch64/armv8.5a-rand.s index 770990b437e49..c906d1b874de0 100644 --- a/llvm/test/MC/AArch64/armv8.5a-rand.s +++ b/llvm/test/MC/AArch64/armv8.5a-rand.s @@ -1,6 +1,6 @@ -// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+rand < %s | FileCheck %s +// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+rng < %s | FileCheck %s // RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=+v8.5a < %s 2>&1 | FileCheck %s --check-prefix=NORAND -// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=-rand < %s 2>&1 | FileCheck %s --check-prefix=NORAND +// RUN: not llvm-mc -triple aarch64 -show-encoding -mattr=-rng < %s 2>&1 | FileCheck %s --check-prefix=NORAND mrs x0, rndr mrs x1, rndrrs diff --git a/llvm/test/MC/AArch64/armv8.9a-specres2-error.s b/llvm/test/MC/AArch64/armv8.9a-specres2-error.s index c2f32a20bc03e..3963c9ac57d96 100644 --- a/llvm/test/MC/AArch64/armv8.9a-specres2-error.s +++ b/llvm/test/MC/AArch64/armv8.9a-specres2-error.s @@ -1,4 +1,4 @@ -// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+specres2 < %s 2>&1| FileCheck %s +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predres2 < %s 2>&1| FileCheck %s cosp rctx diff --git a/llvm/test/MC/AArch64/armv8.9a-specres2.s b/llvm/test/MC/AArch64/armv8.9a-specres2.s index b411ec31580b9..5e60a131e0bdc 100644 --- a/llvm/test/MC/AArch64/armv8.9a-specres2.s +++ b/llvm/test/MC/AArch64/armv8.9a-specres2.s @@ -1,7 +1,7 @@ -// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+specres2 < %s | FileCheck %s +// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+predres2 < %s | FileCheck %s // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.9a < %s | FileCheck %s // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v9.4a < %s | FileCheck %s -// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-specres2 < %s 2>&1 | FileCheck %s --check-prefix=NOSPECRES2 +// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-predres2 < %s 2>&1 | FileCheck %s --check-prefix=NOPREDRES2 cosp rctx, x0 sys #3, c7, c3, #6, x0 @@ -9,5 +9,5 @@ sys #3, c7, c3, #6, x0 // CHECK: cosp rctx, x0 // encoding: [0xc0,0x73,0x0b,0xd5] // CHECK: cosp rctx, x0 // encoding: [0xc0,0x73,0x0b,0xd5] -// NOSPECRES2: COSP requires: predres2 -// NOSPECRES2-NEXT: cosp +// NOPREDRES2: COSP requires: predres2 +// NOPREDRES2-NEXT: cosp diff --git a/llvm/test/MC/AArch64/armv8r-sysreg.s b/llvm/test/MC/AArch64/armv8r-sysreg.s index 46a23d5827b29..63db2757f3117 100644 --- a/llvm/test/MC/AArch64/armv8r-sysreg.s +++ b/llvm/test/MC/AArch64/armv8r-sysreg.s @@ -1,7 +1,7 @@ // RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+v8r -o - %s | FileCheck %s -// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+v8r,-fp-armv8,-rdm,-dotprod,-complxnum,-jsconv -o - %s | FileCheck %s +// RUN: llvm-mc -triple aarch64 -show-encoding -mattr=+v8r,-fp-armv8,-rdm,-dotprod,-fcma,-jscvt -o - %s | FileCheck %s // RUN: llvm-mc -triple aarch64 -show-encoding -mcpu=cortex-r82 -o - %s | FileCheck %s -// RUN: llvm-mc -triple aarch64 -show-encoding -mcpu=cortex-r82 -mattr=-fp-armv8,-rdm,-dotprod,-complxnum,-jsconv -o - %s | FileCheck %s +// RUN: llvm-mc -triple aarch64 -show-encoding -mcpu=cortex-r82 -mattr=-fp-armv8,-rdm,-dotprod,-fcma,-jscvt -o - %s | FileCheck %s .text mrs x0, VSCTLR_EL2 mrs x0, MPUIR_EL1 diff --git a/llvm/test/MC/AArch64/directive-arch_extension-negative.s b/llvm/test/MC/AArch64/directive-arch_extension-negative.s index 1c1cfc9d33e3e..ffdd0877a16e7 100644 --- a/llvm/test/MC/AArch64/directive-arch_extension-negative.s +++ b/llvm/test/MC/AArch64/directive-arch_extension-negative.s @@ -1,6 +1,6 @@ // RUN: not llvm-mc -triple aarch64 \ // RUN: -mattr=+crc,+sm4,+sha3,+sha2,+aes,+fp,+neon,+ras,+lse,+predres,+ccdp,+mte,+tlb-rmi,+pan-rwv,+ccpp,+rcpc,+ls64,+flagm,+hbc,+mops \ -// RUN: -mattr=+rcpc3,+lse128,+d128,+the,+rasv2,+ite,+cssc,+specres2,+gcs \ +// RUN: -mattr=+rcpc3,+lse128,+d128,+the,+rasv2,+ite,+cssc,+predres2,+gcs \ // RUN: -filetype asm -o - %s 2>&1 | FileCheck %s .arch_extension axp64 diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.2a-statistical-profiling.txt b/llvm/test/MC/Disassembler/AArch64/armv8.2a-statistical-profiling.txt index 2779270c023ce..131177c291192 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8.2a-statistical-profiling.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8.2a-statistical-profiling.txt @@ -1,9 +1,9 @@ -# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+spe --disassemble < %s | FileCheck %s -# RUN: llvm-mc -triple aarch64-none-linux-gnu --disassemble < %s | FileCheck --check-prefix=NO_SPE %s +# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+profile --disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple aarch64-none-linux-gnu --disassemble < %s | FileCheck --check-prefix=NO-PROFILE %s [0x3f,0x22,0x03,0xd5] # CHECK: psb csync -# NO_SPE: hint #17 +# NO-PROFILE: hint #17 [0x00,0x9a,0x18,0xd5] [0x20,0x9a,0x18,0xd5] @@ -19,31 +19,31 @@ [0xc0,0x99,0x18,0xd5] [0xe0,0x99,0x18,0xd5] # CHECK: msr PMBLIMITR_EL1, x0 -# NO_SPE: msr S3_0_C9_C10_0, x0 +# NO-PROFILE: msr S3_0_C9_C10_0, x0 # CHECK: msr PMBPTR_EL1, x0 -# NO_SPE: msr S3_0_C9_C10_1, x0 +# NO-PROFILE: msr S3_0_C9_C10_1, x0 # CHECK: msr PMBSR_EL1, x0 -# NO_SPE: msr S3_0_C9_C10_3, x0 +# NO-PROFILE: msr S3_0_C9_C10_3, x0 # CHECK: msr S3_0_C9_C10_7, x0 -# NO_SPE: msr S3_0_C9_C10_7, x0 +# NO-PROFILE: msr S3_0_C9_C10_7, x0 # CHECK: msr PMSCR_EL2, x0 -# NO_SPE: msr S3_4_C9_C9_0, x0 +# NO-PROFILE: msr S3_4_C9_C9_0, x0 # CHECK: msr PMSCR_EL12, x0 -# NO_SPE: msr S3_5_C9_C9_0, x0 +# NO-PROFILE: msr S3_5_C9_C9_0, x0 # CHECK: msr PMSCR_EL1, x0 -# NO_SPE: msr S3_0_C9_C9_0, x0 +# NO-PROFILE: msr S3_0_C9_C9_0, x0 # CHECK: msr PMSICR_EL1, x0 -# NO_SPE: msr S3_0_C9_C9_2, x0 +# NO-PROFILE: msr S3_0_C9_C9_2, x0 # CHECK: msr PMSIRR_EL1, x0 -# NO_SPE: msr S3_0_C9_C9_3, x0 +# NO-PROFILE: msr S3_0_C9_C9_3, x0 # CHECK: msr PMSFCR_EL1, x0 -# NO_SPE: msr S3_0_C9_C9_4, x0 +# NO-PROFILE: msr S3_0_C9_C9_4, x0 # CHECK: msr PMSEVFR_EL1, x0 -# NO_SPE: msr S3_0_C9_C9_5, x0 +# NO-PROFILE: msr S3_0_C9_C9_5, x0 # CHECK: msr PMSLATFR_EL1, x0 -# NO_SPE: msr S3_0_C9_C9_6, x0 +# NO-PROFILE: msr S3_0_C9_C9_6, x0 # CHECK: msr S3_0_C9_C9_7, x0 -# NO_SPE: msr S3_0_C9_C9_7, x0 +# NO-PROFILE: msr S3_0_C9_C9_7, x0 [0x00,0x9a,0x38,0xd5] [0x20,0x9a,0x38,0xd5] @@ -60,28 +60,28 @@ [0xe0,0x99,0x38,0xd5] # CHECK: mrs x0, PMBLIMITR_EL1 -# NO_SPE: mrs x0, S3_0_C9_C10_0 +# NO-PROFILE: mrs x0, S3_0_C9_C10_0 # CHECK: mrs x0, PMBPTR_EL1 -# NO_SPE: mrs x0, S3_0_C9_C10_1 +# NO-PROFILE: mrs x0, S3_0_C9_C10_1 # CHECK: mrs x0, PMBSR_EL1 -# NO_SPE: mrs x0, S3_0_C9_C10_3 +# NO-PROFILE: mrs x0, S3_0_C9_C10_3 # CHECK: mrs x0, PMBIDR_EL1 -# NO_SPE: mrs x0, S3_0_C9_C10_7 +# NO-PROFILE: mrs x0, S3_0_C9_C10_7 # CHECK: mrs x0, PMSCR_EL2 -# NO_SPE: mrs x0, S3_4_C9_C9_0 +# NO-PROFILE: mrs x0, S3_4_C9_C9_0 # CHECK: mrs x0, PMSCR_EL12 -# NO_SPE: mrs x0, S3_5_C9_C9_0 +# NO-PROFILE: mrs x0, S3_5_C9_C9_0 # CHECK: mrs x0, PMSCR_EL1 -# NO_SPE: mrs x0, S3_0_C9_C9_0 +# NO-PROFILE: mrs x0, S3_0_C9_C9_0 # CHECK: mrs x0, PMSICR_EL1 -# NO_SPE: mrs x0, S3_0_C9_C9_2 +# NO-PROFILE: mrs x0, S3_0_C9_C9_2 # CHECK: mrs x0, PMSIRR_EL1 -# NO_SPE: mrs x0, S3_0_C9_C9_3 +# NO-PROFILE: mrs x0, S3_0_C9_C9_3 # CHECK: mrs x0, PMSFCR_EL1 -# NO_SPE: mrs x0, S3_0_C9_C9_4 +# NO-PROFILE: mrs x0, S3_0_C9_C9_4 # CHECK: mrs x0, PMSEVFR_EL1 -# NO_SPE: mrs x0, S3_0_C9_C9_5 +# NO-PROFILE: mrs x0, S3_0_C9_C9_5 # CHECK: mrs x0, PMSLATFR_EL1 -# NO_SPE: mrs x0, S3_0_C9_C9_6 +# NO-PROFILE: mrs x0, S3_0_C9_C9_6 # CHECK: mrs x0, PMSIDR_EL1 -# NO_SPE: mrs x0, S3_0_C9_C9_7 +# NO-PROFILE: mrs x0, S3_0_C9_C9_7 diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt b/llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt index ea8b498fdc6e7..7701b5bdef795 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8.3a-complex.txt @@ -1,7 +1,7 @@ # RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.3a,-fullfp16 --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK # RUN: FileCheck %s < %t --check-prefix=NO-FP16 # RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.3a,+fullfp16 --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK --check-prefix=FP16 -# RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r,+complxnum --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK +# RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r,+fcma --disassemble < %s 2>%t | FileCheck %s --check-prefix=CHECK # RUN: FileCheck %s < %t --check-prefix=NO-FP16 # RUN: not llvm-mc -triple aarch64-none-linux-gnu -mattr=-v8.3a,+fullfp16 --disassemble < %s 2>&1 | FileCheck %s --check-prefix=NO-V83A diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.3a-js.txt b/llvm/test/MC/Disassembler/AArch64/armv8.3a-js.txt index 22144cf64d965..6581a9cbb61a6 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8.3a-js.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8.3a-js.txt @@ -1,4 +1,4 @@ # RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8.3a --disassemble < %s | FileCheck %s -# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r,+jsconv --disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple aarch64-none-linux-gnu -mattr=+v8r,+jscvt --disassemble < %s | FileCheck %s # CHECK: fjcvtzs w0, d0 [0x00,0x00,0x7e,0x1e] diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.5a-rand.txt b/llvm/test/MC/Disassembler/AArch64/armv8.5a-rand.txt index 712ed019789d3..b57c79f5c8f81 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8.5a-rand.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8.5a-rand.txt @@ -1,6 +1,6 @@ -# RUN: llvm-mc -triple=aarch64 -mattr=+rand -disassemble < %s | FileCheck %s +# RUN: llvm-mc -triple=aarch64 -mattr=+rng -disassemble < %s | FileCheck %s # RUN: llvm-mc -triple=aarch64 -mattr=+v8.5a -disassemble < %s | FileCheck %s --check-prefix=NORAND -# RUN: llvm-mc -triple=aarch64 -mattr=-rand -disassemble < %s | FileCheck %s --check-prefix=NORAND +# RUN: llvm-mc -triple=aarch64 -mattr=-rng -disassemble < %s | FileCheck %s --check-prefix=NORAND [0x00,0x24,0x3b,0xd5] [0x21,0x24,0x3b,0xd5] diff --git a/llvm/test/MC/Disassembler/AArch64/armv8.9a-specres2.txt b/llvm/test/MC/Disassembler/AArch64/armv8.9a-specres2.txt index a114cd3493787..d5cffd397d53a 100644 --- a/llvm/test/MC/Disassembler/AArch64/armv8.9a-specres2.txt +++ b/llvm/test/MC/Disassembler/AArch64/armv8.9a-specres2.txt @@ -2,13 +2,13 @@ # Should disassemble to hint #22 if the feature is not present. # RUN: llvm-mc -triple=aarch64 -disassemble %s | FileCheck %s --check-prefix=HINT_22 # RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v8a %s | FileCheck %s --check-prefix=HINT_22 -# RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v8.9a -mattr=-specres2 %s | FileCheck %s --check-prefix=HINT_22 +# RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v8.9a -mattr=-predres2 %s | FileCheck %s --check-prefix=HINT_22 # RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v9.3a %s | FileCheck %s --check-prefix=HINT_22 -# RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v9.4a -mattr=-specres2 %s | FileCheck %s --check-prefix=HINT_22 -# RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+specres2 %s | FileCheck %s --check-prefix=FEAT_SPECRES2 -# RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v8a -mattr=+specres2 %s | FileCheck %s --check-prefix=FEAT_SPECRES2 +# RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v9.4a -mattr=-predres2 %s | FileCheck %s --check-prefix=HINT_22 +# RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+predres2 %s | FileCheck %s --check-prefix=FEAT_SPECRES2 +# RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v8a -mattr=+predres2 %s | FileCheck %s --check-prefix=FEAT_SPECRES2 # RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v8.9a %s | FileCheck %s --check-prefix=FEAT_SPECRES2 -# RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v9.3a -mattr=+specres2 %s | FileCheck %s --check-prefix=FEAT_SPECRES2 +# RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v9.3a -mattr=+predres2 %s | FileCheck %s --check-prefix=FEAT_SPECRES2 # RUN: llvm-mc -triple=aarch64 -disassemble -mattr=+v9.4a %s | FileCheck %s --check-prefix=FEAT_SPECRES2 [0xc0,0x73,0x0b,0xd5] diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp index 816aea44a9bc5..9cc8845e8cbd1 100644 --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -390,7 +390,7 @@ INSTANTIATE_TEST_SUITE_P( "cortex-a55", "armv8.2-a", "crypto-neon-fp-armv8", ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | - ARM::AEK_FP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, + ARM::AEK_FULLFP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, "8.2-A"), ARMCPUTestParams("cortex-a57", "armv8-a", "crypto-neon-fp-armv8", @@ -414,25 +414,25 @@ INSTANTIATE_TEST_SUITE_P( "cortex-a75", "armv8.2-a", "crypto-neon-fp-armv8", ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | - ARM::AEK_FP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, + ARM::AEK_FULLFP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, "8.2-A"), ARMCPUTestParams( "cortex-a76", "armv8.2-a", "crypto-neon-fp-armv8", ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | - ARM::AEK_FP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, + ARM::AEK_FULLFP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, "8.2-A"), ARMCPUTestParams( "cortex-a76ae", "armv8.2-a", "crypto-neon-fp-armv8", ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | - ARM::AEK_FP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, + ARM::AEK_FULLFP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, "8.2-A"), ARMCPUTestParams( "cortex-a78c", "armv8.2-a", "crypto-neon-fp-armv8", ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | - ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_DOTPROD, + ARM::AEK_RAS | ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD, "8.2-A"), ARMCPUTestParams("cortex-a710", "armv9-a", "neon-fp-armv8", ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | @@ -446,11 +446,11 @@ INSTANTIATE_TEST_SUITE_P( "cortex-a77", "armv8.2-a", "crypto-neon-fp-armv8", ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | - ARM::AEK_FP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, + ARM::AEK_FULLFP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, "8.2-A"), ARMCPUTestParams( "cortex-a78", "armv8.2-a", "crypto-neon-fp-armv8", - ARM::AEK_DOTPROD | ARM::AEK_FP16 | ARM::AEK_SEC | ARM::AEK_MP | + ARM::AEK_DOTPROD | ARM::AEK_FULLFP16 | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS, "8.2-A"), @@ -462,13 +462,13 @@ INSTANTIATE_TEST_SUITE_P( "8.2-A"), ARMCPUTestParams( "cortex-x1", "armv8.2-a", "crypto-neon-fp-armv8", - ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_DOTPROD | ARM::AEK_SEC | + ARM::AEK_RAS | ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC, "8.2-A"), ARMCPUTestParams( "cortex-x1c", "armv8.2-a", "crypto-neon-fp-armv8", - ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_DOTPROD | ARM::AEK_SEC | + ARM::AEK_RAS | ARM::AEK_FULLFP16 | ARM::AEK_DOTPROD | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC, "8.2-A"), @@ -476,7 +476,7 @@ INSTANTIATE_TEST_SUITE_P( "neoverse-n1", "armv8.2-a", "crypto-neon-fp-armv8", ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | - ARM::AEK_FP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, + ARM::AEK_FULLFP16 | ARM::AEK_RAS | ARM::AEK_DOTPROD, "8.2-A"), ARMCPUTestParams( "neoverse-n2", "armv9-a", "neon-fp-armv8", @@ -485,12 +485,14 @@ INSTANTIATE_TEST_SUITE_P( ARM::AEK_BF16 | ARM::AEK_DOTPROD | ARM::AEK_RAS | ARM::AEK_I8MM | ARM::AEK_FP16FML | ARM::AEK_SB, "9-A"), - ARMCPUTestParams( - "neoverse-v1", "armv8.4-a", "crypto-neon-fp-armv8", - ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | - ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | - ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_BF16 | ARM::AEK_DOTPROD, - "8.4-A"), + ARMCPUTestParams("neoverse-v1", "armv8.4-a", + "crypto-neon-fp-armv8", + ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | + ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | + ARM::AEK_DSP | ARM::AEK_CRC | + ARM::AEK_RAS | ARM::AEK_FULLFP16 | + ARM::AEK_BF16 | ARM::AEK_DOTPROD, + "8.4-A"), ARMCPUTestParams("cyclone", "armv8-a", "crypto-neon-fp-armv8", ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | @@ -506,13 +508,13 @@ INSTANTIATE_TEST_SUITE_P( "exynos-m4", "armv8.2-a", "crypto-neon-fp-armv8", ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | - ARM::AEK_DOTPROD | ARM::AEK_FP16 | ARM::AEK_RAS, + ARM::AEK_DOTPROD | ARM::AEK_FULLFP16 | ARM::AEK_RAS, "8.2-A"), ARMCPUTestParams( "exynos-m5", "armv8.2-a", "crypto-neon-fp-armv8", ARM::AEK_CRC | ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | - ARM::AEK_DOTPROD | ARM::AEK_FP16 | ARM::AEK_RAS, + ARM::AEK_DOTPROD | ARM::AEK_FULLFP16 | ARM::AEK_RAS, "8.2-A"), ARMCPUTestParams("cortex-m23", "armv8-m.base", "none", ARM::AEK_NONE | ARM::AEK_HWDIVTHUMB, @@ -523,21 +525,27 @@ INSTANTIATE_TEST_SUITE_P( ARMCPUTestParams("cortex-m35p", "armv8-m.main", "fpv5-sp-d16", ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP, "8-M.Mainline"), - ARMCPUTestParams( - "cortex-m55", "armv8.1-m.main", "fp-armv8-fullfp16-d16", - ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP | - ARM::AEK_RAS | ARM::AEK_LOB | ARM::AEK_FP16, - "8.1-M.Mainline"), - ARMCPUTestParams( - "cortex-m85", "armv8.1-m.main", "fp-armv8-fullfp16-d16", - ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP | - ARM::AEK_RAS | ARM::AEK_LOB | ARM::AEK_FP16 | ARM::AEK_PACBTI, - "8.1-M.Mainline"), - ARMCPUTestParams( - "cortex-m52", "armv8.1-m.main", "fp-armv8-fullfp16-d16", - ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP | - ARM::AEK_RAS | ARM::AEK_LOB | ARM::AEK_FP16 | ARM::AEK_PACBTI, - "8.1-M.Mainline"), + ARMCPUTestParams("cortex-m55", "armv8.1-m.main", + "fp-armv8-fullfp16-d16", + ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | + ARM::AEK_NEON | ARM::AEK_FPARMV8 | + ARM::AEK_RAS | ARM::AEK_LOB | + ARM::AEK_FULLFP16, + "8.1-M.Mainline"), + ARMCPUTestParams("cortex-m85", "armv8.1-m.main", + "fp-armv8-fullfp16-d16", + ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | + ARM::AEK_NEON | ARM::AEK_FPARMV8 | + ARM::AEK_RAS | ARM::AEK_LOB | + ARM::AEK_FULLFP16 | ARM::AEK_PACBTI, + "8.1-M.Mainline"), + ARMCPUTestParams("cortex-m52", "armv8.1-m.main", + "fp-armv8-fullfp16-d16", + ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | + ARM::AEK_NEON | ARM::AEK_FPARMV8 | + ARM::AEK_RAS | ARM::AEK_LOB | + ARM::AEK_FULLFP16 | ARM::AEK_PACBTI, + "8.1-M.Mainline"), ARMCPUTestParams("iwmmxt", "iwmmxt", "none", ARM::AEK_NONE, "iwmmxt"), ARMCPUTestParams("xscale", "xscale", "none", ARM::AEK_NONE, @@ -1086,41 +1094,41 @@ INSTANTIATE_TEST_SUITE_P( ARMCPUTestParams( "cortex-a34", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "cortex-a35", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "cortex-a53", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "cortex-a55", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_RAS, - AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_FP16, + AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_RAS, + AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC}), "8.2-A"), ARMCPUTestParams( "cortex-a510", "armv9-a", "neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_FP, - AArch64::AEK_SIMD, AArch64::AEK_RAS, + {AArch64::AEK_CRC, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON, AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM, AArch64::AEK_PAUTH, AArch64::AEK_MTE, AArch64::AEK_SSBS, - AArch64::AEK_FP16, AArch64::AEK_FP16FML, + AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_SB, AArch64::AEK_JSCVT, AArch64::AEK_FCMA}), "9-A"), @@ -1129,15 +1137,15 @@ INSTANTIATE_TEST_SUITE_P( AArch64::ExtensionBitset( {AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_SVE, AArch64::AEK_SVE2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_LSE, AArch64::AEK_RDM, - AArch64::AEK_SIMD, AArch64::AEK_RCPC, + AArch64::AEK_NEON, AArch64::AEK_RCPC, AArch64::AEK_RAS, AArch64::AEK_CRC, - AArch64::AEK_FP, AArch64::AEK_SB, + AArch64::AEK_FPARMV8, AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM, AArch64::AEK_FLAGM, - AArch64::AEK_PERFMON, AArch64::AEK_PREDRES, + AArch64::AEK_PMUV3, AArch64::AEK_PREDRES, AArch64::AEK_JSCVT, AArch64::AEK_FCMA}), "9.2-A"), ARMCPUTestParams( @@ -1145,89 +1153,91 @@ INSTANTIATE_TEST_SUITE_P( AArch64::ExtensionBitset( {AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_SVE, AArch64::AEK_SVE2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_LSE, AArch64::AEK_RDM, - AArch64::AEK_SIMD, AArch64::AEK_RCPC, + AArch64::AEK_NEON, AArch64::AEK_RCPC, AArch64::AEK_RAS, AArch64::AEK_CRC, - AArch64::AEK_FP, AArch64::AEK_SB, + AArch64::AEK_FPARMV8, AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM, AArch64::AEK_FLAGM, - AArch64::AEK_PERFMON, AArch64::AEK_PREDRES, + AArch64::AEK_PMUV3, AArch64::AEK_PREDRES, AArch64::AEK_JSCVT, AArch64::AEK_FCMA}), "9.2-A"), ARMCPUTestParams( "cortex-a57", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "cortex-a65", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_DOTPROD, AArch64::AEK_FP, AArch64::AEK_FP16, - AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RCPC, - AArch64::AEK_RDM, AArch64::AEK_SIMD, AArch64::AEK_SSBS}), + AArch64::AEK_DOTPROD, AArch64::AEK_FPARMV8, + AArch64::AEK_FULLFP16, AArch64::AEK_LSE, AArch64::AEK_RAS, + AArch64::AEK_RCPC, AArch64::AEK_RDM, AArch64::AEK_NEON, + AArch64::AEK_SSBS}), "8.2-A"), ARMCPUTestParams( "cortex-a65ae", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_DOTPROD, AArch64::AEK_FP, AArch64::AEK_FP16, - AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RCPC, - AArch64::AEK_RDM, AArch64::AEK_SIMD, AArch64::AEK_SSBS}), + AArch64::AEK_DOTPROD, AArch64::AEK_FPARMV8, + AArch64::AEK_FULLFP16, AArch64::AEK_LSE, AArch64::AEK_RAS, + AArch64::AEK_RCPC, AArch64::AEK_RDM, AArch64::AEK_NEON, + AArch64::AEK_SSBS}), "8.2-A"), ARMCPUTestParams( "cortex-a72", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "cortex-a73", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "cortex-a75", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_RAS, - AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_FP16, + AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_RAS, + AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC}), "8.2-A"), ARMCPUTestParams( "cortex-a76", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_RDM, AArch64::AEK_SIMD, - AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FP16, + AArch64::AEK_FPARMV8, AArch64::AEK_RDM, AArch64::AEK_NEON, + AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS}), "8.2-A"), ARMCPUTestParams( "cortex-a76ae", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_RDM, AArch64::AEK_SIMD, - AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FP16, + AArch64::AEK_FPARMV8, AArch64::AEK_RDM, AArch64::AEK_NEON, + AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS}), "8.2-A"), ARMCPUTestParams( "cortex-a77", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_RDM, AArch64::AEK_SIMD, - AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FP16, + AArch64::AEK_FPARMV8, AArch64::AEK_RDM, AArch64::AEK_NEON, + AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS}), "8.2-A"), ARMCPUTestParams( "cortex-a78", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_RDM, AArch64::AEK_SIMD, - AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FP16, + AArch64::AEK_FPARMV8, AArch64::AEK_RDM, AArch64::AEK_NEON, + AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS, AArch64::AEK_PROFILE}), "8.2-A"), @@ -1235,8 +1245,8 @@ INSTANTIATE_TEST_SUITE_P( "cortex-a78ae", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_RDM, AArch64::AEK_SIMD, - AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FP16, + AArch64::AEK_FPARMV8, AArch64::AEK_RDM, AArch64::AEK_NEON, + AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS, AArch64::AEK_PROFILE}), "8.2-A"), @@ -1244,20 +1254,20 @@ INSTANTIATE_TEST_SUITE_P( "cortex-a78c", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_RAS, AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, AArch64::AEK_SIMD, + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_RDM, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS, AArch64::AEK_PROFILE, AArch64::AEK_FLAGM, AArch64::AEK_PAUTH}), "8.2-A"), ARMCPUTestParams( "cortex-a710", "armv9-a", "neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_FP, - AArch64::AEK_SIMD, AArch64::AEK_RAS, + {AArch64::AEK_CRC, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON, AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, - AArch64::AEK_MTE, AArch64::AEK_FP16, + AArch64::AEK_MTE, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM, @@ -1268,17 +1278,17 @@ INSTANTIATE_TEST_SUITE_P( ARMCPUTestParams( "cortex-a715", "armv9-a", "neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_FP, - AArch64::AEK_BF16, AArch64::AEK_SIMD, + {AArch64::AEK_CRC, AArch64::AEK_FPARMV8, + AArch64::AEK_BF16, AArch64::AEK_NEON, AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_MTE, AArch64::AEK_PAUTH, AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM, AArch64::AEK_SSBS, AArch64::AEK_SB, - AArch64::AEK_I8MM, AArch64::AEK_PERFMON, + AArch64::AEK_I8MM, AArch64::AEK_PMUV3, AArch64::AEK_PREDRES, AArch64::AEK_PROFILE, - AArch64::AEK_FP16FML, AArch64::AEK_FP16, + AArch64::AEK_FP16FML, AArch64::AEK_FULLFP16, AArch64::AEK_FLAGM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA}), "9-A"), @@ -1287,15 +1297,15 @@ INSTANTIATE_TEST_SUITE_P( AArch64::ExtensionBitset( {AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_SVE, AArch64::AEK_SVE2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_LSE, AArch64::AEK_RDM, - AArch64::AEK_SIMD, AArch64::AEK_RCPC, + AArch64::AEK_NEON, AArch64::AEK_RCPC, AArch64::AEK_RAS, AArch64::AEK_CRC, - AArch64::AEK_FP, AArch64::AEK_SB, + AArch64::AEK_FPARMV8, AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM, AArch64::AEK_FLAGM, - AArch64::AEK_PERFMON, AArch64::AEK_PREDRES, + AArch64::AEK_PMUV3, AArch64::AEK_PREDRES, AArch64::AEK_PROFILE, AArch64::AEK_JSCVT, AArch64::AEK_FCMA}), "9.2-A"), @@ -1304,29 +1314,33 @@ INSTANTIATE_TEST_SUITE_P( AArch64::ExtensionBitset( {AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_SVE, AArch64::AEK_SVE2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_LSE, AArch64::AEK_RDM, - AArch64::AEK_SIMD, AArch64::AEK_RCPC, + AArch64::AEK_NEON, AArch64::AEK_RCPC, AArch64::AEK_RAS, AArch64::AEK_CRC, - AArch64::AEK_FP, AArch64::AEK_SB, + AArch64::AEK_FPARMV8, AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM, AArch64::AEK_FLAGM, - AArch64::AEK_PERFMON, AArch64::AEK_PREDRES, + AArch64::AEK_PMUV3, AArch64::AEK_PREDRES, AArch64::AEK_PROFILE, AArch64::AEK_JSCVT, AArch64::AEK_FCMA}), "9.2-A"), ARMCPUTestParams( "neoverse-v1", "armv8.4-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_RAS, AArch64::AEK_SVE, AArch64::AEK_SSBS, - AArch64::AEK_RCPC, AArch64::AEK_CRC, AArch64::AEK_FP, - AArch64::AEK_SIMD, AArch64::AEK_RAS, AArch64::AEK_LSE, - AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, - AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, - AArch64::AEK_SM4, AArch64::AEK_FP16, AArch64::AEK_BF16, - AArch64::AEK_PROFILE, AArch64::AEK_RAND, AArch64::AEK_FP16FML, - AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, + {AArch64::AEK_RAS, AArch64::AEK_SVE, + AArch64::AEK_SSBS, AArch64::AEK_RCPC, + AArch64::AEK_CRC, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON, AArch64::AEK_RAS, + AArch64::AEK_LSE, AArch64::AEK_RDM, + AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, + AArch64::AEK_AES, AArch64::AEK_SHA2, + AArch64::AEK_SHA3, AArch64::AEK_SM4, + AArch64::AEK_FULLFP16, AArch64::AEK_BF16, + AArch64::AEK_PROFILE, AArch64::AEK_RNG, + AArch64::AEK_FP16FML, AArch64::AEK_I8MM, + AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.4-A"), ARMCPUTestParams( @@ -1334,14 +1348,14 @@ INSTANTIATE_TEST_SUITE_P( AArch64::ExtensionBitset( {AArch64::AEK_RAS, AArch64::AEK_SVE, AArch64::AEK_SSBS, AArch64::AEK_RCPC, - AArch64::AEK_CRC, AArch64::AEK_FP, - AArch64::AEK_SIMD, AArch64::AEK_MTE, + AArch64::AEK_CRC, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON, AArch64::AEK_MTE, AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, - AArch64::AEK_FP16, AArch64::AEK_BF16, + AArch64::AEK_FULLFP16, AArch64::AEK_BF16, AArch64::AEK_SVE2, AArch64::AEK_PROFILE, AArch64::AEK_FP16FML, AArch64::AEK_I8MM, - AArch64::AEK_SVE2BITPERM, AArch64::AEK_RAND, + AArch64::AEK_SVE2BITPERM, AArch64::AEK_RNG, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "9-A"), @@ -1350,16 +1364,16 @@ INSTANTIATE_TEST_SUITE_P( AArch64::ExtensionBitset( {AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_SVE, AArch64::AEK_SVE2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_LSE, AArch64::AEK_RDM, - AArch64::AEK_SIMD, AArch64::AEK_RCPC, + AArch64::AEK_NEON, AArch64::AEK_RCPC, AArch64::AEK_RAS, AArch64::AEK_CRC, - AArch64::AEK_FP, AArch64::AEK_PROFILE, + AArch64::AEK_FPARMV8, AArch64::AEK_PROFILE, AArch64::AEK_MTE, AArch64::AEK_SSBS, AArch64::AEK_SB, AArch64::AEK_PREDRES, AArch64::AEK_LS64, AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM, - AArch64::AEK_PERFMON, AArch64::AEK_RAND, + AArch64::AEK_PMUV3, AArch64::AEK_RNG, AArch64::AEK_SVE2BITPERM, AArch64::AEK_FP16FML, AArch64::AEK_PROFILE, AArch64::AEK_JSCVT, AArch64::AEK_FCMA}), @@ -1369,16 +1383,16 @@ INSTANTIATE_TEST_SUITE_P( AArch64::ExtensionBitset( {AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_SVE, AArch64::AEK_SVE2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_LSE, AArch64::AEK_RDM, - AArch64::AEK_SIMD, AArch64::AEK_RCPC, + AArch64::AEK_NEON, AArch64::AEK_RCPC, AArch64::AEK_RAS, AArch64::AEK_CRC, - AArch64::AEK_FP, AArch64::AEK_PROFILE, + AArch64::AEK_FPARMV8, AArch64::AEK_PROFILE, AArch64::AEK_MTE, AArch64::AEK_SSBS, AArch64::AEK_SB, AArch64::AEK_PREDRES, AArch64::AEK_LS64, AArch64::AEK_BRBE, AArch64::AEK_PAUTH, AArch64::AEK_FLAGM, - AArch64::AEK_PERFMON, AArch64::AEK_RAND, + AArch64::AEK_PMUV3, AArch64::AEK_RNG, AArch64::AEK_SVE2BITPERM, AArch64::AEK_FP16FML, AArch64::AEK_PROFILE, AArch64::AEK_JSCVT, AArch64::AEK_FCMA}), @@ -1387,30 +1401,28 @@ INSTANTIATE_TEST_SUITE_P( "cortex-r82", "armv8-r", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_RDM, AArch64::AEK_SSBS, - AArch64::AEK_DOTPROD, AArch64::AEK_FP, AArch64::AEK_SIMD, - AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_RAS, + AArch64::AEK_DOTPROD, AArch64::AEK_FPARMV8, AArch64::AEK_NEON, + AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_RAS, AArch64::AEK_RCPC, AArch64::AEK_LSE, AArch64::AEK_SB, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH, - AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, - AArch64::AEK_PREDRES}), + AArch64::AEK_FLAGM, AArch64::AEK_PMUV3, AArch64::AEK_PREDRES}), "8-R"), ARMCPUTestParams( "cortex-r82ae", "armv8-r", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_RDM, AArch64::AEK_SSBS, - AArch64::AEK_DOTPROD, AArch64::AEK_FP, AArch64::AEK_SIMD, - AArch64::AEK_FP16, AArch64::AEK_FP16FML, AArch64::AEK_RAS, + AArch64::AEK_DOTPROD, AArch64::AEK_FPARMV8, AArch64::AEK_NEON, + AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_RAS, AArch64::AEK_RCPC, AArch64::AEK_LSE, AArch64::AEK_SB, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH, - AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, - AArch64::AEK_PREDRES}), + AArch64::AEK_FLAGM, AArch64::AEK_PMUV3, AArch64::AEK_PREDRES}), "8-R"), ARMCPUTestParams( "cortex-x1", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_RDM, AArch64::AEK_SIMD, - AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FP16, + AArch64::AEK_FPARMV8, AArch64::AEK_RDM, AArch64::AEK_NEON, + AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS, AArch64::AEK_PROFILE}), "8.2-A"), @@ -1418,41 +1430,41 @@ INSTANTIATE_TEST_SUITE_P( "cortex-x1c", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_RDM, AArch64::AEK_SIMD, - AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FP16, + AArch64::AEK_FPARMV8, AArch64::AEK_RDM, AArch64::AEK_NEON, + AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS, AArch64::AEK_PAUTH, AArch64::AEK_PROFILE, AArch64::AEK_FLAGM}), "8.2-A"), ARMCPUTestParams( "cortex-x2", "armv9-a", "neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_FP, - AArch64::AEK_SIMD, AArch64::AEK_RAS, + {AArch64::AEK_CRC, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON, AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_MTE, AArch64::AEK_PAUTH, AArch64::AEK_I8MM, AArch64::AEK_BF16, AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM, AArch64::AEK_SSBS, - AArch64::AEK_SB, AArch64::AEK_FP16, + AArch64::AEK_SB, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_FLAGM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA}), "9-A"), ARMCPUTestParams( "cortex-x3", "armv9-a", "neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_FP, - AArch64::AEK_BF16, AArch64::AEK_SIMD, - AArch64::AEK_RAS, AArch64::AEK_LSE, - AArch64::AEK_RDM, AArch64::AEK_RCPC, - AArch64::AEK_DOTPROD, AArch64::AEK_MTE, - AArch64::AEK_PAUTH, AArch64::AEK_SVE, - AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM, - AArch64::AEK_SB, AArch64::AEK_PROFILE, - AArch64::AEK_PERFMON, AArch64::AEK_I8MM, - AArch64::AEK_FP16, AArch64::AEK_FP16FML, - AArch64::AEK_PREDRES, AArch64::AEK_FLAGM, - AArch64::AEK_SSBS, AArch64::AEK_JSCVT, + {AArch64::AEK_CRC, AArch64::AEK_FPARMV8, + AArch64::AEK_BF16, AArch64::AEK_NEON, + AArch64::AEK_RAS, AArch64::AEK_LSE, + AArch64::AEK_RDM, AArch64::AEK_RCPC, + AArch64::AEK_DOTPROD, AArch64::AEK_MTE, + AArch64::AEK_PAUTH, AArch64::AEK_SVE, + AArch64::AEK_SVE2, AArch64::AEK_SVE2BITPERM, + AArch64::AEK_SB, AArch64::AEK_PROFILE, + AArch64::AEK_PMUV3, AArch64::AEK_I8MM, + AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, + AArch64::AEK_PREDRES, AArch64::AEK_FLAGM, + AArch64::AEK_SSBS, AArch64::AEK_JSCVT, AArch64::AEK_FCMA}), "9-A"), ARMCPUTestParams( @@ -1460,71 +1472,71 @@ INSTANTIATE_TEST_SUITE_P( AArch64::ExtensionBitset( {AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_SVE, AArch64::AEK_SVE2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, AArch64::AEK_LSE, AArch64::AEK_RDM, - AArch64::AEK_SIMD, AArch64::AEK_RCPC, + AArch64::AEK_NEON, AArch64::AEK_RCPC, AArch64::AEK_RAS, AArch64::AEK_CRC, - AArch64::AEK_FP, AArch64::AEK_SB, + AArch64::AEK_FPARMV8, AArch64::AEK_SB, AArch64::AEK_SSBS, AArch64::AEK_MTE, AArch64::AEK_FP16FML, AArch64::AEK_PAUTH, AArch64::AEK_SVE2BITPERM, AArch64::AEK_FLAGM, - AArch64::AEK_PERFMON, AArch64::AEK_PREDRES, + AArch64::AEK_PMUV3, AArch64::AEK_PREDRES, AArch64::AEK_PROFILE, AArch64::AEK_JSCVT, AArch64::AEK_FCMA}), "9.2-A"), ARMCPUTestParams( "cyclone", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_NONE, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "apple-a7", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_NONE, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "apple-a8", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_NONE, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "apple-a9", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_NONE, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "apple-a10", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_RDM, AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_RDM, AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "apple-a11", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_LSE, AArch64::AEK_RAS, - AArch64::AEK_RDM, AArch64::AEK_SIMD, AArch64::AEK_FP16}), + AArch64::AEK_FPARMV8, AArch64::AEK_LSE, AArch64::AEK_RAS, + AArch64::AEK_RDM, AArch64::AEK_NEON, AArch64::AEK_FULLFP16}), "8.2-A"), ARMCPUTestParams( "apple-a12", "armv8.3-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_LSE, + AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, AArch64::AEK_RCPC, - AArch64::AEK_FP16, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, + AArch64::AEK_FULLFP16, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.3-A"), ARMCPUTestParams( "apple-a13", "armv8.4-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, + AArch64::AEK_SHA3, AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, - AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.4-A"), @@ -1532,9 +1544,9 @@ INSTANTIATE_TEST_SUITE_P( "apple-a14", "armv8.5-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, + AArch64::AEK_SHA3, AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, - AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.5-A"), @@ -1542,9 +1554,9 @@ INSTANTIATE_TEST_SUITE_P( "apple-a15", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, + AArch64::AEK_SHA3, AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, - AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), @@ -1553,9 +1565,9 @@ INSTANTIATE_TEST_SUITE_P( "apple-a16", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, + AArch64::AEK_SHA3, AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, - AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), @@ -1564,9 +1576,9 @@ INSTANTIATE_TEST_SUITE_P( "apple-a17", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, + AArch64::AEK_SHA3, AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, - AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), @@ -1575,9 +1587,9 @@ INSTANTIATE_TEST_SUITE_P( "apple-m1", "armv8.5-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, + AArch64::AEK_SHA3, AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, - AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.5-A"), @@ -1585,9 +1597,9 @@ INSTANTIATE_TEST_SUITE_P( "apple-m2", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, + AArch64::AEK_SHA3, AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, - AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), @@ -1596,9 +1608,9 @@ INSTANTIATE_TEST_SUITE_P( "apple-m3", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_SHA3, AArch64::AEK_FP, AArch64::AEK_SIMD, + AArch64::AEK_SHA3, AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, - AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FP16, + AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_SHA3, AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), @@ -1607,76 +1619,77 @@ INSTANTIATE_TEST_SUITE_P( "apple-s4", "armv8.3-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_LSE, + AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, AArch64::AEK_RCPC, - AArch64::AEK_FP16, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, + AArch64::AEK_FULLFP16, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.3-A"), ARMCPUTestParams( "apple-s5", "armv8.3-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_LSE, + AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RDM, AArch64::AEK_RCPC, - AArch64::AEK_FP16, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, + AArch64::AEK_FULLFP16, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.3-A"), ARMCPUTestParams( "exynos-m3", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "exynos-m4", "armv8.2-a", "crypto-neon-fp-armv8", - AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_DOTPROD, - AArch64::AEK_FP, AArch64::AEK_FP16, - AArch64::AEK_LSE, AArch64::AEK_RAS, - AArch64::AEK_RDM, AArch64::AEK_SIMD}), + AArch64::ExtensionBitset( + {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, + AArch64::AEK_DOTPROD, AArch64::AEK_FPARMV8, + AArch64::AEK_FULLFP16, AArch64::AEK_LSE, AArch64::AEK_RAS, + AArch64::AEK_RDM, AArch64::AEK_NEON}), "8.2-A"), ARMCPUTestParams( "exynos-m5", "armv8.2-a", "crypto-neon-fp-armv8", - AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_DOTPROD, - AArch64::AEK_FP, AArch64::AEK_FP16, - AArch64::AEK_LSE, AArch64::AEK_RAS, - AArch64::AEK_RDM, AArch64::AEK_SIMD}), + AArch64::ExtensionBitset( + {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, + AArch64::AEK_DOTPROD, AArch64::AEK_FPARMV8, + AArch64::AEK_FULLFP16, AArch64::AEK_LSE, AArch64::AEK_RAS, + AArch64::AEK_RDM, AArch64::AEK_NEON}), "8.2-A"), ARMCPUTestParams( "falkor", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD, AArch64::AEK_RDM}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON, AArch64::AEK_RDM}), "8-A"), ARMCPUTestParams( "kryo", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8-A"), ARMCPUTestParams( "neoverse-e1", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_DOTPROD, AArch64::AEK_FP, AArch64::AEK_FP16, - AArch64::AEK_LSE, AArch64::AEK_RAS, AArch64::AEK_RCPC, - AArch64::AEK_RDM, AArch64::AEK_SIMD, AArch64::AEK_SSBS}), + AArch64::AEK_DOTPROD, AArch64::AEK_FPARMV8, + AArch64::AEK_FULLFP16, AArch64::AEK_LSE, AArch64::AEK_RAS, + AArch64::AEK_RCPC, AArch64::AEK_RDM, AArch64::AEK_NEON, + AArch64::AEK_SSBS}), "8.2-A"), ARMCPUTestParams( "neoverse-n1", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_DOTPROD, AArch64::AEK_FP, AArch64::AEK_FP16, - AArch64::AEK_LSE, AArch64::AEK_PROFILE, AArch64::AEK_RAS, - AArch64::AEK_RCPC, AArch64::AEK_RDM, AArch64::AEK_SIMD, - AArch64::AEK_SSBS}), + AArch64::AEK_DOTPROD, AArch64::AEK_FPARMV8, + AArch64::AEK_FULLFP16, AArch64::AEK_LSE, AArch64::AEK_PROFILE, + AArch64::AEK_RAS, AArch64::AEK_RCPC, AArch64::AEK_RDM, + AArch64::AEK_NEON, AArch64::AEK_SSBS}), "8.2-A"), ARMCPUTestParams( "neoverse-n2", "armv9-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_FP, - AArch64::AEK_SIMD, AArch64::AEK_FP16, + {AArch64::AEK_CRC, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON, AArch64::AEK_FULLFP16, AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_SVE, AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_RDM, @@ -1690,122 +1703,130 @@ INSTANTIATE_TEST_SUITE_P( ARMCPUTestParams( "neoverse-n3", "armv9.2-a", "neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_BF16, AArch64::AEK_I8MM, - AArch64::AEK_SVE, AArch64::AEK_SVE2, - AArch64::AEK_FP16, AArch64::AEK_DOTPROD, - AArch64::AEK_LSE, AArch64::AEK_RDM, - AArch64::AEK_SIMD, AArch64::AEK_RCPC, - AArch64::AEK_RAS, AArch64::AEK_CRC, - AArch64::AEK_FP, AArch64::AEK_PROFILE, - AArch64::AEK_MTE, AArch64::AEK_SSBS, - AArch64::AEK_SB, AArch64::AEK_PREDRES, - AArch64::AEK_FCMA, AArch64::AEK_PAUTH, - AArch64::AEK_FLAGM, AArch64::AEK_PERFMON, - AArch64::AEK_RAND, AArch64::AEK_SVE2BITPERM, - AArch64::AEK_FP16FML, AArch64::AEK_PROFILE, + {AArch64::AEK_BF16, AArch64::AEK_I8MM, + AArch64::AEK_SVE, AArch64::AEK_SVE2, + AArch64::AEK_FULLFP16, AArch64::AEK_DOTPROD, + AArch64::AEK_LSE, AArch64::AEK_RDM, + AArch64::AEK_NEON, AArch64::AEK_RCPC, + AArch64::AEK_RAS, AArch64::AEK_CRC, + AArch64::AEK_FPARMV8, AArch64::AEK_PROFILE, + AArch64::AEK_MTE, AArch64::AEK_SSBS, + AArch64::AEK_SB, AArch64::AEK_PREDRES, + AArch64::AEK_FCMA, AArch64::AEK_PAUTH, + AArch64::AEK_FLAGM, AArch64::AEK_PMUV3, + AArch64::AEK_RNG, AArch64::AEK_SVE2BITPERM, + AArch64::AEK_FP16FML, AArch64::AEK_PROFILE, AArch64::AEK_JSCVT}), "9.2-A"), ARMCPUTestParams( "ampere1", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_FP, AArch64::AEK_FP16, - AArch64::AEK_SIMD, AArch64::AEK_RAS, AArch64::AEK_LSE, - AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, - AArch64::AEK_SHA3, AArch64::AEK_BF16, AArch64::AEK_SHA2, - AArch64::AEK_AES, AArch64::AEK_I8MM, AArch64::AEK_SSBS, - AArch64::AEK_SB, AArch64::AEK_RAND, AArch64::AEK_JSCVT, + {AArch64::AEK_CRC, AArch64::AEK_FPARMV8, AArch64::AEK_FULLFP16, + AArch64::AEK_NEON, AArch64::AEK_RAS, AArch64::AEK_LSE, + AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, + AArch64::AEK_SHA3, AArch64::AEK_BF16, AArch64::AEK_SHA2, + AArch64::AEK_AES, AArch64::AEK_I8MM, AArch64::AEK_SSBS, + AArch64::AEK_SB, AArch64::AEK_RNG, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.6-A"), ARMCPUTestParams( "ampere1a", "armv8.6-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_FP, AArch64::AEK_FP16, - AArch64::AEK_SIMD, AArch64::AEK_RAS, AArch64::AEK_LSE, - AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, - AArch64::AEK_SM4, AArch64::AEK_SHA3, AArch64::AEK_BF16, - AArch64::AEK_SHA2, AArch64::AEK_AES, AArch64::AEK_I8MM, - AArch64::AEK_SSBS, AArch64::AEK_SB, AArch64::AEK_RAND, - AArch64::AEK_MTE, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, + {AArch64::AEK_CRC, AArch64::AEK_FPARMV8, AArch64::AEK_FULLFP16, + AArch64::AEK_NEON, AArch64::AEK_RAS, AArch64::AEK_LSE, + AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, + AArch64::AEK_SM4, AArch64::AEK_SHA3, AArch64::AEK_BF16, + AArch64::AEK_SHA2, AArch64::AEK_AES, AArch64::AEK_I8MM, + AArch64::AEK_SSBS, AArch64::AEK_SB, AArch64::AEK_RNG, + AArch64::AEK_MTE, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.6-A"), ARMCPUTestParams( "ampere1b", "armv8.7-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_CRC, AArch64::AEK_FP, AArch64::AEK_FP16, - AArch64::AEK_SIMD, AArch64::AEK_RAS, AArch64::AEK_LSE, - AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, - AArch64::AEK_SM4, AArch64::AEK_SHA3, AArch64::AEK_BF16, - AArch64::AEK_SHA2, AArch64::AEK_AES, AArch64::AEK_I8MM, - AArch64::AEK_SSBS, AArch64::AEK_SB, AArch64::AEK_RAND, - AArch64::AEK_MTE, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, - AArch64::AEK_PAUTH, AArch64::AEK_CSSC}), + {AArch64::AEK_CRC, AArch64::AEK_FPARMV8, + AArch64::AEK_FULLFP16, AArch64::AEK_NEON, + AArch64::AEK_RAS, AArch64::AEK_LSE, + AArch64::AEK_RDM, AArch64::AEK_RCPC, + AArch64::AEK_DOTPROD, AArch64::AEK_SM4, + AArch64::AEK_SHA3, AArch64::AEK_BF16, + AArch64::AEK_SHA2, AArch64::AEK_AES, + AArch64::AEK_I8MM, AArch64::AEK_SSBS, + AArch64::AEK_SB, AArch64::AEK_RNG, + AArch64::AEK_MTE, AArch64::AEK_JSCVT, + AArch64::AEK_FCMA, AArch64::AEK_PAUTH, + AArch64::AEK_CSSC}), "8.7-A"), ARMCPUTestParams( "neoverse-512tvb", "armv8.4-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( - {AArch64::AEK_RAS, AArch64::AEK_SVE, AArch64::AEK_SSBS, - AArch64::AEK_RCPC, AArch64::AEK_CRC, AArch64::AEK_FP, - AArch64::AEK_SIMD, AArch64::AEK_RAS, AArch64::AEK_LSE, - AArch64::AEK_RDM, AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, - AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_SHA3, - AArch64::AEK_SM4, AArch64::AEK_FP16, AArch64::AEK_BF16, - AArch64::AEK_PROFILE, AArch64::AEK_RAND, AArch64::AEK_FP16FML, - AArch64::AEK_I8MM, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, + {AArch64::AEK_RAS, AArch64::AEK_SVE, + AArch64::AEK_SSBS, AArch64::AEK_RCPC, + AArch64::AEK_CRC, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON, AArch64::AEK_RAS, + AArch64::AEK_LSE, AArch64::AEK_RDM, + AArch64::AEK_RCPC, AArch64::AEK_DOTPROD, + AArch64::AEK_AES, AArch64::AEK_SHA2, + AArch64::AEK_SHA3, AArch64::AEK_SM4, + AArch64::AEK_FULLFP16, AArch64::AEK_BF16, + AArch64::AEK_PROFILE, AArch64::AEK_RNG, + AArch64::AEK_FP16FML, AArch64::AEK_I8MM, + AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.4-A"), ARMCPUTestParams( "thunderx2t99", "armv8.1-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_LSE, - AArch64::AEK_RDM, AArch64::AEK_FP, - AArch64::AEK_SIMD}), + AArch64::AEK_RDM, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON}), "8.1-A"), ARMCPUTestParams( "thunderx3t110", "armv8.3-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_FP, - AArch64::AEK_SIMD, AArch64::AEK_RAS, AArch64::AEK_RCPC, + AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON, AArch64::AEK_RAS, AArch64::AEK_RCPC, AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_PAUTH}), "8.3-A"), ARMCPUTestParams( "thunderx", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_SIMD, - AArch64::AEK_FP}), + AArch64::AEK_SHA2, AArch64::AEK_NEON, + AArch64::AEK_FPARMV8}), "8-A"), ARMCPUTestParams( "thunderxt81", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_SIMD, - AArch64::AEK_FP}), + AArch64::AEK_SHA2, AArch64::AEK_NEON, + AArch64::AEK_FPARMV8}), "8-A"), ARMCPUTestParams( "thunderxt83", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_SIMD, - AArch64::AEK_FP}), + AArch64::AEK_SHA2, AArch64::AEK_NEON, + AArch64::AEK_FPARMV8}), "8-A"), ARMCPUTestParams( "thunderxt88", "armv8-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_SIMD, - AArch64::AEK_FP}), + AArch64::AEK_SHA2, AArch64::AEK_NEON, + AArch64::AEK_FPARMV8}), "8-A"), ARMCPUTestParams( "tsv110", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_RAS, + AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_RDM, AArch64::AEK_PROFILE, - AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_FP16, + AArch64::AEK_JSCVT, AArch64::AEK_FCMA, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_DOTPROD}), "8.2-A"), ARMCPUTestParams( "a64fx", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset({AArch64::AEK_CRC, AArch64::AEK_AES, - AArch64::AEK_SHA2, AArch64::AEK_FP, - AArch64::AEK_SIMD, AArch64::AEK_FP16, + AArch64::AEK_SHA2, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON, AArch64::AEK_FULLFP16, AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_SVE, AArch64::AEK_RDM}), "8.2-A"), @@ -1813,7 +1834,7 @@ INSTANTIATE_TEST_SUITE_P( "carmel", "armv8.2-a", "crypto-neon-fp-armv8", AArch64::ExtensionBitset( {AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2, - AArch64::AEK_FP, AArch64::AEK_SIMD, AArch64::AEK_FP16, + AArch64::AEK_FPARMV8, AArch64::AEK_NEON, AArch64::AEK_FULLFP16, AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_RDM}), "8.2-A")), ARMCPUTestParams::PrintToStringParamName); @@ -1972,14 +1993,14 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) { AArch64::AEK_RDM, AArch64::AEK_CRYPTO, AArch64::AEK_SM4, AArch64::AEK_SHA3, AArch64::AEK_SHA2, AArch64::AEK_AES, - AArch64::AEK_DOTPROD, AArch64::AEK_FP, - AArch64::AEK_SIMD, AArch64::AEK_FP16, + AArch64::AEK_DOTPROD, AArch64::AEK_FPARMV8, + AArch64::AEK_NEON, AArch64::AEK_FULLFP16, AArch64::AEK_FP16FML, AArch64::AEK_PROFILE, AArch64::AEK_RAS, AArch64::AEK_SVE, AArch64::AEK_SVE2, AArch64::AEK_SVE2AES, AArch64::AEK_SVE2SM4, AArch64::AEK_SVE2SHA3, AArch64::AEK_SVE2BITPERM, AArch64::AEK_RCPC, - AArch64::AEK_RAND, AArch64::AEK_MTE, + AArch64::AEK_RNG, AArch64::AEK_MTE, AArch64::AEK_SSBS, AArch64::AEK_SB, AArch64::AEK_PREDRES, AArch64::AEK_BF16, AArch64::AEK_I8MM, AArch64::AEK_F32MM, @@ -1989,19 +2010,19 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) { AArch64::AEK_SME, AArch64::AEK_SMEF64F64, AArch64::AEK_SMEI16I64, AArch64::AEK_SME2, AArch64::AEK_HBC, AArch64::AEK_MOPS, - AArch64::AEK_PERFMON, AArch64::AEK_SVE2p1, - AArch64::AEK_SME2p1, AArch64::AEK_B16B16, + AArch64::AEK_PMUV3, AArch64::AEK_SVE2P1, + AArch64::AEK_SME2P1, AArch64::AEK_B16B16, AArch64::AEK_SMEF16F16, AArch64::AEK_CSSC, AArch64::AEK_RCPC3, AArch64::AEK_THE, AArch64::AEK_D128, AArch64::AEK_LSE128, - AArch64::AEK_SPECRES2, AArch64::AEK_RASv2, + AArch64::AEK_PREDRES2, AArch64::AEK_RASV2, AArch64::AEK_ITE, AArch64::AEK_GCS, AArch64::AEK_FPMR, AArch64::AEK_FP8, AArch64::AEK_FAMINMAX, AArch64::AEK_FP8FMA, AArch64::AEK_SSVE_FP8FMA, AArch64::AEK_FP8DOT2, AArch64::AEK_SSVE_FP8DOT2, AArch64::AEK_FP8DOT4, AArch64::AEK_SSVE_FP8DOT4, AArch64::AEK_LUT, - AArch64::AEK_SME_LUTv2, AArch64::AEK_SMEF8F16, + AArch64::AEK_SME_LUTV2, AArch64::AEK_SMEF8F16, AArch64::AEK_SMEF8F32, AArch64::AEK_SMEFA64, AArch64::AEK_CPA, AArch64::AEK_PAUTHLR, AArch64::AEK_TLBIW, AArch64::AEK_JSCVT, @@ -2036,7 +2057,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) { EXPECT_TRUE(llvm::is_contained(Features, "+neon")); EXPECT_TRUE(llvm::is_contained(Features, "+fullfp16")); EXPECT_TRUE(llvm::is_contained(Features, "+fp16fml")); - EXPECT_TRUE(llvm::is_contained(Features, "+spe")); + EXPECT_TRUE(llvm::is_contained(Features, "+profile")); EXPECT_TRUE(llvm::is_contained(Features, "+ras")); EXPECT_TRUE(llvm::is_contained(Features, "+sve")); EXPECT_TRUE(llvm::is_contained(Features, "+sve2")); @@ -2047,7 +2068,7 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) { EXPECT_TRUE(llvm::is_contained(Features, "+sve2p1")); EXPECT_TRUE(llvm::is_contained(Features, "+b16b16")); EXPECT_TRUE(llvm::is_contained(Features, "+rcpc")); - EXPECT_TRUE(llvm::is_contained(Features, "+rand")); + EXPECT_TRUE(llvm::is_contained(Features, "+rng")); EXPECT_TRUE(llvm::is_contained(Features, "+mte")); EXPECT_TRUE(llvm::is_contained(Features, "+ssbs")); EXPECT_TRUE(llvm::is_contained(Features, "+sb")); @@ -2069,13 +2090,13 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) { EXPECT_TRUE(llvm::is_contained(Features, "+sme2p1")); EXPECT_TRUE(llvm::is_contained(Features, "+hbc")); EXPECT_TRUE(llvm::is_contained(Features, "+mops")); - EXPECT_TRUE(llvm::is_contained(Features, "+perfmon")); + EXPECT_TRUE(llvm::is_contained(Features, "+pmuv3")); EXPECT_TRUE(llvm::is_contained(Features, "+cssc")); EXPECT_TRUE(llvm::is_contained(Features, "+rcpc3")); EXPECT_TRUE(llvm::is_contained(Features, "+the")); EXPECT_TRUE(llvm::is_contained(Features, "+d128")); EXPECT_TRUE(llvm::is_contained(Features, "+lse128")); - EXPECT_TRUE(llvm::is_contained(Features, "+specres2")); + EXPECT_TRUE(llvm::is_contained(Features, "+predres2")); EXPECT_TRUE(llvm::is_contained(Features, "+ite")); EXPECT_TRUE(llvm::is_contained(Features, "+gcs")); EXPECT_TRUE(llvm::is_contained(Features, "+fpmr")); @@ -2095,8 +2116,8 @@ TEST(TargetParserTest, AArch64ExtensionFeatures) { EXPECT_TRUE(llvm::is_contained(Features, "+cpa")); EXPECT_TRUE(llvm::is_contained(Features, "+pauth-lr")); EXPECT_TRUE(llvm::is_contained(Features, "+tlbiw")); - EXPECT_TRUE(llvm::is_contained(Features, "+jsconv")); - EXPECT_TRUE(llvm::is_contained(Features, "+complxnum")); + EXPECT_TRUE(llvm::is_contained(Features, "+jscvt")); + EXPECT_TRUE(llvm::is_contained(Features, "+fcma")); // Assuming we listed every extension above, this should produce the same // result. (note that AEK_NONE doesn't have a name so it won't be in the @@ -2187,7 +2208,7 @@ TEST(TargetParserTest, AArch64ArchExtFeature) { {"simd", "nosimd", "+neon", "-neon"}, {"fp16", "nofp16", "+fullfp16", "-fullfp16"}, {"fp16fml", "nofp16fml", "+fp16fml", "-fp16fml"}, - {"profile", "noprofile", "+spe", "-spe"}, + {"profile", "noprofile", "+profile", "-profile"}, {"ras", "noras", "+ras", "-ras"}, {"lse", "nolse", "+lse", "-lse"}, {"rdm", "nordm", "+rdm", "-rdm"}, @@ -2201,7 +2222,7 @@ TEST(TargetParserTest, AArch64ArchExtFeature) { {"sve2-bitperm", "nosve2-bitperm", "+sve2-bitperm", "-sve2-bitperm"}, {"dotprod", "nodotprod", "+dotprod", "-dotprod"}, {"rcpc", "norcpc", "+rcpc", "-rcpc"}, - {"rng", "norng", "+rand", "-rand"}, + {"rng", "norng", "+rng", "-rng"}, {"memtag", "nomemtag", "+mte", "-mte"}, {"tme", "notme", "+tme", "-tme"}, {"pauth", "nopauth", "+pauth", "-pauth"}, @@ -2220,8 +2241,8 @@ TEST(TargetParserTest, AArch64ArchExtFeature) { {"sme2p1", "nosme2p1", "+sme2p1", "-sme2p1"}, {"hbc", "nohbc", "+hbc", "-hbc"}, {"mops", "nomops", "+mops", "-mops"}, - {"pmuv3", "nopmuv3", "+perfmon", "-perfmon"}, - {"predres2", "nopredres2", "+specres2", "-specres2"}, + {"pmuv3", "nopmuv3", "+pmuv3", "-pmuv3"}, + {"predres2", "nopredres2", "+predres2", "-predres2"}, {"rasv2", "norasv2", "+rasv2", "-rasv2"}, {"gcs", "nogcs", "+gcs", "-gcs"}, {"fpmr", "nofpmr", "+fpmr", "-fpmr"}, @@ -2430,8 +2451,8 @@ AArch64ExtensionDependenciesBaseArchTestParams {AArch64::ARMV8A, {"simd", "nofp"}, {}, {"fp-armv8", "neon"}}, // fp -> jscvt - {AArch64::ARMV8A, {"nofp", "jscvt"}, {"fp-armv8", "jsconv"}, {}}, - {AArch64::ARMV8A, {"jscvt", "nofp"}, {}, {"fp-armv8", "jsconv"}}, + {AArch64::ARMV8A, {"nofp", "jscvt"}, {"fp-armv8", "jscvt"}, {}}, + {AArch64::ARMV8A, {"jscvt", "nofp"}, {}, {"fp-armv8", "jscvt"}}, // simd -> {aes, sha2, sha3, sm4} {AArch64::ARMV8A, {"nosimd", "aes"}, {"neon", "aes"}, {}}, @@ -2448,8 +2469,8 @@ AArch64ExtensionDependenciesBaseArchTestParams {AArch64::ARMV8A, {"rdm", "nosimd"}, {}, {"neon", "rdm"}}, {AArch64::ARMV8A, {"nosimd", "dotprod"}, {"neon", "dotprod"}, {}}, {AArch64::ARMV8A, {"dotprod", "nosimd"}, {}, {"neon", "dotprod"}}, - {AArch64::ARMV8A, {"nosimd", "fcma"}, {"neon", "complxnum"}, {}}, - {AArch64::ARMV8A, {"fcma", "nosimd"}, {}, {"neon", "complxnum"}}, + {AArch64::ARMV8A, {"nosimd", "fcma"}, {"neon", "fcma"}, {}}, + {AArch64::ARMV8A, {"fcma", "nosimd"}, {}, {"neon", "fcma"}}, // fp16 -> {fp16fml, sve} {AArch64::ARMV8A, {"nofp16", "fp16fml"}, {"fullfp16", "fp16fml"}, {}}, @@ -2547,12 +2568,12 @@ AArch64ExtensionDependenciesBaseArchTestParams // predres -> predres2 {AArch64::ARMV8A, {"nopredres", "predres2"}, - {"predres", "specres2"}, + {"predres", "predres2"}, {}}, {AArch64::ARMV8A, {"predres2", "nopredres"}, {}, - {"predres", "specres2"}}, + {"predres", "predres2"}}, // ras -> ras2 {AArch64::ARMV8A, {"noras", "rasv2"}, {"ras", "rasv2"}, {}}, @@ -2584,7 +2605,7 @@ AArch64ExtensionDependenciesBaseCPUTestParams {}, {"v9.2a", "bf16", "crc", "dotprod", "flagm", "fp-armv8", "fullfp16", "fp16fml", "i8mm", "lse", "mte", "pauth", - "perfmon", "predres", "ras", "rcpc", "rdm", "sb", + "pmuv3", "predres", "ras", "rcpc", "rdm", "sb", "neon", "ssbs", "sve", "sve2-bitperm", "sve2"}, {}},