Add bittest instructions for x86

Author: mehcode

crates/core_arch/src/x86/bt.rs

@@ -0,0 +1,105 @@
+#[cfg(test)]
+use stdsimd_test::assert_instr;
+
+/// Return the bit at index `b` of 32-bit integer `a`.
+#[inline]
+#[cfg_attr(test, assert_instr(bt))]
+#[unstable(feature = "bittest", issue = "0")]
+pub unsafe fn _bittest_u32(a: &u32, b: u32) -> u8 {
+    let r: u8;
+    asm!("btl $2, $1\nsetc ${0:b}"
+         : "=r"(r)
+         : "m"(a), "lr"(b)
+         : "cc", "flags", "fpsr");
+    r
+}
+
+/// Return the bit at index `b` of 32-bit integer `a`,
+/// and set that bit to one.
+#[inline]
+#[cfg_attr(test, assert_instr(bts))]
+#[unstable(feature = "bittest", issue = "0")]
+pub unsafe fn _bittestandset_u32(a: &mut u32, b: u32) -> u8 {
+    let r: u8;
+    asm!("btsl $2, $0\nsetc ${1:b}"
+         : "=*m"(a), "=r"(r)
+         : "lr"(b)
+         : "cc", "flags", "fpsr");
+    r
+}
+
+/// Return the bit at index `b` of 32-bit integer `a`,
+/// and set that bit to zero.
+#[inline]
+#[cfg_attr(test, assert_instr(btr))]
+#[unstable(feature = "bittest", issue = "0")]
+pub unsafe fn _bittestandreset_u32(a: &mut u32, b: u32) -> u8 {
+    let r: u8;
+    asm!("btrl $2, $0\nsetc ${1:b}"
+         : "=*m"(a), "=r"(r)
+         : "lr"(b)
+         : "cc", "flags", "fpsr");
+    r
+}
+
+/// Return the bit at index `b` of 32-bit integer `a`,
+/// and set that bit to its complement.
+#[inline]
+#[cfg_attr(test, assert_instr(btc))]
+#[unstable(feature = "bittest", issue = "0")]
+pub unsafe fn _bittestandcomplement_u32(a: &mut u32, b: u32) -> u8 {
+    let r: u8;
+    asm!("btcl $2, $0\nsetc ${1:b}"
+         : "=*m"(a), "=r"(r)
+         : "lr"(b)
+         : "cc", "flags", "fpsr");
+    r
+}
+
+#[cfg(test)]
+mod tests {
+    use crate::core_arch::x86::*;
+
+    #[test]
+    fn test_bittest_u32() {
+        unsafe {
+            let a = 0b0101_0000u32;
+            assert_eq!(_bittest_u32(&a, 4), 1);
+            assert_eq!(_bittest_u32(&a, 5), 0);
+        }
+    }
+
+    #[test]
+    fn test_bittestandset_u32() {
+        unsafe {
+            let mut a = 0b0101_0000u32;
+            assert_eq!(_bittestandset_u32(&mut a, 4), 1);
+            assert_eq!(_bittestandset_u32(&mut a, 4), 1);
+            assert_eq!(_bittestandset_u32(&mut a, 5), 0);
+            assert_eq!(_bittestandset_u32(&mut a, 5), 1);
+        }
+    }
+
+    #[test]
+    fn test_bittestandreset_u32() {
+        unsafe {
+            let mut a = 0b0101_0000u32;
+            assert_eq!(_bittestandreset_u32(&mut a, 4), 1);
+            assert_eq!(_bittestandreset_u32(&mut a, 4), 0);
+            assert_eq!(_bittestandreset_u32(&mut a, 5), 0);
+            assert_eq!(_bittestandreset_u32(&mut a, 5), 0);
+        }
+    }
+
+    #[test]
+    fn test_bittestandcomplement_u32() {
+        unsafe {
+            let mut a = 0b0101_0000u32;
+            assert_eq!(_bittestandcomplement_u32(&mut a, 4), 1);
+            assert_eq!(_bittestandcomplement_u32(&mut a, 4), 0);
+            assert_eq!(_bittestandcomplement_u32(&mut a, 4), 1);
+            assert_eq!(_bittestandcomplement_u32(&mut a, 5), 0);
+            assert_eq!(_bittestandcomplement_u32(&mut a, 5), 1);
+        }
+    }
+}

crates/core_arch/src/x86/mod.rs

@@ -562,3 +562,6 @@ pub use self::avx512f::*;
 
 mod avx512ifma;
 pub use self::avx512ifma::*;
+
+mod bt;
+pub use self::bt::*;

crates/core_arch/src/x86_64/bt.rs

@@ -0,0 +1,105 @@
+#[cfg(test)]
+use stdsimd_test::assert_instr;
+
+/// Return the bit at index `b` of 64-bit integer `a`.
+#[inline]
+#[cfg_attr(test, assert_instr(bt))]
+#[unstable(feature = "bittest", issue = "0")]
+pub unsafe fn _bittest_u64(a: &u64, b: u64) -> u8 {
+    let r: u8;
+    asm!("btq $2, $1\nsetc ${0:b}"
+         : "=r"(r)
+         : "m"(a), "lr"(b)
+         : "cc", "flags", "fpsr");
+    r
+}
+
+/// Return the bit at index `b` of 64-bit integer `a`,
+/// and set that bit to one.
+#[inline]
+#[cfg_attr(test, assert_instr(bts))]
+#[unstable(feature = "bittest", issue = "0")]
+pub unsafe fn _bittestandset_u64(a: &mut u64, b: u64) -> u8 {
+    let r: u8;
+    asm!("btsq $2, $0\nsetc ${1:b}"
+         : "=*m"(a), "=r"(r)
+         : "lr"(b)
+         : "cc", "flags", "fpsr");
+    r
+}
+
+/// Return the bit at index `b` of 64-bit integer `a`,
+/// and set that bit to zero.
+#[inline]
+#[cfg_attr(test, assert_instr(btr))]
+#[unstable(feature = "bittest", issue = "0")]
+pub unsafe fn _bittestandreset_u64(a: &mut u64, b: u64) -> u8 {
+    let r: u8;
+    asm!("btrq $2, $0\nsetc ${1:b}"
+         : "=*m"(a), "=r"(r)
+         : "lr"(b)
+         : "cc", "flags", "fpsr");
+    r
+}
+
+/// Return the bit at index `b` of 64-bit integer `a`,
+/// and set that bit to its complement.
+#[inline]
+#[cfg_attr(test, assert_instr(btc))]
+#[unstable(feature = "bittest", issue = "0")]
+pub unsafe fn _bittestandcomplement_u64(a: &mut u64, b: u64) -> u8 {
+    let r: u8;
+    asm!("btcq $2, $0\nsetc ${1:b}"
+         : "=*m"(a), "=r"(r)
+         : "lr"(b)
+         : "cc", "flags", "fpsr");
+    r
+}
+
+#[cfg(test)]
+mod tests {
+    use crate::core_arch::x86_64::*;
+
+    #[test]
+    fn test_bittest_u64() {
+        unsafe {
+            let a = 0b0101_0000u64;
+            assert_eq!(_bittest_u64(&a, 4), 1);
+            assert_eq!(_bittest_u64(&a, 5), 0);
+        }
+    }
+
+    #[test]
+    fn test_bittestandset_u64() {
+        unsafe {
+            let mut a = 0b0101_0000u64;
+            assert_eq!(_bittestandset_u64(&mut a, 4), 1);
+            assert_eq!(_bittestandset_u64(&mut a, 4), 1);
+            assert_eq!(_bittestandset_u64(&mut a, 5), 0);
+            assert_eq!(_bittestandset_u64(&mut a, 5), 1);
+        }
+    }
+
+    #[test]
+    fn test_bittestandreset_u64() {
+        unsafe {
+            let mut a = 0b0101_0000u64;
+            assert_eq!(_bittestandreset_u64(&mut a, 4), 1);
+            assert_eq!(_bittestandreset_u64(&mut a, 4), 0);
+            assert_eq!(_bittestandreset_u64(&mut a, 5), 0);
+            assert_eq!(_bittestandreset_u64(&mut a, 5), 0);
+        }
+    }
+
+    #[test]
+    fn test_bittestandcomplement_u64() {
+        unsafe {
+            let mut a = 0b0101_0000u64;
+            assert_eq!(_bittestandcomplement_u64(&mut a, 4), 1);
+            assert_eq!(_bittestandcomplement_u64(&mut a, 4), 0);
+            assert_eq!(_bittestandcomplement_u64(&mut a, 4), 1);
+            assert_eq!(_bittestandcomplement_u64(&mut a, 5), 0);
+            assert_eq!(_bittestandcomplement_u64(&mut a, 5), 1);
+        }
+    }
+}

crates/core_arch/src/x86_64/mod.rs

@@ -44,3 +44,6 @@ pub use self::cmpxchg16b::*;
 
 mod adx;
 pub use self::adx::*;
+
+mod bt;
+pub use self::bt::*;