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[MP1] Update STM32MP1xx CMSIS Drivers to v1.4.0
Included in STM32CubeMP1 FW 1.4.0 Signed-off-by: Frederic Pillon <[email protected]>
1 parent e2c9709 commit 264693b

33 files changed

+275
-365
lines changed

‎system/Drivers/CMSIS/Device/ST/STM32MP1xx/Include/stm32mp151axx_ca7.h

Lines changed: 11 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1088,14 +1088,11 @@ typedef struct
10881088
__IO uint32_t EXTICR[4]; /*!< EXTI Configuration Register mask register, Address offset: 0x60 */
10891089
uint32_t RESERVED4[4]; /*!< Reserved, offset 0x70 -> 0x7C */
10901090
__IO uint32_t C1IMR1; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0x80 */
1091-
__IO uint32_t C1EMR1; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0x84 */
1092-
__IO uint32_t RESERVED5[2]; /*!< Reserved, Address offset: 0x88 - 0x8C */
1091+
__IO uint32_t RESERVED5[3]; /*!< Reserved, Address offset: 0x84 - 0x8C */
10931092
__IO uint32_t C1IMR2; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0x90 */
1094-
__IO uint32_t C1EMR2; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0x94 */
1095-
__IO uint32_t RESERVED6[2]; /*!< Reserved, Address offset: 0x98 - 0x9C */
1093+
__IO uint32_t RESERVED6[3]; /*!< Reserved, Address offset: 0x94 - 0x9C */
10961094
__IO uint32_t C1IMR3; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0xA0 */
1097-
__IO uint32_t C1EMR3; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0xA4 */
1098-
__IO uint32_t RESERVED7[6]; /*!< Reserved, Address offset: 0xA8 - 0xBC */
1095+
__IO uint32_t RESERVED7[7]; /*!< Reserved, Address offset: 0xA4 - 0xBC */
10991096
__IO uint32_t C2IMR1; /*!< EXTI wakeup with interrupt mask register for cpu2 [31:0], Address offset: 0xC0 */
11001097
__IO uint32_t C2EMR1; /*!< EXTI wakeup with event mask register for cpu2 [31:0], Address offset: 0xC4 */
11011098
__IO uint32_t RESERVED8[2]; /*!< Reserved, Address offset: 0xC8 - 0xCC */
@@ -2414,17 +2411,16 @@ typedef struct
24142411
/**
24152412
* @brief RNG
24162413
*/
2417-
24182414
typedef struct
24192415
{
2420-
__IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */
2421-
__IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */
2422-
__IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */
2423-
__IO uint32_t RESERVED1[249]; /*!< Reserved 0x0C - 0x3EC */
2424-
__IO uint32_t HWCFGR; /*!< RNG HW Configuration register, Address offset: 0x3F0 */
2425-
__IO uint32_t VERR; /*!< RNG Version register, Address offset: 0x3F4 */
2426-
__IO uint32_t IPIDR; /*!< RNG identification register, Address offset: 0x3F8 */
2427-
__IO uint32_t SIDR; /*!< RNG HW magic ID, Address offset: 0x3FC */
2416+
__IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */
2417+
__IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */
2418+
__IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */
2419+
__IO uint32_t RESERVED1[249]; /*!< Reserved Address offset: 0x0C - 0x3EC */
2420+
__IO uint32_t HWCFGR; /*!< RNG HW Configuration register, Address offset: 0x3F0 */
2421+
__IO uint32_t VERR; /*!< RNG Version register, Address offset: 0x3F4 */
2422+
__IO uint32_t IPIDR; /*!< RNG identification register, Address offset: 0x3F8 */
2423+
__IO uint32_t SIDR; /*!< RNG HW magic ID, Address offset: 0x3FC */
24282424
} RNG_TypeDef;
24292425

24302426
/**

‎system/Drivers/CMSIS/Device/ST/STM32MP1xx/Include/stm32mp151axx_cm4.h

Lines changed: 11 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1054,14 +1054,11 @@ typedef struct
10541054
__IO uint32_t EXTICR[4]; /*!< EXTI Configuration Register mask register, Address offset: 0x60 */
10551055
uint32_t RESERVED4[4]; /*!< Reserved, offset 0x70 -> 0x7C */
10561056
__IO uint32_t C1IMR1; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0x80 */
1057-
__IO uint32_t C1EMR1; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0x84 */
1058-
__IO uint32_t RESERVED5[2]; /*!< Reserved, Address offset: 0x88 - 0x8C */
1057+
__IO uint32_t RESERVED5[3]; /*!< Reserved, Address offset: 0x84 - 0x8C */
10591058
__IO uint32_t C1IMR2; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0x90 */
1060-
__IO uint32_t C1EMR2; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0x94 */
1061-
__IO uint32_t RESERVED6[2]; /*!< Reserved, Address offset: 0x98 - 0x9C */
1059+
__IO uint32_t RESERVED6[3]; /*!< Reserved, Address offset: 0x94 - 0x9C */
10621060
__IO uint32_t C1IMR3; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0xA0 */
1063-
__IO uint32_t C1EMR3; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0xA4 */
1064-
__IO uint32_t RESERVED7[6]; /*!< Reserved, Address offset: 0xA8 - 0xBC */
1061+
__IO uint32_t RESERVED7[7]; /*!< Reserved, Address offset: 0xA4 - 0xBC */
10651062
__IO uint32_t C2IMR1; /*!< EXTI wakeup with interrupt mask register for cpu2 [31:0], Address offset: 0xC0 */
10661063
__IO uint32_t C2EMR1; /*!< EXTI wakeup with event mask register for cpu2 [31:0], Address offset: 0xC4 */
10671064
__IO uint32_t RESERVED8[2]; /*!< Reserved, Address offset: 0xC8 - 0xCC */
@@ -2380,17 +2377,16 @@ typedef struct
23802377
/**
23812378
* @brief RNG
23822379
*/
2383-
23842380
typedef struct
23852381
{
2386-
__IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */
2387-
__IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */
2388-
__IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */
2389-
__IO uint32_t RESERVED1[249]; /*!< Reserved 0x0C - 0x3EC */
2390-
__IO uint32_t HWCFGR; /*!< RNG HW Configuration register, Address offset: 0x3F0 */
2391-
__IO uint32_t VERR; /*!< RNG Version register, Address offset: 0x3F4 */
2392-
__IO uint32_t IPIDR; /*!< RNG identification register, Address offset: 0x3F8 */
2393-
__IO uint32_t SIDR; /*!< RNG HW magic ID, Address offset: 0x3FC */
2382+
__IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */
2383+
__IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */
2384+
__IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */
2385+
__IO uint32_t RESERVED1[249]; /*!< Reserved Address offset: 0x0C - 0x3EC */
2386+
__IO uint32_t HWCFGR; /*!< RNG HW Configuration register, Address offset: 0x3F0 */
2387+
__IO uint32_t VERR; /*!< RNG Version register, Address offset: 0x3F4 */
2388+
__IO uint32_t IPIDR; /*!< RNG identification register, Address offset: 0x3F8 */
2389+
__IO uint32_t SIDR; /*!< RNG HW magic ID, Address offset: 0x3FC */
23942390
} RNG_TypeDef;
23952391

23962392
/**

‎system/Drivers/CMSIS/Device/ST/STM32MP1xx/Include/stm32mp151cxx_ca7.h

Lines changed: 11 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1088,14 +1088,11 @@ typedef struct
10881088
__IO uint32_t EXTICR[4]; /*!< EXTI Configuration Register mask register, Address offset: 0x60 */
10891089
uint32_t RESERVED4[4]; /*!< Reserved, offset 0x70 -> 0x7C */
10901090
__IO uint32_t C1IMR1; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0x80 */
1091-
__IO uint32_t C1EMR1; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0x84 */
1092-
__IO uint32_t RESERVED5[2]; /*!< Reserved, Address offset: 0x88 - 0x8C */
1091+
__IO uint32_t RESERVED5[3]; /*!< Reserved, Address offset: 0x84 - 0x8C */
10931092
__IO uint32_t C1IMR2; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0x90 */
1094-
__IO uint32_t C1EMR2; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0x94 */
1095-
__IO uint32_t RESERVED6[2]; /*!< Reserved, Address offset: 0x98 - 0x9C */
1093+
__IO uint32_t RESERVED6[3]; /*!< Reserved, Address offset: 0x94 - 0x9C */
10961094
__IO uint32_t C1IMR3; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0xA0 */
1097-
__IO uint32_t C1EMR3; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0xA4 */
1098-
__IO uint32_t RESERVED7[6]; /*!< Reserved, Address offset: 0xA8 - 0xBC */
1095+
__IO uint32_t RESERVED7[7]; /*!< Reserved, Address offset: 0xA4 - 0xBC */
10991096
__IO uint32_t C2IMR1; /*!< EXTI wakeup with interrupt mask register for cpu2 [31:0], Address offset: 0xC0 */
11001097
__IO uint32_t C2EMR1; /*!< EXTI wakeup with event mask register for cpu2 [31:0], Address offset: 0xC4 */
11011098
__IO uint32_t RESERVED8[2]; /*!< Reserved, Address offset: 0xC8 - 0xCC */
@@ -2462,17 +2459,16 @@ typedef struct
24622459
/**
24632460
* @brief RNG
24642461
*/
2465-
24662462
typedef struct
24672463
{
2468-
__IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */
2469-
__IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */
2470-
__IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */
2471-
__IO uint32_t RESERVED1[249]; /*!< Reserved 0x0C - 0x3EC */
2472-
__IO uint32_t HWCFGR; /*!< RNG HW Configuration register, Address offset: 0x3F0 */
2473-
__IO uint32_t VERR; /*!< RNG Version register, Address offset: 0x3F4 */
2474-
__IO uint32_t IPIDR; /*!< RNG identification register, Address offset: 0x3F8 */
2475-
__IO uint32_t SIDR; /*!< RNG HW magic ID, Address offset: 0x3FC */
2464+
__IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */
2465+
__IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */
2466+
__IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */
2467+
__IO uint32_t RESERVED1[249]; /*!< Reserved Address offset: 0x0C - 0x3EC */
2468+
__IO uint32_t HWCFGR; /*!< RNG HW Configuration register, Address offset: 0x3F0 */
2469+
__IO uint32_t VERR; /*!< RNG Version register, Address offset: 0x3F4 */
2470+
__IO uint32_t IPIDR; /*!< RNG identification register, Address offset: 0x3F8 */
2471+
__IO uint32_t SIDR; /*!< RNG HW magic ID, Address offset: 0x3FC */
24762472
} RNG_TypeDef;
24772473

24782474
/**

‎system/Drivers/CMSIS/Device/ST/STM32MP1xx/Include/stm32mp151cxx_cm4.h

Lines changed: 11 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1054,14 +1054,11 @@ typedef struct
10541054
__IO uint32_t EXTICR[4]; /*!< EXTI Configuration Register mask register, Address offset: 0x60 */
10551055
uint32_t RESERVED4[4]; /*!< Reserved, offset 0x70 -> 0x7C */
10561056
__IO uint32_t C1IMR1; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0x80 */
1057-
__IO uint32_t C1EMR1; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0x84 */
1058-
__IO uint32_t RESERVED5[2]; /*!< Reserved, Address offset: 0x88 - 0x8C */
1057+
__IO uint32_t RESERVED5[3]; /*!< Reserved, Address offset: 0x84 - 0x8C */
10591058
__IO uint32_t C1IMR2; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0x90 */
1060-
__IO uint32_t C1EMR2; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0x94 */
1061-
__IO uint32_t RESERVED6[2]; /*!< Reserved, Address offset: 0x98 - 0x9C */
1059+
__IO uint32_t RESERVED6[3]; /*!< Reserved, Address offset: 0x94 - 0x9C */
10621060
__IO uint32_t C1IMR3; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0xA0 */
1063-
__IO uint32_t C1EMR3; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0xA4 */
1064-
__IO uint32_t RESERVED7[6]; /*!< Reserved, Address offset: 0xA8 - 0xBC */
1061+
__IO uint32_t RESERVED7[7]; /*!< Reserved, Address offset: 0xA4 - 0xBC */
10651062
__IO uint32_t C2IMR1; /*!< EXTI wakeup with interrupt mask register for cpu2 [31:0], Address offset: 0xC0 */
10661063
__IO uint32_t C2EMR1; /*!< EXTI wakeup with event mask register for cpu2 [31:0], Address offset: 0xC4 */
10671064
__IO uint32_t RESERVED8[2]; /*!< Reserved, Address offset: 0xC8 - 0xCC */
@@ -2428,17 +2425,16 @@ typedef struct
24282425
/**
24292426
* @brief RNG
24302427
*/
2431-
24322428
typedef struct
24332429
{
2434-
__IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */
2435-
__IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */
2436-
__IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */
2437-
__IO uint32_t RESERVED1[249]; /*!< Reserved 0x0C - 0x3EC */
2438-
__IO uint32_t HWCFGR; /*!< RNG HW Configuration register, Address offset: 0x3F0 */
2439-
__IO uint32_t VERR; /*!< RNG Version register, Address offset: 0x3F4 */
2440-
__IO uint32_t IPIDR; /*!< RNG identification register, Address offset: 0x3F8 */
2441-
__IO uint32_t SIDR; /*!< RNG HW magic ID, Address offset: 0x3FC */
2430+
__IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */
2431+
__IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */
2432+
__IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */
2433+
__IO uint32_t RESERVED1[249]; /*!< Reserved Address offset: 0x0C - 0x3EC */
2434+
__IO uint32_t HWCFGR; /*!< RNG HW Configuration register, Address offset: 0x3F0 */
2435+
__IO uint32_t VERR; /*!< RNG Version register, Address offset: 0x3F4 */
2436+
__IO uint32_t IPIDR; /*!< RNG identification register, Address offset: 0x3F8 */
2437+
__IO uint32_t SIDR; /*!< RNG HW magic ID, Address offset: 0x3FC */
24422438
} RNG_TypeDef;
24432439

24442440
/**

‎system/Drivers/CMSIS/Device/ST/STM32MP1xx/Include/stm32mp151dxx_ca7.h

Lines changed: 11 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1088,14 +1088,11 @@ typedef struct
10881088
__IO uint32_t EXTICR[4]; /*!< EXTI Configuration Register mask register, Address offset: 0x60 */
10891089
uint32_t RESERVED4[4]; /*!< Reserved, offset 0x70 -> 0x7C */
10901090
__IO uint32_t C1IMR1; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0x80 */
1091-
__IO uint32_t C1EMR1; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0x84 */
1092-
__IO uint32_t RESERVED5[2]; /*!< Reserved, Address offset: 0x88 - 0x8C */
1091+
__IO uint32_t RESERVED5[3]; /*!< Reserved, Address offset: 0x84 - 0x8C */
10931092
__IO uint32_t C1IMR2; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0x90 */
1094-
__IO uint32_t C1EMR2; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0x94 */
1095-
__IO uint32_t RESERVED6[2]; /*!< Reserved, Address offset: 0x98 - 0x9C */
1093+
__IO uint32_t RESERVED6[3]; /*!< Reserved, Address offset: 0x94 - 0x9C */
10961094
__IO uint32_t C1IMR3; /*!< EXTI wakeup with interrupt mask register for cpu1 [31:0], Address offset: 0xA0 */
1097-
__IO uint32_t C1EMR3; /*!< EXTI wakeup with event mask register for cpu1 [31:0], Address offset: 0xA4 */
1098-
__IO uint32_t RESERVED7[6]; /*!< Reserved, Address offset: 0xA8 - 0xBC */
1095+
__IO uint32_t RESERVED7[7]; /*!< Reserved, Address offset: 0xA4 - 0xBC */
10991096
__IO uint32_t C2IMR1; /*!< EXTI wakeup with interrupt mask register for cpu2 [31:0], Address offset: 0xC0 */
11001097
__IO uint32_t C2EMR1; /*!< EXTI wakeup with event mask register for cpu2 [31:0], Address offset: 0xC4 */
11011098
__IO uint32_t RESERVED8[2]; /*!< Reserved, Address offset: 0xC8 - 0xCC */
@@ -2414,17 +2411,16 @@ typedef struct
24142411
/**
24152412
* @brief RNG
24162413
*/
2417-
24182414
typedef struct
24192415
{
2420-
__IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */
2421-
__IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */
2422-
__IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */
2423-
__IO uint32_t RESERVED1[249]; /*!< Reserved 0x0C - 0x3EC */
2424-
__IO uint32_t HWCFGR; /*!< RNG HW Configuration register, Address offset: 0x3F0 */
2425-
__IO uint32_t VERR; /*!< RNG Version register, Address offset: 0x3F4 */
2426-
__IO uint32_t IPIDR; /*!< RNG identification register, Address offset: 0x3F8 */
2427-
__IO uint32_t SIDR; /*!< RNG HW magic ID, Address offset: 0x3FC */
2416+
__IO uint32_t CR; /*!< RNG control register, Address offset: 0x00 */
2417+
__IO uint32_t SR; /*!< RNG status register, Address offset: 0x04 */
2418+
__IO uint32_t DR; /*!< RNG data register, Address offset: 0x08 */
2419+
__IO uint32_t RESERVED1[249]; /*!< Reserved Address offset: 0x0C - 0x3EC */
2420+
__IO uint32_t HWCFGR; /*!< RNG HW Configuration register, Address offset: 0x3F0 */
2421+
__IO uint32_t VERR; /*!< RNG Version register, Address offset: 0x3F4 */
2422+
__IO uint32_t IPIDR; /*!< RNG identification register, Address offset: 0x3F8 */
2423+
__IO uint32_t SIDR; /*!< RNG HW magic ID, Address offset: 0x3FC */
24282424
} RNG_TypeDef;
24292425

24302426
/**

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