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[WB] Update STM32WBxx HAL Drivers to v1.7.0
Included in STM32CubeWB FW v1.10.0 Signed-off-by: Frederic Pillon <[email protected]>
1 parent b2dc5be commit 5d301ad

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+5900
-2276
lines changed

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
******************************************************************************
88
* @attention
99
*
10-
* <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
10+
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
1111
* All rights reserved.</center></h2>
1212
*
1313
* This software component is licensed by ST under BSD 3-Clause license,
@@ -38,7 +38,6 @@
3838
#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
3939
#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
4040
#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
41-
4241
/**
4342
* @}
4443
*/
@@ -1459,7 +1458,7 @@
14591458
#define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY
14601459
#define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY
14611460

1462-
#if defined(STM32L4) || defined(STM32L5) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
1461+
#if defined(STM32L4) || defined(STM32L5) || defined(STM32F2) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
14631462

14641463
#define HAL_HASH_MD5_Accumulate HAL_HASH_MD5_Accmlt
14651464
#define HAL_HASH_MD5_Accumulate_End HAL_HASH_MD5_Accmlt_End
@@ -1481,7 +1480,7 @@
14811480
#define HAL_HASHEx_SHA256_Accumulate_IT HAL_HASHEx_SHA256_Accmlt_IT
14821481
#define HAL_HASHEx_SHA256_Accumulate_End_IT HAL_HASHEx_SHA256_Accmlt_End_IT
14831482

1484-
#endif /* STM32L4 || STM32L5 || STM32F4 || STM32F7 || STM32H7 */
1483+
#endif /* STM32L4 || STM32L5 || STM32F2 || STM32F4 || STM32F7 || STM32H7 */
14851484
/**
14861485
* @}
14871486
*/
@@ -3252,7 +3251,7 @@
32523251
#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
32533252
#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
32543253

3255-
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5)
3254+
#if defined(STM32L4) || defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) || defined(STM32WL)
32563255
#define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE
32573256
#else
32583257
#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
@@ -3381,7 +3380,7 @@
33813380
/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
33823381
* @{
33833382
*/
3384-
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4)
3383+
#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) || defined (STM32WL)
33853384
#else
33863385
#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
33873386
#endif

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_adc.h

Lines changed: 254 additions & 36 deletions
Large diffs are not rendered by default.

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_adc_ex.h

Lines changed: 154 additions & 0 deletions
Large diffs are not rendered by default.

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_comp.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -181,7 +181,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
181181
/** @defgroup COMP_InputPlus COMP input plus (non-inverting input)
182182
* @{
183183
*/
184-
#define COMP_INPUT_PLUS_IO1 (0x00000000UL) /*!< Comparator input plus connected to IO1 (pin PC5 for COMP1 (except device STM32WB35xx), pin PB4 for COMP2) */
184+
#define COMP_INPUT_PLUS_IO1 (0x00000000UL) /*!< Comparator input plus connected to IO1 (pin PC5 for COMP1 (except device STM32WB35xx), pin PB4 for COMP2). Note: On STM32WB serie, parameter not available on devices: STM32WB10xx, STM32WB15xx. */
185185
#define COMP_INPUT_PLUS_IO2 (COMP_CSR_INPSEL_0) /*!< Comparator input plus connected to IO2 (pin PB2 for COMP1, pin PB6 for COMP2) */
186186
#define COMP_INPUT_PLUS_IO3 (COMP_CSR_INPSEL_1) /*!< Comparator input plus connected to IO3 (pin PA1 for COMP1, pin PA3 for COMP2) */
187187
/**
@@ -196,7 +196,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
196196
#define COMP_INPUT_MINUS_3_4VREFINT ( COMP_CSR_INMSEL_1 | COMP_CSR_SCALEN | COMP_CSR_BRGEN) /*!< Comparator input minus connected to 3/4 VrefInt */
197197
#define COMP_INPUT_MINUS_VREFINT ( COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0 | COMP_CSR_SCALEN ) /*!< Comparator input minus connected to VrefInt */
198198
#define COMP_INPUT_MINUS_IO1 (COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1 ) /*!< Comparator input minus connected to IO1 (pin PB1 for COMP1, pin PB3 for COMP2) */
199-
#define COMP_INPUT_MINUS_IO2 (COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0) /*!< Comparator input minus connected to IO2 (pin PC4 for COMP1 (except device STM32WB35xx), pin PB7 for COMP2) */
199+
#define COMP_INPUT_MINUS_IO2 (COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0) /*!< Comparator input minus connected to IO2 (pin PC4 for COMP1 (except device STM32WB35xx), pin PB7 for COMP2). Note: On STM32WB serie, parameter not available on devices: STM32WB10xx, STM32WB15xx. */
200200
#define COMP_INPUT_MINUS_IO3 ( COMP_CSR_INMESEL_0 | COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0) /*!< Comparator input minus connected to IO3 (pin PA0 for COMP1, pin PA2 for COMP2) */
201201
#define COMP_INPUT_MINUS_IO4 (COMP_CSR_INMESEL_1 | COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0) /*!< Comparator input minus connected to IO4 (pin PA4 for COMP1, pin PA4 for COMP2) */
202202
#define COMP_INPUT_MINUS_IO5 (COMP_CSR_INMESEL_1 | COMP_CSR_INMESEL_0 | COMP_CSR_INMSEL_2 | COMP_CSR_INMSEL_1 | COMP_CSR_INMSEL_0) /*!< Comparator input minus connected to IO5 (pin PA5 for COMP1, pin PA5 for COMP2) */
@@ -595,7 +595,7 @@ typedef void (*pCOMP_CallbackTypeDef)(COMP_HandleTypeDef *hcomp); /*!< pointer
595595
((__INPUT_PLUS__) == COMP_INPUT_PLUS_IO3))
596596
#endif
597597

598-
/* Note: On this STM32 serie, comparator input minus parameters are */
598+
/* Note: On this STM32 series, comparator input minus parameters are */
599599
/* the same on all COMP instances. */
600600
/* However, comparator instance kept as macro parameter for */
601601
/* compatibility with other STM32 families. */

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_conf_template.h

Lines changed: 0 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -44,7 +44,6 @@
4444
#define HAL_GPIO_MODULE_ENABLED
4545
#define HAL_HSEM_MODULE_ENABLED
4646
#define HAL_I2C_MODULE_ENABLED
47-
#define HAL_I2S_MODULE_ENABLED
4847
#define HAL_IPCC_MODULE_ENABLED
4948
#define HAL_IRDA_MODULE_ENABLED
5049
#define HAL_IWDG_MODULE_ENABLED
@@ -71,7 +70,6 @@
7170
#define USE_HAL_COMP_REGISTER_CALLBACKS 0u
7271
#define USE_HAL_CRYP_REGISTER_CALLBACKS 0u
7372
#define USE_HAL_I2C_REGISTER_CALLBACKS 0u
74-
#define USE_HAL_I2C_REGISTER_CALLBACKS 0u
7573
#define USE_HAL_IRDA_REGISTER_CALLBACKS 0u
7674
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0u
7775
#define USE_HAL_PCD_REGISTER_CALLBACKS 0u
@@ -158,15 +156,6 @@
158156
#define LSE_STARTUP_TIMEOUT (5000UL) /*!< Time out for LSE start up, in ms */
159157
#endif /* LSE_STARTUP_TIMEOUT */
160158

161-
/**
162-
* @brief External clock source for I2S peripheral
163-
* This value is used by the RCC HAL module to compute the I2S clock source
164-
* frequency.
165-
*/
166-
#if !defined (EXTERNAL_CLOCK_VALUE)
167-
#define EXTERNAL_CLOCK_VALUE (48000UL) /*!< Value of the I2S External clock source in Hz*/
168-
#endif /* EXTERNAL_CLOCK_VALUE */
169-
170159
/**
171160
* @brief External clock source for SAI1 peripheral
172161
* This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
@@ -254,10 +243,6 @@
254243
#include "stm32wbxx_hal_i2c.h"
255244
#endif /* HAL_I2C_MODULE_ENABLED */
256245

257-
#ifdef HAL_I2S_MODULE_ENABLED
258-
#include "stm32wbxx_hal_i2s.h"
259-
#endif /* HAL_I2S_MODULE_ENABLED */
260-
261246
#ifdef HAL_IPCC_MODULE_ENABLED
262247
#include "stm32wbxx_hal_ipcc.h"
263248
#endif /* HAL_IPCC_MODULE_ENABLED */

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_cryp.h

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -109,7 +109,7 @@ typedef struct __CRYP_HandleTypeDef
109109
typedef struct
110110
#endif
111111
{
112-
AES_TypeDef *Instance; /*!< AES Register base address */
112+
AES_TypeDef *Instance; /*!< AES Register base address */
113113

114114
CRYP_ConfigTypeDef Init; /*!< CRYP required parameters */
115115

@@ -120,13 +120,13 @@ typedef struct
120120

121121
uint32_t *pCrypOutBuffPtr; /*!< Pointer to CRYP processing (encryption, decryption,...) buffer */
122122

123-
__IO uint16_t CrypHeaderCount; /*!< Counter of header data */
123+
__IO uint16_t CrypHeaderCount; /*!< Counter of header data in words */
124124

125-
__IO uint16_t CrypInCount; /*!< Counter of input data */
125+
__IO uint16_t CrypInCount; /*!< Counter of input data in words */
126126

127-
__IO uint16_t CrypOutCount; /*!< Counter of output data */
127+
__IO uint16_t CrypOutCount; /*!< Counter of output data in words */
128128

129-
uint16_t Size; /*!< length of input data in words */
129+
uint16_t Size; /*!< Length of input data */
130130

131131
uint32_t Phase; /*!< CRYP peripheral phase */
132132

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_exti.h

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -273,21 +273,21 @@ typedef struct
273273
/** @defgroup EXTI_Private_Macros EXTI Private Macros
274274
* @{
275275
*/
276-
#define IS_EXTI_LINE(__LINE__) ((((__LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_EVENT_PRESENCE_MASK | EXTI_REG_MASK | EXTI_PIN_MASK)) == 0x00u) && \
277-
((((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_DIRECT) || \
278-
(((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG) || \
279-
(((__LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO)) && \
280-
(((__LINE__) & (EXTI_REG_MASK | EXTI_PIN_MASK)) < \
276+
#define IS_EXTI_LINE(__EXTI_LINE__) ((((__EXTI_LINE__) & ~(EXTI_PROPERTY_MASK | EXTI_EVENT_PRESENCE_MASK | EXTI_REG_MASK | EXTI_PIN_MASK)) == 0x00u) && \
277+
((((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_DIRECT) || \
278+
(((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_CONFIG) || \
279+
(((__EXTI_LINE__) & EXTI_PROPERTY_MASK) == EXTI_GPIO)) && \
280+
(((__EXTI_LINE__) & (EXTI_REG_MASK | EXTI_PIN_MASK)) < \
281281
(((EXTI_LINE_NB / 32u) << EXTI_REG_SHIFT) | (EXTI_LINE_NB % 32u))))
282282

283-
#define IS_EXTI_MODE(__LINE__) ((((__LINE__) & EXTI_MODE_MASK) != 0x00u) && \
284-
(((__LINE__) & ~EXTI_MODE_MASK) == 0x00u))
283+
#define IS_EXTI_MODE(__EXTI_LINE__) ((((__EXTI_LINE__) & EXTI_MODE_MASK) != 0x00u) && \
284+
(((__EXTI_LINE__) & ~EXTI_MODE_MASK) == 0x00u))
285285

286-
#define IS_EXTI_TRIGGER(__LINE__) (((__LINE__) & ~EXTI_TRIGGER_MASK) == 0x00u)
286+
#define IS_EXTI_TRIGGER(__EXTI_LINE__) (((__EXTI_LINE__) & ~EXTI_TRIGGER_MASK) == 0x00u)
287287

288-
#define IS_EXTI_PENDING_EDGE(__LINE__) ((__LINE__) == EXTI_TRIGGER_RISING_FALLING)
288+
#define IS_EXTI_PENDING_EDGE(__EXTI_LINE__) ((__EXTI_LINE__) == EXTI_TRIGGER_RISING_FALLING)
289289

290-
#define IS_EXTI_CONFIG_LINE(__LINE__) (((__LINE__) & EXTI_CONFIG) != 0x00u)
290+
#define IS_EXTI_CONFIG_LINE(__EXTI_LINE__) (((__EXTI_LINE__) & EXTI_CONFIG) != 0x00u)
291291

292292
#if defined (STM32WB55xx) || defined (STM32WB5Mxx)
293293
#define IS_EXTI_GPIO_PORT(__PORT__) (((__PORT__) == EXTI_GPIOA) || \

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_flash.h

Lines changed: 40 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,6 +75,7 @@ typedef struct
7575
uint32_t UserConfig; /*!< Value of the user option byte (used for OPTIONBYTE_USER).
7676
This parameter can be a combination of the values of
7777
@ref FLASH_OB_USER_AGC_TRIM, @ref FLASH_OB_USER_BOR_LEVEL
78+
@ref FLASH_OB_USER_RESET_CONFIG(*), @ref FLASH_OB_USER_INPUT_RESET_HOLDER(*)
7879
@ref FLASH_OB_USER_nRST_STOP, @ref FLASH_OB_USER_nRST_STANDBY,
7980
@ref FLASH_OB_USER_nRST_SHUTDOWN, @ref FLASH_OB_USER_IWDG_SW,
8081
@ref FLASH_OB_USER_IWDG_STOP, @ref FLASH_OB_USER_IWDG_STANDBY,
@@ -280,6 +281,9 @@ typedef struct
280281
#define OB_USER_nRST_STOP FLASH_OPTR_nRST_STOP /*!< Reset generated when entering the stop mode */
281282
#define OB_USER_nRST_STDBY FLASH_OPTR_nRST_STDBY /*!< Reset generated when entering the standby mode */
282283
#define OB_USER_nRST_SHDW FLASH_OPTR_nRST_SHDW /*!< Reset generated when entering the shutdown mode */
284+
#if defined(FLASH_OPTR_IRHEN)
285+
#define OB_USER_INPUT_RESET_HOLDER FLASH_OPTR_IRHEN /*!< Internal reset holder enable */
286+
#endif
283287
#define OB_USER_IWDG_SW FLASH_OPTR_IWDG_SW /*!< Independent watchdog selection */
284288
#define OB_USER_IWDG_STOP FLASH_OPTR_IWDG_STOP /*!< Independent watchdog counter freeze in stop mode */
285289
#define OB_USER_IWDG_STDBY FLASH_OPTR_IWDG_STDBY /*!< Independent watchdog counter freeze in standby mode */
@@ -289,12 +293,24 @@ typedef struct
289293
#define OB_USER_SRAM2RST FLASH_OPTR_SRAM2RST /*!< SRAM2 erase when system reset */
290294
#define OB_USER_nSWBOOT0 FLASH_OPTR_nSWBOOT0 /*!< Software BOOT0 */
291295
#define OB_USER_nBOOT0 FLASH_OPTR_nBOOT0 /*!< nBOOT0 option bit */
296+
#if defined(FLASH_OPTR_nRST_MODE)
297+
#define OB_USER_NRST_MODE FLASH_OPTR_nRST_MODE /*!< Reset pin configuration */
298+
#endif
292299
#define OB_USER_AGC_TRIM FLASH_OPTR_AGC_TRIM /*!< Automatic Gain Control Trimming */
300+
#if defined(FLASH_OPTR_IRHEN) && defined(FLASH_OPTR_nRST_MODE)
301+
#define OB_USER_ALL (OB_USER_BOR_LEV | OB_USER_nRST_STOP | OB_USER_nRST_STDBY | \
302+
OB_USER_nRST_SHDW | OB_USER_IWDG_SW | OB_USER_IWDG_STOP | \
303+
OB_USER_IWDG_STDBY | OB_USER_WWDG_SW | OB_USER_nBOOT1 | \
304+
OB_USER_SRAM2PE | OB_USER_SRAM2RST | OB_USER_nSWBOOT0 | \
305+
OB_USER_nBOOT0 | OB_USER_AGC_TRIM | OB_USER_NRST_MODE | \
306+
OB_USER_INPUT_RESET_HOLDER) /*!< all option bits */
307+
#else
293308
#define OB_USER_ALL (OB_USER_BOR_LEV | OB_USER_nRST_STOP | OB_USER_nRST_STDBY | \
294309
OB_USER_nRST_SHDW | OB_USER_IWDG_SW | OB_USER_IWDG_STOP | \
295310
OB_USER_IWDG_STDBY | OB_USER_WWDG_SW | OB_USER_nBOOT1 | \
296311
OB_USER_SRAM2PE | OB_USER_SRAM2RST | OB_USER_nSWBOOT0 | \
297312
OB_USER_nBOOT0 | OB_USER_AGC_TRIM) /*!< all option bits */
313+
#endif
298314

299315
/**
300316
* @}
@@ -435,6 +451,29 @@ typedef struct
435451
* @}
436452
*/
437453

454+
#if defined(FLASH_OPTR_nRST_MODE)
455+
/** @defgroup FLASH_OB_USER_RESET_CONFIG FLASH Option Bytes User reset config bit
456+
* @{
457+
*/
458+
#define OB_RESET_MODE_INPUT_ONLY FLASH_OPTR_nRST_MODE_0 /*!< Reset pin is in Reset input mode only */
459+
#define OB_RESET_MODE_GPIO FLASH_OPTR_nRST_MODE_1 /*!< Reset pin is in GPIO normal mode only */
460+
#define OB_RESET_MODE_INPUT_OUTPUT (FLASH_OPTR_nRST_MODE_0 | FLASH_OPTR_nRST_MODE_1) /*!< Reset pin is in Reset input and output mode */
461+
/**
462+
* @}
463+
*/
464+
#endif
465+
466+
#if defined(FLASH_OPTR_IRHEN)
467+
/** @defgroup FLASH_OB_USER_INPUT_RESET_HOLDER FLASH Option Bytes User input reset holder bit
468+
* @{
469+
*/
470+
#define OB_IRH_ENABLE 0x00000000U /*!< Internal Reset handler enable */
471+
#define OB_IRH_DISABLE FLASH_OPTR_IRHEN /*!< Internal Reset handler disable */
472+
/**
473+
* @}
474+
*/
475+
#endif
476+
438477
/** @defgroup FLASH_OB_PCROP_ZONE FLASH PCROP ZONE
439478
* @{
440479
*/
@@ -857,7 +896,7 @@ HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout);
857896
#define IS_FLASH_TYPEPROGRAM(__VALUE__) (((__VALUE__) == FLASH_TYPEPROGRAM_DOUBLEWORD) || \
858897
((__VALUE__) == FLASH_TYPEPROGRAM_FAST))
859898

860-
#define IS_OB_SFSA_START_ADDR(__VALUE__) (((__VALUE__) >= FLASH_BASE) && ((__VALUE__) <= FLASH_END_ADDR) && (((__VALUE__) & ~(uint32_t)0xFFFU) == (__VALUE__)))
899+
#define IS_OB_SFSA_START_ADDR(__VALUE__) (((__VALUE__) >= FLASH_BASE) && ((__VALUE__) <= FLASH_END_ADDR) && (((__VALUE__) & ~(uint32_t)(FLASH_PAGE_SIZE - 1U)) == (__VALUE__)))
861900
#define IS_OB_SBRSA_START_ADDR(__VALUE__) (((__VALUE__) >= SRAM2A_BASE) && ((__VALUE__) <= (SRAM2A_BASE + SRAM2A_SIZE - 1U)) && (((__VALUE__) & ~0x3FFU) == (__VALUE__)))
862901
#define IS_OB_SNBRSA_START_ADDR(__VALUE__) (((__VALUE__) >= SRAM2B_BASE) && ((__VALUE__) <= (SRAM2B_BASE + SRAM2B_SIZE - 1U)) && (((__VALUE__) & ~0x3FFU) == (__VALUE__)))
863902
#define IS_OB_SECURE_MODE(__VALUE__) (((__VALUE__) == SYSTEM_IN_SECURE_MODE) || ((__VALUE__) == SYSTEM_NOT_IN_SECURE_MODE))

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_i2c_ex.h

Lines changed: 31 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -38,7 +38,6 @@ extern "C" {
3838

3939
/* Exported types ------------------------------------------------------------*/
4040
/* Exported constants --------------------------------------------------------*/
41-
4241
/** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants
4342
* @{
4443
*/
@@ -75,24 +74,51 @@ extern "C" {
7574
*/
7675

7776
/* Exported macro ------------------------------------------------------------*/
78-
/* Exported functions --------------------------------------------------------*/
77+
/** @defgroup I2CEx_Exported_Macros I2C Extended Exported Macros
78+
* @{
79+
*/
7980

81+
/**
82+
* @}
83+
*/
84+
85+
/* Exported functions --------------------------------------------------------*/
8086
/** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions
8187
* @{
8288
*/
8389

84-
/** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions
85-
* @brief Extended features functions
90+
/** @addtogroup I2CEx_Exported_Functions_Group1 I2C Extended Filter Mode Functions
8691
* @{
8792
*/
88-
8993
/* Peripheral Control functions ************************************************/
9094
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
9195
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
96+
/**
97+
* @}
98+
*/
99+
100+
/** @addtogroup I2CEx_Exported_Functions_Group2 I2C Extended WakeUp Mode Functions
101+
* @{
102+
*/
92103
HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c);
93104
HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c);
105+
/**
106+
* @}
107+
*/
108+
109+
/** @addtogroup I2CEx_Exported_Functions_Group3 I2C Extended FastModePlus Functions
110+
* @{
111+
*/
94112
void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus);
95113
void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
114+
/**
115+
* @}
116+
*/
117+
118+
119+
/**
120+
* @}
121+
*/
96122

97123
/* Private constants ---------------------------------------------------------*/
98124
/** @defgroup I2CEx_Private_Constants I2C Extended Private Constants
@@ -118,9 +144,6 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
118144
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \
119145
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \
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(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3))
121-
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/**
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* @}
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*/
@@ -142,14 +165,6 @@ void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif

‎system/Drivers/STM32WBxx_HAL_Driver/Inc/stm32wbxx_hal_pwr.h

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Original file line numberDiff line numberDiff line change
@@ -105,7 +105,9 @@ typedef struct
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*/
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#define PWR_LOWPOWERMODE_STOP0 (0x00000000u) /*!< Stop 0: stop mode with main regulator */
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#define PWR_LOWPOWERMODE_STOP1 (PWR_CR1_LPMS_0) /*!< Stop 1: stop mode with low power regulator */
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#if defined(PWR_SUPPORT_STOP2)
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#define PWR_LOWPOWERMODE_STOP2 (PWR_CR1_LPMS_1) /*!< Stop 2: stop mode with low power regulator and VDD12I interruptible digital core domain supply OFF (less peripherals activated than low power mode stop 1 to reduce power consumption)*/
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#endif
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#define PWR_LOWPOWERMODE_STANDBY (PWR_CR1_LPMS_0 | PWR_CR1_LPMS_1) /*!< Standby mode */
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#define PWR_LOWPOWERMODE_SHUTDOWN (PWR_CR1_LPMS_2) /*!< Shutdown mode */
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/**

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