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[F4] Update STM32F4xx CMSIS Drivers to v2.6.6
Included in STM32CubeF4 FW v1.26.0 Signed-off-by: Frederic Pillon <[email protected]>
1 parent 01d0d55 commit ca3fa7b

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52 files changed

+741
-488
lines changed

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xc.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2282,7 +2282,7 @@ typedef struct
22822282
/******************************************************************************/
22832283
/******************* Bits definition for FLASH_ACR register *****************/
22842284
#define FLASH_ACR_LATENCY_Pos (0U)
2285-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2285+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
22862286
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
22872287
#define FLASH_ACR_LATENCY_0WS 0x00000000U
22882288
#define FLASH_ACR_LATENCY_1WS 0x00000001U
@@ -2293,6 +2293,7 @@ typedef struct
22932293
#define FLASH_ACR_LATENCY_6WS 0x00000006U
22942294
#define FLASH_ACR_LATENCY_7WS 0x00000007U
22952295

2296+
22962297
#define FLASH_ACR_PRFTEN_Pos (8U)
22972298
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
22982299
#define FLASH_ACR_PRFTEN FLASH_ACR_PRFTEN_Msk
@@ -2538,7 +2539,7 @@ typedef struct
25382539
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
25392540
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
25402541
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2541-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2542+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
25422543
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
25432544
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
25442545
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2569,7 +2570,7 @@ typedef struct
25692570
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
25702571
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
25712572
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
2572-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
2573+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
25732574
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
25742575
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
25752576
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2282,7 +2282,7 @@ typedef struct
22822282
/******************************************************************************/
22832283
/******************* Bits definition for FLASH_ACR register *****************/
22842284
#define FLASH_ACR_LATENCY_Pos (0U)
2285-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2285+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
22862286
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
22872287
#define FLASH_ACR_LATENCY_0WS 0x00000000U
22882288
#define FLASH_ACR_LATENCY_1WS 0x00000001U
@@ -2293,6 +2293,7 @@ typedef struct
22932293
#define FLASH_ACR_LATENCY_6WS 0x00000006U
22942294
#define FLASH_ACR_LATENCY_7WS 0x00000007U
22952295

2296+
22962297
#define FLASH_ACR_PRFTEN_Pos (8U)
22972298
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
22982299
#define FLASH_ACR_PRFTEN FLASH_ACR_PRFTEN_Msk
@@ -2538,7 +2539,7 @@ typedef struct
25382539
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
25392540
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
25402541
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2541-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2542+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
25422543
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
25432544
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
25442545
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2569,7 +2570,7 @@ typedef struct
25692570
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
25702571
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
25712572
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
2572-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
2573+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
25732574
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
25742575
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
25752576
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f405xx.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6374,7 +6374,7 @@ typedef struct
63746374
/******************************************************************************/
63756375
/******************* Bits definition for FLASH_ACR register *****************/
63766376
#define FLASH_ACR_LATENCY_Pos (0U)
6377-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
6377+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
63786378
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
63796379
#define FLASH_ACR_LATENCY_0WS 0x00000000U
63806380
#define FLASH_ACR_LATENCY_1WS 0x00000001U
@@ -6385,6 +6385,7 @@ typedef struct
63856385
#define FLASH_ACR_LATENCY_6WS 0x00000006U
63866386
#define FLASH_ACR_LATENCY_7WS 0x00000007U
63876387

6388+
63886389
#define FLASH_ACR_PRFTEN_Pos (8U)
63896390
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
63906391
#define FLASH_ACR_PRFTEN FLASH_ACR_PRFTEN_Msk
@@ -7822,7 +7823,7 @@ typedef struct
78227823
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
78237824
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
78247825
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
7825-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
7826+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
78267827
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
78277828
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
78287829
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -7853,7 +7854,7 @@ typedef struct
78537854
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
78547855
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
78557856
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
7856-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
7857+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
78577858
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
78587859
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
78597860
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6674,7 +6674,7 @@ typedef struct
66746674
/******************************************************************************/
66756675
/******************* Bits definition for FLASH_ACR register *****************/
66766676
#define FLASH_ACR_LATENCY_Pos (0U)
6677-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
6677+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
66786678
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
66796679
#define FLASH_ACR_LATENCY_0WS 0x00000000U
66806680
#define FLASH_ACR_LATENCY_1WS 0x00000001U
@@ -6685,6 +6685,7 @@ typedef struct
66856685
#define FLASH_ACR_LATENCY_6WS 0x00000006U
66866686
#define FLASH_ACR_LATENCY_7WS 0x00000007U
66876687

6688+
66886689
#define FLASH_ACR_PRFTEN_Pos (8U)
66896690
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
66906691
#define FLASH_ACR_PRFTEN FLASH_ACR_PRFTEN_Msk
@@ -8122,7 +8123,7 @@ typedef struct
81228123
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
81238124
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
81248125
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
8125-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
8126+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
81268127
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
81278128
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
81288129
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -8153,7 +8154,7 @@ typedef struct
81538154
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
81548155
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
81558156
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
8156-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
8157+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
81578158
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
81588159
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
81598160
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f410cx.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2361,7 +2361,7 @@ typedef struct
23612361
/******************************************************************************/
23622362
/******************* Bits definition for FLASH_ACR register *****************/
23632363
#define FLASH_ACR_LATENCY_Pos (0U)
2364-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2364+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
23652365
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
23662366
#define FLASH_ACR_LATENCY_0WS 0x00000000U
23672367
#define FLASH_ACR_LATENCY_1WS 0x00000001U
@@ -2372,6 +2372,7 @@ typedef struct
23722372
#define FLASH_ACR_LATENCY_6WS 0x00000006U
23732373
#define FLASH_ACR_LATENCY_7WS 0x00000007U
23742374

2375+
23752376
#define FLASH_ACR_PRFTEN_Pos (8U)
23762377
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
23772378
#define FLASH_ACR_PRFTEN FLASH_ACR_PRFTEN_Msk
@@ -2617,7 +2618,7 @@ typedef struct
26172618
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
26182619
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
26192620
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2620-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2621+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
26212622
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
26222623
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
26232624
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2648,7 +2649,7 @@ typedef struct
26482649
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
26492650
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
26502651
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
2651-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
2652+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
26522653
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
26532654
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
26542655
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f410rx.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2361,7 +2361,7 @@ typedef struct
23612361
/******************************************************************************/
23622362
/******************* Bits definition for FLASH_ACR register *****************/
23632363
#define FLASH_ACR_LATENCY_Pos (0U)
2364-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2364+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
23652365
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
23662366
#define FLASH_ACR_LATENCY_0WS 0x00000000U
23672367
#define FLASH_ACR_LATENCY_1WS 0x00000001U
@@ -2372,6 +2372,7 @@ typedef struct
23722372
#define FLASH_ACR_LATENCY_6WS 0x00000006U
23732373
#define FLASH_ACR_LATENCY_7WS 0x00000007U
23742374

2375+
23752376
#define FLASH_ACR_PRFTEN_Pos (8U)
23762377
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
23772378
#define FLASH_ACR_PRFTEN FLASH_ACR_PRFTEN_Msk
@@ -2617,7 +2618,7 @@ typedef struct
26172618
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
26182619
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
26192620
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2620-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2621+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
26212622
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
26222623
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
26232624
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2648,7 +2649,7 @@ typedef struct
26482649
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
26492650
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
26502651
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
2651-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
2652+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
26522653
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
26532654
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
26542655
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f410tx.h

Lines changed: 10 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2351,7 +2351,7 @@ typedef struct
23512351
/******************************************************************************/
23522352
/******************* Bits definition for FLASH_ACR register *****************/
23532353
#define FLASH_ACR_LATENCY_Pos (0U)
2354-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2354+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
23552355
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
23562356
#define FLASH_ACR_LATENCY_0WS 0x00000000U
23572357
#define FLASH_ACR_LATENCY_1WS 0x00000001U
@@ -2362,6 +2362,7 @@ typedef struct
23622362
#define FLASH_ACR_LATENCY_6WS 0x00000006U
23632363
#define FLASH_ACR_LATENCY_7WS 0x00000007U
23642364

2365+
23652366
#define FLASH_ACR_PRFTEN_Pos (8U)
23662367
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
23672368
#define FLASH_ACR_PRFTEN FLASH_ACR_PRFTEN_Msk
@@ -2607,7 +2608,7 @@ typedef struct
26072608
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
26082609
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
26092610
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2610-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2611+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
26112612
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
26122613
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
26132614
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2638,7 +2639,7 @@ typedef struct
26382639
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
26392640
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
26402641
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
2641-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
2642+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
26422643
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
26432644
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
26442645
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1
@@ -3850,6 +3851,12 @@ typedef struct
38503851
#define FMPI2C_CR1_GCEN_Pos (19U)
38513852
#define FMPI2C_CR1_GCEN_Msk (0x1UL << FMPI2C_CR1_GCEN_Pos) /*!< 0x00080000 */
38523853
#define FMPI2C_CR1_GCEN FMPI2C_CR1_GCEN_Msk /*!< General call enable */
3854+
#define FMPI2C_CR1_SMBHEN_Pos (20U)
3855+
#define FMPI2C_CR1_SMBHEN_Msk (0x1UL << FMPI2C_CR1_SMBHEN_Pos) /*!< 0x00100000 */
3856+
#define FMPI2C_CR1_SMBHEN FMPI2C_CR1_SMBHEN_Msk /*!< SMBus host address enable */
3857+
#define FMPI2C_CR1_SMBDEN_Pos (21U)
3858+
#define FMPI2C_CR1_SMBDEN_Msk (0x1UL << FMPI2C_CR1_SMBDEN_Pos) /*!< 0x00200000 */
3859+
#define FMPI2C_CR1_SMBDEN FMPI2C_CR1_SMBDEN_Msk /*!< SMBus device default address enable */
38533860
#define FMPI2C_CR1_ALERTEN_Pos (22U)
38543861
#define FMPI2C_CR1_ALERTEN_Msk (0x1UL << FMPI2C_CR1_ALERTEN_Pos) /*!< 0x00400000 */
38553862
#define FMPI2C_CR1_ALERTEN FMPI2C_CR1_ALERTEN_Msk /*!< SMBus alert enable */

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f411xe.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2285,7 +2285,7 @@ typedef struct
22852285
/******************************************************************************/
22862286
/******************* Bits definition for FLASH_ACR register *****************/
22872287
#define FLASH_ACR_LATENCY_Pos (0U)
2288-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
2288+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
22892289
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
22902290
#define FLASH_ACR_LATENCY_0WS 0x00000000U
22912291
#define FLASH_ACR_LATENCY_1WS 0x00000001U
@@ -2296,6 +2296,7 @@ typedef struct
22962296
#define FLASH_ACR_LATENCY_6WS 0x00000006U
22972297
#define FLASH_ACR_LATENCY_7WS 0x00000007U
22982298

2299+
22992300
#define FLASH_ACR_PRFTEN_Pos (8U)
23002301
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
23012302
#define FLASH_ACR_PRFTEN FLASH_ACR_PRFTEN_Msk
@@ -2541,7 +2542,7 @@ typedef struct
25412542
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
25422543
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
25432544
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
2544-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
2545+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
25452546
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
25462547
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
25472548
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -2572,7 +2573,7 @@ typedef struct
25722573
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
25732574
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
25742575
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
2575-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
2576+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
25762577
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
25772578
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
25782579
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f412cx.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6435,7 +6435,7 @@ typedef struct
64356435
/******************************************************************************/
64366436
/******************* Bits definition for FLASH_ACR register *****************/
64376437
#define FLASH_ACR_LATENCY_Pos (0U)
6438-
#define FLASH_ACR_LATENCY_Msk (0xFUL << FLASH_ACR_LATENCY_Pos) /*!< 0x0000000F */
6438+
#define FLASH_ACR_LATENCY_Msk (0x7UL << FLASH_ACR_LATENCY_Pos) /*!< 0x00000007 */
64396439
#define FLASH_ACR_LATENCY FLASH_ACR_LATENCY_Msk
64406440
#define FLASH_ACR_LATENCY_0WS 0x00000000U
64416441
#define FLASH_ACR_LATENCY_1WS 0x00000001U
@@ -6446,6 +6446,7 @@ typedef struct
64466446
#define FLASH_ACR_LATENCY_6WS 0x00000006U
64476447
#define FLASH_ACR_LATENCY_7WS 0x00000007U
64486448

6449+
64496450
#define FLASH_ACR_PRFTEN_Pos (8U)
64506451
#define FLASH_ACR_PRFTEN_Msk (0x1UL << FLASH_ACR_PRFTEN_Pos) /*!< 0x00000100 */
64516452
#define FLASH_ACR_PRFTEN FLASH_ACR_PRFTEN_Msk
@@ -6691,7 +6692,7 @@ typedef struct
66916692
#define GPIO_MODER_MODE1 GPIO_MODER_MODER1
66926693
#define GPIO_MODER_MODE1_0 GPIO_MODER_MODER1_0
66936694
#define GPIO_MODER_MODE1_1 GPIO_MODER_MODER1_1
6694-
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_PoS
6695+
#define GPIO_MODER_MODE2_Pos GPIO_MODER_MODER2_Pos
66956696
#define GPIO_MODER_MODE2_Msk GPIO_MODER_MODER2_Msk
66966697
#define GPIO_MODER_MODE2 GPIO_MODER_MODER2
66976698
#define GPIO_MODER_MODE2_0 GPIO_MODER_MODER2_0
@@ -6722,7 +6723,7 @@ typedef struct
67226723
#define GPIO_MODER_MODE7_0 GPIO_MODER_MODER7_0
67236724
#define GPIO_MODER_MODE7_1 GPIO_MODER_MODER7_1
67246725
#define GPIO_MODER_MODE8_Pos GPIO_MODER_MODER8_Pos
6725-
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER2_Msk
6726+
#define GPIO_MODER_MODE8_Msk GPIO_MODER_MODER8_Msk
67266727
#define GPIO_MODER_MODE8 GPIO_MODER_MODER8
67276728
#define GPIO_MODER_MODE8_0 GPIO_MODER_MODER8_0
67286729
#define GPIO_MODER_MODE8_1 GPIO_MODER_MODER8_1

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