From a1f43503331b92cb0a0a12663b1dbc2e7902587f Mon Sep 17 00:00:00 2001 From: Andrew Savonichev Date: Thu, 3 Aug 2023 15:28:47 +0900 Subject: [PATCH 1/2] [DebugInfo] Require 64-bit arch for debug info fragment LIT tests These tests depend on the target layout, and there were issues reported for Android armv7 (see #66744) and watchOS (#66879) targets. --- test/IRGen/debug_fragment_merge.sil | 2 +- test/IRGen/debug_fragment_merge.swift | 2 +- test/IRGen/debug_scope_distinct.swift | 2 ++ 3 files changed, 4 insertions(+), 2 deletions(-) diff --git a/test/IRGen/debug_fragment_merge.sil b/test/IRGen/debug_fragment_merge.sil index b27338916d439..a0b520b2b0cb8 100644 --- a/test/IRGen/debug_fragment_merge.sil +++ b/test/IRGen/debug_fragment_merge.sil @@ -3,7 +3,7 @@ // Checking the below on 32 bit architectures would be cumbersome: each // fragment is 32 bits long, which changes the number of checks as well as the // arithmethic on the bounds of each fragment. -// UNSUPPORTED: OS=watchos +// REQUIRES: CPU=arm64 || CPU=x86_64 // CHECK-DAG: llvm.dbg.value{{.*}} metadata ![[VAR:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 192, 64){{.*}} !dbg ![[LOC1:[0-9]+]] // CHECK-DAG: llvm.dbg.value{{.*}} metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64){{.*}} !dbg ![[LOC1]] diff --git a/test/IRGen/debug_fragment_merge.swift b/test/IRGen/debug_fragment_merge.swift index b7663b5c2915e..5c8a9c5a4f9b3 100644 --- a/test/IRGen/debug_fragment_merge.swift +++ b/test/IRGen/debug_fragment_merge.swift @@ -1,7 +1,7 @@ // RUN: %target-swift-frontend -disable-availability-checking -primary-file %s -emit-sil -O -g | %FileCheck %s --check-prefix CHECK-SIL // RUN: %target-swift-frontend -disable-availability-checking -primary-file %s -emit-ir -disable-llvm-optzns -O -g | %FileCheck %s -// UNSUPPORTED: OS=watchos +// REQUIRES: CPU=arm64 || CPU=x86_64 protocol External { func use(str: String); diff --git a/test/IRGen/debug_scope_distinct.swift b/test/IRGen/debug_scope_distinct.swift index ee3059a2bc84e..39f3910101208 100644 --- a/test/IRGen/debug_scope_distinct.swift +++ b/test/IRGen/debug_scope_distinct.swift @@ -3,6 +3,8 @@ // RUN: %target-swiftc_driver -O -g -I %t -c %s -emit-ir -o - | %FileCheck %s // RUN: %target-swiftc_driver -O -g -I %t -c %s -o /dev/null +// REQUIRES: CPU=arm64 || CPU=x86_64 + // CHECK: define {{.*}} void @"$s4main1TV4move2byyAC13TangentVectorV_tF" // CHECK-SAME: ptr {{.*}} %[[ARG_PTR:.*]], // From bf80edeb54b08350b41bfe05559d22d680b4c841 Mon Sep 17 00:00:00 2001 From: Andrew Savonichev Date: Fri, 4 Aug 2023 00:32:30 +0900 Subject: [PATCH 2/2] Check for arm64e as well --- test/IRGen/debug_fragment_merge.sil | 2 +- test/IRGen/debug_fragment_merge.swift | 2 +- test/IRGen/debug_scope_distinct.swift | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/test/IRGen/debug_fragment_merge.sil b/test/IRGen/debug_fragment_merge.sil index a0b520b2b0cb8..3bf615891fc20 100644 --- a/test/IRGen/debug_fragment_merge.sil +++ b/test/IRGen/debug_fragment_merge.sil @@ -3,7 +3,7 @@ // Checking the below on 32 bit architectures would be cumbersome: each // fragment is 32 bits long, which changes the number of checks as well as the // arithmethic on the bounds of each fragment. -// REQUIRES: CPU=arm64 || CPU=x86_64 +// REQUIRES: CPU=arm64 || CPU=x86_64 || CPU=arm64e // CHECK-DAG: llvm.dbg.value{{.*}} metadata ![[VAR:[0-9]+]], metadata !DIExpression(DW_OP_LLVM_fragment, 192, 64){{.*}} !dbg ![[LOC1:[0-9]+]] // CHECK-DAG: llvm.dbg.value{{.*}} metadata ![[VAR]], metadata !DIExpression(DW_OP_LLVM_fragment, 128, 64){{.*}} !dbg ![[LOC1]] diff --git a/test/IRGen/debug_fragment_merge.swift b/test/IRGen/debug_fragment_merge.swift index 5c8a9c5a4f9b3..f299d101e40ee 100644 --- a/test/IRGen/debug_fragment_merge.swift +++ b/test/IRGen/debug_fragment_merge.swift @@ -1,7 +1,7 @@ // RUN: %target-swift-frontend -disable-availability-checking -primary-file %s -emit-sil -O -g | %FileCheck %s --check-prefix CHECK-SIL // RUN: %target-swift-frontend -disable-availability-checking -primary-file %s -emit-ir -disable-llvm-optzns -O -g | %FileCheck %s -// REQUIRES: CPU=arm64 || CPU=x86_64 +// REQUIRES: CPU=arm64 || CPU=x86_64 || CPU=arm64e protocol External { func use(str: String); diff --git a/test/IRGen/debug_scope_distinct.swift b/test/IRGen/debug_scope_distinct.swift index 39f3910101208..73002a51c8e59 100644 --- a/test/IRGen/debug_scope_distinct.swift +++ b/test/IRGen/debug_scope_distinct.swift @@ -3,7 +3,7 @@ // RUN: %target-swiftc_driver -O -g -I %t -c %s -emit-ir -o - | %FileCheck %s // RUN: %target-swiftc_driver -O -g -I %t -c %s -o /dev/null -// REQUIRES: CPU=arm64 || CPU=x86_64 +// REQUIRES: CPU=arm64 || CPU=x86_64 || CPU=arm64e // CHECK: define {{.*}} void @"$s4main1TV4move2byyAC13TangentVectorV_tF" // CHECK-SAME: ptr {{.*}} %[[ARG_PTR:.*]],