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[SYCL][ESIMD] Use vload/vstore for simd object getter/setter. #1887

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Merged
merged 3 commits into from
Jul 8, 2020

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kbobrovs
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DO NOT REVIEW FIRST TWO COMMITS (covered by #1881)

Use special intrinsics to access simd objects in the private address space
to disable standard LLVM optimizations on them.

Author: Gang Chen [email protected]

Signed-off-by: Konstantin S Bobrovsky [email protected]

@kbobrovs kbobrovs added the esimd Explicit SIMD feature label Jun 13, 2020
@kbobrovs kbobrovs requested a review from bader as a code owner June 13, 2020 02:07
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@cmc-rep, please pick the PR as the author of the code

; Function Attrs: norecurse nounwind
define dso_local spir_func void @_Z3foov() local_unnamed_addr #1 {
; CHECK-LABEL: @_Z3foov(
; CHECK-NEXT: [[TMP1:%.*]] = call <16 x i32> @llvm.genx.vload.v16i32.p0v16i32(<16 x i32>* getelementptr inbounds (%"class._ZTSN4sycl5intel3gpu4simdIiLi16EEE.sycl::intel::gpu::simd", %"class._ZTSN4sycl5intel3gpu4simdIiLi16EEE.sycl::intel::gpu::simd"* @vg, i64 0, i32 0))
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@againull againull Jun 17, 2020

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Is it expected that vload is not lowered in this case? It is not obvious why only vstore is lowered to the normal store.

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Yes, this is we are testing. vload/vstore associated with global variable with special attritube stays as vload/vstore. vload/vstore not associated with those global variables is changed to generic load/store. This is explained in the code comment

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This means that the lowering of the load is not tested, please add additional test to check lowering of the load.

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load/store are processed in the same fashion. I added one case for load and one case for store. That should be sufficient

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@againull againull Jun 17, 2020

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I don't see a test for load lowering, how I can be sure that your code for load lowering is working?


bool ESIMDLowerLoadStore::runOnFunction(Function &F) {
bool Changed = false;
Changed |= lowerLoadStore(F);
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Is it possible to replace these 3 lines with
return lowerLoadStore(F); ?

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Why. It works and it is correct. Do we really need to pick on this detail?

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Is this review only about functional correctness?

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That is fine. I can change this one.

#include "llvm/IR/Module.h"
#include "llvm/InitializePasses.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
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Probably some includes are not needed.

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Which includes are not needed. Please be specific

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Review process doesn't work this way.
I pointed to "#include "llvm/Support/raw_ostream.h" which probably was used during debugging the code but is not needed in the published code. And you should check if other headers are needed.

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I will delete raw_ostream.h

@@ -34,6 +34,9 @@ class SYCLLowerESIMDPass : public PassInfoMixin<SYCLLowerESIMDPass> {
FunctionPass *createSYCLLowerESIMDPass();
void initializeSYCLLowerESIMDLegacyPassPass(PassRegistry &);

FunctionPass *createESIMDLowerLoadStorePass();
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Pass is written to work with old pass manager only. Please support it for the new pass manager, SYCLLowerESIMDPass or other pass can be used as an example.

// lower all vload/vstore into normal load/store.
std::vector<Instruction *> ToErase;
for (Instruction &Inst : instructions(F)) {
if (GenXIntrinsic::isVLoadStore(&Inst)) {
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This loop body is one huge block which is hard to read.

Could you please use more early exits there? I think it will be much easier to read. For example:

if (!GenXIntrinsic::isVLoadStore(&Inst))
      continue;

and so on.

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I think this is just your personal preference. Other people may prefer not to use continue

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This is not my personal preference. Here is the link to the LLVM coding guidelines:
https://llvm.org/docs/CodingStandards.html#use-early-exits-and-continue-to-simplify-code

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Coding style is just a guideline. Individual developer should have some freedom in applying it. In this case, for example, I do not like the negative sense in the condition when using condition. I prefer to use positive sense whenever possible for the condition test. Clearly, you read this code, and it did not confuse you.

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Individual reviewers should have freedom in insisting to apply such guidelines (which are essentially a set of BKMs to write robust/correct/maintainable code) if they seem them suitable. I'm exercising that freedom.

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@againull againull Jun 22, 2020

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Ok, I understand that you disagree, but I am not the person who determines the review process for this project.
@pvchupin @olegmaslovatintel @bader @romanovvlad Could you please help with this question?

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This project follows LLVM coding guidelines and this is requirement.

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I have used "continue"

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Probably you forgot to upload the new changes.

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@kbobrovs kbobrovs requested a review from a team as a code owner July 1, 2020 23:09
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kbobrovs commented Jul 1, 2020

@cmc-rep, please check once again if review comments are addressed.
@againull, can you please take another look and see if there are unaddressed comments.
I had to rebase and force-push to resolve conflicts.

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cmc-rep commented Jul 2, 2020

I have addressed all the comments last week

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kbobrovs commented Jul 3, 2020

I have addressed all the comments last week

@againull, please take another look

againull
againull previously approved these changes Jul 3, 2020
kbobrovs and others added 3 commits July 4, 2020 17:09
Use special intrinsics to access simd objects in the private address space
to disable standard LLVM optimizations on them.

Author: Gang Chen <[email protected]>

Signed-off-by: Konstantin S Bobrovsky <[email protected]>
Signed-off-by: Konstantin S Bobrovsky <[email protected]>
@kbobrovs
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kbobrovs commented Jul 5, 2020

Had to rebase after ESIMD lowering merge. @againull, can you please approve again.

@bader bader requested a review from againull July 5, 2020 14:44
@bader bader merged commit ee98d31 into intel:sycl Jul 8, 2020
@kbobrovs kbobrovs deleted the esimd-ldst branch July 30, 2020 12:30
FreddyLeaf pushed a commit to FreddyLeaf/llvm that referenced this pull request Mar 22, 2023
List of changes:

All Literal parameters of instructions in OpenCL.DebugInfo.100
are OpConstants in NonSemantic.Shader.DebugInfo.100 and
NonSemantic.Shader.DebugInfo.200;
SPV_KHR_non_semantic_info is being implicitly added for nonsemantic
debug info;

Original commit:
KhronosGroup/SPIRV-LLVM-Translator@3fe4393
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5 participants