| | | | --- | --- | | Bugzilla Link | [36887](https://llvm.org/bz36887) | | Resolution | FIXED | | Resolved on | Apr 24, 2018 10:11 | | Version | trunk | | OS | All | | Blocks | llvm/llvm-project#31672 | | CC | @RKSimon | | Fixed by commit(s) | 330714,330737 | ## Extended Description For example PEXTRBmr has WriteShuffleLd WriteRMW But the instruction doesn't load anything. Affected instructions EXTRACTPSmr PEXTRBmr PEXTRDmr PEXTRQmr PEXTRWmr VCVTPS2PHYmr VCVTPS2PHmr VEXTRACTPSmr VPEXTRBZmr VPEXTRBmr VPEXTRDZmr VPEXTRDmr VPEXTRQZmr VPEXTRQmr VPEXTRWZmr VPEXTRWmr