Merge c1a99b2c77499176362f24f09a39850867122ea4 into 18.x

[brad0]

[Sparc] limit MaxAtomicSizeInBitsSupported to 32 for 32-bit
Sparc. (#81655)

When in 32-bit mode, the backend doesn't currently implement 64-bit
atomics, even though the hardware is capable if you have specified a V9
CPU. Thus, limit the width to 32-bit, for now, leaving behind a TODO.

[brad0]

/cherry-pick c1a99b2

[llvmbot]

Failed to cherry-pick: c1a99b2

https://github.com/llvm/llvm-project/actions/runs/7892612992

Please manually backport the fix and push it to your github fork. Once this is done, please create a pull request