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[RISCV] Sink hasSideEffects, mayLoad, mayStore from defs to classes in RISCVInstrInfoXCV.td. NFC #130714

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Merged
merged 2 commits into from
Mar 11, 2025
Merged

[RISCV] Sink hasSideEffects, mayLoad, mayStore from defs to classes in RISCVInstrInfoXCV.td. NFC #130714

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[RISCV] Sink hasSideEffects, mayLoad, mayStore from defs to classes i…
topperc Mar 11, 2025
61031d4
fixup! Address review comments
topperc Mar 11, 2025
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68 changes: 38 additions & 30 deletions llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
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Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,8 @@
//
//===----------------------------------------------------------------------===//

let DecoderNamespace = "XCV" in {
let DecoderNamespace = "XCV",
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
class CVInstBitManipRII<bits<2> funct2, bits<3> funct3, dag outs, dag ins,
string opcodestr, string argstr>
: RVInstIBase<funct3, OPC_CUSTOM_2, outs, ins, opcodestr, argstr> {
Expand All @@ -36,10 +37,9 @@ let DecoderNamespace = "XCV" in {
(ins GPR:$rs1), opcodestr, "$rd, $rs1"> {
let rs2 = 0b00000;
}
}
} // DecoderNamespace = "XCV", hasSideEffects = 0, mayLoad = 0, mayStore = 0

let Predicates = [HasVendorXCVbitmanip, IsRV32],
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
let Predicates = [HasVendorXCVbitmanip, IsRV32] in {
def CV_EXTRACT : CVBitManipRII<0b00, 0b000, "cv.extract">;
def CV_EXTRACTU : CVBitManipRII<0b01, 0b000, "cv.extractu">;

Expand All @@ -54,7 +54,8 @@ let Predicates = [HasVendorXCVbitmanip, IsRV32],
def CV_INSERT : CVInstBitManipRII<0b10, 0b000, (outs GPR:$rd_wb),
(ins GPR:$rd, GPR:$rs1, uimm5:$is3, uimm5:$is2),
"cv.insert", "$rd, $rs1, $is3, $is2">;
let DecoderNamespace = "XCV" in
let DecoderNamespace = "XCV",
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in
def CV_INSERTR : RVInstR<0b0011010, 0b011, OPC_CUSTOM_1, (outs GPR:$rd_wb),
(ins GPR:$rd, GPR:$rs1, GPR:$rs2),
"cv.insertr", "$rd, $rs1, $rs2">;
Expand All @@ -75,6 +76,9 @@ class CVInstMac<bits<7> funct7, bits<3> funct3, string opcodestr>
(outs GPR:$rd_wb), (ins GPR:$rd, GPR:$rs1, GPR:$rs2),
opcodestr, "$rd, $rs1, $rs2"> {
let Constraints = "$rd = $rd_wb";
let hasSideEffects = 0;
let mayLoad = 0;
let mayStore = 0;
let DecoderNamespace = "XCV";
}

Expand All @@ -86,6 +90,11 @@ class CVInstMacMulN<bits<2> funct2, bits<3> funct3, dag outs, dag ins,

let Inst{31-30} = funct2;
let Inst{29-25} = imm5;

let hasSideEffects = 0;
let mayLoad = 0;
let mayStore = 0;

let DecoderNamespace = "XCV";
}

Expand All @@ -99,8 +108,7 @@ class CVInstMulN<bits<2> funct2, bits<3> funct3, string opcodestr>
: CVInstMacMulN<funct2, funct3, (outs GPR:$rd),
(ins GPR:$rs1, GPR:$rs2, uimm5:$imm5), opcodestr>;

let Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0,
mayStore = 0 in {
let Predicates = [HasVendorXCVmac, IsRV32] in {
// 32x32 bit macs
def CV_MAC : CVInstMac<0b1001000, 0b011, "cv.mac">,
Sched<[]>;
Expand All @@ -126,9 +134,7 @@ let Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0,
Sched<[]>;
def CV_MACHHURN : CVInstMacN<0b11, 0b111, "cv.machhurn">,
Sched<[]>;
} // Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0...

let Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
// Signed 16x16 bit muls with imm
def CV_MULSN : CVInstMulN<0b00, 0b100, "cv.mulsn">,
Sched<[]>;
Expand All @@ -148,9 +154,7 @@ let Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0, may
Sched<[]>;
def CV_MULHHURN : CVInstMulN<0b11, 0b101, "cv.mulhhurn">,
Sched<[]>;
} // Predicates = [HasVendorXCVmac, IsRV32], hasSideEffects = 0, mayLoad = 0...

let Predicates = [HasVendorXCVmac, IsRV32] in {
// Xcvmac Pseudo Instructions
// Signed 16x16 bit muls
def : InstAlias<"cv.muls $rd1, $rs1, $rs2",
Expand All @@ -165,7 +169,8 @@ let Predicates = [HasVendorXCVmac, IsRV32] in {
(CV_MULHHUN GPR:$rd1, GPR:$rs1, GPR:$rs2, 0)>;
} // Predicates = [HasVendorXCVmac, IsRV32]

let DecoderNamespace = "XCV" in {
let DecoderNamespace = "XCV",
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
class CVInstAluRRI<bits<2> funct2, bits<3> funct3, string opcodestr>
: RVInstRBase<funct3, OPC_CUSTOM_2, (outs GPR:$rd),
(ins GPR:$rs1, GPR:$rs2, uimm5:$imm5), opcodestr,
Expand Down Expand Up @@ -204,8 +209,7 @@ let DecoderNamespace = "XCV" in {

} // DecoderNamespace = "XCV"

let Predicates = [HasVendorXCValu, IsRV32],
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
let Predicates = [HasVendorXCValu, IsRV32] in {
// General ALU Operations
def CV_ABS : CVInstAluR<0b0101000, 0b011, "cv.abs">,
Sched<[]>;
Expand Down Expand Up @@ -255,11 +259,7 @@ let Predicates = [HasVendorXCValu, IsRV32],
Sched<[]>;
def CV_SUBURN : CVInstAluRRI<0b11, 0b011, "cv.suburn">,
Sched<[]>;
} // Predicates = [HasVendorXCValu, IsRV32],
// hasSideEffects = 0, mayLoad = 0, mayStore = 0

let Predicates = [HasVendorXCValu, IsRV32],
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
def CV_ADDNR : CVInstAluRRNR<0b1000000, 0b011, "cv.addnr">,
Sched<[]>;
def CV_ADDUNR : CVInstAluRRNR<0b1000001, 0b011, "cv.addunr">,
Expand All @@ -277,8 +277,7 @@ let Predicates = [HasVendorXCValu, IsRV32],
def CV_SUBURNR : CVInstAluRRNR<0b1000111, 0b011, "cv.suburnr">,
Sched<[]>;

} // Predicates = [HasVendorXCValu, IsRV32],
// hasSideEffects = 0, mayLoad = 0, mayStore = 0,
} // Predicates = [HasVendorXCValu, IsRV32]

let Predicates = [HasVendorXCValu, IsRV32] in {
def : MnemonicAlias<"cv.slet", "cv.sle">;
Expand Down Expand Up @@ -307,6 +306,7 @@ class CVInstSIMDRI<bits<5> funct5, bit F, bits<3> funct3, RISCVOpcode opcode,
let DecoderNamespace = "XCV";
}

let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
class CVSIMDRR<bits<5> funct5, bit F, bit funct1, bits<3> funct3,
string opcodestr>
: CVInstSIMDRR<funct5, F, funct1, funct3, OPC_CUSTOM_3, (outs GPR:$rd),
Expand Down Expand Up @@ -350,6 +350,7 @@ class CVSIMDR<bits<5> funct5, bit F, bit funct1, bits<3> funct3,
(ins GPR:$rs1), opcodestr, "$rd, $rs1"> {
let rs2 = 0b00000;
}
} // hasSideEffects = 0, mayLoad = 0, mayStore = 0

multiclass CVSIMDBinarySigned<bits<5> funct5, bit F, bit funct1, string mnemonic> {
def CV_ # NAME # _H : CVSIMDRR<funct5, F, funct1, 0b000, "cv." # mnemonic # ".h">;
Expand Down Expand Up @@ -397,8 +398,7 @@ multiclass CVSIMDBinaryUnsignedWb<bits<5> funct5, bit F, bit funct1, string mnem
}


let Predicates = [HasVendorXCVsimd, IsRV32],
hasSideEffects = 0, mayLoad = 0, mayStore = 0 in {
let Predicates = [HasVendorXCVsimd, IsRV32] in {
defm ADD : CVSIMDBinarySigned<0b00000, 0, 0, "add">;
defm SUB : CVSIMDBinarySigned<0b00001, 0, 0, "sub">;
defm AVG : CVSIMDBinarySigned<0b00010, 0, 0, "avg">;
Expand Down Expand Up @@ -500,11 +500,15 @@ class CVInstImmBranch<bits<3> funct3, dag outs, dag ins,
: RVInstB<funct3, OPC_CUSTOM_0, outs, ins, opcodestr, argstr> {
bits<5> imm5;
let rs2 = imm5;
let isBranch = 1;
let isTerminator = 1;
let hasSideEffects = 0;
let mayLoad = 0;
let mayStore = 0;
let DecoderNamespace = "XCV";
}

let Predicates = [HasVendorXCVbi, IsRV32], hasSideEffects = 0, mayLoad = 0,
mayStore = 0, isBranch = 1, isTerminator = 1 in {
let Predicates = [HasVendorXCVbi, IsRV32] in {
// Immediate branching operations
def CV_BEQIMM : CVInstImmBranch<0b110, (outs),
(ins GPR:$rs1, simm5:$imm5, simm13_lsb0:$imm12),
Expand All @@ -530,15 +534,18 @@ def CVrr : Operand<i32>,
let MIOperandInfo = (ops GPR:$base, GPR:$offset);
}

let hasSideEffects = 0, mayLoad = 1, mayStore = 0 in {
class CVLoad_ri_inc<bits<3> funct3, string opcodestr>
: RVInstI<funct3, OPC_CUSTOM_0, (outs GPR:$rd, GPR:$rs1_wb), (ins GPRMem:$rs1, simm12:$imm12),
: RVInstI<funct3, OPC_CUSTOM_0, (outs GPR:$rd, GPR:$rs1_wb),
(ins GPRMem:$rs1, simm12:$imm12),
opcodestr, "$rd, (${rs1}), ${imm12}"> {
let Constraints = "$rs1_wb = $rs1";
let DecoderNamespace = "XCV";
}

class CVLoad_rr_inc<bits<7> funct7, bits<3> funct3, string opcodestr>
: RVInstR<funct7, funct3, OPC_CUSTOM_1, (outs GPR:$rd, GPR:$rs1_wb), (ins GPRMem:$rs1, GPR:$rs2),
: RVInstR<funct7, funct3, OPC_CUSTOM_1, (outs GPR:$rd, GPR:$rs1_wb),
(ins GPRMem:$rs1, GPR:$rs2),
opcodestr, "$rd, (${rs1}), ${rs2}"> {
let Constraints = "$rs1_wb = $rs1";
let DecoderNamespace = "XCV";
Expand All @@ -557,9 +564,9 @@ class CVLoad_rr<bits<7> funct7, bits<3> funct3, string opcodestr>
let Inst{11-7} = rd;
let DecoderNamespace = "XCV";
}
} // hasSideEffects = 0, mayLoad = 1, mayStore = 0

let Predicates = [HasVendorXCVmem, IsRV32], hasSideEffects = 0, mayLoad = 1,
mayStore = 0 in {
let Predicates = [HasVendorXCVmem, IsRV32] in {
// Register-Immediate load with post-increment
def CV_LB_ri_inc : CVLoad_ri_inc<0b000, "cv.lb">;
def CV_LBU_ri_inc : CVLoad_ri_inc<0b100, "cv.lbu">;
Expand All @@ -582,6 +589,7 @@ let Predicates = [HasVendorXCVmem, IsRV32], hasSideEffects = 0, mayLoad = 1,
def CV_LW_rr : CVLoad_rr<0b0000110, 0b011, "cv.lw">;
}

let hasSideEffects = 0, mayLoad = 0, mayStore = 1 in {
class CVStore_ri_inc<bits<3> funct3, string opcodestr>
: RVInstS<funct3, OPC_CUSTOM_1, (outs GPR:$rs1_wb),
(ins GPR:$rs2, GPR:$rs1, simm12:$imm12),
Expand Down Expand Up @@ -622,9 +630,9 @@ class CVStore_rr<bits<3> funct3, bits<7> funct7, string opcodestr>
let Inst{6-0} = OPC_CUSTOM_1.Value;
let DecoderNamespace = "XCV";
}
} // hasSideEffects = 0, mayLoad = 0, mayStore = 1

let Predicates = [HasVendorXCVmem, IsRV32], hasSideEffects = 0, mayLoad = 0,
mayStore = 1 in {
let Predicates = [HasVendorXCVmem, IsRV32] in {
// Register-Immediate store with post-increment
def CV_SB_ri_inc : CVStore_ri_inc<0b000, "cv.sb">;
def CV_SH_ri_inc : CVStore_ri_inc<0b001, "cv.sh">;
Expand Down