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[AMDGPU] Baseline test for ptrtoaddr code generation #143813

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118 changes: 118 additions & 0 deletions llvm/test/CodeGen/AMDGPU/GlobalISel/ptrtoint-ptrtoaddr-p8.ll
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Original file line number Diff line number Diff line change
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=amdgcn -global-isel -verify-machineinstrs < %s | FileCheck %s
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Suggested change
; RUN: llc -mtriple=amdgcn -global-isel -verify-machineinstrs < %s | FileCheck %s
; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck %s

Avoid using the default subtarget

;; Check that we can lower ptrtoaddr differently from ptrtoint.
;; Includes an ignored argument so the registers actually need to be written
;; Also all functions are zeroext to show that non-address bits are masked off
;; instead of filling them with arbitrary data

define zeroext i128 @ptrtoint(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoint:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: v_mov_b32_e32 v2, v6
; CHECK-NEXT: v_mov_b32_e32 v3, v7
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoint ptr addrspace(8) %ptr to i128
ret i128 %ret
}

define zeroext i48 @ptrtoaddr(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoaddr:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_and_b32_e32 v1, 0xffff, v5
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoaddr ptr addrspace(8) %ptr to i48
ret i48 %ret
}

define <2 x i128> @ptrtoint_vec(ptr addrspace(8) %ignored, <2 x ptr addrspace(8)> %ptr) {
; CHECK-LABEL: ptrtoint_vec:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: v_mov_b32_e32 v2, v6
; CHECK-NEXT: v_mov_b32_e32 v3, v7
; CHECK-NEXT: v_mov_b32_e32 v4, v8
; CHECK-NEXT: v_mov_b32_e32 v5, v9
; CHECK-NEXT: v_mov_b32_e32 v6, v10
; CHECK-NEXT: v_mov_b32_e32 v7, v11
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoint <2 x ptr addrspace(8)> %ptr to <2 x i128>
ret <2 x i128> %ret
}

;; Note: needs to be 2 x i64 instead of 2 x i48 since the latter is not supported.
define <2 x i64> @ptrtoaddr_vec(ptr addrspace(8) %ignored, <2 x ptr addrspace(8)> %ptr) {
; CHECK-LABEL: ptrtoaddr_vec:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: v_mov_b32_e32 v2, v8
; CHECK-NEXT: v_mov_b32_e32 v3, v9
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoaddr <2 x ptr addrspace(8)> %ptr to <2 x i64>
ret <2 x i64> %ret
}

define zeroext i256 @ptrtoint_ext(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoint_ext:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: v_mov_b32_e32 v2, v6
; CHECK-NEXT: v_mov_b32_e32 v3, v7
; CHECK-NEXT: v_mov_b32_e32 v4, 0
; CHECK-NEXT: v_mov_b32_e32 v5, 0
; CHECK-NEXT: v_mov_b32_e32 v6, 0
; CHECK-NEXT: v_mov_b32_e32 v7, 0
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoint ptr addrspace(8) %ptr to i256
ret i256 %ret
}

;; Check that we extend the offset to i256 instead of reinterpreting all bits.
;; FIXME: this is wrong, we are removing the trunc to i48:
define zeroext i256 @ptrtoaddr_ext(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoaddr_ext:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: v_mov_b32_e32 v2, v6
; CHECK-NEXT: v_mov_b32_e32 v3, v7
; CHECK-NEXT: v_mov_b32_e32 v4, 0
; CHECK-NEXT: v_mov_b32_e32 v5, 0
; CHECK-NEXT: v_mov_b32_e32 v6, 0
; CHECK-NEXT: v_mov_b32_e32 v7, 0
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoaddr ptr addrspace(8) %ptr to i256
ret i256 %ret
}

define zeroext i64 @ptrtoint_trunc(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoint_trunc:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoint ptr addrspace(8) %ptr to i64
ret i64 %ret
}

define zeroext i16 @ptrtoaddr_trunc(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoaddr_trunc:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_and_b32_e32 v0, 0xffff, v4
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoaddr ptr addrspace(8) %ptr to i16
ret i16 %ret
}
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Should have SGPR variants too

118 changes: 118 additions & 0 deletions llvm/test/CodeGen/AMDGPU/ptrtoint-ptrtoaddr-p8.ll
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Original file line number Diff line number Diff line change
@@ -0,0 +1,118 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck %s
;; Check that we can lower ptrtoaddr differently from ptrtoint.
;; Includes an ignored argument so the registers actually need to be written
;; Also all functions are zeroext to show that non-address bits are masked off
;; instead of filling them with arbitrary data

define zeroext i128 @ptrtoint(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoint:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v3, v7
; CHECK-NEXT: v_mov_b32_e32 v2, v6
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoint ptr addrspace(8) %ptr to i128
ret i128 %ret
}

define zeroext i48 @ptrtoaddr(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoaddr:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_and_b32_e32 v1, 0xffff, v5
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoaddr ptr addrspace(8) %ptr to i48
ret i48 %ret
}

define <2 x i128> @ptrtoint_vec(ptr addrspace(8) %ignored, <2 x ptr addrspace(8)> %ptr) {
; CHECK-LABEL: ptrtoint_vec:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v3, v7
; CHECK-NEXT: v_mov_b32_e32 v2, v6
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: v_mov_b32_e32 v4, v8
; CHECK-NEXT: v_mov_b32_e32 v5, v9
; CHECK-NEXT: v_mov_b32_e32 v6, v10
; CHECK-NEXT: v_mov_b32_e32 v7, v11
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoint <2 x ptr addrspace(8)> %ptr to <2 x i128>
ret <2 x i128> %ret
}

;; Note: needs to be 2 x i64 instead of 2 x i48 since the latter is not supported.
define <2 x i64> @ptrtoaddr_vec(ptr addrspace(8) %ignored, <2 x ptr addrspace(8)> %ptr) {
; CHECK-LABEL: ptrtoaddr_vec:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v3, v9
; CHECK-NEXT: v_mov_b32_e32 v2, v8
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoaddr <2 x ptr addrspace(8)> %ptr to <2 x i64>
ret <2 x i64> %ret
}

define zeroext i256 @ptrtoint_ext(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoint_ext:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v3, v7
; CHECK-NEXT: v_mov_b32_e32 v2, v6
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: v_mov_b32_e32 v4, 0
; CHECK-NEXT: v_mov_b32_e32 v5, 0
; CHECK-NEXT: v_mov_b32_e32 v6, 0
; CHECK-NEXT: v_mov_b32_e32 v7, 0
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoint ptr addrspace(8) %ptr to i256
ret i256 %ret
}

;; Check that we extend the offset to i256 instead of reinterpreting all bits.
;; FIXME: this is wrong, we are removing the trunc to i48:
define zeroext i256 @ptrtoaddr_ext(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoaddr_ext:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v3, v7
; CHECK-NEXT: v_mov_b32_e32 v2, v6
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: v_mov_b32_e32 v4, 0
; CHECK-NEXT: v_mov_b32_e32 v5, 0
; CHECK-NEXT: v_mov_b32_e32 v6, 0
; CHECK-NEXT: v_mov_b32_e32 v7, 0
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoaddr ptr addrspace(8) %ptr to i256
ret i256 %ret
}

define zeroext i64 @ptrtoint_trunc(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoint_trunc:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v1, v5
; CHECK-NEXT: v_mov_b32_e32 v0, v4
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoint ptr addrspace(8) %ptr to i64
ret i64 %ret
}

define zeroext i16 @ptrtoaddr_trunc(ptr addrspace(8) %ignored, ptr addrspace(8) %ptr) {
; CHECK-LABEL: ptrtoaddr_trunc:
; CHECK: ; %bb.0:
; CHECK-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; CHECK-NEXT: v_and_b32_e32 v0, 0xffff, v4
; CHECK-NEXT: s_setpc_b64 s[30:31]
%ret = ptrtoaddr ptr addrspace(8) %ptr to i16
ret i16 %ret
}
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