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[ARM] Fix expansion of ABS in a call sequence #147270

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Merged
merged 1 commit into from
Jul 7, 2025
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[ARM] Fix expansion of ABS in a call sequence #147270

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5 changes: 5 additions & 0 deletions llvm/lib/Target/ARM/ARMISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -12359,6 +12359,11 @@ ARMTargetLowering::EmitInstrWithCustomInserter(MachineInstr &MI,
Fn->insert(BBI, RSBBB);
Fn->insert(BBI, SinkBB);

// Set the call frame size on entry to the new basic blocks.
unsigned CallFrameSize = TII->getCallFrameSizeAt(MI);
RSBBB->setCallFrameSize(CallFrameSize);
SinkBB->setCallFrameSize(CallFrameSize);

Register ABSSrcReg = MI.getOperand(1).getReg();
Register ABSDstReg = MI.getOperand(0).getReg();
bool ABSSrcKIll = MI.getOperand(1).isKill();
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25 changes: 25 additions & 0 deletions llvm/test/CodeGen/ARM/iabs.ll
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Expand Up @@ -50,3 +50,28 @@ define i64 @test3(i64 %a) {
%abs = select i1 %b, i64 %a, i64 %tmp1neg
ret i64 %abs
}

declare void @callee(...)

define void @testcallframe(i32 %a) {
; CHECK-LABEL: testcallframe:
; CHECK: @ %bb.0: @ %bb
; CHECK-NEXT: .save {r11, lr}
; CHECK-NEXT: push {r11, lr}
; CHECK-NEXT: .pad #8
; CHECK-NEXT: sub sp, sp, #8
; CHECK-NEXT: cmp r0, #0
; CHECK-NEXT: mov r1, #0
; CHECK-NEXT: rsbmi r0, r0, #0
; CHECK-NEXT: mov r2, #0
; CHECK-NEXT: mov r3, #0
; CHECK-NEXT: str r1, [sp]
; CHECK-NEXT: bl callee
; CHECK-NEXT: add sp, sp, #8
; CHECK-NEXT: pop {r11, lr}
; CHECK-NEXT: bx lr
bb:
%i = tail call i32 @llvm.abs.i32(i32 %a, i1 false)
tail call void @callee(i32 %i, i32 0, i32 0, i32 0, i32 0)
ret void
}
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