Skip to content

Update STM32F1 HAL and CMSIS drivers #1200

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Oct 9, 2020
Merged

Update STM32F1 HAL and CMSIS drivers #1200

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
d3a4388
[F1] Update STM32F1xx HAL Drivers to v1.1.6
fpistm Oct 9, 2020
b720ec5
[F1] Update STM32F1xx CMSIS Drivers to v4.3.2
fpistm Oct 9, 2020
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
19 changes: 8 additions & 11 deletions system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xb.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -4880,7 +4880,6 @@ typedef struct
#define SPI_TXCRCR_TXCRC SPI_TXCRCR_TXCRC_Msk /*!< Tx CRC Register */



/******************************************************************************/
/* */
/* Inter-integrated Circuit Interface */
Expand Down Expand Up @@ -5718,8 +5717,6 @@ typedef struct
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM15))

#define IS_TIM_SYNCHRO_INSTANCE(INSTANCE) IS_TIM_MASTER_INSTANCE(INSTANCE)

#define IS_TIM_DMABURST_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
Expand Down Expand Up @@ -5921,31 +5918,31 @@ typedef struct
#define ADC1_2_IRQn ADC1_IRQn
#define USBWakeUp_IRQn CEC_IRQn
#define OTG_FS_WKUP_IRQn CEC_IRQn
#define TIM9_IRQn TIM1_BRK_TIM15_IRQn
#define TIM1_BRK_IRQn TIM1_BRK_TIM15_IRQn
#define TIM1_BRK_TIM9_IRQn TIM1_BRK_TIM15_IRQn
#define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_TIM17_IRQn
#define TIM1_BRK_IRQn TIM1_BRK_TIM15_IRQn
#define TIM9_IRQn TIM1_BRK_TIM15_IRQn
#define TIM1_TRG_COM_IRQn TIM1_TRG_COM_TIM17_IRQn
#define TIM11_IRQn TIM1_TRG_COM_TIM17_IRQn
#define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_TIM17_IRQn
#define TIM1_UP_IRQn TIM1_UP_TIM16_IRQn
#define TIM1_UP_TIM10_IRQn TIM1_UP_TIM16_IRQn
#define TIM10_IRQn TIM1_UP_TIM16_IRQn
#define TIM1_UP_IRQn TIM1_UP_TIM16_IRQn
#define TIM6_IRQn TIM6_DAC_IRQn


/* Aliases for __IRQHandler */
#define ADC1_2_IRQHandler ADC1_IRQHandler
#define USBWakeUp_IRQHandler CEC_IRQHandler
#define OTG_FS_WKUP_IRQHandler CEC_IRQHandler
#define TIM9_IRQHandler TIM1_BRK_TIM15_IRQHandler
#define TIM1_BRK_IRQHandler TIM1_BRK_TIM15_IRQHandler
#define TIM1_BRK_TIM9_IRQHandler TIM1_BRK_TIM15_IRQHandler
#define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler
#define TIM1_BRK_IRQHandler TIM1_BRK_TIM15_IRQHandler
#define TIM9_IRQHandler TIM1_BRK_TIM15_IRQHandler
#define TIM1_TRG_COM_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler
#define TIM11_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler
#define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler
#define TIM1_UP_IRQHandler TIM1_UP_TIM16_IRQHandler
#define TIM1_UP_TIM10_IRQHandler TIM1_UP_TIM16_IRQHandler
#define TIM10_IRQHandler TIM1_UP_TIM16_IRQHandler
#define TIM1_UP_IRQHandler TIM1_UP_TIM16_IRQHandler
#define TIM6_IRQHandler TIM6_DAC_IRQHandler


Expand Down
19 changes: 8 additions & 11 deletions system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f100xe.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -5394,7 +5394,6 @@ typedef struct
#define SPI_TXCRCR_TXCRC SPI_TXCRCR_TXCRC_Msk /*!< Tx CRC Register */



/******************************************************************************/
/* */
/* Inter-integrated Circuit Interface */
Expand Down Expand Up @@ -6283,8 +6282,6 @@ typedef struct
((INSTANCE) == TIM12) || \
((INSTANCE) == TIM15))

#define IS_TIM_SYNCHRO_INSTANCE(INSTANCE) IS_TIM_MASTER_INSTANCE(INSTANCE)

#define IS_TIM_DMABURST_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM1) || \
((INSTANCE) == TIM2) || \
Expand Down Expand Up @@ -6522,17 +6519,17 @@ typedef struct

/* Aliases for __IRQn */
#define ADC1_2_IRQn ADC1_IRQn
#define USBWakeUp_IRQn CEC_IRQn
#define OTG_FS_WKUP_IRQn CEC_IRQn
#define USBWakeUp_IRQn CEC_IRQn
#define TIM8_BRK_IRQn TIM12_IRQn
#define TIM8_BRK_TIM12_IRQn TIM12_IRQn
#define TIM8_UP_TIM13_IRQn TIM13_IRQn
#define TIM8_UP_IRQn TIM13_IRQn
#define TIM8_TRG_COM_IRQn TIM14_IRQn
#define TIM8_UP_TIM13_IRQn TIM13_IRQn
#define TIM8_TRG_COM_TIM14_IRQn TIM14_IRQn
#define TIM8_TRG_COM_IRQn TIM14_IRQn
#define TIM9_IRQn TIM1_BRK_TIM15_IRQn
#define TIM1_BRK_TIM9_IRQn TIM1_BRK_TIM15_IRQn
#define TIM1_BRK_IRQn TIM1_BRK_TIM15_IRQn
#define TIM1_BRK_TIM9_IRQn TIM1_BRK_TIM15_IRQn
#define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_TIM17_IRQn
#define TIM1_TRG_COM_IRQn TIM1_TRG_COM_TIM17_IRQn
#define TIM11_IRQn TIM1_TRG_COM_TIM17_IRQn
Expand All @@ -6544,17 +6541,17 @@ typedef struct

/* Aliases for __IRQHandler */
#define ADC1_2_IRQHandler ADC1_IRQHandler
#define USBWakeUp_IRQHandler CEC_IRQHandler
#define OTG_FS_WKUP_IRQHandler CEC_IRQHandler
#define USBWakeUp_IRQHandler CEC_IRQHandler
#define TIM8_BRK_IRQHandler TIM12_IRQHandler
#define TIM8_BRK_TIM12_IRQHandler TIM12_IRQHandler
#define TIM8_UP_TIM13_IRQHandler TIM13_IRQHandler
#define TIM8_UP_IRQHandler TIM13_IRQHandler
#define TIM8_TRG_COM_IRQHandler TIM14_IRQHandler
#define TIM8_UP_TIM13_IRQHandler TIM13_IRQHandler
#define TIM8_TRG_COM_TIM14_IRQHandler TIM14_IRQHandler
#define TIM8_TRG_COM_IRQHandler TIM14_IRQHandler
#define TIM9_IRQHandler TIM1_BRK_TIM15_IRQHandler
#define TIM1_BRK_TIM9_IRQHandler TIM1_BRK_TIM15_IRQHandler
#define TIM1_BRK_IRQHandler TIM1_BRK_TIM15_IRQHandler
#define TIM1_BRK_TIM9_IRQHandler TIM1_BRK_TIM15_IRQHandler
#define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler
#define TIM1_TRG_COM_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler
#define TIM11_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler
Expand Down
4 changes: 0 additions & 4 deletions system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101x6.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -4412,12 +4412,10 @@ typedef struct
#define SPI_TXCRCR_TXCRC_Msk (0xFFFFUL << SPI_TXCRCR_TXCRC_Pos) /*!< 0x0000FFFF */
#define SPI_TXCRCR_TXCRC SPI_TXCRCR_TXCRC_Msk /*!< Tx CRC Register */

/****************** Bit definition for SPI_I2SCFGR register *****************/
#define SPI_I2SCFGR_I2SMOD_Pos (11U)
#define SPI_I2SCFGR_I2SMOD_Msk (0x1UL << SPI_I2SCFGR_I2SMOD_Pos) /*!< 0x00000800 */
#define SPI_I2SCFGR_I2SMOD SPI_I2SCFGR_I2SMOD_Msk /*!< I2S mode selection */


/******************************************************************************/
/* */
/* Inter-integrated Circuit Interface */
Expand Down Expand Up @@ -5170,8 +5168,6 @@ typedef struct
(((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3))

#define IS_TIM_SYNCHRO_INSTANCE(INSTANCE) IS_TIM_MASTER_INSTANCE(INSTANCE)

#define IS_TIM_DMABURST_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3))
Expand Down
4 changes: 0 additions & 4 deletions system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xb.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -4474,12 +4474,10 @@ typedef struct
#define SPI_TXCRCR_TXCRC_Msk (0xFFFFUL << SPI_TXCRCR_TXCRC_Pos) /*!< 0x0000FFFF */
#define SPI_TXCRCR_TXCRC SPI_TXCRCR_TXCRC_Msk /*!< Tx CRC Register */

/****************** Bit definition for SPI_I2SCFGR register *****************/
#define SPI_I2SCFGR_I2SMOD_Pos (11U)
#define SPI_I2SCFGR_I2SMOD_Msk (0x1UL << SPI_I2SCFGR_I2SMOD_Pos) /*!< 0x00000800 */
#define SPI_I2SCFGR_I2SMOD SPI_I2SCFGR_I2SMOD_Msk /*!< I2S mode selection */


/******************************************************************************/
/* */
/* Inter-integrated Circuit Interface */
Expand Down Expand Up @@ -5279,8 +5277,6 @@ typedef struct
((INSTANCE) == TIM3) || \
((INSTANCE) == TIM4))

#define IS_TIM_SYNCHRO_INSTANCE(INSTANCE) IS_TIM_MASTER_INSTANCE(INSTANCE)

#define IS_TIM_DMABURST_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
Expand Down
55 changes: 52 additions & 3 deletions system/Drivers/CMSIS/Device/ST/STM32F1xx/Include/stm32f101xe.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -514,6 +514,7 @@ typedef struct
__IO uint32_t RXCRCR;
__IO uint32_t TXCRCR;
__IO uint32_t I2SCFGR;
__IO uint32_t I2SPR;
} SPI_TypeDef;

/**
Expand Down Expand Up @@ -5283,6 +5284,10 @@ typedef struct
/* Serial Peripheral Interface */
/* */
/******************************************************************************/
/*
* @brief Specific device feature definitions (not present on all devices in the STM32F1 serie)
*/
#define SPI_I2S_SUPPORT /*!< I2S support */
#define SPI_CRC_ERROR_WORKAROUND_FEATURE

/******************* Bit definition for SPI_CR1 register ********************/
Expand Down Expand Up @@ -5401,10 +5406,52 @@ typedef struct
#define SPI_TXCRCR_TXCRC SPI_TXCRCR_TXCRC_Msk /*!< Tx CRC Register */

/****************** Bit definition for SPI_I2SCFGR register *****************/
#define SPI_I2SCFGR_CHLEN_Pos (0U)
#define SPI_I2SCFGR_CHLEN_Msk (0x1UL << SPI_I2SCFGR_CHLEN_Pos) /*!< 0x00000001 */
#define SPI_I2SCFGR_CHLEN SPI_I2SCFGR_CHLEN_Msk /*!< Channel length (number of bits per audio channel) */

#define SPI_I2SCFGR_DATLEN_Pos (1U)
#define SPI_I2SCFGR_DATLEN_Msk (0x3UL << SPI_I2SCFGR_DATLEN_Pos) /*!< 0x00000006 */
#define SPI_I2SCFGR_DATLEN SPI_I2SCFGR_DATLEN_Msk /*!< DATLEN[1:0] bits (Data length to be transferred) */
#define SPI_I2SCFGR_DATLEN_0 (0x1UL << SPI_I2SCFGR_DATLEN_Pos) /*!< 0x00000002 */
#define SPI_I2SCFGR_DATLEN_1 (0x2UL << SPI_I2SCFGR_DATLEN_Pos) /*!< 0x00000004 */

#define SPI_I2SCFGR_CKPOL_Pos (3U)
#define SPI_I2SCFGR_CKPOL_Msk (0x1UL << SPI_I2SCFGR_CKPOL_Pos) /*!< 0x00000008 */
#define SPI_I2SCFGR_CKPOL SPI_I2SCFGR_CKPOL_Msk /*!< steady state clock polarity */

#define SPI_I2SCFGR_I2SSTD_Pos (4U)
#define SPI_I2SCFGR_I2SSTD_Msk (0x3UL << SPI_I2SCFGR_I2SSTD_Pos) /*!< 0x00000030 */
#define SPI_I2SCFGR_I2SSTD SPI_I2SCFGR_I2SSTD_Msk /*!< I2SSTD[1:0] bits (I2S standard selection) */
#define SPI_I2SCFGR_I2SSTD_0 (0x1UL << SPI_I2SCFGR_I2SSTD_Pos) /*!< 0x00000010 */
#define SPI_I2SCFGR_I2SSTD_1 (0x2UL << SPI_I2SCFGR_I2SSTD_Pos) /*!< 0x00000020 */

#define SPI_I2SCFGR_PCMSYNC_Pos (7U)
#define SPI_I2SCFGR_PCMSYNC_Msk (0x1UL << SPI_I2SCFGR_PCMSYNC_Pos) /*!< 0x00000080 */
#define SPI_I2SCFGR_PCMSYNC SPI_I2SCFGR_PCMSYNC_Msk /*!< PCM frame synchronization */

#define SPI_I2SCFGR_I2SCFG_Pos (8U)
#define SPI_I2SCFGR_I2SCFG_Msk (0x3UL << SPI_I2SCFGR_I2SCFG_Pos) /*!< 0x00000300 */
#define SPI_I2SCFGR_I2SCFG SPI_I2SCFGR_I2SCFG_Msk /*!< I2SCFG[1:0] bits (I2S configuration mode) */
#define SPI_I2SCFGR_I2SCFG_0 (0x1UL << SPI_I2SCFGR_I2SCFG_Pos) /*!< 0x00000100 */
#define SPI_I2SCFGR_I2SCFG_1 (0x2UL << SPI_I2SCFGR_I2SCFG_Pos) /*!< 0x00000200 */

#define SPI_I2SCFGR_I2SE_Pos (10U)
#define SPI_I2SCFGR_I2SE_Msk (0x1UL << SPI_I2SCFGR_I2SE_Pos) /*!< 0x00000400 */
#define SPI_I2SCFGR_I2SE SPI_I2SCFGR_I2SE_Msk /*!< I2S Enable */
#define SPI_I2SCFGR_I2SMOD_Pos (11U)
#define SPI_I2SCFGR_I2SMOD_Msk (0x1UL << SPI_I2SCFGR_I2SMOD_Pos) /*!< 0x00000800 */
#define SPI_I2SCFGR_I2SMOD SPI_I2SCFGR_I2SMOD_Msk /*!< I2S mode selection */

/****************** Bit definition for SPI_I2SPR register *******************/
#define SPI_I2SPR_I2SDIV_Pos (0U)
#define SPI_I2SPR_I2SDIV_Msk (0xFFUL << SPI_I2SPR_I2SDIV_Pos) /*!< 0x000000FF */
#define SPI_I2SPR_I2SDIV SPI_I2SPR_I2SDIV_Msk /*!< I2S Linear prescaler */
#define SPI_I2SPR_ODD_Pos (8U)
#define SPI_I2SPR_ODD_Msk (0x1UL << SPI_I2SPR_ODD_Pos) /*!< 0x00000100 */
#define SPI_I2SPR_ODD SPI_I2SPR_ODD_Msk /*!< Odd factor for the prescaler */
#define SPI_I2SPR_MCKOE_Pos (9U)
#define SPI_I2SPR_MCKOE_Msk (0x1UL << SPI_I2SPR_MCKOE_Pos) /*!< 0x00000200 */
#define SPI_I2SPR_MCKOE SPI_I2SPR_MCKOE_Msk /*!< Master Clock Output Enable */

/******************************************************************************/
/* */
Expand Down Expand Up @@ -6153,6 +6200,10 @@ typedef struct
/******************************* SMBUS Instances ******************************/
#define IS_SMBUS_ALL_INSTANCE IS_I2C_ALL_INSTANCE

/******************************** I2S Instances *******************************/
#define IS_I2S_ALL_INSTANCE(INSTANCE) (((INSTANCE) == SPI2) || \
((INSTANCE) == SPI3))

/****************************** IWDG Instances ********************************/
#define IS_IWDG_ALL_INSTANCE(INSTANCE) ((INSTANCE) == IWDG)

Expand Down Expand Up @@ -6253,8 +6304,6 @@ typedef struct
((INSTANCE) == TIM4) || \
((INSTANCE) == TIM5))

#define IS_TIM_SYNCHRO_INSTANCE(INSTANCE) IS_TIM_MASTER_INSTANCE(INSTANCE)

#define IS_TIM_DMABURST_INSTANCE(INSTANCE)\
(((INSTANCE) == TIM2) || \
((INSTANCE) == TIM3) || \
Expand Down
Loading